IAR 7.8 does not support dynamic heap, and some test/addition of new
feature fail on this device because of less static RAM memory.
Reducing the heap memory size for the same reason.
The vector table relocation sequence depends on:
1. Whether the SoftDevice is present.
2. The Application is a bootloader or not.
If the SoftDevice is present and the application is a bootloader
the MBR must be initialized to trap SoftDevice service calls
before setting the new vector table address.
The SCB->VTOR must be set to point at the MBR as well.
If the SoftDevice is not present the SCB->VTOR can point at the
new vector table directly.
We cannot rely on the default value as a pin could
be use for Analog purposes in which this bit is cleared
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
SPI pins are not initialized correctly according to the current
SPI mode.
This commit changes how the SPI instance is configured and ensures
that:
1. SPI pins are initialized on each object initialization.
2. SPI pins are reinitialized on each mode or object change.
3. SPI instance is only initialized when a change has occured.
* Updates driver library to v2.3.1 (2018q1) for bugfixes and convenience functions
* Provides library in correct format (2-byte wchar_t flag) for compiling with ARMCC (#6695 uncovered by #6577)
* Reverts to using a statically-allocated packet buffer since malloc is not thread-safe (and the asserts have been turned on)
This commit changes the conversion function to do all the calculation
inside the HAL in ticks instead of microseconds.
The conversion will be done in Mbed OS side.
As SystemCoreClock is not a constant, it can not be used to initialise
the ticker_info_t structure.
Change-Id: I8fd4bf20dc5be8b965aca45f800a631275ccc724
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This commit changes the code to fix the compiler warnings on ARM,
GCC_ARM and IAR.
Change-Id: I92676d2cc85daacde9f43f1898377a2cea750c50
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This commit changes the clock frequency to the good value of 25 MHz.
Change-Id: I18e559718619e3b1942c42fda2413b690c7b5852
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This commit does not bring functional changes.
Here is the list of changes:
- merge CMSDK_CM3DS.h and SMM_MPS2.h into CM3DS.h
- remove unused code
- split copyright headers from first comment of each file
Change-Id: I79b7ee01689439b7d2fde9d13035a5edf17f69ff
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
- fix compiler warning message of flash_api.c
- fix compiler warning message of startup_ADuCM4050.c
- eliminate absolute address of ROM tables
- add MBED_APP_START and MBED_APP_SIZE to linker scripts
* Consolidated device_has and macros to the main MCU targets.
* Moved errata configuration to mbed_lib.json for HAL implementation.
* Moved clock configuration to mbed_lib.json for HAL implementation.
* Moved UART configuration to mbed_lib.json for HAL implementation.
Instance counter keeps track of how many objects have been
initialized and freed. On the first object the instance is
enabled and on the last object the instance is disabled.
Serial implementation uses UARTE instead of UART peripheral:
* EasyDMA is used for reading and writing data.
* Triple buffering for receiving data.
See README for full description.
When possible, the I2C HAL will now use the TWI driver in SDK 14.
The manual I2C API still maps onto the old TWI peripheral directly
because the TWI driver doesn't provide the needed low-level functionality.
The NRF52 series can map digital signals to any physical pin which
makes it challenging to associate pin names with hardware instances.
pinmap_ex:
Keep track of which hardware instance is in use and what pins are
associated with it. Currently only supports I2C and SPI, but
provides a mechanism for allocating the shared I2C/SPI hardware.
PeripheralPinsDefault:
Optional pin map for pre-assigning hardware instances at compile
time. This makes it easier to optimize hardware utilization.
* Add NRF_SD_BLE_API_VERSION=5 macro to MCU_NRF52832 target
* Added initial Softdevice v5 API support for nRF5XPalGattClient.cpp
* Added initial Softdevice v5 API support for nRF5xGap.h
* Added initial Softdevice v5 API support for nRF5xGattServer.cpp
* Make sure the ah() hash function used by the security manager is declared with C linkage
* Removed 'ARM porting pending' checks in Nordic SDK
* Added BLE configuration to mbed_lib.json for NRF52x targets
* Migrated APIs and events model for Nordic SDK14.2 & SD API v5 in btle.cpp; adopted polling dispatch model
* Migrated APIs and events model for Nordic SDK14.2 & SD API v5 in nRF5xn.cpp
* Migrated APIs and events model for Nordic SDK14.2 & SD API v5 in nRF5xGap.cpp
* Added const qualifier to hwCallbacks's p_ble_evt parameter in nRF5xGattServer
* Add workaround to enable Radio Notification module from Nordic SDK
* Disabled SWI1 interrupt manually from SWI driver module
* Added missing include directive for "nrf_nvic.h" in ble_radio_notification.c
* Set correct number of custom UUIDs
* Adjust Softdevice RAM requirements for NRF52832/S132
* RAM settings for the application were adjusted as follow:
* Start: 0x20003800
* Size: 0xC800
* Adjust Softdevice RAM requirements for NRF52840/S140
* RAM settings for the application were adjusted as follow:
* Start: 0x20003700 (was 0x20003000)
* Size: 0xC900
* Added 3dBm as a permitted TX Power value for NRF52832
* Fix address type recovery in GAP
* Return min non-connectable adv interval compatible with infrastrcture's expectations
* Moved BLE driver from TARGET_SDK_14_2/FEATURE_BLE to TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble
* When multiple TRNG objects are initialized, destroying the first
object will turn the TRNG off for the other objects. This fix
adds a counter to ensure that only when the last object is
destroyed will it cause the TRNG to be disabled.
* The corner case where a user request 0 bytes is correctly handled
and will now return immediately.
Add fstorage and fds from Nordic SDK for SoftDevice compatible
flash storage. Mbed HAL flash API mapped to use fstorage API
to ensure write and erase doesn't conflict with BLE operation.
Various bug fixes:
* Moved SPIM3 location in vector table based on new location in SDK 14.2.
* Updated vector table entries and size in startup code and linker scripts.
* Added missing vector table RAM section to IAR linker script.
Ability to swap SoftDevices using the mbed configuration system.
For example, build NRF52840_DK without SoftDevice:
"target_overrides": {
"*": {
"target.MERGE_SOFT_DEVICE": false,
"target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_S140"],
"target.extra_labels_add": ["SOFTDEVICE_NONE"]
}
}
Pinned down vector table to beginningn of RAM.
Critical section enter/exit is now delegated to Nordic SDK's
sd_nvic_critical_region_enter
sd_nvic_critical_region_exit
When the SoftDevice is not included these functions map to
__disable_irq
__enable_irq
Initial commit for separating NRF52 code from the NRF51 and for
combining the NRF52832 and NRF52840 SDK to version 14.
nRF5_SDK_14.2.0_17b948a.zip has been used as baseline.
The folders in SDK/components:
* ble
* boards
* device
* drivers_nrf
* libraries
* softdevice
have been copied to TARGET_NORDIC/TARGET_NRF52/TARGET_SDK14.
Each folder contains a README.md file describing any modifications
made to that particular folder. Most common operation is deletion
of files.
If the need arise in the future the missing files can be added again.
The SoftDevices have been moved to TARGET_SOFTDEVICE_x folders for
flexible selection.
ble.h has been renamed to nrf_ble.h to avoid namespace clash with
mbed OS BLE.
Fix the following warnings:
[Warning] wifi_util.c@791,20: comparison between signed and unsigned integer expressions [-Wsign-compare]
[Warning] wifi_util.c@835,21: comparison between signed and unsigned integer expressions [-Wsign-compare]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Fix the following errors:
[Warning] dhcps.c@158,1: label 'Exit' defined but not used [-Wunused-label]
[Warning] dhcps.c@161,13: 'dump_client_table' defined but not used [-Wunused-function]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Fix the following warnings:
[Warning] wifi_promisc.c@113,61: missing braces around initializer [-Wmissing-braces]
[Warning] wifi_promisc.c@297,52: comparison between signed and unsigned integer expressions [-Wsign-compare]
[Warning] wifi_promisc.c@403,52: comparison between signed and unsigned integer expressions [-Wsign-compare]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Fix the following warning:
[Warning] lwip_intf.c@134,5: this 'if' clause does not guard... [-Wmisleading-indentation]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Fix the following warnings:
[Warning] tcm_heap.c@70,18: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'MemChunk * {aka struct _MemChunk *}' [-Wformat=]
[Warning] tcm_heap.c@70,28: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'MemChunk * {aka struct _MemChunk *}' [-Wformat=]
[Warning] tcm_heap.c@336,6: unused variable 'i' [-Wunused-variable]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Fix the following warnings:
[Warning] rtw_emac.cpp@62,104: format '%x' expects argument of type 'unsigned int*', but argument 3 has type 'uint8_t* {aka unsigned char*}' [-Wformat=]
[Warning] rtw_emac.cpp@62,104: format '%x' expects argument of type 'unsigned int*', but argument 4 has type 'uint8_t* {aka unsigned char*}' [-Wformat=]
[Warning] rtw_emac.cpp@62,104: format '%x' expects argument of type 'unsigned int*', but argument 5 has type 'uint8_t* {aka unsigned char*}' [-Wformat=]
[Warning] rtw_emac.cpp@62,104: format '%x' expects argument of type 'unsigned int*', but argument 6 has type 'uint8_t* {aka unsigned char*}' [-Wformat=]
[Warning] rtw_emac.cpp@62,104: format '%x' expects argument of type 'unsigned int*', but argument 7 has type 'uint8_t* {aka unsigned char*}' [-Wformat=]
[Warning] rtw_emac.cpp@62,104: format '%x' expects argument of type 'unsigned int*', but argument 8 has type 'uint8_t* {aka unsigned char*}' [-Wformat=]
[Warning] rtw_emac.cpp@201,101: format '%x' expects argument of type 'unsigned int*', but argument 3 has type 'char*' [-Wformat=]
[Warning] rtw_emac.cpp@201,101: format '%x' expects argument of type 'unsigned int*', but argument 4 has type 'char*' [-Wformat=]
[Warning] rtw_emac.cpp@201,101: format '%x' expects argument of type 'unsigned int*', but argument 5 has type 'char*' [-Wformat=]
[Warning] rtw_emac.cpp@201,101: format '%x' expects argument of type 'unsigned int*', but argument 6 has type 'char*' [-Wformat=]
[Warning] rtw_emac.cpp@201,101: format '%x' expects argument of type 'unsigned int*', but argument 7 has type 'char*' [-Wformat=]
[Warning] rtw_emac.cpp@201,101: format '%x' expects argument of type 'unsigned int*', but argument 8 has type 'char*' [-Wformat=]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Fix the following warnings:
[Warning] wifi_conf.c@326,28: suggest parentheses around comparison in operand of '|' [-Wparentheses]
[Warning] wifi_conf.c@451,39: format '%x' expects argument of type 'unsigned int *', but argument 3 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@451,43: format '%x' expects argument of type 'unsigned int *', but argument 4 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@451,47: format '%x' expects argument of type 'unsigned int *', but argument 5 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@451,51: format '%x' expects argument of type 'unsigned int *', but argument 6 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@451,55: format '%x' expects argument of type 'unsigned int *', but argument 7 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,39: format '%x' expects argument of type 'unsigned int *', but argument 3 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,43: format '%x' expects argument of type 'unsigned int *', but argument 4 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,47: format '%x' expects argument of type 'unsigned int *', but argument 5 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,51: format '%x' expects argument of type 'unsigned int *', but argument 6 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,55: format '%x' expects argument of type 'unsigned int *', but argument 7 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,59: format '%x' expects argument of type 'unsigned int *', but argument 8 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,63: format '%x' expects argument of type 'unsigned int *', but argument 9 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,35: format '%x' expects argument of type 'unsigned int *', but argument 10 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,35: format '%x' expects argument of type 'unsigned int *', but argument 11 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,35: format '%x' expects argument of type 'unsigned int *', but argument 12 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,35: format '%x' expects argument of type 'unsigned int *', but argument 13 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,35: format '%x' expects argument of type 'unsigned int *', but argument 14 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@460,35: format '%x' expects argument of type 'unsigned int *', but argument 15 has type 'u32 * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@831,16: format '%d' expects argument of type 'int *', but argument 3 has type 'rtw_security_t * {aka long unsigned int *}' [-Wformat=]
[Warning] wifi_conf.c@1335,2: suggest parentheses around assignment used as truth value [-Wparentheses]
[Warning] wifi_conf.c@1398,13: pointer targets in passing argument 1 of 'rtw_mfree' differ in signedness [-Wpointer-sign]
[Warning] wifi_conf.c@1724,7: variable 'ret' set but not used [-Wunused-but-set-variable]
[Warning] wifi_conf.c@1770,6: variable 'ret' set but not used [-Wunused-but-set-variable]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Fix the following warnings:
[Warning] osdep_service.c@58,11: comparison between signed and unsigned integer expressions [-Wsign-compare]
[Warning] osdep_service.c@208,61: suggest braces around empty body in an 'else' statement [-Wempty-body]
[Warning] osdep_service.c@1063,16: pointer targets in passing argument 1 of '_rtw_mfree' differ in signedness [-Wpointer-sign]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Fix the following warnings:
[Warning] hal_ssi.h@28,85: suggest braces around empty body in an 'if' statement [-Wempty-body]
[Warning] spi_api.c@87,27: comparison between signed and unsigned integer expressions [-Wsign-compare]
[Warning] spi_api.c@76,14: unused variable 'MaxSsiFreq' [-Wunused-variable]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Fix the following warning:
[Warning] pwmout_api.c@65,29: comparison between signed and unsigned integer expressions [-Wsign-compare]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Fix the following warnings:
[Warning] i2c_api.c@94,26: comparison between signed and unsigned integer expressions [-Wsign-compare]
[Warning] i2c_api.c@231,5: implicit declaration of function 'memset' [-Wimplicit-function-declaration]
[Warning] i2c_api.c@460,14: unused variable 'i2c_default_addr' [-Wunused-variable]
Signed-off-by: Tony Wu <tonywu@realtek.com>
The ci-shield tests that manually generate the START, STOP
by calling the HAL functions were failing. The byte operation
HAL functions cannot use the MCUXpresso SDK driver API's.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Some platforms have interface chips with hardware flow control
enabled by default. This commit adds configurable flow control to
STDOUT.
Usage:
* Define pin names STDIO_UART_RTS for Rx-flow-control and
STDIO_UART_CTS for Tx-flow-control.
* Set target.console-uart-flow-control. Valid options are:
null, RTS, CTS, and RTSCTS.
Replace looping construct with actual block writes.
Transaction in spi_master_block_write funtion is protected by critical
section to ensure it is completed without interruption. A hardware
limitation may cause data corruption if the TX fifo is allowed to run
empty.
Fix hundreds of excessive compiler warnings due to out of enum type range
Examples shown as follows:
mbed-os.lib/targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_i2c.h", Line: 329, Col: 34
mbed-os.lib/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/PinNames.h", Line: 172, Col: 11
Signed-off-by: Tony Wu <tonywu@realtek.com>
Simplify tickers to stop emulating 1us ticks by using native timer resolutions.
Implement ticker get info functions.
Separate rtc and lp ticker init status by implementing separate functions.
Compile: stm32f7xx_hal_pcd.c
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c: In function 'PCD_WriteEmptyTxFifo':
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1310:11: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (len > ep->maxpacket)
^
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1325:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (len > ep->maxpacket)
^
Simplify tickers to stop emulating 1us ticks by using native timer resolutions.
Implement ticker get info functions.
Separate rtc and lp ticker init status by implementing separate functions.
Simplify tickers to stop emulating 1us ticks by using native timer resolutions.
Implement ticker get info functions.
Separate rtc and lp ticker init status by implementing separate functions.
Add mbed_critical include file to disable compiler warning messages.
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 includes same usi chip,
so common USI_WM_BN_BM_22 target has been created.
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 are inheting the common usi target
Since revision 5499db1 (mbed-os-5.6.0) a hardfault occurs after a power-cycle.
It doesn't occur after a reset when the application has been downloaded using
drag-and-drop or via debugger. This is probably the reason why this problem
isn't detected when testing new mbed releases.
The hardfault occured in hal_sleep(). Adding a __NOP after __WFI solves the
problem although I don't fully understand why.
- Revision ca661f9 is the last revision where the problem doesn't occur.
- The problem doesn't occur when compiling with GCC instead of ARM compiler
- This issue describes a similar, but not identical problem and led me to test adding a __NOP: https://github.com/ARMmbed/mbed-os/issues/5065
1. Fix the check to look for if MCG has a PLL
2. Do setup before and after deep sleep mode execution
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Tests have shown that there is hich-up on MSI clock during the setup phase.
If this stabilization phase happens when application has restarted again
this can have side effects, like grambled UART characters typically.
So we're adding a delay before hading-over back to application.
With this modification, on NCULEO_L476RG, the wake-up time is increased
from 2ms to 2,5ms.
If possible this should be improved in the future to save 500 microseconds
of wak-up time. See TODO
There are cases where HW registers are found in unpexcepted state when
exiting Deep Sleep only few micro-seconds after it was entered.
By using an internal clock that does not depend on anythin and clocking
the system without using PLL, this allows SetSysClock default configuration
to run fine whatever possible configuration we find the HW in when
exiting Deep Sleep.
Also we shall restore interrupts only after all cloks are back to
expected running state.
This patchs adds TRNG support using the upstreamed, open-source, TZ-TRNG
driver.
It also implements the HAL for TRNG and add it in features.
The mbed-os.py script deletes files that are unused by mbed-os.
Change-Id: Idf8eefd809f00d40e0ad3cf7657f2a8c2eca3505
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
- ensure us_ticker_irq_handler() is called only when GP2 timer expires
- set us_ticker_set_interrupt() time interval to be 9.846 us
- set us_ticker_fire_interrupt() time interval to be 0.03846 us
- ensure us_ticker_irq_handler() is called only when GP2 timer expires
- set us_ticker_set_interrupt() time interval to be 9.846 us
- set us_ticker_fire_interrupt() time interval to be 0.03846 us
- convert tab to space
* Add source address word alignment check
* malloc and memcpy are called only if data is unaligned
* malloc size is now copySize (program page size), rather than whole buffer to be written
1. Disable unnecessary TX/RX threshold interrupts to avoid potential trap in DMA transfer
2. Start TX/RX DMA transfer simultaneously to fit H/W spec and avoid potential RX FIFO overflow issue
In Mbed OS, page size is program unit, which is different than FMC definition.
After fixing page size, we can pass NVSTORE test (mbed-os-features-nvstore-tests-nvstore-functionality).
This patch fix flash write issue when program size is more than page size (= 1024 bytes). See detail - https://github.com/ARMmbed/mbed-os/issues/6165
Source data always use aligned data in heap memory.
Mbed-os 5.4.7 was the last unofficial working support for this target.
Since Mbed-os 5.6.0, the support is now official and VK_RZ_A1H is now "codebase aligned" with GR_PEACH (RZ_A1H) & GR_LYCHEE (RZ_A1LU) !
- sector size is 0x800 bytes
- writeable unit size is 0x8 bytes
- flash start address is 0x0
- total ADuCM3029 on chip flash size is 0x40000 bytes
- total ADuCM4050 on chip flash size is 0x7F000 bytes
fix mbed-ci build error L6216E
* (.ARM.exidx) and *(.init_array) must be placed explicitly, otherwise it is shared between two regions, and the linker is unable to decide where to place it.
This patch changes the linker files and defines to use the ZBT SSRAM
instead of the FPGA Block RAM for code and data.
The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and
testbench user guide explains the available memories.
This switch improves code memory from 256 kB to 4 MB and data memory
from 128 kB to 4 MB.
However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the
processor can only boot at address 0x00000000 which means that it
expects the vector table to be at that address. That is why we have to
create 2 load regions in the linker scripts: one with only the vector
table at address 0x0 and one with code + data at address 0x00400000.
Because of these two load regions, linker will produce different
behaviours:
* GCC_ARM and IAR will only create 1 binary with both load regions
padding with 0 in between. The binary will then be very large (at least
4 MB) and the flash process will take longer.
* ARM and ARMC6 will create 2 binaries for the two load regions. The
load addresses of the two binaries can be written in the images.txt file
on the MPS2 board. You can also use the --bincombined option of fromelf
utility to produce only 1 large binary.
This patch also adds the memory_zones.h file to try to put in common all
the memory addresses that were previously hard coded in the linker
scripts / startup files.
With that patch in, the simplest option is to directly use the .elf file
with the MPS2, which is only possible with mbb_v225.ebf and more recent
firmwares. It will now be the default for CM3DS.
This commit works with greentea thanks to the now merged pull request
ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board.
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
Ameba has two memory blocks: SDRAM(2M) and SRAM(512KB). SRAM has better access performance than SDRAM. So some timing critical codes must be moved to SRAM.
fix for mbed-os issue #5778
rebase for #6289
1. Start function: Issue repeat start when bus is busy
2. Byte write function: Do not call SDK function as this does
not work for some of the Kinetis device
3. Byte read function: Do not call SDK function as this would
issue a START and STOP signal which is not required for
I2C byte functions
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
I2C3 clock define was missing. I2C3 is connected to the Arduino
connector which is used by the ci-test shield
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
fix section error, ARM compiler uses IRAM1.bss to calculate the heap size
fix conflict of _memset between Ameba's library and ARM compiler's library, use standard memset() instead of _memset() in case of ARM compiler
Originally, we use 2 H/W timers for us_ticker/lp_ticker, one for counting and the other for alarm.
With H/W timer running in continuous mode, we could use just one H/W timer for counting/alarm simultaneously.
Few targets need more than just pending IRQ set. They include some flags to be
set that are checked in IRQ handler. This is the case for targets in this
commit.
This commit adds the UART driver and updates the UART HAL implementation
to use this driver.
It also removes legacy definitions.
Change-Id: Ie8e7a7bb64c763a2d97bc66d949fab3596736bbc
Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>
This commit adds the SPI driver which is now called by the SPI HAL
implementation.
It also removes legacy definitions.
Change-Id: Iadb20dda9dfa571db3de66c3a1ce45d80d8b81b6
Signed-off-by: Tamas Kaman <tamas.kaman@arm.com>
This commit adds the GPIO drivers. The HAL implementations
(gpio_api.c, gpio_irq_api.c, port_api.c) now call these drivers.
Legacy definitions have been removed.
Serial HAL implementation has been changed to compile at this stage.
Change-Id: Ib76a3186358f5029ed350da671132e8aa11194f7
Signed-off-by: Galanakis, Minos <minos.galanakis@arm.com>
The HAL implementation (us_ticker.c and lp_ticker.c) now calls function
in cmsdk_ticker.c file. This file contains the necessary logic to be
able to only use one hardware timer (CMSDK timer) per mbed ticker.
This commit also updates the timer driver and removes legacy definition.
Change-Id: If40413822832117f9b78f38d2cdda7847284b035
Signed-off-by: Galanakis, Minos <minos.galanakis@arm.com>
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This patch changes the way data is put in the TX_DATA_PORT register when
sending packet over Ethernet.
When this driver is compiled with release compilation profile
(space optimization compiler options) with Arm compiler version 5,
the line:
SMSC9220->TX_DATA_PORT = *pktptr;
generates the assembly instruction to get the pktptr pointed value:
LDM r2!, {r3}
with pktptr = r2
However, the code does not prevent the pktptr value from being unaligned
(to a 32 bits boundary) in that zone and the LDM instruction causes a
HardFault if this is the case. When the compiler option is not activated
(debug and develop compilation profiles), the compiler generates LDR
instruction instead which does not cause a HardFault.
The ARM v7-M states page B3-601: "Unaligned load-store multiples and
word or halfword exclusive accesses always fault."
To face that problem, we check if the data pointer is aligned or not. If
it is, we apply the same algorithm than before. If not, a local variable
is created and we copy in it, byte per byte, the contents at the
unaligned pointer. However, it will impact performances adding 8
instructions (one LD and one ST for each copied byte).
Change-Id: I11f6e82ce5521960d2ecf499f718f76fec29c0b0
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
How you write and ersae the flash on the NRF52 changes depending on
whether the SoftDevice is enabled or not.
This change does a runtime check before erasing and writing, and
then chooses the correct function to perform the action.
Delta calculation from lp_ticker_set_interrupt() function:
delta_us = timestamp > now_us ? timestamp - now_us : (uint32_t)((uint64_t)timestamp + 0xFFFFFFFF - now_us);
Lets assume that timestam == now_us.
Expected delta value should be 0 and in this current version is 0xFFFFFFFF.
The following condition:
timestamp > now_us
should have the following form:
timestamp >= now_us
Additionally modified us ticker driver to provide the same logic.
Fix Details: HAL API for loguart is different that UART. Initially we
didnt have support for loguart in the mbed api. These changes have been
made to support the loguart from the mbed api by using the correct HAL
api calls
Renesas mbed boards incorporate NVIC Wrapper because Cortex-A9 use GIC. For example, NVIC_SystemReset() is defined in nvic_wrapper.c and declared in nvic_wrapper.h.
Because I removed one of include processing accidentally, I fixed the lack.
This supplements PR #5890.
The rework includes the following:
1. Remove ticker overflow handling because upper layer (mbed_ticker_api.c) has done with it.
This makes us_ticker/lp_ticker implementation more succinct and avoids potential error.
2. Refine timer register access with low-power clock source
Related to the review of #5857, I fixed the TRNG function for GR-LYCHEE.
- I modified to zeroize "recv_data" before the function return.
- I added the processing that check the return value of I2C.read function. If return value is error, "output" is zeroized before function return.
- In trng_get_bytes_esp32 function, there is a time lag in the period from ESP32 reset to start working, error may occur when "Write" is called. Thus, I added a retry counter due to address this concern. There is not this counter for "Read" since it is called after "Write".
* MCUs within a family like EFM32GG can omit some peripherals, e.g. EFM32GG230 doesn't have UART
* This commit adds a check to make them compilable, relevant mainly for custom boards
The mbed_sdk_init can be called either during cold boot or during
application boot after bootloader has been executed.
In case the bootloader has already enabled the cache,
is is needed to not enable it again.
Default SERIAL pins are now available for ADC and PWM
when STDIO_UART_TX and STDIO_UART_RX are user defined
https://os.mbed.com/teams/ST/wiki/STDIO
Alternative pins have been also defined
The mbed_sdk_init can be called either during cold boot or during
application boot after bootloader has been executed.
In case the bootloader has already enabled the cache,
is is needed to not enable it again.
I modified the lack of license header in the below header files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/TARGET_MBED_MBRZA1H/reserved_pins.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/TARGET_MBED_MBRZA1LU/reserved_pins.h
I supported the TRNG function when target is GR-LYCHEE.
GR-LYCHEE generates TRNG by acquiring the random number of Wifi module(ESP32) incorporated in it using I2C.
For supporting to CMSIS5/RTX5, I added the start-up processing of 3 toolchains (ARMCC, GCC_ARM, IAR) and the register definition of RZ/A1LU specific.
In addition, I added the linker script files to implement the dynamic HEAP the same as GR-PEACH(RZ/A1H).
This commit fixes#5840. Fix verified by running mbed_hal-lp_ticker test suite with preloaded RTC counter such that it wrapped in the middle of the suite.
Also removes explicit sleep blocking from the us_ticker implementation, since sleep blocking for us tickers is done at mbed HAL level now. This was causing one of the lp_ticker tests to fail.
I modified the lack of copyright in the below header files that I added for commonizing the RZ_A1 related files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/mbed_drv_cfg.h
Read By group type response can return 4 descriptor discovered when the remote server have 4 descriptors with a 16 bit UUID. The handle, UUID pair get stored in a ble_gattc_desc_t that is 20 bytes long.
This PR increase buffer size to handle this use case.
hal_critical_section_enter() is safe to call multiple times, however
hal_critical_section_exit() is only called on the last exit from a
critical section. This will cause a mismatch in the counter and the
interrupt state will never be restored if the critical section is
nested. Change this to a bool so that the interrupt save state is
tracked for hal_in_critical_section() to work correctly.
STM32L0, L4, F7 and few F4 chip are supporting LPTIM feature.
We propose to allow user to use LPTIM for MBED LowPowerTimer API instead of using RTC wakeup timers.
By default, all targets that are supporting this feature have been configured.
I made be available in common whatever the board related to RZ_A1 in the below files.
- Since there are the table code of Pinmap differs for each board, I moved the code to "PeripheralPins" file for each board, and changed to include PeripheralPins.h.
analogin_api.c, can_api.c, gpio_irq_api.c, i2c_api.c, pinmap.c, port_api.c, pwmout_api.c, serial_api.c, spi_api.c and us_ticker.c
- Since there are some board-specific processes, I enclosed the processes with "#ifdef" and rearranged the functions to make be easier to enclose.
can_api.c, ethernet_api.c and serial_api.c
- Since there are the driver configuration values differs for each board, I added "mbed_drv_cfg.h" file for each board and defined macros for the values, and changed to refer to the macros.
can_api.c, gpio_api.c, pwmout_api.c and rtc_api.c
In "targets/TARGET_RENESAS" folders, same as Cortex-M targets, I changed the folder structure to combine files that can be shared as RZ/A1 related.
And I renamed the folder name to "TARGET_RZ_A1XX" in order to make commonality explicit.
- "targets/TARGET_RENESAS" folder
<before>
\targets\TARGET_RENESAS\TARGET_RZ_A1H
\targets\TARGET_RENESAS\TARGET_VK_RZ_A1H
<after>
\targets\TARGET_RENESAS\TARGET_RZ_A1XX
Call underlying HAL implementation to enter critical section/disable interrupts
before incrementing the global critical section counter.
Modify HAL implementations to track first entrances to the critical section and
only update the saved state on first enter.
Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt
As counter gets zero, crypto clock is disabled to save power.
which can be called from diferent contexts.
Orginal nordic critical primitives must been called in pairs
from exacly the same function. As mbed hal call it in separate
methods, so they are not suitable here.
As it does not share the codebase with RZ A1H, it needs to be disabled until
bring it up to date with the latest changes to cmsis. There are changes
regarding caches, mmu and others
Merged from the existing TARGET_DISCO_F413ZH code (which has the same MCU)
and TARGET_NUCLEO_F412ZG code (which has the same Nucleo-144 board and
pinout).
Although the extened RTC is supported by #5363 commit ("Add support and tests for extended RTC"), it seems that the changes was overlooked in RZ_A1H_api.c.
So I added the changes with reference to other rtc_api.c.
I changed disable_irq() / enable_irq() to core_util_critical_section_enter() / core_util_critical_section_exit() by utilizing "mbed_critical" function in the below drivers.
- serial_api.c
- us_ticker.c
I added the below definitions for working "Dynamic Stack" and "Dynamic heap" on Mbed OS by referencing with the codes of Cortex-M target board.
"ISR_STACK_START", "ISR_STACK_SIZE", "INITIAL_SP", "HEAP_START" and "HEAP_SIZE"
By updating to the codes of CMSIS5/RTX5, GIC_SetConfigration() function was added for Cortex-A, this function is set the interrupt configuration using GIC's ICFGR register. Therefore, I added this function to satisfy Cortex-A interrupt spec in the below files.
"can_api.c", "ethernet_api.c", "gpio_irq_api.c", "i2c_api.c", "spi_api.c" and "us_ticker.c"
For supporting tp CMSIS5/RTX5, I changed the start-up processing of 3 toolchains(ARMCC, GCC_ARM, IAR) and updated the register definition of PEACH specific.
In addition,
I changed the linker script files to implement the dynamic HEAP the same as Cortex-M targets.Since GR-PEACH's HEAP was a fixed area, I changed the label name(ZI_DATA to RW_IRAM1) and replaced the allocation of STACK/HEAP.
Set buffer for 1 sample in analogin_read_u16. Before it assumes the
buffer is set outside by the higher layer. Now it's temporarily
located on the stack since only the ADC value is returned.
Pending official update from STM, add memory barriers to the Ethernet
HAL code for the STM32F7xx family.
Cortex-M7 has a merging write buffer that is not automatically flushed
by accesses to devices, so without these DMBs, we sometimes lose synch
with the transmitter.
The DMBs are architecturally needed in every version of this HAL, but
adding just to the STM32F7 version for now to clear test, as the
problem has only been observed on Cortex-M7-based devices.
Fixes#5622.
Filter numbers 14 to 27 are reserved for dual CAN configuration.
However, CAN3 operates in single CAN configuration according to the
reference manual).
CAN_2 and CAN_3 are enum and not #define and this causes compilation error with GCC_ARM
Instead put back the test of CAN_NUM (which are defined in can_device.h).
Ensure all instance memory blocks meet 4 byte alignment requirement
without relying on compiler's or liker's optional settings:
- gpioMemory[] for adi_gpio_Init()
- aRtcDevMem0[] for adi_rtc_Open()
- i2c_Mem[] or I2C_Mem[] for adi_i2c_Open()
- spi_Mem0[], spi_Mem1[], spi_Mem2[] or SPI_Mem[] for adi_spi_Open()
Add RSF synchro during init
Set a better WakeUp clock for long wake up period in order to stay in sleep mode
Use rtc_isenabled function before init as rtc_init is called at each set_time call
- Maintain compatible code for ARM 5 and ARM 6 while default alignment
settings differ.
- Instance memory containing memory pointers must be 4 byte aligned for
all compilers regardless compilers' settings.
- uint32_t is recommended to replace uint8_t for instance memory
declaration because uint32_t guarantee 4 byte alignment.
Based on the Mbed OS website the A3 is connected to "DAC", however there
is no define for DAC. In order to get the Realtek RTL8195AM to even compile
with mbed-os-example-client now, we must have the A3 defined - it is one of
the standard Arduine header pins. Therefore, setting it as NC.
A4-A5 are not connected either, so adding them as "NC" as well.
Realtek will hopefully push a proper fix sooner or later, if there is a
more meaningful define for the A3 pin. They do state however that the
A0-A3 pins are not GPIO capable anyway.
Ref: https://os.mbed.com/platforms/Realtek-RTL8195AM/
1. move ota region 1 from 0x00b000 to 0x040000
2. move ota region 2 from 0x0c0000 to 0x120000
3. refactor bootloader header as follows:
uint32_t tag;
uint32_t ver;
uint64_t timestamp;
uint32_t size;
uint8_t hash[32];
uint8_t campaign[16];
uint32_t crc32;
where,
a. hash is the sha256 checksum of the payload.
b. crc32 is the crc32 checksum of headers from tag to campaign.
4. Call NVIC_SystemReset for soft reset.
Signed-off-by: Tony Wu <tung7970@gmail.com>
signals are lost. It was observed at last for tests-api-spi ci-test-shield's
test.
This patch introduce usage of sdk5 origin implementation in which
sd_nvic_critical_region_enter/exit is calling each time critical region
is enter/exit. This fixes the issue.
Timer code was written based on integer multiple HF clock frequencies. EFR32 doesn't conform to that (38.4), and so the timestamp ticks were off by 1%. Enough to trip up some CI tests on TB_SENSE_12 (#5496)
- serial_init, serial_free and serial_baud function moved from serial_device.c (specific to each STM32 family) to serial_api.c (common STM32 file)
- default baudrate value was hardcoded to 9600
- Value is set now to MBED_CONF_PLATFORM_STDIO_BAUD_RATE for STDIO
- Value is set now to MBED_CONF_PLATFORM_DEFAULT_SERIAL_BAUD_RATE for other use
- UART init will not be stopped before calling serial_baud function
This patch handles the case of SPI slave mode without MISO (NC).
In case MISO is not connected, we consider that SPI will be configured in
3 wires mode (CLK / MOSI / CS, but no MISO). In this case, the MOSI line
is bi-directional : SPI_DIRECTION_1LINE.
But as this is not supported yet in slave mode, we force it to
SPI_DIRECTION_2LINES. In this case slave SPI will receive data on MOSI
but nothing will be sent back to master as MISO is not connected.
Old lp_ticker handles past event, but it has a bug with premature go-off.
The bug can re-produce on mbed-os-tests-mbed_drivers-lp_timeout/mbed-os-tests-mbed_hal-lp_us_tickers (mbed-os commit: 9c1fd48529).
Because upper layer (mbed-os/hal/mbed_ticker_api.c) has handled past event, this code can be removed from lp_ticker.
The similar fix also applies to us_ticker.
Re-casting with tmp the uint8_t* pData pointer to uint16_t* brings a
memory corruption and typically can corrupt the size parameter. This
is fixed with this commit.
STM32 Internal ticket reference : 39116
Fixed issues raised from ARM PR review and removed the unsupported platform.
- Fixed an issue where the TRNG is read even though it may not be ready;
- Added configuration to ensure the buffering mode is disabled so only 8-bit bytes are generated;
- Moved the TRNG device handle into the trng_t structure.
Removed undefined spi slave related functions.
- Added error checking for trng_get_bytes function;
- Added curly brackets to single line conditions for some files;
- Changed rx and tx buffers in serial module as local variables;
- Removed some unused code and some minor formatting corrections;
- Minor i2c & spi updates for github pull request;
- Added function definition for spi_master_block_write.
Added default delay and sample times for the ADC during initialization.
- Added code to clear stack variable in trng_get_bytes upon exiting the
function;
- Remove lp ticker functionality as the timer hardware does not satisfy
lp timer requirements.
Added a check for the STUCK bit before reading the RNG data register to ensure there are no hardware faults.
- Removed .mbedignore to work around some exporter issues;
- Added #includes to some of the driver data C files for them to build on their own.
For api usage like DigitalOut led(LED1, 1) the hal function gpio_write()
sets the output before f. gpio_mode() is called. gpio_mode() clears the
output as it take never writen parameters (gpio_cfg_t.init_hight).
This patch use internal hardware register of GPIO output instedad of above paramiter latch
for retaining proper writen state.
The Page size has been set to 1 byte instead of the previous 256.
Although 256 is the physical page size, the driver supports
writing 1 byte at a time.
The computation of the sector number in GetSector for 2MB flash sizes
consists in adding an extra constant for 2MB dual bank (12 as in
ADDR_FLASH_SECTOR_12), then going through the same address check as if it
was an address of the first sector.
That means that we need to modify tmp and address as if it was a first bank
address, which we're doing here by sub_stracting 0x100000 delta.
Three main issues:
1) The 0x13 special case section in write data in ncs36510_i2c.c didn't have a write++ command.
2) In the same write function, the WDAT8 command was put before the 0x13 section and this is not correct
3) Needed to add wait_us(0) before and after the register writes for apparent clock domain crossing delay times until registers are stable in HW
There were also a handful of other tweaks related to general code maintenance and moving some status register checks to the proper locations.
TIMER2_7_IRQ is shared among several timer sources, including
us_ticker. Raising TIMER2_7_IRQ pending bit will trigger the timer
interrupt, but the timer interrupt handler will not know which timer
source this interrupt is for. This patch sets timer load value to one
tick and force us_ticker to fire almost "immediately".
TIMER2_7_IRQ is handled through a common interrupt handler, and
is automatically cleared. Therefore, there is no need to clear IRQ.
The underlying timer HAL treats load value as micro-seconds and does
conversion internally. Therefore, simply pass micro-seconds to timer
HAL without converting to tick first.
Signed-off-by: Tony Wu <tung7970@gmail.com>
Cribbed from 4bf42f2e20
I'm not sure if if there are any copyright issues here with what is
effectively a set of config files. A few folks have been bugging me (and
the redbear folks) for these changes, so I wanted them somewhere
centralized.
The generic Flash support for L4 and L0 families is already there,
but was not activated by default on 2 recentely added boards:
DISCO_L475VG_IOT01A and DISCO_L072CZ_LRWAN1
This is done now.
HAL_RNG_GetRandomNumber is a deprecated API and replaced here with
a call to HAL_RNG_GenerateRandomNumber.
Doing so, we also rework the driver to use the 4 bytes returned by a call
to HAL_RNG_GenerateRandomNumber instead of 1 byte out of 4.
HAL_RNG_GenerateRandomNumber was not returning any error code, so now
we can also check the return code.
Remove redundant memory regions, and merge multiple RAM regions into one
to solve ielftool zero padding issue.
The side effect is less control over object files placement. It's all up
to linker's best effort.
Signed-off-by: Tony Wu <tonywu@realtek.com>
lp_ticker driver is the known registered user of RTC handler API.
In case, a lp_ticker is set in the past, the lp_ticker_fire_interrupt
will be called which itself sets the RTC interrupt as pending by calling
NVIC_SetPendingIRQ(RTC_WKUP_IRQn). This all happens without actual
programing of the RTC wake-up.
As a result the RTC HW and corresponding HAL layer doesn't expect an
interrupt to happen and will not call HAL_RTCEx_WakeUpTimerEventCallback.
To sove this situation, we will not use HAL_RTCEx_WakeUpTimerEventCallback
weak definition but rather call handler whenever an RTC interrupt fires.
Change implementation of timeout to one that is using us_ticker hal.
Timeout is now configurable by I2C_TIMEOUT_VALUE_US macro and this
value will be imported if will be defined externaly.
- Added curly brackets to single line conditions in gpio_qpi.c and gpio_irq_api.c;
- Changed rx and tx buffers in serial module as local variables;
- Minor i2c & spi updates for github pull request;
- Added function definition for spi_master_block_write.
- Added a configuration call in trng_init to make sure the TRNG buffering mode is disabled, so only 8-bit bytes are returned;
- Moved the TRNG device handle into the trng_t structure;
- Fixed some formatting errors in the adc driver.
Fix ARMC6 guard typo introduced in commit 4f3f0cc9cc (Make Realtek link)
While at it, remove redundant ISR_STACK_SIZE assignment for ARMCC.
Signed-off-by: Tony Wu <tonywu@realtek.com>
Target of LPC1769 links to mbed LPC1768.
The PinNames.h has conditional compile for the pin names.
LWIP lpc17xx emac driver modified to allow LPC1769 target
Fixes#5115.
`analogin_read_u16` returns a value in the range `0x0000 - 0xFFF0`
since the resolution of the ADC is 12 bits. However, in
`analogin_read` this value gets divided by `0xFFFF` assuming the range
is `0x0000-0xFFFF`. This causes a small error in the value returned by
`AnalogIn::read` for the EFM32 target.
The allocation of GPIOTE channels for DigitalIn is unwanted behavior.
This caused early run-out of channels for InterruptPin.
This patch replacing input configuration that is using gpiote driver by configuration that is
using gpio hal.
Previous the voltage range was set to 1.2 from SoC internal reference source.
This caused problem with testing. It is unexpected that range is much
shorter than vdd as well.
The voltage range was extended using SoC build in analog prescaler (set to 1/3).
From RM:
32.3.2.6 Interrupts during IAP
The on-chip flash memory is not accessible during erase/write operations. When the user
application code starts executing the interrupt vectors from the user flash area are active.
The user should either disable interrupts, or ensure that user interrupt vectors are active in
RAM and that the interrupt handlers reside in RAM, before making a flash erase/write IAP
call. The IAP code does not use or disable interrupts.
The use of mktime was causing a fault when called in interrupt handler because on GCC it lock the mutex protecting the environment, To overcome this issue, this patch add dedicated routine to convert a time_t into a tm and vice versa.
In the process mktime has been optimized and is now an order of magnitude faster than the routines present in the C library.
commit f7bc126 (Re-work Rtl8195AM ticker) tried to address ticker drifting
issue, but in fact broke ticker functionality. This patch adjusts us_ticker
porting to unbreak it, and to fix the following tests:
mbed-os-tests-mbed_drivers-ticker
mbed-os-tests-mbed_drivers-timeout
mbed-os-tests-mbedmicro-rtos-mbed-isr
mbed-os-features-frameworks-utest-tests-unit_tests-minimal_async_scheduler
mbed-os-features-frameworks-utest-tests-unit_tests-case_control_async
mbed-os-features-frameworks-utest-tests-unit_tests-case_async_validate
Changes are:
1. Dont disable timer after every us_ticker interrupt. That basically
breaks ticker functionality.
2. Fine-tune us to tick conversion macro. Previous conversion method
yields 1 tick drift every 2 ms.
3. Remove special placement of ticker objects. No longer necessary.
Signed-off-by: Tony Wu <tonywu@realtek.com>
As reported by MBED user Fran6Jack:
I2C bus are usually 5V tolerant on all STM32 processor.
If an external device on the I2C bus requires 5V operation,
we usually acheive it by using 5V external pull-ups on the bus.
Since signaling uses open-drain output on I2C for both signal SCL and SDA
any 5V tolerant MCU will work on a 5V I2C bus. Having pull-up activated on a 5V externally pull bus, cause the pin to clamp on the STM32 die diode and could damage the IC (There is a note in STM32 datasheet specifying this issue).
It is understood by all the community that I2C bus should always be
externally pulled by physical resistor. I2C initialization should then
be ALWAYS OpenDrainNoPull by default.
Up to now, this I2C driver was setting pull up by default as it helps
basic testing, like 1 master and 1 slave, conencted with 2 wires without
any external pull ups. This will not work anymore after this commit and
applications tests or examples needs to be modified to explicitely
configure pull ups ... But it is safer to follow reference manual
guidelines.
When the RTOS is present and the tickless mode is not implemented, it is
expected that the next tick issued by the Systick timer will wake up the MCU.
However nothing prevents an implementation of the ARM architecture to gate the
systick clock signal upon sleep entry.
Therefore on those targets sleep shall be prohibited if the RTOS is present and the
tickless mode is not implemented.
To ease life of porters , a new option has been added in the device add list:
STCLK_OF_DURING_SLEEP. This option expose that the target turn of the systick
clock during sleep.
Targets which exhibit such behavior shall add this define in their device_has list.
There was some interesting stuff here.
* ARMC6 treats assembly the same as GNU, but has a different startup
function, so we branch the asm there
* Incorrect discriminant, probably copied from other ports
Add NOPs after deep sleep to prevent unexpected behavior. It appears
that the first one or two instructions after deep sleep do not get
executed properly.
Note - This is a temporary workaround. For a more robust solution
the NCS36510 needs to investigate the root cause of this issue.
The NCS36510 is not suitable for tickless, since its LP ticker cannot
be scheduled fast enough. This is because it takes four 32KHz clock
cycles before these writes take effect - ~120us.
Decrease the interrupt stack from 2k down to 1k so there is enough
ram to build all the tests with tickless enabled. In general, targets
should not need an interrupt stack greater than 1k with mbed-os.
Some Cortex-M0 devices, such as the nrf51, don't have the SysTick.
Instead, these targets use a software interrupt to simulate SysTick.
Add the hooks in the tickless code to support these devices. Targets
which do not have SysTick should now define NO_SYSTICK in targets.json
and implement mbed_get_m0_tick_irqn to add os suport.
This patch also removes os tick handling from the existing devices
(nrf51) since this is now handled in common code.
IAR 8.x compiler throws error for emac_interface_t constructor
rtw_emac.cpp@220,0: [Pe1790]: the default constructor of "emac_interface"
cannot be referenced -- it is a deleted function
Error is because new object is created of structure with constant member.
Resolved it by using malloc instead new.
Rather than Unlocking flash during flash object creation, and leaving
the flash possibly continuously unlocked a(s object might bever be freed),
we decide to Unlock then Lock again at each erase or program call.
Fixing regression introduced in commit
"Ticker: add fire interrupt now function".
In above mentioned commit, the management of timestamp being in the past
has been moved to higher layer (hal/mbed_ticker_api.c), but the reset of
oc_int was missing when implementing the new us_ticker_fire_interrupt
function - which is fixed now.
After reset the MCR register content needs to be restored so we're
introducing the can_registers_init function to be called at the first
init stage, but also after reset. We also store the can frequency to
go through the initialisation phase again.
In order to apply the same mode in case of reset, we store the current
requested mode in the HAL structure.
To make storage in a single place, we also change can_monitor to call
can_mode function as they actually acting on same registers.
Instead of a static object, this will make driver
instantiation more robust and allow to re-use init
configuration on a need basis.
The CANName struct member is actually the CAN registers base address,
which is now available in the CanHandle.Instance field, so we don't need
CANName anymore.
Since mbed-os 5.4.3, something increased foot print of mbed-os and the applications that were barely fitting in started to spill.
IAR toolchain for LPC176x target family is set to use 2 RAM regions (32K each). RAM region
2 is being used for ETH/USB and 1 is being used for vector table, stack/heap/static data.
In this commit we have decreased heap size allocation from 8K to 7K so that the is more room for stack and static data.
If NVIC_NUM_VECTORS is larger than the space allocated by the vector
table in ram (__ram_vector_table_size__) then the call to mbed_cpy_nvic
during boot will corrupt valid data, which can lead to a crash. This
patch fixes the declared number of vectors on the KL27Z, KL43Z and
KL82Z to fix this crash.
Mahesh Mahadevan
Keyur Hariya
Jimmy Brisson
Cruz Monrreal
deepikabhavnani
Marcus Chang
Andrew Leech
Jammu Kekkonen
Martin Kojtal
jeromecoutant
Steven Cooreman
Hugues de Valon
Edmund Hsu
sarahmarshy
Blackstone Engineering
Donatien Garnier
Ganesh Ramachandran
bcostm
Thomas Sailer
Tony Wu
Paul Thompson
Kari Haapalehto
Andreas Rebert
Netanel Gonen
Joris Aerts
ccli8
Laurent MEUNIER
Wilfried Chauveau
Cruz Monrreal
Ashok Rao
Netanel Gonen
toyowata
Martin Kojtal
cyliangtw
zzw
mbedNoobNinja
Amanda Butler
amq
Evan Hosseini
Juha Ylinen
TomoYamanaka
paul-szczepanek-arm
Rob Meades
Bartek Szatkowski
Anna Bridge
gorazd
daid
adustm
Maciej Bocianski
Avinash Mehta
Tamas Kaman
Galanakis, Minos
Fahim Alavi
Bilal
Kevin Bracey
Pavel Slama
Senthil Ramakrishnan
Przemyslaw Stekiel
Andreas Larsson
Prashant Ravi
Marc Emmers
drewcassidy
David Saada
Kimmo Vaisanen
chrisyang
Serge Camille
PHST
Vincent Coubard
Steven Cartmell
Andrzej Puzdrowski
Adam Heinrich
Dave Wu
Dexter Fryar
Maciej Rogozinski
Boting Ren
Alessandro Angelino
andreas.larsson
Janne Kiiskilä
Mathieu Garivet
Tony Wu
Helmut Tschemernjak
Veijo Pesonen
Michael Kaplan
Marko Fabo
Steven Cooreman
Bartosz Szatkowski
Yuguo Zou
danclement
johnny
Andrea Corrado
Kevin Gilbert
misodengaku
Piotr Grygorczuk
iotvietmember
maclobdell
Pavel Sorejs
Roberto Spelta
Pierre-Marie Ancele
Nabil Elqatib
Chris Snow
Seppe Stas
Russ Butler
Russ Butler
Hasnain Virk
Jan Jongboom