mirror of https://github.com/ARMmbed/mbed-os.git
Martin Kojtal
GitHub
commit
2eaa32f35f
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@ -45,7 +45,7 @@ EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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#include <stdint.h>
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#ifdef __CC_ARM
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#ifdef __ARMCC_VERSION
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#include <rt_misc.h>
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#endif
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#include <cmsis.h>
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@ -61,8 +61,8 @@ extern void SramInit(void);
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/*----------------------------------------------------------------------------
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Checksum options
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*----------------------------------------------------------------------------*/
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#if defined (__CC_ARM)
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__attribute__ ((at(0x000001A0u)))
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#if defined (__ARMCC_VERSION)
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__attribute__((section(".ARM.__at_0x000001A0")))
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#elif defined( __ICCARM__)
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__root
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#endif /* __ICCARM__ */
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@ -151,7 +151,7 @@ const pFunc SECTION_PLACE(IVT_NAME[104],VECTOR_SECTION) =
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/*----------------------------------------------------------------------------
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* Initialize .bss and .data for GNU
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*----------------------------------------------------------------------------*/
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#if defined( __GNUC__) && !defined (__CC_ARM)
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#if defined( __GNUC__) && !defined (__ARMCC_VERSION)
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void zero_bss(void)
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{
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uint32_t *pSrc, *pDest;
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@ -248,7 +248,7 @@ void Reset_Handler(void)
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may reside in DSRAM bank B. */
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SramInit();
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#if defined(__GNUC__) && !defined (__CC_ARM)
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#if defined(__GNUC__) && !defined (__ARMCC_VERSION)
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/* Clear the bss section for GCC build only */
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zero_bss();
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#endif
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@ -263,7 +263,7 @@ void Reset_Handler(void)
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/*----------------------------------------------------------------------------
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Default Handler for Exceptions / Interrupts
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*----------------------------------------------------------------------------*/
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#if defined(__CC_ARM) || defined (__GNUC__)
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#if defined(__ARMCC_VERSION) || defined (__GNUC__)
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void Default_Handler(void)
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{
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while(1);
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@ -63,16 +63,14 @@ RESET_EXCPT_HNDLR
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#define VECTOR_SECTION ".vectors"
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#ifdef __CC_ARM
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extern unsigned Image$$ADUCM_HEAP$$Base[];
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extern unsigned Image$$ADUCM_HEAP$$ZI$$Limit[];
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#ifdef __ARMCC_VERSION
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void Default_Handler(void);
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#define SECTION_NAME(sectionname) __attribute__ ((section(sectionname)))
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#define SECTION_PLACE(def,sectionname) def __attribute__ ((section(sectionname)))
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#define SECTION_NAME(sectionname) __attribute__((section(sectionname)))
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#define SECTION_PLACE(def,sectionname) def __attribute__((section(sectionname)))
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#define IVT_NAME __Vectors
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#define RESET_EXCPT_HNDLR __main
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#define COMPILER_NAME "ARMCC"
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#define WEAK_FUNCTION(x) void x (void) __attribute__ ((weak, alias("Default_Handler")));
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#define WEAK_FUNCTION(x) void x (void) __attribute__((weak, alias("Default_Handler")));
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#elif defined(__ICCARM__)
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#pragma diag_suppress=Pm093,Pm140
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@ -46,9 +46,12 @@
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#define MUX_FUNC_0 0x0
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#define NUM_GPIO_PORTS 4
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extern uint8_t gpioMemory[ADI_GPIO_MEMORY_SIZE];
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extern uint8_t gpio_initialized;
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/*******************************************************************************
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ADI_GPIO_DEV_DATA Instance memory containing memory pointer should
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guarantee 4 byte alignmnet.
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*******************************************************************************/
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extern uint32_t gpioMemory[(ADI_GPIO_MEMORY_SIZE + 3)/4];
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extern uint8_t gpio_initialized;
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static uint16_t gpio_oen[NUM_GPIO_PORTS] = {0};
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static uint16_t gpio_output_val[NUM_GPIO_PORTS] = {0};
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@ -39,9 +39,12 @@
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******************************************************************************/
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#include <drivers/gpio/adi_gpio.h>
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/*******************************************************************************
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ADI_GPIO_DEV_DATA Instance memory containing memory pointer should
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guarantee 4 byte alignmnet.
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*******************************************************************************/
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// ADI GPIO device driver state memory. Only one state memory is required globally.
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uint8_t gpioMemory[ADI_GPIO_MEMORY_SIZE];
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uint32_t gpioMemory[(ADI_GPIO_MEMORY_SIZE + 3)/4];
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// Flag to indicate whether the GPIO driver has been initialized
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uint8_t gpio_initialized = 0;
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uint8_t gpio_initialized = 0;
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@ -53,9 +53,12 @@ typedef struct {
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gpio_irq_event event;
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uint8_t int_enable;
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} gpio_chan_info_t;
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extern uint8_t gpioMemory[ADI_GPIO_MEMORY_SIZE];
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extern uint8_t gpio_initialized;
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/*******************************************************************************
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ADI_GPIO_DEV_DATA Instance memory containing memory pointer should
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guarantee 4 byte alignmnet.
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*******************************************************************************/
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extern uint32_t gpioMemory[(ADI_GPIO_MEMORY_SIZE + 3)/4];
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extern uint8_t gpio_initialized;
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static gpio_chan_info_t channel_ids[MAX_GPIO_PORTS][MAX_GPIO_LINES];
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static gpio_irq_handler irq_handler = NULL;
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@ -57,7 +57,11 @@
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int adi_i2c_memtype = 0;
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#endif
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#else
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static uint8_t i2c_Mem[ADI_I2C_MEMORY_SIZE];
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/*******************************************************************************
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ADI_I2C_DEV_DATA_TYPE Instance memory containing memory pointer should
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guarantee 4 byte alignmnet.
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*******************************************************************************/
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static uint32_t i2c_Mem[(ADI_I2C_MEMORY_SIZE + 3)/4];
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static ADI_I2C_HANDLE i2c_Handle;
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#if defined(ADI_DEBUG)
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#warning "BUILD_I2C_MI_DYNAMIC is NOT defined. Memory allocation for I2C will be static"
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@ -72,7 +76,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl)
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uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA);
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uint32_t i2c_scl = pinmap_peripheral(scl, PinMap_I2C_SCL);
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ADI_I2C_HANDLE *pI2C_Handle;
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uint8_t *I2C_Mem;
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uint32_t *I2C_Mem;
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ADI_I2C_RESULT I2C_Return = ADI_I2C_SUCCESS;
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uint32_t I2C_DevNum = I2C_0; /* ADuCM3029 only has 1 I2C port */
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@ -79,7 +79,11 @@ struct i2c_s {
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ADI_I2C_HANDLE *pI2C_Handle;
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#if defined(BUILD_I2C_MI_DYNAMIC)
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ADI_I2C_HANDLE I2C_Handle;
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uint8_t I2C_Mem[ADI_I2C_MEMORY_SIZE];
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/*******************************************************************************
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ADI_I2C_DEV_DATA_TYPE Instance memory containing memory pointer should
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guarantee 4 byte alignmnet.
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*******************************************************************************/
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uint32_t I2C_Mem[(ADI_I2C_MEMORY_SIZE + 3)/4];
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#endif
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};
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@ -90,7 +94,11 @@ struct spi_s {
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ADI_SPI_HANDLE *pSPI_Handle;
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#if defined(BUILD_SPI_MI_DYNAMIC)
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ADI_SPI_HANDLE SPI_Handle;
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uint8_t SPI_Mem[ADI_SPI_MEMORY_SIZE];
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/*******************************************************************************
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ADI_SPI_DEV_DATA_TYPE Instance memory containing memory pointer should
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guarantee 4 byte alignmnet.
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*******************************************************************************/
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uint32_t SPI_Mem[(ADI_SPI_MEMORY_SIZE + 3)/4];
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#endif
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};
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@ -46,7 +46,11 @@
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#include "adi_pwr.h"
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#define RTC_DEVICE_NUM 0
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static uint8_t aRtcDevMem0[ADI_RTC_MEMORY_SIZE];
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/*******************************************************************************
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ADI_RTC_DEVICE Instance memory containing memory pointer should guarantee
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4 byte alignmnet.
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*******************************************************************************/
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static uint32_t aRtcDevMem0[(ADI_RTC_MEMORY_SIZE + 3)/4];
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static ADI_RTC_HANDLE hDevice0 = NULL;
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@ -59,12 +59,16 @@
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int adi_spi_memtype = 0;
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#endif
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#else
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/*******************************************************************************
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ADI_SPI_DEV_DATA_TYPE Instance memory containing memory pointer should
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guarantee 4 byte alignmnet.
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*******************************************************************************/
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ADI_SPI_HANDLE spi_Handle0;
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uint8_t spi_Mem0[ADI_SPI_MEMORY_SIZE];
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uint32_t spi_Mem0[(ADI_SPI_MEMORY_SIZE + 3)/4];
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ADI_SPI_HANDLE spi_Handle1;
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uint8_t spi_Mem1[ADI_SPI_MEMORY_SIZE];
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uint32_t spi_Mem1[(ADI_SPI_MEMORY_SIZE + 3)/4];
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ADI_SPI_HANDLE spi_Handle2;
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uint8_t spi_Mem2[ADI_SPI_MEMORY_SIZE];
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uint32_t spi_Mem2[(ADI_SPI_MEMORY_SIZE + 3)/4];
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#if defined(ADI_DEBUG)
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#warning "BUILD_SPI_MI_DYNAMIC is NOT defined. Memory allocation for SPI will be static"
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int adi_spi_memtype = 1;
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@ -92,7 +96,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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uint32_t spi_data = pinmap_merge(spi_mosi, spi_miso);
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uint32_t spi_cntl = pinmap_merge(spi_sclk, spi_ssel);
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ADI_SPI_HANDLE *pSPI_Handle;
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uint8_t *SPI_Mem;
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uint32_t *SPI_Mem;
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ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS;
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uint32_t nDeviceNum = 0;
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ADI_SPI_CHIP_SELECT spi_cs = ADI_SPI_CS_NONE;
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@ -54,8 +54,15 @@
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#define TRNG_CNT_VAL 4095
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#define TRNG_PRESCALER 2
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/* RNG Device memory */
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static uint8_t RngDevMem[ADI_RNG_MEMORY_SIZE];
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/*******************************************************************************
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RNG Device memory is the instance of ADI_RNG_DEV_DATA_TYPE that contains
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pointers and requires 4 byte alignment. The use of uint8_t may cause memory
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access fault for some compilers which are not configured to handle unaligned
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accesses to SRAM. The size in uint8_t for RngDevMem is ADI_RNG_MEMORY_SIZE.
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The size in uint32_t for RngDevMem is recalculated to be
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(ADI_RNG_MEMORY_SIZE + 3)/4.
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*******************************************************************************/
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static uint32_t RngDevMem[(ADI_RNG_MEMORY_SIZE + 3)/4];
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void trng_init(trng_t *obj)
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{
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@ -62,10 +62,6 @@ EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#pragma diag_suppress=Pm008,Pm093
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#endif /* __ICCARM__ */
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#if defined (__CC_ARM)
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#pragma anon_unions
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#endif /* __CC_ARM */
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#define __ADI_NO_DECL_STRUCT_ADI_CRYPT_CFG_t__
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#include <sys/ADuCM302x_typedefs.h>
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@ -123,7 +123,7 @@ POSSIBILITY OF SUCH DAMAGE.
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#define __ADI_BYTE_SWAP(X) __REV(X)
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#elif defined (__GNUC__)
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#define __ADI_BYTE_SWAP(X) __builtin_bswap32(X)
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#elif defined (__CC_ARM)
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#elif defined (__ARMCC_VERSION)
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#define __ADI_BYTE_SWAP(X) __rev(X)
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#else
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#error "This toolchain is not supported"
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@ -272,7 +272,7 @@ ADI_DMA_RESULT adi_dma_RegisterCallback (
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/* ARM Cortex-M3/M4, GNU-ARM compiler */
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#define ADI_CLZ(X) __builtin_clz(X)
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#elif defined(__CC_ARM)
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#elif defined(__ARMCC_VERSION)
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/* ARM Cortex-M3/M4, Keil compiler */
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#define ADI_CLZ(X) __clz(X)
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@ -82,10 +82,10 @@ EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#define ADI_ALIGNED_ATTRIBUTE(num)
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#define ADI_ALIGNED_PRAGMA(num) PRAGMA(data_alignment=num)
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#define ADI_UNUSED_ATTRIBUTE
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#elif defined (__CC_ARM)
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#elif defined (__ARMCC_VERSION)
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/* Keil uses a decorator which is placed in the same position as pragmas */
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#define ADI_ALIGNED_ATTRIBUTE(num)
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#define ADI_ALIGNED_PRAGMA(num) __align(##num)
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#define ADI_ALIGNED_PRAGMA(num) __attribute__((aligned(num)))
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#define ADI_UNUSED_ATTRIBUTE ATTRIBUTE(unused)
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#else
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#error "Toolchain not supported"
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@ -25,12 +25,6 @@
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/* pickup register bitfield and bit masks */
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#include "ADuCM302x_typedefs.h"
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#if defined ( __CC_ARM )
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#pragma push
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#pragma anon_unions
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#endif
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#ifndef __IO
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#ifdef __cplusplus
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#define __I volatile /* read-only */
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@ -1209,9 +1203,4 @@ typedef enum
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#pragma diag(pop)
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#endif /* _MISRA_RULES */
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#if defined (__CC_ARM)
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#pragma pop
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#endif
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#endif
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@ -22,12 +22,6 @@
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#include <stdint.h>
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#endif /* _LANGUAGE_C */
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#if defined ( __CC_ARM )
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#pragma push
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#pragma anon_unions
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#endif
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#if defined (_MISRA_RULES)
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/*
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anonymous unions violate ISO 9899:1990 and therefore MISRA Rule 1.1.
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@ -9556,9 +9550,4 @@ typedef struct _ADI_NVIC_INTCID3_t {
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#pragma diag(pop)
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#endif /* _MISRA_RULES */
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#if defined (__CC_ARM)
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#pragma pop
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#endif
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#endif
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@ -44,7 +44,7 @@ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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#ifdef __CC_ARM
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#ifdef __ARMCC_VERSION
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#include <stdint.h>
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#include <rt_misc.h>
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#endif
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@ -55,8 +55,8 @@ EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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/*----------------------------------------------------------------------------
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Checksum options
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||||
*----------------------------------------------------------------------------*/
|
||||
#if defined (__CC_ARM)
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__attribute__ ((at(0x000001A0u)))
|
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#if defined (__ARMCC_VERSION)
|
||||
__attribute__((section(".ARM.__at_0x000001A0")))
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#elif defined(__ICCARM__)
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__root
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#endif
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@ -155,7 +155,7 @@ const pFunc SECTION_PLACE(IVT_NAME[104],VECTOR_SECTION) = {
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/*----------------------------------------------------------------------------
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||||
* Initialize .bss and .data for GNU
|
||||
*----------------------------------------------------------------------------*/
|
||||
#if defined( __GNUC__) && !defined (__CC_ARM)
|
||||
#if defined( __GNUC__) && !defined (__ARMCC_VERSION)
|
||||
void zero_bss(void)
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{
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uint32_t *pSrc, *pDest;
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@ -251,7 +251,7 @@ void Reset_Handler(void)
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/* Initialize SRAM configuration. */
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SramInit();
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#if defined(__GNUC__) && !defined (__CC_ARM)
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#if defined(__GNUC__) && !defined (__ARMCC_VERSION)
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zero_bss();
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#endif
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@ -265,7 +265,7 @@ void Reset_Handler(void)
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/*----------------------------------------------------------------------------
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Default Handler for Exceptions / Interrupts
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||||
*----------------------------------------------------------------------------*/
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||||
#if defined(__CC_ARM) || defined (__GNUC__)
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#if defined(__ARMCC_VERSION) || defined (__GNUC__)
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void Default_Handler(void)
|
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{
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while(1);
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|
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@ -63,16 +63,14 @@ RESET_EXCPT_HNDLR
|
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#include <adi_types.h>
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#define VECTOR_SECTION ".vectors"
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#ifdef __CC_ARM
|
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extern unsigned Image$$ADUCM_HEAP$$Base[];
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extern unsigned Image$$ADUCM_HEAP$$ZI$$Limit[];
|
||||
#ifdef __ARMCC_VERSION
|
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void Default_Handler(void);
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#define SECTION_NAME(sectionname) __attribute__ ((section(sectionname)))
|
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#define SECTION_PLACE(def,sectionname) def __attribute__ ((section(sectionname)))
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#define SECTION_NAME(sectionname) __attribute__((section(sectionname)))
|
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#define SECTION_PLACE(def,sectionname) def __attribute__((section(sectionname)))
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#define IVT_NAME __Vectors
|
||||
#define RESET_EXCPT_HNDLR __main
|
||||
#define COMPILER_NAME "ARMCC"
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#define WEAK_FUNCTION(x) void x (void) __attribute__ ((weak, alias("Default_Handler")));
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#define WEAK_FUNCTION(x) void x (void) __attribute__((weak, alias("Default_Handler")));
|
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#elif defined(__ICCARM__)
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/*
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* IAR MISRA C 2004 error suppressions:
|
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|
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|
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@ -46,9 +46,12 @@
|
|||
|
||||
#define MUX_FUNC_0 0x0
|
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#define NUM_GPIO_PORTS 4
|
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|
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extern uint8_t gpioMemory[ADI_GPIO_MEMORY_SIZE];
|
||||
extern uint8_t gpio_initialized;
|
||||
/*******************************************************************************
|
||||
ADI_GPIO_DEV_DATA Instance memory containing memory pointer should
|
||||
guarantee 4 byte alignmnet.
|
||||
*******************************************************************************/
|
||||
extern uint32_t gpioMemory[(ADI_GPIO_MEMORY_SIZE + 3)/4];
|
||||
extern uint8_t gpio_initialized;
|
||||
|
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static uint16_t gpio_oen[NUM_GPIO_PORTS] = {0};
|
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static uint16_t gpio_output_val[NUM_GPIO_PORTS] = {0};
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|||
|
|
@ -39,9 +39,12 @@
|
|||
******************************************************************************/
|
||||
|
||||
#include <drivers/gpio/adi_gpio.h>
|
||||
|
||||
/*******************************************************************************
|
||||
ADI_GPIO_DEV_DATA Instance memory containing memory pointer should
|
||||
guarantee 4 byte alignmnet.
|
||||
*******************************************************************************/
|
||||
// ADI GPIO device driver state memory. Only one state memory is required globally.
|
||||
uint8_t gpioMemory[ADI_GPIO_MEMORY_SIZE];
|
||||
uint32_t gpioMemory[(ADI_GPIO_MEMORY_SIZE +3)/4];
|
||||
|
||||
// Flag to indicate whether the GPIO driver has been initialized
|
||||
uint8_t gpio_initialized = 0;
|
||||
uint8_t gpio_initialized = 0;
|
||||
|
|
|
|||
|
|
@ -52,9 +52,12 @@ typedef struct {
|
|||
gpio_irq_event event;
|
||||
uint8_t int_enable;
|
||||
} gpio_chan_info_t;
|
||||
|
||||
extern uint8_t gpioMemory[ADI_GPIO_MEMORY_SIZE];
|
||||
extern uint8_t gpio_initialized;
|
||||
/*******************************************************************************
|
||||
ADI_GPIO_DEV_DATA Instance memory containing memory pointer should
|
||||
guarantee 4 byte alignmnet.
|
||||
*******************************************************************************/
|
||||
extern uint32_t gpioMemory[(ADI_GPIO_MEMORY_SIZE + 3)/4];
|
||||
extern uint8_t gpio_initialized;
|
||||
static gpio_chan_info_t channel_ids[MAX_GPIO_PORTS][MAX_GPIO_LINES];
|
||||
static gpio_irq_handler irq_handler = NULL;
|
||||
|
||||
|
|
|
|||
|
|
@ -57,7 +57,11 @@
|
|||
int adi_i2c_memtype = 0;
|
||||
#endif
|
||||
#else
|
||||
static uint8_t i2c_Mem[ADI_I2C_MEMORY_SIZE];
|
||||
/*******************************************************************************
|
||||
ADI_I2C_DEV_DATA_TYPE Instance memory containing memory pointer should
|
||||
guarantee 4 byte alignmnet.
|
||||
*******************************************************************************/
|
||||
static uint32_t i2c_Mem[(ADI_I2C_MEMORY_SIZE + 3)/4];
|
||||
static ADI_I2C_HANDLE i2c_Handle;
|
||||
#if defined(ADI_DEBUG)
|
||||
#warning "BUILD_I2C_MI_DYNAMIC is NOT defined. Memory allocation for I2C will be static"
|
||||
|
|
@ -72,7 +76,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl)
|
|||
uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA);
|
||||
uint32_t i2c_scl = pinmap_peripheral(scl, PinMap_I2C_SCL);
|
||||
ADI_I2C_HANDLE *pI2C_Handle;
|
||||
uint8_t *I2C_Mem;
|
||||
uint32_t *I2C_Mem;
|
||||
ADI_I2C_RESULT I2C_Return = ADI_I2C_SUCCESS;
|
||||
uint32_t I2C_DevNum = I2C_0; /* ADuCM4050 only has 1 I2C port */
|
||||
|
||||
|
|
|
|||
|
|
@ -79,7 +79,11 @@ struct i2c_s {
|
|||
ADI_I2C_HANDLE *pI2C_Handle;
|
||||
#if defined(BUILD_I2C_MI_DYNAMIC)
|
||||
ADI_I2C_HANDLE I2C_Handle;
|
||||
uint8_t I2C_Mem[ADI_I2C_MEMORY_SIZE];
|
||||
/*******************************************************************************
|
||||
ADI_I2C_DEV_DATA_TYPE Instance memory containing memory pointer should
|
||||
guarantee 4 byte alignmnet.
|
||||
*******************************************************************************/
|
||||
uint32_t I2C_Mem[(ADI_I2C_MEMORY_SIZE + 3)/4];
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
@ -90,7 +94,11 @@ struct spi_s {
|
|||
ADI_SPI_HANDLE *pSPI_Handle;
|
||||
#if defined(BUILD_SPI_MI_DYNAMIC)
|
||||
ADI_SPI_HANDLE SPI_Handle;
|
||||
uint8_t SPI_Mem[ADI_SPI_MEMORY_SIZE];
|
||||
/*******************************************************************************
|
||||
ADI_SPI_DEV_DATA_TYPE Instance memory containing memory pointer should
|
||||
guarantee 4 byte alignmnet.
|
||||
*******************************************************************************/
|
||||
uint32_t SPI_Mem[(ADI_SPI_MEMORY_SIZE + 3)/4];
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -46,7 +46,11 @@
|
|||
#include "adi_pwr.h"
|
||||
|
||||
#define RTC_DEVICE_NUM 0
|
||||
static uint8_t aRtcDevMem0[ADI_RTC_MEMORY_SIZE];
|
||||
/*******************************************************************************
|
||||
ADI_RTC_DEVICE Instance memory containing memory pointer should guarantee
|
||||
4 byte alignmnet.
|
||||
*******************************************************************************/
|
||||
static uint32_t aRtcDevMem0[(ADI_RTC_MEMORY_SIZE + 3)/4];
|
||||
static ADI_RTC_HANDLE hDevice0 = NULL;
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -61,12 +61,16 @@
|
|||
int adi_spi_memtype = 0;
|
||||
#endif
|
||||
#else
|
||||
/*******************************************************************************
|
||||
ADI_SPI_DEV_DATA_TYPE Instance memory containing memory pointer should
|
||||
guarantee 4 byte alignmnet.
|
||||
*******************************************************************************/
|
||||
ADI_SPI_HANDLE spi_Handle0;
|
||||
uint8_t spi_Mem0[ADI_SPI_MEMORY_SIZE];
|
||||
uint32_t spi_Mem0[(ADI_SPI_MEMORY_SIZE + 3)/4];
|
||||
ADI_SPI_HANDLE spi_Handle1;
|
||||
uint8_t spi_Mem1[ADI_SPI_MEMORY_SIZE];
|
||||
uint32_t spi_Mem1[(ADI_SPI_MEMORY_SIZE + 3)/4];
|
||||
ADI_SPI_HANDLE spi_Handle2;
|
||||
uint8_t spi_Mem2[ADI_SPI_MEMORY_SIZE];
|
||||
uint32_t spi_Mem2[(ADI_SPI_MEMORY_SIZE + 3)/4];
|
||||
#if defined(ADI_DEBUG)
|
||||
#warning "BUILD_SPI_MI_DYNAMIC is NOT defined. Memory allocation for SPI will be static"
|
||||
int adi_spi_memtype = 1;
|
||||
|
|
@ -94,7 +98,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
|||
uint32_t spi_data = pinmap_merge(spi_mosi, spi_miso);
|
||||
uint32_t spi_cntl = pinmap_merge(spi_sclk, spi_ssel);
|
||||
ADI_SPI_HANDLE *pSPI_Handle;
|
||||
uint8_t *SPI_Mem;
|
||||
uint32_t *SPI_Mem;
|
||||
ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS;
|
||||
uint32_t nDeviceNum = 0;
|
||||
ADI_SPI_CHIP_SELECT spi_cs = ADI_SPI_CS_NONE;
|
||||
|
|
|
|||
|
|
@ -121,7 +121,7 @@ POSSIBILITY OF SUCH DAMAGE.
|
|||
#define __ADI_BYTE_SWAP(X) __REV(X)
|
||||
#elif defined (__GNUC__)
|
||||
#define __ADI_BYTE_SWAP(X) __builtin_bswap32(X)
|
||||
#elif defined (__CC_ARM)
|
||||
#elif defined (__ARMCC_VERSION)
|
||||
#define __ADI_BYTE_SWAP(X) __rev(X)
|
||||
#else
|
||||
#error "This toolchain is not supported"
|
||||
|
|
|
|||
|
|
@ -272,7 +272,7 @@ ADI_DMA_RESULT adi_dma_RegisterCallback (
|
|||
/* ARM Cortex-M3/M4, GNU-ARM compiler */
|
||||
#define ADI_CLZ(X) __builtin_clz(X)
|
||||
|
||||
#elif defined(__CC_ARM)
|
||||
#elif defined(__ARMCC_VERSION)
|
||||
|
||||
/* ARM Cortex-M3/M4, Keil compiler */
|
||||
#define ADI_CLZ(X) __clz(X)
|
||||
|
|
|
|||
|
|
@ -82,10 +82,10 @@ EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|||
#define ADI_ALIGNED_ATTRIBUTE(num)
|
||||
#define ADI_ALIGNED_PRAGMA(num) PRAGMA(data_alignment=num)
|
||||
#define ADI_UNUSED_ATTRIBUTE
|
||||
#elif defined (__CC_ARM)
|
||||
#elif defined (__ARMCC_VERSION)
|
||||
/* Keil uses a decorator which is placed in the same position as pragmas */
|
||||
#define ADI_ALIGNED_ATTRIBUTE(num)
|
||||
#define ADI_ALIGNED_PRAGMA(num) __align(##num)
|
||||
#define ADI_ALIGNED_PRAGMA(num) __attribute__((aligned(num)))
|
||||
#define ADI_UNUSED_ATTRIBUTE ATTRIBUTE(unused)
|
||||
#else
|
||||
#error "Toolchain not supported"
|
||||
|
|
|
|||
|
|
@ -25,12 +25,6 @@
|
|||
/* pickup register bitfield and bit masks */
|
||||
#include "adi_ADuCM4050_typedefs.h"
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#pragma push
|
||||
#pragma anon_unions
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __IO
|
||||
#ifdef __cplusplus
|
||||
#define __I volatile /* read-only */
|
||||
|
|
@ -1330,9 +1324,4 @@ typedef enum
|
|||
#pragma diag(pop)
|
||||
#endif /* _MISRA_RULES */
|
||||
|
||||
|
||||
#if defined (__CC_ARM)
|
||||
#pragma pop
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -22,12 +22,6 @@
|
|||
#include <stdint.h>
|
||||
#endif /* _LANGUAGE_C */
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#pragma push
|
||||
#pragma anon_unions
|
||||
#endif
|
||||
|
||||
|
||||
#if defined (_MISRA_RULES)
|
||||
/*
|
||||
anonymous unions violate ISO 9899:1990 and therefore MISRA Rule 1.1.
|
||||
|
|
@ -11244,9 +11238,4 @@ typedef struct _ADI_NVIC_INTCID3_t {
|
|||
#pragma diag(pop)
|
||||
#endif /* _MISRA_RULES */
|
||||
|
||||
|
||||
#if defined (__CC_ARM)
|
||||
#pragma pop
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -622,7 +622,7 @@
|
|||
},
|
||||
"EV_COG_AD4050LZ": {
|
||||
"inherits": ["Target"],
|
||||
"core": "Cortex-M4",
|
||||
"core": "Cortex-M4F",
|
||||
"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
|
||||
"macros": ["__ADUCM4050__", "EV_COG_AD4050LZ"],
|
||||
"extra_labels": ["Analog_Devices", "ADUCM4X50", "ADUCM4050", "EV_COG_AD4050LZ", "FLASH_CMSIS_ALGO"],
|
||||
|
|
|
|||
Loading…
Reference in New Issue