mirror of https://github.com/ARMmbed/mbed-os.git
commit
114e019675
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@ -17,7 +17,7 @@
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#define MBED_CAN_DEVICE_H
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#include "cmsis.h"
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#include "stm32f0xx_hal.h"
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#include "stm32f0xx.h"
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#ifdef __cplusplus
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extern "C" {
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@ -25,7 +25,7 @@ extern "C" {
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#ifdef DEVICE_CAN
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#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
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#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
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#define CAN1_IRQ_RX_IRQN CEC_CAN_IRQn
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#define CAN1_IRQ_RX_VECT CAN_IRQHandler
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@ -17,7 +17,7 @@
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#define MBED_CAN_DEVICE_H
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#include "cmsis.h"
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#include "stm32f1xx_hal.h"
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#include "stm32f1xx.h"
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#ifdef __cplusplus
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extern "C" {
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@ -25,7 +25,7 @@ extern "C" {
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#ifdef DEVICE_CAN
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#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
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#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
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#define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn
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#define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler
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@ -17,7 +17,7 @@
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#define MBED_CAN_DEVICE_H
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#include "cmsis.h"
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#include "stm32f2xx_hal.h"
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#include "stm32f2xx.h"
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#ifdef __cplusplus
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extern "C" {
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@ -25,7 +25,7 @@ extern "C" {
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#ifdef DEVICE_CAN
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#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie (1 or 2)
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#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie
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#define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn
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#define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler
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@ -17,7 +17,7 @@
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#define MBED_CAN_DEVICE_H
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#include "cmsis.h"
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#include "stm32f3xx_hal.h"
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#include "stm32f3xx.h"
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#ifdef __cplusplus
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extern "C" {
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@ -25,7 +25,7 @@ extern "C" {
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#ifdef DEVICE_CAN
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#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
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#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
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#define CAN1_IRQ_RX_IRQN CAN_RX0_IRQn
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#define CAN1_IRQ_RX_VECT CAN_RX0_IRQHandler
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@ -17,7 +17,7 @@
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#define MBED_CAN_DEVICE_H
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#include "cmsis.h"
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#include "stm32f4xx_hal.h"
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#include "stm32f4xx.h"
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#ifdef __cplusplus
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extern "C" {
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@ -25,7 +25,26 @@ extern "C" {
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#ifdef DEVICE_CAN
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#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie (1 or 2)
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#if defined(CAN3_BASE) && defined(CAN_3)
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#define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie
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#define CAN3_IRQ_RX_IRQN CAN3_RX0_IRQn
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#define CAN3_IRQ_RX_VECT CAN3_RX0_IRQHandler
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#define CAN3_IRQ_TX_IRQN CAN3_TX_IRQn
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#define CAN3_IRQ_TX_VECT CAN3_TX_IRQHandler
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#define CAN3_IRQ_ERROR_IRQN CAN3_SCE_IRQn
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#define CAN3_IRQ_ERROR_VECT CAN3_SCE_IRQHandler
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#define CAN3_IRQ_PASSIVE_IRQN CAN3_SCE_IRQn
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#define CAN3_IRQ_PASSIVE_VECT CAN3_SCE_IRQHandler
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#define CAN3_IRQ_BUS_IRQN CAN3_SCE_IRQn
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#define CAN3_IRQ_BUS_VECT CAN3_SCE_IRQHandler
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#else
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#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie
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#endif
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#define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn
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#define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler
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@ -17,7 +17,7 @@
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#define MBED_CAN_DEVICE_H
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#include "cmsis.h"
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#include "stm32f7xx_hal.h"
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#include "stm32f7xx.h"
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#ifdef __cplusplus
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extern "C" {
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@ -25,7 +25,26 @@ extern "C" {
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#ifdef DEVICE_CAN
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#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie (1 or 2)
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#if defined(CAN3_BASE) && defined(CAN_3)
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#define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie
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#define CAN3_IRQ_RX_IRQN CAN3_RX0_IRQn
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#define CAN3_IRQ_RX_VECT CAN3_RX0_IRQHandler
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#define CAN3_IRQ_TX_IRQN CAN3_TX_IRQn
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#define CAN3_IRQ_TX_VECT CAN3_TX_IRQHandler
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#define CAN3_IRQ_ERROR_IRQN CAN3_SCE_IRQn
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#define CAN3_IRQ_ERROR_VECT CAN3_SCE_IRQHandler
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#define CAN3_IRQ_PASSIVE_IRQN CAN3_SCE_IRQn
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#define CAN3_IRQ_PASSIVE_VECT CAN3_SCE_IRQHandler
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#define CAN3_IRQ_BUS_IRQN CAN3_SCE_IRQn
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#define CAN3_IRQ_BUS_VECT CAN3_SCE_IRQHandler
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#else
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#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie
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#endif
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#define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn
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#define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler
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@ -17,7 +17,7 @@
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#define MBED_CAN_DEVICE_H
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#include "cmsis.h"
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#include "stm32l4xx_hal.h"
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#include "stm32l4xx.h"
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#ifdef __cplusplus
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extern "C" {
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@ -25,7 +25,7 @@ extern "C" {
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#ifdef DEVICE_CAN
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#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
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#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
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#define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn
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#define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler
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@ -57,12 +57,18 @@ void can_init_freq (can_t *obj, PinName rd, PinName td, int hz)
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__HAL_RCC_CAN1_CLK_ENABLE();
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obj->index = 0;
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}
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#if defined(CAN2_BASE) && (CAN_NUM == 2)
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#if defined(CAN2_BASE) && defined(CAN_2)
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else if (can == CAN_2) {
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__HAL_RCC_CAN1_CLK_ENABLE(); // needed to set filters
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__HAL_RCC_CAN2_CLK_ENABLE();
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obj->index = 1;
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}
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#endif
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#if defined(CAN3_BASE) && defined(CAN_3)
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else if (can == CAN_3) {
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__HAL_RCC_CAN3_CLK_ENABLE();
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obj->index = 2;
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}
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#endif
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else {
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return;
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@ -126,13 +132,20 @@ void can_free(can_t *obj)
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__HAL_RCC_CAN1_RELEASE_RESET();
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__HAL_RCC_CAN1_CLK_DISABLE();
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}
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#if defined(CAN2_BASE) && (CAN_NUM == 2)
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#if defined(CAN2_BASE) && defined(CAN_2)
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if (can == CAN_2) {
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__HAL_RCC_CAN2_FORCE_RESET();
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__HAL_RCC_CAN2_RELEASE_RESET();
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__HAL_RCC_CAN2_CLK_DISABLE();
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}
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#endif
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#if defined(CAN3_BASE) && defined(CAN_3)
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if (can == CAN_3) {
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__HAL_RCC_CAN3_FORCE_RESET();
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__HAL_RCC_CAN3_RELEASE_RESET();
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__HAL_RCC_CAN3_CLK_DISABLE();
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}
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#endif
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}
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// The following table is used to program bit_timing. It is an adjustment of the sample
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@ -549,7 +562,7 @@ void CAN1_SCE_IRQHandler(void)
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{
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can_irq(CAN_1, 0);
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}
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#if defined(CAN2_BASE) && (CAN_NUM == 2)
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#if defined(CAN2_BASE) && defined(CAN_2)
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void CAN2_RX0_IRQHandler(void)
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{
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can_irq(CAN_2, 1);
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{
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can_irq(CAN_2, 1);
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}
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#endif // defined(CAN2_BASE) && (CAN_NUM == 2)
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#endif
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#if defined(CAN3_BASE) && defined(CAN_3)
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void CAN3_RX0_IRQHandler(void)
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{
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can_irq(CAN_3, 1);
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}
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void CAN3_TX_IRQHandler(void)
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{
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can_irq(CAN_3, 1);
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}
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void CAN3_SCE_IRQHandler(void)
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{
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can_irq(CAN_3, 1);
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}
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#endif
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#endif // else
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void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
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return;
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}
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}
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#if defined(CAN2_BASE) && (CAN_NUM == 2)
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#if defined(CAN2_BASE) && defined(CAN_2)
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else if ((CANName) can == CAN_2) {
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switch (type) {
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case IRQ_RX:
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return;
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}
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}
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#endif
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#if defined(CAN3_BASE) && defined(CAN_3)
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else if ((CANName) can == CAN_3) {
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switch (type) {
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case IRQ_RX:
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ier = CAN_IT_FMP0;
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irq_n = CAN3_IRQ_RX_IRQN;
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vector = (uint32_t)&CAN3_IRQ_RX_VECT;
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break;
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case IRQ_TX:
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ier = CAN_IT_TME;
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irq_n = CAN3_IRQ_TX_IRQN;
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vector = (uint32_t)&CAN3_IRQ_TX_VECT;
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break;
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case IRQ_ERROR:
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ier = CAN_IT_ERR;
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irq_n = CAN3_IRQ_ERROR_IRQN;
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vector = (uint32_t)&CAN3_IRQ_ERROR_VECT;
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break;
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case IRQ_PASSIVE:
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ier = CAN_IT_EPV;
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irq_n = CAN3_IRQ_PASSIVE_IRQN;
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vector = (uint32_t)&CAN3_IRQ_PASSIVE_VECT;
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break;
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case IRQ_BUS:
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ier = CAN_IT_BOF;
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irq_n = CAN3_IRQ_BUS_IRQN;
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vector = (uint32_t)&CAN3_IRQ_BUS_VECT;
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break;
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default:
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return;
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}
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}
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#endif
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else {
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return;
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