diff --git a/targets/TARGET_STM/TARGET_STM32F0/can_device.h b/targets/TARGET_STM/TARGET_STM32F0/can_device.h
index cff47d6a4c..c1fa6fab6a 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/can_device.h
+++ b/targets/TARGET_STM/TARGET_STM32F0/can_device.h
@@ -17,7 +17,7 @@
 #define MBED_CAN_DEVICE_H
 
 #include "cmsis.h"
-#include "stm32f0xx_hal.h"
+#include "stm32f0xx.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -25,7 +25,7 @@ extern "C" {
 
 #ifdef DEVICE_CAN
 
-#define CAN_NUM    1 // Number of CAN peripherals present in the STM32 serie
+#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
 
 #define CAN1_IRQ_RX_IRQN        CEC_CAN_IRQn
 #define CAN1_IRQ_RX_VECT        CAN_IRQHandler
diff --git a/targets/TARGET_STM/TARGET_STM32F1/can_device.h b/targets/TARGET_STM/TARGET_STM32F1/can_device.h
index 3792d0743e..3a8438faed 100644
--- a/targets/TARGET_STM/TARGET_STM32F1/can_device.h
+++ b/targets/TARGET_STM/TARGET_STM32F1/can_device.h
@@ -17,7 +17,7 @@
 #define MBED_CAN_DEVICE_H
 
 #include "cmsis.h"
-#include "stm32f1xx_hal.h"
+#include "stm32f1xx.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -25,7 +25,7 @@ extern "C" {
 
 #ifdef DEVICE_CAN
 
-#define CAN_NUM    1 // Number of CAN peripherals present in the STM32 serie
+#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
 
 #define CAN1_IRQ_RX_IRQN        CAN1_RX0_IRQn
 #define CAN1_IRQ_RX_VECT        CAN1_RX0_IRQHandler
diff --git a/targets/TARGET_STM/TARGET_STM32F2/can_device.h b/targets/TARGET_STM/TARGET_STM32F2/can_device.h
index 97a54210a0..cb95b44ea8 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/can_device.h
+++ b/targets/TARGET_STM/TARGET_STM32F2/can_device.h
@@ -17,7 +17,7 @@
 #define MBED_CAN_DEVICE_H
 
 #include "cmsis.h"
-#include "stm32f2xx_hal.h"
+#include "stm32f2xx.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -25,7 +25,7 @@ extern "C" {
 
 #ifdef DEVICE_CAN
 
-#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie (1 or 2)
+#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie
 
 #define CAN1_IRQ_RX_IRQN        CAN1_RX0_IRQn
 #define CAN1_IRQ_RX_VECT        CAN1_RX0_IRQHandler
diff --git a/targets/TARGET_STM/TARGET_STM32F3/can_device.h b/targets/TARGET_STM/TARGET_STM32F3/can_device.h
index 1d77768200..121999c681 100644
--- a/targets/TARGET_STM/TARGET_STM32F3/can_device.h
+++ b/targets/TARGET_STM/TARGET_STM32F3/can_device.h
@@ -17,7 +17,7 @@
 #define MBED_CAN_DEVICE_H
 
 #include "cmsis.h"
-#include "stm32f3xx_hal.h"
+#include "stm32f3xx.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -25,7 +25,7 @@ extern "C" {
 
 #ifdef DEVICE_CAN
 
-#define CAN_NUM    1 // Number of CAN peripherals present in the STM32 serie
+#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
 
 #define CAN1_IRQ_RX_IRQN        CAN_RX0_IRQn
 #define CAN1_IRQ_RX_VECT        CAN_RX0_IRQHandler
diff --git a/targets/TARGET_STM/TARGET_STM32F4/can_device.h b/targets/TARGET_STM/TARGET_STM32F4/can_device.h
index ffc85b663c..16377c24c9 100644
--- a/targets/TARGET_STM/TARGET_STM32F4/can_device.h
+++ b/targets/TARGET_STM/TARGET_STM32F4/can_device.h
@@ -17,7 +17,7 @@
 #define MBED_CAN_DEVICE_H
 
 #include "cmsis.h"
-#include "stm32f4xx_hal.h"
+#include "stm32f4xx.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -25,7 +25,26 @@ extern "C" {
 
 #ifdef DEVICE_CAN
 
-#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie (1 or 2)
+#if defined(CAN3_BASE) && defined(CAN_3)
+
+#define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie
+
+#define CAN3_IRQ_RX_IRQN        CAN3_RX0_IRQn
+#define CAN3_IRQ_RX_VECT        CAN3_RX0_IRQHandler
+#define CAN3_IRQ_TX_IRQN        CAN3_TX_IRQn
+#define CAN3_IRQ_TX_VECT        CAN3_TX_IRQHandler
+#define CAN3_IRQ_ERROR_IRQN     CAN3_SCE_IRQn
+#define CAN3_IRQ_ERROR_VECT     CAN3_SCE_IRQHandler
+#define CAN3_IRQ_PASSIVE_IRQN   CAN3_SCE_IRQn
+#define CAN3_IRQ_PASSIVE_VECT   CAN3_SCE_IRQHandler
+#define CAN3_IRQ_BUS_IRQN       CAN3_SCE_IRQn
+#define CAN3_IRQ_BUS_VECT       CAN3_SCE_IRQHandler
+
+#else
+
+#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie
+
+#endif
 
 #define CAN1_IRQ_RX_IRQN        CAN1_RX0_IRQn
 #define CAN1_IRQ_RX_VECT        CAN1_RX0_IRQHandler
diff --git a/targets/TARGET_STM/TARGET_STM32F7/can_device.h b/targets/TARGET_STM/TARGET_STM32F7/can_device.h
index 7f4f6bf253..0581da5584 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/can_device.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/can_device.h
@@ -17,7 +17,7 @@
 #define MBED_CAN_DEVICE_H
 
 #include "cmsis.h"
-#include "stm32f7xx_hal.h"
+#include "stm32f7xx.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -25,7 +25,26 @@ extern "C" {
 
 #ifdef DEVICE_CAN
 
-#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie (1 or 2)
+#if defined(CAN3_BASE) && defined(CAN_3)
+
+#define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie
+
+#define CAN3_IRQ_RX_IRQN        CAN3_RX0_IRQn
+#define CAN3_IRQ_RX_VECT        CAN3_RX0_IRQHandler
+#define CAN3_IRQ_TX_IRQN        CAN3_TX_IRQn
+#define CAN3_IRQ_TX_VECT        CAN3_TX_IRQHandler
+#define CAN3_IRQ_ERROR_IRQN     CAN3_SCE_IRQn
+#define CAN3_IRQ_ERROR_VECT     CAN3_SCE_IRQHandler
+#define CAN3_IRQ_PASSIVE_IRQN   CAN3_SCE_IRQn
+#define CAN3_IRQ_PASSIVE_VECT   CAN3_SCE_IRQHandler
+#define CAN3_IRQ_BUS_IRQN       CAN3_SCE_IRQn
+#define CAN3_IRQ_BUS_VECT       CAN3_SCE_IRQHandler
+
+#else
+
+#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie
+
+#endif
 
 #define CAN1_IRQ_RX_IRQN        CAN1_RX0_IRQn
 #define CAN1_IRQ_RX_VECT        CAN1_RX0_IRQHandler
diff --git a/targets/TARGET_STM/TARGET_STM32L4/can_device.h b/targets/TARGET_STM/TARGET_STM32L4/can_device.h
index 3cb1c1b6c1..997a1b1087 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/can_device.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/can_device.h
@@ -17,7 +17,7 @@
 #define MBED_CAN_DEVICE_H
 
 #include "cmsis.h"
-#include "stm32l4xx_hal.h"
+#include "stm32l4xx.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -25,7 +25,7 @@ extern "C" {
 
 #ifdef DEVICE_CAN
 
-#define CAN_NUM    1 // Number of CAN peripherals present in the STM32 serie
+#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie
 
 #define CAN1_IRQ_RX_IRQN        CAN1_RX0_IRQn
 #define CAN1_IRQ_RX_VECT        CAN1_RX0_IRQHandler
diff --git a/targets/TARGET_STM/can_api.c b/targets/TARGET_STM/can_api.c
index b89f62891c..bd2d734247 100644
--- a/targets/TARGET_STM/can_api.c
+++ b/targets/TARGET_STM/can_api.c
@@ -57,12 +57,18 @@ void can_init_freq (can_t *obj, PinName rd, PinName td, int hz)
         __HAL_RCC_CAN1_CLK_ENABLE();
         obj->index = 0;
     }
-#if defined(CAN2_BASE) && (CAN_NUM == 2)
+#if defined(CAN2_BASE) && defined(CAN_2)
     else if (can == CAN_2) {
         __HAL_RCC_CAN1_CLK_ENABLE(); // needed to set filters
         __HAL_RCC_CAN2_CLK_ENABLE();
         obj->index = 1;
     }
+#endif
+#if defined(CAN3_BASE) && defined(CAN_3)
+    else if (can == CAN_3) {
+        __HAL_RCC_CAN3_CLK_ENABLE();
+        obj->index = 2;
+    }
 #endif
     else {
         return;
@@ -126,13 +132,20 @@ void can_free(can_t *obj)
         __HAL_RCC_CAN1_RELEASE_RESET();
         __HAL_RCC_CAN1_CLK_DISABLE();
     }
-#if defined(CAN2_BASE) && (CAN_NUM == 2)
+#if defined(CAN2_BASE) && defined(CAN_2)
     if (can == CAN_2) {
         __HAL_RCC_CAN2_FORCE_RESET();
         __HAL_RCC_CAN2_RELEASE_RESET();
         __HAL_RCC_CAN2_CLK_DISABLE();
     }
 #endif
+#if defined(CAN3_BASE) && defined(CAN_3)
+    if (can == CAN_3) {
+        __HAL_RCC_CAN3_FORCE_RESET();
+        __HAL_RCC_CAN3_RELEASE_RESET();
+        __HAL_RCC_CAN3_CLK_DISABLE();
+    }
+#endif
 }
 
 // The following table is used to program bit_timing. It is an adjustment of the sample
@@ -549,7 +562,7 @@ void CAN1_SCE_IRQHandler(void)
 {
     can_irq(CAN_1, 0);
 }
-#if defined(CAN2_BASE) && (CAN_NUM == 2)
+#if defined(CAN2_BASE) && defined(CAN_2)
 void CAN2_RX0_IRQHandler(void)
 {
     can_irq(CAN_2, 1);
@@ -562,7 +575,21 @@ void CAN2_SCE_IRQHandler(void)
 {
     can_irq(CAN_2, 1);
 }
-#endif // defined(CAN2_BASE) && (CAN_NUM == 2)
+#endif
+#if defined(CAN3_BASE) && defined(CAN_3)
+void CAN3_RX0_IRQHandler(void)
+{
+    can_irq(CAN_3, 1);
+}
+void CAN3_TX_IRQHandler(void)
+{
+    can_irq(CAN_3, 1);
+}
+void CAN3_SCE_IRQHandler(void)
+{
+    can_irq(CAN_3, 1);
+}
+#endif
 #endif // else
 
 void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
@@ -603,7 +630,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
                 return;
         }
     }
-#if defined(CAN2_BASE) && (CAN_NUM == 2)
+#if defined(CAN2_BASE) && defined(CAN_2)
     else if ((CANName) can == CAN_2) {
         switch (type) {
             case IRQ_RX:
@@ -635,6 +662,39 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
                 return;
         }
     }
+#endif
+#if defined(CAN3_BASE) && defined(CAN_3)
+    else if ((CANName) can == CAN_3) {
+        switch (type) {
+            case IRQ_RX:
+                ier = CAN_IT_FMP0;
+                irq_n = CAN3_IRQ_RX_IRQN;
+                vector = (uint32_t)&CAN3_IRQ_RX_VECT;
+                break;
+            case IRQ_TX:
+                ier = CAN_IT_TME;
+                irq_n = CAN3_IRQ_TX_IRQN;
+                vector = (uint32_t)&CAN3_IRQ_TX_VECT;
+                break;
+            case IRQ_ERROR:
+                ier = CAN_IT_ERR;
+                irq_n = CAN3_IRQ_ERROR_IRQN;
+                vector = (uint32_t)&CAN3_IRQ_ERROR_VECT;
+                break;
+            case IRQ_PASSIVE:
+                ier = CAN_IT_EPV;
+                irq_n = CAN3_IRQ_PASSIVE_IRQN;
+                vector = (uint32_t)&CAN3_IRQ_PASSIVE_VECT;
+                break;
+            case IRQ_BUS:
+                ier = CAN_IT_BOF;
+                irq_n = CAN3_IRQ_BUS_IRQN;
+                vector = (uint32_t)&CAN3_IRQ_BUS_VECT;
+                break;
+            default:
+                return;
+        }
+    }
 #endif
     else {
         return;