From 0ef4e2881c5e282afe6b6fc0d1958091bac785f6 Mon Sep 17 00:00:00 2001 From: bcostm Date: Mon, 13 Nov 2017 16:42:36 +0100 Subject: [PATCH 1/4] STM32: Add support of CAN3 on STM32F413/F767 --- .../TARGET_STM/TARGET_STM32F4/can_device.h | 21 +++++- .../TARGET_STM/TARGET_STM32F7/can_device.h | 21 +++++- targets/TARGET_STM/can_api.c | 70 +++++++++++++++++-- 3 files changed, 105 insertions(+), 7 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/can_device.h b/targets/TARGET_STM/TARGET_STM32F4/can_device.h index ffc85b663c..343345b6f0 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F4/can_device.h @@ -25,7 +25,26 @@ extern "C" { #ifdef DEVICE_CAN -#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie (1 or 2) +#if defined(STM32F413xx) + +#define CAN_NUM 3 + +#define CAN3_IRQ_RX_IRQN CAN3_RX0_IRQn +#define CAN3_IRQ_RX_VECT CAN3_RX0_IRQHandler +#define CAN3_IRQ_TX_IRQN CAN3_TX_IRQn +#define CAN3_IRQ_TX_VECT CAN3_TX_IRQHandler +#define CAN3_IRQ_ERROR_IRQN CAN3_SCE_IRQn +#define CAN3_IRQ_ERROR_VECT CAN3_SCE_IRQHandler +#define CAN3_IRQ_PASSIVE_IRQN CAN3_SCE_IRQn +#define CAN3_IRQ_PASSIVE_VECT CAN3_SCE_IRQHandler +#define CAN3_IRQ_BUS_IRQN CAN3_SCE_IRQn +#define CAN3_IRQ_BUS_VECT CAN3_SCE_IRQHandler + +#else + +#define CAN_NUM 2 + +#endif #define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn #define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler diff --git a/targets/TARGET_STM/TARGET_STM32F7/can_device.h b/targets/TARGET_STM/TARGET_STM32F7/can_device.h index 7f4f6bf253..40e4f9a125 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F7/can_device.h @@ -25,7 +25,26 @@ extern "C" { #ifdef DEVICE_CAN -#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie (1 or 2) +#if defined(STM32F767xx) + +#define CAN_NUM 3 + +#define CAN3_IRQ_RX_IRQN CAN3_RX0_IRQn +#define CAN3_IRQ_RX_VECT CAN3_RX0_IRQHandler +#define CAN3_IRQ_TX_IRQN CAN3_TX_IRQn +#define CAN3_IRQ_TX_VECT CAN3_TX_IRQHandler +#define CAN3_IRQ_ERROR_IRQN CAN3_SCE_IRQn +#define CAN3_IRQ_ERROR_VECT CAN3_SCE_IRQHandler +#define CAN3_IRQ_PASSIVE_IRQN CAN3_SCE_IRQn +#define CAN3_IRQ_PASSIVE_VECT CAN3_SCE_IRQHandler +#define CAN3_IRQ_BUS_IRQN CAN3_SCE_IRQn +#define CAN3_IRQ_BUS_VECT CAN3_SCE_IRQHandler + +#else + +#define CAN_NUM 2 + +#endif #define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn #define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler diff --git a/targets/TARGET_STM/can_api.c b/targets/TARGET_STM/can_api.c index b89f62891c..ea4f0d295d 100644 --- a/targets/TARGET_STM/can_api.c +++ b/targets/TARGET_STM/can_api.c @@ -57,12 +57,18 @@ void can_init_freq (can_t *obj, PinName rd, PinName td, int hz) __HAL_RCC_CAN1_CLK_ENABLE(); obj->index = 0; } -#if defined(CAN2_BASE) && (CAN_NUM == 2) +#if defined(CAN2_BASE) && (CAN_NUM > 1) else if (can == CAN_2) { __HAL_RCC_CAN1_CLK_ENABLE(); // needed to set filters __HAL_RCC_CAN2_CLK_ENABLE(); obj->index = 1; } +#endif +#if defined(CAN3_BASE) && (CAN_NUM > 2) + else if (can == CAN_3) { + __HAL_RCC_CAN3_CLK_ENABLE(); + obj->index = 2; + } #endif else { return; @@ -126,13 +132,20 @@ void can_free(can_t *obj) __HAL_RCC_CAN1_RELEASE_RESET(); __HAL_RCC_CAN1_CLK_DISABLE(); } -#if defined(CAN2_BASE) && (CAN_NUM == 2) +#if defined(CAN2_BASE) && (CAN_NUM > 1) if (can == CAN_2) { __HAL_RCC_CAN2_FORCE_RESET(); __HAL_RCC_CAN2_RELEASE_RESET(); __HAL_RCC_CAN2_CLK_DISABLE(); } #endif +#if defined(CAN3_BASE) && (CAN_NUM > 2) + if (can == CAN_3) { + __HAL_RCC_CAN3_FORCE_RESET(); + __HAL_RCC_CAN3_RELEASE_RESET(); + __HAL_RCC_CAN3_CLK_DISABLE(); + } +#endif } // The following table is used to program bit_timing. It is an adjustment of the sample @@ -549,7 +562,7 @@ void CAN1_SCE_IRQHandler(void) { can_irq(CAN_1, 0); } -#if defined(CAN2_BASE) && (CAN_NUM == 2) +#if defined(CAN2_BASE) && (CAN_NUM > 1) void CAN2_RX0_IRQHandler(void) { can_irq(CAN_2, 1); @@ -562,7 +575,21 @@ void CAN2_SCE_IRQHandler(void) { can_irq(CAN_2, 1); } -#endif // defined(CAN2_BASE) && (CAN_NUM == 2) +#endif +#if defined(CAN3_BASE) && (CAN_NUM > 2) +void CAN3_RX0_IRQHandler(void) +{ + can_irq(CAN_3, 1); +} +void CAN3_TX_IRQHandler(void) +{ + can_irq(CAN_3, 1); +} +void CAN3_SCE_IRQHandler(void) +{ + can_irq(CAN_3, 1); +} +#endif #endif // else void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) @@ -603,7 +630,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) return; } } -#if defined(CAN2_BASE) && (CAN_NUM == 2) +#if defined(CAN2_BASE) && (CAN_NUM > 1) else if ((CANName) can == CAN_2) { switch (type) { case IRQ_RX: @@ -635,6 +662,39 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) return; } } +#endif +#if defined(CAN3_BASE) && (CAN_NUM > 2) + else if ((CANName) can == CAN_3) { + switch (type) { + case IRQ_RX: + ier = CAN_IT_FMP0; + irq_n = CAN3_IRQ_RX_IRQN; + vector = (uint32_t)&CAN3_IRQ_RX_VECT; + break; + case IRQ_TX: + ier = CAN_IT_TME; + irq_n = CAN3_IRQ_TX_IRQN; + vector = (uint32_t)&CAN3_IRQ_TX_VECT; + break; + case IRQ_ERROR: + ier = CAN_IT_ERR; + irq_n = CAN3_IRQ_ERROR_IRQN; + vector = (uint32_t)&CAN3_IRQ_ERROR_VECT; + break; + case IRQ_PASSIVE: + ier = CAN_IT_EPV; + irq_n = CAN3_IRQ_PASSIVE_IRQN; + vector = (uint32_t)&CAN3_IRQ_PASSIVE_VECT; + break; + case IRQ_BUS: + ier = CAN_IT_BOF; + irq_n = CAN3_IRQ_BUS_IRQN; + vector = (uint32_t)&CAN3_IRQ_BUS_VECT; + break; + default: + return; + } + } #endif else { return; From be2a6ae273d77132d51183fc2b1c56f1739a2b4d Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 14 Nov 2017 09:44:20 +0100 Subject: [PATCH 2/4] STM32: Use CAN3_BASE + typos --- targets/TARGET_STM/TARGET_STM32F0/can_device.h | 4 ++-- targets/TARGET_STM/TARGET_STM32F1/can_device.h | 4 ++-- targets/TARGET_STM/TARGET_STM32F2/can_device.h | 4 ++-- targets/TARGET_STM/TARGET_STM32F3/can_device.h | 4 ++-- targets/TARGET_STM/TARGET_STM32F4/can_device.h | 8 ++++---- targets/TARGET_STM/TARGET_STM32F7/can_device.h | 8 ++++---- targets/TARGET_STM/TARGET_STM32L4/can_device.h | 4 ++-- 7 files changed, 18 insertions(+), 18 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F0/can_device.h b/targets/TARGET_STM/TARGET_STM32F0/can_device.h index cff47d6a4c..c1fa6fab6a 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F0/can_device.h @@ -17,7 +17,7 @@ #define MBED_CAN_DEVICE_H #include "cmsis.h" -#include "stm32f0xx_hal.h" +#include "stm32f0xx.h" #ifdef __cplusplus extern "C" { @@ -25,7 +25,7 @@ extern "C" { #ifdef DEVICE_CAN -#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie +#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie #define CAN1_IRQ_RX_IRQN CEC_CAN_IRQn #define CAN1_IRQ_RX_VECT CAN_IRQHandler diff --git a/targets/TARGET_STM/TARGET_STM32F1/can_device.h b/targets/TARGET_STM/TARGET_STM32F1/can_device.h index 3792d0743e..dee4be6914 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F1/can_device.h @@ -17,7 +17,7 @@ #define MBED_CAN_DEVICE_H #include "cmsis.h" -#include "stm32f1xx_hal.h" +#include "stm32f1.h" #ifdef __cplusplus extern "C" { @@ -25,7 +25,7 @@ extern "C" { #ifdef DEVICE_CAN -#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie +#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie #define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn #define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler diff --git a/targets/TARGET_STM/TARGET_STM32F2/can_device.h b/targets/TARGET_STM/TARGET_STM32F2/can_device.h index 97a54210a0..cb95b44ea8 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F2/can_device.h @@ -17,7 +17,7 @@ #define MBED_CAN_DEVICE_H #include "cmsis.h" -#include "stm32f2xx_hal.h" +#include "stm32f2xx.h" #ifdef __cplusplus extern "C" { @@ -25,7 +25,7 @@ extern "C" { #ifdef DEVICE_CAN -#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie (1 or 2) +#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie #define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn #define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler diff --git a/targets/TARGET_STM/TARGET_STM32F3/can_device.h b/targets/TARGET_STM/TARGET_STM32F3/can_device.h index 1d77768200..121999c681 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F3/can_device.h @@ -17,7 +17,7 @@ #define MBED_CAN_DEVICE_H #include "cmsis.h" -#include "stm32f3xx_hal.h" +#include "stm32f3xx.h" #ifdef __cplusplus extern "C" { @@ -25,7 +25,7 @@ extern "C" { #ifdef DEVICE_CAN -#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie +#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie #define CAN1_IRQ_RX_IRQN CAN_RX0_IRQn #define CAN1_IRQ_RX_VECT CAN_RX0_IRQHandler diff --git a/targets/TARGET_STM/TARGET_STM32F4/can_device.h b/targets/TARGET_STM/TARGET_STM32F4/can_device.h index 343345b6f0..81485b0ef7 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F4/can_device.h @@ -17,7 +17,7 @@ #define MBED_CAN_DEVICE_H #include "cmsis.h" -#include "stm32f4xx_hal.h" +#include "stm32f4xx.h" #ifdef __cplusplus extern "C" { @@ -25,9 +25,9 @@ extern "C" { #ifdef DEVICE_CAN -#if defined(STM32F413xx) +#if defined(CAN3_BASE) -#define CAN_NUM 3 +#define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie #define CAN3_IRQ_RX_IRQN CAN3_RX0_IRQn #define CAN3_IRQ_RX_VECT CAN3_RX0_IRQHandler @@ -42,7 +42,7 @@ extern "C" { #else -#define CAN_NUM 2 +#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie #endif diff --git a/targets/TARGET_STM/TARGET_STM32F7/can_device.h b/targets/TARGET_STM/TARGET_STM32F7/can_device.h index 40e4f9a125..729b36177a 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F7/can_device.h @@ -17,7 +17,7 @@ #define MBED_CAN_DEVICE_H #include "cmsis.h" -#include "stm32f7xx_hal.h" +#include "stm32f7xx.h" #ifdef __cplusplus extern "C" { @@ -25,9 +25,9 @@ extern "C" { #ifdef DEVICE_CAN -#if defined(STM32F767xx) +#if defined(CAN3_BASE) -#define CAN_NUM 3 +#define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie #define CAN3_IRQ_RX_IRQN CAN3_RX0_IRQn #define CAN3_IRQ_RX_VECT CAN3_RX0_IRQHandler @@ -42,7 +42,7 @@ extern "C" { #else -#define CAN_NUM 2 +#define CAN_NUM 2 // Number of CAN peripherals present in the STM32 serie #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/can_device.h b/targets/TARGET_STM/TARGET_STM32L4/can_device.h index 3cb1c1b6c1..997a1b1087 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32L4/can_device.h @@ -17,7 +17,7 @@ #define MBED_CAN_DEVICE_H #include "cmsis.h" -#include "stm32l4xx_hal.h" +#include "stm32l4xx.h" #ifdef __cplusplus extern "C" { @@ -25,7 +25,7 @@ extern "C" { #ifdef DEVICE_CAN -#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie +#define CAN_NUM 1 // Number of CAN peripherals present in the STM32 serie #define CAN1_IRQ_RX_IRQN CAN1_RX0_IRQn #define CAN1_IRQ_RX_VECT CAN1_RX0_IRQHandler From 2e2b4085804608739cc06fec787d7c510e72d6ed Mon Sep 17 00:00:00 2001 From: bcostm Date: Wed, 15 Nov 2017 09:07:52 +0100 Subject: [PATCH 3/4] STM32: fix compilation error with STM32F1 --- targets/TARGET_STM/TARGET_STM32F1/can_device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/targets/TARGET_STM/TARGET_STM32F1/can_device.h b/targets/TARGET_STM/TARGET_STM32F1/can_device.h index dee4be6914..3a8438faed 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F1/can_device.h @@ -17,7 +17,7 @@ #define MBED_CAN_DEVICE_H #include "cmsis.h" -#include "stm32f1.h" +#include "stm32f1xx.h" #ifdef __cplusplus extern "C" { From 2d8d8ae9e1735de32b314975e2de0063479e78e6 Mon Sep 17 00:00:00 2001 From: bcostm Date: Wed, 15 Nov 2017 10:36:03 +0100 Subject: [PATCH 4/4] STM32: fix error with CAN_3 not defined --- targets/TARGET_STM/TARGET_STM32F4/can_device.h | 2 +- targets/TARGET_STM/TARGET_STM32F7/can_device.h | 2 +- targets/TARGET_STM/can_api.c | 16 ++++++++-------- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/can_device.h b/targets/TARGET_STM/TARGET_STM32F4/can_device.h index 81485b0ef7..16377c24c9 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F4/can_device.h @@ -25,7 +25,7 @@ extern "C" { #ifdef DEVICE_CAN -#if defined(CAN3_BASE) +#if defined(CAN3_BASE) && defined(CAN_3) #define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie diff --git a/targets/TARGET_STM/TARGET_STM32F7/can_device.h b/targets/TARGET_STM/TARGET_STM32F7/can_device.h index 729b36177a..0581da5584 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/can_device.h +++ b/targets/TARGET_STM/TARGET_STM32F7/can_device.h @@ -25,7 +25,7 @@ extern "C" { #ifdef DEVICE_CAN -#if defined(CAN3_BASE) +#if defined(CAN3_BASE) && defined(CAN_3) #define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie diff --git a/targets/TARGET_STM/can_api.c b/targets/TARGET_STM/can_api.c index ea4f0d295d..bd2d734247 100644 --- a/targets/TARGET_STM/can_api.c +++ b/targets/TARGET_STM/can_api.c @@ -57,14 +57,14 @@ void can_init_freq (can_t *obj, PinName rd, PinName td, int hz) __HAL_RCC_CAN1_CLK_ENABLE(); obj->index = 0; } -#if defined(CAN2_BASE) && (CAN_NUM > 1) +#if defined(CAN2_BASE) && defined(CAN_2) else if (can == CAN_2) { __HAL_RCC_CAN1_CLK_ENABLE(); // needed to set filters __HAL_RCC_CAN2_CLK_ENABLE(); obj->index = 1; } #endif -#if defined(CAN3_BASE) && (CAN_NUM > 2) +#if defined(CAN3_BASE) && defined(CAN_3) else if (can == CAN_3) { __HAL_RCC_CAN3_CLK_ENABLE(); obj->index = 2; @@ -132,14 +132,14 @@ void can_free(can_t *obj) __HAL_RCC_CAN1_RELEASE_RESET(); __HAL_RCC_CAN1_CLK_DISABLE(); } -#if defined(CAN2_BASE) && (CAN_NUM > 1) +#if defined(CAN2_BASE) && defined(CAN_2) if (can == CAN_2) { __HAL_RCC_CAN2_FORCE_RESET(); __HAL_RCC_CAN2_RELEASE_RESET(); __HAL_RCC_CAN2_CLK_DISABLE(); } #endif -#if defined(CAN3_BASE) && (CAN_NUM > 2) +#if defined(CAN3_BASE) && defined(CAN_3) if (can == CAN_3) { __HAL_RCC_CAN3_FORCE_RESET(); __HAL_RCC_CAN3_RELEASE_RESET(); @@ -562,7 +562,7 @@ void CAN1_SCE_IRQHandler(void) { can_irq(CAN_1, 0); } -#if defined(CAN2_BASE) && (CAN_NUM > 1) +#if defined(CAN2_BASE) && defined(CAN_2) void CAN2_RX0_IRQHandler(void) { can_irq(CAN_2, 1); @@ -576,7 +576,7 @@ void CAN2_SCE_IRQHandler(void) can_irq(CAN_2, 1); } #endif -#if defined(CAN3_BASE) && (CAN_NUM > 2) +#if defined(CAN3_BASE) && defined(CAN_3) void CAN3_RX0_IRQHandler(void) { can_irq(CAN_3, 1); @@ -630,7 +630,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) return; } } -#if defined(CAN2_BASE) && (CAN_NUM > 1) +#if defined(CAN2_BASE) && defined(CAN_2) else if ((CANName) can == CAN_2) { switch (type) { case IRQ_RX: @@ -663,7 +663,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) } } #endif -#if defined(CAN3_BASE) && (CAN_NUM > 2) +#if defined(CAN3_BASE) && defined(CAN_3) else if ((CANName) can == CAN_3) { switch (type) { case IRQ_RX: