Optional SoftDevice for the NRF52 series

Ability to swap SoftDevices using the mbed configuration system.

For example, build NRF52840_DK without SoftDevice:

    "target_overrides": {
        "*": {
            "target.MERGE_SOFT_DEVICE": false,
            "target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_S140"],
            "target.extra_labels_add": ["SOFTDEVICE_NONE"]
        }
    }

Pinned down vector table to beginningn of RAM.
pull/6547/head
Marcus Chang 2018-02-01 12:02:11 -08:00
parent 770b1a326e
commit 39c69f146c
74 changed files with 233 additions and 49 deletions

View File

@ -1,23 +1,38 @@
#! armcc -E
/* Default to no softdevice */
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x23000
#define MBED_APP_START 0x0
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x5D000
#define MBED_APP_SIZE 0x80000
#endif
/* If app_start is 0, do not set aside space for the softdevice */
#if MBED_APP_START == 0
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x10000
#else
#define MBED_RAM_START 0x20003000
#define MBED_RAM_SIZE 0xD000
#endif
#define MBED_RAM0_START MBED_RAM_START
#define MBED_RAM0_SIZE 0xD8
#define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM0 0x20003000 UNINIT 0x000000D8 { ;no init section
RW_IRAM0 MBED_RAM0_START UNINIT MBED_RAM0_SIZE { ;no init section
*(*noinit)
}
RW_IRAM1 0x200030D8 0x0000CF28 {
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE {
.ANY (+RW +ZI)
}
}

View File

@ -16,10 +16,34 @@
/* Linker script to configure memory regions. */
/* Default to no softdevice */
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x0
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x80000
#endif
/* If app_start is 0, do not set aside space for the softdevice */
#if MBED_APP_START == 0
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x10000
#else
#define MBED_RAM_START 0x20003000
#define MBED_RAM_SIZE 0xD000
#endif
#define MBED_RAM0_START MBED_RAM_START
#define MBED_RAM0_SIZE 0xD8
#define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE)
MEMORY
{
FLASH (rx) : ORIGIN = 0x23000, LENGTH = 0x5d000
RAM (rwx) : ORIGIN = 0x20003000, LENGTH = 0xd000
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM_NVIC (rwx) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE
RAM (rwx) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE
}
@ -175,12 +199,12 @@ SECTIONS
__edata = .;
.noinit :
.noinit (NOLOAD) :
{
PROVIDE(__start_noinit = .);
KEEP(*(.noinit))
PROVIDE(__stop_noinit = .);
} > RAM
} > RAM_NVIC
.bss :
{
@ -199,8 +223,8 @@ SECTIONS
*(.heap*);
/* Expand the heap to reach the stack boundary. */
ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - 0x800), "heap region overflowed into stack");
. += (ORIGIN(RAM) + LENGTH(RAM) - 0x800) - .;
ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - 0x8000), "heap region overflowed into stack");
. += (ORIGIN(RAM) + LENGTH(RAM) - 0x8000) - .;
} > RAM
PROVIDE(__heap_start = ADDR(.heap));
PROVIDE(__heap_size = SIZEOF(.heap));

View File

@ -2,12 +2,22 @@
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/* Default to no softdevice */
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = 0x23000;
define symbol MBED_APP_START = 0x0;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = 0x5d000;
define symbol MBED_APP_SIZE = 0x80000;
}
/* If app_start is 0, do not set aside space for the softdevice */
if (MBED_APP_START == 0) {
define symbol MBED_RAM_START = 0x20000000;
define symbol MBED_RAM_SIZE = 0x10000;
} else {
define symbol MBED_RAM_START = 0x20003000;
define symbol MBED_RAM_SIZE = 0xD000;
}
/*-Specials-*/
@ -16,15 +26,15 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __ICFEDIT_region_RAM_start__ = 0x20003000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2000ffff;
define symbol __ICFEDIT_region_RAM_start__ = MBED_RAM_START;
define symbol __ICFEDIT_region_RAM_end__ = MBED_RAM_START + MBED_RAM_SIZE - 1;
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
/*-Sizes-*/
/*Heap 1/4 of ram and stack 1/8*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_heap__ = 0x1800;
define symbol __ICFEDIT_size_cstack__ = 0x2000;
define symbol __ICFEDIT_size_heap__ = 0x4000;
/**** End of ICF editor section. ###ICF###*/
define symbol __code_start_soft_device__ = 0x0;
@ -38,6 +48,7 @@ define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_region_RAM_start__ { section .noinit };
keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

View File

@ -1,23 +1,38 @@
#! armcc -E
/* Default to no softdevice */
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x22000
#define MBED_APP_START 0x0
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0xDE000
#define MBED_APP_SIZE 0x100000
#endif
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
/* If app_start is 0, do not set aside space for the softdevice */
#if MBED_APP_START == 0
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x40000
#else
#define MBED_RAM_START 0x20004000
#define MBED_RAM_SIZE 0x3C000
#endif
#define MBED_RAM0_START MBED_RAM_START
#define MBED_RAM0_SIZE 0xF8
#define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM0 0x20004000 UNINIT 0x000000F8 { ;no init section
RW_IRAM0 MBED_RAM0_START UNINIT MBED_RAM0_SIZE { ;no init section
*(*noinit)
}
RW_IRAM1 0x200040F8 0x0003BF08 {
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE {
.ANY (+RW +ZI)
}
}

View File

@ -16,18 +16,34 @@
/* Linker script to configure memory regions. */
/* Default to no softdevice */
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x22000
#define MBED_APP_START 0x0
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0xDE000
#define MBED_APP_SIZE 0x100000
#endif
/* If app_start is 0, do not set aside space for the softdevice */
#if MBED_APP_START == 0
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x40000
#else
#define MBED_RAM_START 0x20004000
#define MBED_RAM_SIZE 0x3C000
#endif
#define MBED_RAM0_START MBED_RAM_START
#define MBED_RAM0_SIZE 0xF8
#define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE)
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (rwx) : ORIGIN = 0x20004000, LENGTH = 0x3C000
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM_NVIC (rwx) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE
RAM (rwx) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE
}
@ -182,12 +198,12 @@ SECTIONS
__edata = .;
.noinit :
.noinit (NOLOAD) :
{
PROVIDE(__start_noinit = .);
KEEP(*(.noinit))
PROVIDE(__stop_noinit = .);
} > RAM
} > RAM_NVIC
.bss :
{

View File

@ -2,12 +2,22 @@
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/* Default to no softdevice */
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = 0x22000;
define symbol MBED_APP_START = 0x0;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = 0xDE000;
define symbol MBED_APP_SIZE = 0x100000;
}
/* If app_start is 0, do not set aside space for the softdevice */
if (MBED_APP_START == 0) {
define symbol MBED_RAM_START = 0x20000000;
define symbol MBED_RAM_SIZE = 0x40000;
} else {
define symbol MBED_RAM_START = 0x20004000;
define symbol MBED_RAM_SIZE = 0x3C000;
}
/*-Specials-*/
@ -16,15 +26,15 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __ICFEDIT_region_RAM_start__ = 0x20004000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2003ffff;
define symbol __ICFEDIT_region_RAM_start__ = MBED_RAM_START;
define symbol __ICFEDIT_region_RAM_end__ = MBED_RAM_START + MBED_RAM_SIZE - 1;
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
/*-Sizes-*/
/*Heap 1/4 of ram and stack 1/8*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_heap__ = 0x3000;
define symbol __ICFEDIT_size_cstack__ = 0x8000;
define symbol __ICFEDIT_size_heap__ = 0x10000;
/**** End of ICF editor section. ###ICF###*/
define symbol __code_start_soft_device__ = 0x0;
@ -38,6 +48,7 @@ define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_region_RAM_start__ { section .noinit };
keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

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@ -0,0 +1,14 @@
{
"name": "softdevice",
"macros": [
"SOFTDEVICE_PRESENT=1",
"BLE_STACK_SUPPORT_REQD=1",
"S132=1"
],
"target_overrides": {
"*": {
"target.features_add": ["BLE"],
"target.mbed_app_start": "0x23000"
}
}
}

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@ -0,0 +1,16 @@
{
"name": "softdevice",
"macros": [
"SOFTDEVICE_PRESENT=1",
"BLE_STACK_SUPPORT_REQD=1",
"NRF_DFU_SETTINGS_VERSION=1",
"NRF_SD_BLE_API_VERSION=5",
"S140=1"
],
"target_overrides": {
"*": {
"target.features_add": ["BLE"],
"target.mbed_app_start": "0x22000"
}
}
}

View File

@ -36,20 +36,25 @@
*
*/
#if DEVICE_FLASH
#include "flash_api.h"
#include "nrf_nvmc.h"
#include "nrf_soc.h"
#include "nrf_sdm.h"
#if DEVICE_FLASH
#if defined(SOFTDEVICE_PRESENT)
#include "nrf_sdm.h"
#endif
int32_t flash_init(flash_t *obj)
{
(void)(obj);
#if defined(SOFTDEVICE_PRESENT)
uint8_t sd_enabled;
if ((sd_softdevice_is_enabled(&sd_enabled) == NRF_SUCCESS) && sd_enabled == 1) {
return -1;
}
#endif
return 0;
}
@ -62,20 +67,24 @@ int32_t flash_free(flash_t *obj)
int32_t flash_erase_sector(flash_t *obj, uint32_t address)
{
(void)(obj);
#if defined(SOFTDEVICE_PRESENT)
uint8_t sd_enabled;
if ((sd_softdevice_is_enabled(&sd_enabled) == NRF_SUCCESS) && sd_enabled == 1) {
return -1;
}
#endif
nrf_nvmc_page_erase(address);
return 0;
}
int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size)
{
#if defined(SOFTDEVICE_PRESENT)
uint8_t sd_enabled;
if ((sd_softdevice_is_enabled(&sd_enabled) == NRF_SUCCESS) && sd_enabled == 1) {
return -1;
}
#endif
/* We will use *_words function to speed up flashing code. Word means 32bit -> 4B
* or sizeof(uint32_t).
*/

View File

@ -39,7 +39,10 @@
#include "nrf.h"
#include "cmsis_nvic.h"
#include "stdint.h"
#if defined(SOFTDEVICE_PRESENT)
#include "nrf_sdm.h"
#endif
#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
__attribute__ ((section(".bss.noinit"),zero_init))
@ -71,5 +74,9 @@ void nrf_reloc_vector_table(void)
nrf_dispatch_vector[i] = old_vectors[i];
}
#if defined(SOFTDEVICE_PRESENT)
sd_softdevice_vector_table_base_set((uint32_t) nrf_dispatch_vector);
#else
SCB->VTOR = (uint32_t) nrf_dispatch_vector;
#endif
}

View File

@ -16,9 +16,15 @@
#include "sleep_api.h"
#include "cmsis.h"
#include "mbed_interface.h"
#include "nrf_sdh.h"
#include "nrf_soc.h"
#if defined(SOFTDEVICE_PRESENT)
#include "nrf_sdh.h"
#define NRF_HAL_SLEEP_SD_IS_ENABLED() nrf_sdh_is_enabled()
#else
#define NRF_HAL_SLEEP_SD_IS_ENABLED() 0
#endif
// Mask of reserved bits of the register ICSR in the System Control Block peripheral
// In this case, bits which are equal to 0 are the bits reserved in this register
#define SCB_ICSR_RESERVED_BITS_MASK 0x9E43F03F
@ -41,9 +47,11 @@ void hal_sleep(void)
#endif
// If the SoftDevice is enabled, its API must be used to go to sleep.
if (nrf_sdh_is_enabled()) {
if (NRF_HAL_SLEEP_SD_IS_ENABLED()) {
#if defined(SOFTDEVICE_PRESENT)
sd_power_mode_set(NRF_POWER_MODE_LOWPWR);
sd_app_evt_wait();
#endif
} else {
NRF_POWER->TASKS_LOWPWR = 1;

View File

@ -43,8 +43,11 @@
#include "lp_ticker_api.h"
#include "mbed_critical.h"
#if defined(NRF52_ERRATA_20)
#include "nrf_sdh.h"
#if defined(SOFTDEVICE_PRESENT)
#include "nrf_sdh.h"
#define NRF_HAL_US_TICKER_SD_IS_ENABLED() nrf_sdh_is_enabled()
#else
#define NRF_HAL_US_TICKER_SD_IS_ENABLED() 0
#endif
//------------------------------------------------------------------------------
@ -90,7 +93,7 @@ void COMMON_RTC_IRQ_HANDLER(void)
__STATIC_INLINE void errata_20(void)
{
#if defined(NRF52_ERRATA_20)
if (!nrf_sdh_is_enabled())
if (!NRF_HAL_US_TICKER_SD_IS_ENABLED())
{
NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
NRF_CLOCK->TASKS_LFCLKSTART = 1;

View File

@ -3497,9 +3497,27 @@
"MCU_NRF52832": {
"inherits": ["Target"],
"core": "Cortex-M4F",
"macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", "MBED_TICKLESS"],
"device_has": ["STCLK_OFF_DURING_SLEEP", "ITM", "TRNG"],
"extra_labels": ["NORDIC", "NRF5x", "NRF52", "MCU_NRF52832", "SDK_14_2", "SOFTDEVICE_S132"],
"macros": [
"NRF52",
"TARGET_NRF52832",
"CMSIS_VECTAB_VIRTUAL",
"CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
"MBED_TICKLESS"
],
"device_has": [
"ITM",
"TRNG",
"STCLK_OFF_DURING_SLEEP"
],
"extra_labels": [
"NORDIC",
"NRF5x",
"NRF52",
"MCU_NRF52832",
"SDK_14_2",
"SOFTDEVICE_COMMON",
"SOFTDEVICE_S132"
],
"OUTPUT_EXT": "hex",
"is_disk_virtual": true,
"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
@ -3518,8 +3536,8 @@
"function": "MCU_NRF51Code.binary_hook",
"toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
},
"bootloader_supported": true,
"MERGE_BOOTLOADER": false,
"features": ["BLE"],
"config": {
"lf_clock_src": {
"value": "NRF_LF_SRC_XTAL",
@ -3623,9 +3641,26 @@
"MCU_NRF52840": {
"inherits": ["Target"],
"core": "Cortex-M4F",
"macros": ["TARGET_NRF52840", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S140", "NRF_SD_BLE_API_VERSION=5", "NRF52840_XXAA", "NRF_DFU_SETTINGS_VERSION=1", "NRF_SD_BLE_API_VERSION=5", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", "MBED_TICKLESS"],
"device_has": ["STCLK_OFF_DURING_SLEEP", "ITM"],
"extra_labels": ["NORDIC", "NRF5x", "NRF52", "MCU_NRF52840", "SDK_14_2", "SOFTDEVICE_S140"],
"macros": [
"NRF52840_XXAA",
"TARGET_NRF52840",
"CMSIS_VECTAB_VIRTUAL",
"CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
"MBED_TICKLESS"
],
"device_has": [
"ITM",
"STCLK_OFF_DURING_SLEEP"
],
"extra_labels": [
"NORDIC",
"NRF5x",
"NRF52",
"MCU_NRF52840",
"SDK_14_2",
"SOFTDEVICE_COMMON",
"SOFTDEVICE_S140"
],
"OUTPUT_EXT": "hex",
"is_disk_virtual": true,
"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
@ -3645,8 +3680,8 @@
"function": "MCU_NRF51Code.binary_hook",
"toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
},
"bootloader_supported": true,
"MERGE_BOOTLOADER": false,
"features": ["BLE"],
"config": {
"lf_clock_src": {
"value": "NRF_LF_SRC_XTAL",