mirror of https://github.com/ARMmbed/mbed-os.git
Serial re-implementation for the NRF52 series
Serial implementation uses UARTE instead of UART peripheral: * EasyDMA is used for reading and writing data. * Triple buffering for receiving data. See README for full description.pull/6547/head
Marcus Chang
parent
9502011d96
commit
3663494bd9
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@ -21,19 +21,26 @@
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* Can be overwritten by user.
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*/
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MBED_WEAK const PinMapI2C PinMap_I2C[1] = {
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{NC, NC, NC}
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{ NC, NC, NC }
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};
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/* Default mapping between SPI pins and SPI instance.
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* Can be overwritten by user.
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*/
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MBED_WEAK const PinMapSPI PinMap_SPI[1] = {
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{NC, NC, NC, NC}
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{ NC, NC, NC, NC }
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};
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/* Default mapping between PWM pins and PWM instance.
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* Can be overwritten by user.
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*/
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MBED_WEAK const PinMapPWM PinMap_PWM[1] = {
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{NC, NC}
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{ NC, NC }
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};
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/* Default mapping between UART pins and UART instance.
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* Can be overwritten by user.
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*/
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MBED_WEAK const PinMapUART PinMap_UART[1] = {
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{ NC, NC, NC }
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};
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@ -40,3 +40,65 @@ The tables must be placed in a C compilation file.
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1. When called from the same thread, it is safe to assign I2C and SPI objects to the same instance.
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1. If an instance is being used exclusively for either I2C or SPI, the objects can safely be called from multiple threads.
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1. If an instance is being used for both I2C and SPI, the user must provide thread safety between the objects.
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### Serial
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The serial implementation uses the UARTE module which works exclusively through EasyDMA and RAM buffers. For optimal performance, each configured instance (NRF52832 has 1, NRF52840 has 2) has three buffers statically assigned:
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1. Rx DMA buffer, which EasyDMA is currently writing to.
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1. Rx DMA buffer, pre-loaded in EasyDMA for automatic switchover.
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1. Rx FIFO buffer, for serving data to the application.
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When the first DMA buffer is full or flushed the interrupt handler will automatically copy the DMA buffer to the FIFO buffer. This happens in interrupt context to avoid data loss and with UARTE interrupts set at the highest priority. The FIFO buffer is backed by the Nordic atomic fifo, which can be read and written to safely without disabling interrupts.
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#### Customization
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All buffers can be resized to fit the application:
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```
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"name": "nordic",
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"config": {
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"uart-dma-size": {
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"help": "UART DMA buffer. 2 buffers per instance. DMA buffer is filled by UARTE",
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"value": 8
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},
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"uart-0-fifo-size": {
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"help": "UART0 FIFO buffer. FIFO buffer is filled from DMA buffer.",
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"value": 32
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},
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"uart-1-fifo-size": {
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"help": "UART1 FIFO buffer. FIFO buffer is filled from DMA buffer.",
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"value": 32
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}
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}
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```
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All DMA buffers are the same size and must be at least 5 bytes due to hardware restrictions. DMA buffers should be sized to handle the worst expected interrupt latency. FIFO buffers can be configured per instance and the size should reflect the largest expected burst data. For example, a serial debug port might receive a line of data at a time, so an 80 byte FIFO buffer would be adequate. A serial port connected to a wifi radio should have a FIFO buffer in the kilo byte range.
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For the NRF52840, UARTE instances are assigned based on pins and calling order. Serial objects with the same pin configurations will go to the same instance. A custom configuration table can be provided by overriding the weakly defined default empty table. In the example below, serial objects using pins `p1` and `p2` for `Tx` and `Rx` will always be assigned to `Instance 1` and serial objects using pins `p3` and `p4` for `Tx` and `Rx` will be assigned to `Instance 0` regardless of calling order. The custom configuration table must always be terminated with a row of `NC`.
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```
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const PinMapI2C PinMap_UART[] = {
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{p1, p2, 1},
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{p3, p4, 0},
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{NC, NC, NC}
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};
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```
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The table must be placed in a C compilation file.
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#### RTC2
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Because each DMA buffer must be at least 5 bytes deep, each buffer is automatically flushed after a certain idle period to ensure low latency and correctness. This idle timeout is implemented using 2 of the 4 channels on RTC instance 2. This leaves RTC0 for the SoftDevice and RTC1 for Mbed tickers.
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The RTC2 ISR is set at the lowest interrupt priority to ensure that UARTE interrupts take precedence. The last 2 of the 4 RTC channels are used for decoupling UARTE ISR context from Mbed IRQ events. This ensures that any user code will only delay other user callbacks and idle flushing and puts an upper bound on the interrupt handling time for the UARTE ISR.
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#### Limitations
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* The UARTE hardware only supports 8-bit, None/Even parity, and 1 stop bit.
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* The asynchronous read and write implementation currently only support 255 byte transfers.
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* The EasyDMA hardware can only read from RAM, which means all Tx buffers must reside in RAM. If a Tx buffer residing in flash is passed to the asynchronous write function, the function will try to copy the Tx buffer to a temporary internal buffer and transmit the data from there.
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* It is not possible to do an asynchronous write from flash and receive non-asynchronously at the same time since the non-asynchronous receive buffer is being used as the temporary transmission buffer.
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@ -45,10 +45,6 @@
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extern "C" {
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#endif
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#define STDIO_UART_TX TX_PIN_NUMBER
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#define STDIO_UART_RX RX_PIN_NUMBER
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#define STDIO_UART UART_0
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typedef enum {
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UART_0 = (int)NRF_UART0_BASE
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} UARTName;
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@ -139,6 +139,8 @@ typedef enum {
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// mBed interface Pins
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USBTX = TX_PIN_NUMBER,
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USBRX = RX_PIN_NUMBER,
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STDIO_UART_TX = TX_PIN_NUMBER,
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STDIO_UART_RX = RX_PIN_NUMBER,
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SPI_PSELMOSI0 = p23,
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SPI_PSELMISO0 = p24,
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@ -119,6 +119,8 @@ typedef enum {
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TX_PIN_NUMBER = p6,
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CTS_PIN_NUMBER = p7,
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RTS_PIN_NUMBER = p31,
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STDIO_UART_TX = TX_PIN_NUMBER,
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STDIO_UART_RX = RX_PIN_NUMBER,
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I2C_SDA = p2,
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I2C_SCL = p3,
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@ -140,6 +140,8 @@ typedef enum {
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// mBed interface Pins
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USBTX = TX_PIN_NUMBER,
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USBRX = RX_PIN_NUMBER,
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STDIO_UART_TX = TX_PIN_NUMBER,
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STDIO_UART_RX = RX_PIN_NUMBER,
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SPI_PSELMOSI0 = p23,
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SPI_PSELMISO0 = p24,
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@ -130,6 +130,8 @@ typedef enum {
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TX_PIN_NUMBER = p29,
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CTS_PIN_NUMBER = p28,
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RTS_PIN_NUMBER = p2,
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STDIO_UART_TX = TX_PIN_NUMBER,
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STDIO_UART_RX = RX_PIN_NUMBER,
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// mBed interface Pins
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USBTX = TX_PIN_NUMBER,
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@ -84,6 +84,9 @@ typedef enum {
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TX_PIN_NUMBER = p6,
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CTS_PIN_NUMBER = p7,
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RTS_PIN_NUMBER = p31,
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STDIO_UART_TX = TX_PIN_NUMBER,
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STDIO_UART_RX = RX_PIN_NUMBER,
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I2C_SDA0 = p2,
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I2C_SCL0 = p3,
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@ -107,6 +107,8 @@ typedef enum {
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TX_PIN_NUMBER = p6,
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CTS_PIN_NUMBER = p7,
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RTS_PIN_NUMBER = p31,
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STDIO_UART_TX = TX_PIN_NUMBER,
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STDIO_UART_RX = RX_PIN_NUMBER,
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I2C_SDA0 = p2,
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I2C_SCL0 = p3,
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// mBed interface pins
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@ -141,6 +141,8 @@ typedef enum {
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TX_PIN_NUMBER = p6,
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CTS_PIN_NUMBER = p7, //not on Header
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RTS_PIN_NUMBER = p5, //not on Header
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STDIO_UART_TX = TX_PIN_NUMBER,
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STDIO_UART_RX = RX_PIN_NUMBER,
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// mBed interface Pins
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USBTX = TX_PIN_NUMBER,
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@ -3004,7 +3004,7 @@
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// <e> UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver
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//==========================================================
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#ifndef UART_ENABLED
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#define UART_ENABLED 0
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#define UART_ENABLED 1
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#endif
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// <o> UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control
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@ -3044,7 +3044,7 @@
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// <268435456=> 1000000 baud
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#ifndef UART_DEFAULT_CONFIG_BAUDRATE
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#define UART_DEFAULT_CONFIG_BAUDRATE 30801920
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#define UART_DEFAULT_CONFIG_BAUDRATE 2576384
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#endif
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// <o> UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
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@ -45,10 +45,6 @@
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extern "C" {
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#endif
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#define STDIO_UART_TX TX_PIN_NUMBER
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#define STDIO_UART_RX RX_PIN_NUMBER
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#define STDIO_UART UART_0
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typedef enum
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{
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UART_0 = (int)NRF_UART0_BASE
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// mBed interface Pins
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USBTX = TX_PIN_NUMBER,
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USBRX = RX_PIN_NUMBER,
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STDIO_UART_TX = TX_PIN_NUMBER,
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STDIO_UART_RX = RX_PIN_NUMBER,
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SPI_PSELMOSI0 = P1_13,
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SPI_PSELMISO0 = P1_14,
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@ -3004,7 +3004,7 @@
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// <e> UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver
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//==========================================================
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#ifndef UART_ENABLED
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#define UART_ENABLED 0
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#define UART_ENABLED 1
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#endif
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// <o> UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control
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@ -3044,7 +3044,7 @@
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// <268435456=> 1000000 baud
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#ifndef UART_DEFAULT_CONFIG_BAUDRATE
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#define UART_DEFAULT_CONFIG_BAUDRATE 30801920
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#define UART_DEFAULT_CONFIG_BAUDRATE 2576384
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#endif
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// <o> UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
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@ -3095,7 +3095,7 @@
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// <e> UART1_ENABLED - Enable UART1 instance
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//==========================================================
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#ifndef UART1_ENABLED
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#define UART1_ENABLED 0
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#define UART1_ENABLED 1
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#endif
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// <q> UART1_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA
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@ -0,0 +1,29 @@
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{
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"name": "nordic",
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"config": {
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"uart-hwfc": {
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"help": "Enable hardware flow control for STDIO.",
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"value": 1
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},
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"lf-clock-src": {
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"help": "Select Low Frequency clock source.",
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"value": "NRF_LF_SRC_XTAL"
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},
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"uart-timeout-us": {
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"help": "Idle time in micro seconds between characters before buffer is flushed.",
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"value": 2000
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},
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"uart-0-fifo-size": {
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"help": "UART0 FIFO buffer. FIFO buffer is filled from DMA buffer.",
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"value": 32
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},
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"uart-1-fifo-size": {
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"help": "UART1 FIFO buffer. FIFO buffer is filled from DMA buffer.",
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"value": 32
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},
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"uart-dma-size": {
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"help": "UART DMA buffer. 2 buffers per instance. DMA buffer is filled by UARTE",
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"value": 8
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}
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}
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}
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@ -52,9 +52,32 @@
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extern "C" {
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#endif
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#include "nrf_uart.h"
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struct serial_s {
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uint32_t placeholder; // struct is unused by nRF5x API implementation
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}; // but it must be not empty (required by strict compiler - IAR)
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int instance;
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uint32_t tx;
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uint32_t rx;
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uint32_t cts;
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uint32_t rts;
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nrf_uart_hwfc_t hwfc;
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nrf_uart_parity_t parity;
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nrf_uart_baudrate_t baudrate;
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uint32_t context;
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uint32_t handler;
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uint32_t mask;
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uint32_t event;
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bool update;
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#if DEVICE_SERIAL_ASYNCH
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bool rx_asynch;
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uint32_t tx_handler;
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uint32_t tx_mask;
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uint32_t tx_event;
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uint32_t rx_handler;
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uint32_t rx_mask;
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uint32_t rx_event;
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#endif
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};
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struct spi_s {
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int instance;
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@ -32,6 +32,7 @@
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#define NORDIC_TWI_COUNT TWI_COUNT
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#define NORDIC_SPI_COUNT SPI_COUNT
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#define NORDIC_PWM_COUNT PWM_COUNT
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#define NORDIC_UART_COUNT UARTE_COUNT
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/* Define which instance to return when there are no free instances left.
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* The Mbed HAL API doesn't provide a way for signaling initialization errors
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@ -41,6 +42,7 @@
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#define DEFAULT_I2C_INSTANCE 0 // SPI counts down, choose instance furthest away
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#define DEFAULT_SPI_INSTANCE (NORDIC_SPI_COUNT - 1) // I2C counts up, choose instance furthers away
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#define DEFAULT_PWM_INSTANCE (NORDIC_PWM_COUNT - 1)
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#define DEFAULT_UART_INSTANCE (NORDIC_UART_COUNT - 1)
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/***
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@ -365,3 +367,115 @@ int pin_instance_pwm(PinName pwm)
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return instance;
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}
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/***
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* _ _ _____ _______
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* | | | | /\ | __ \__ __|
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* | | | | / \ | |__) | | |
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* | | | |/ /\ \ | _ / | |
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* | |__| / ____ \| | \ \ | |
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* \____/_/ \_\_| \_\ |_|
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*
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*
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*/
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/* Internal data structure to keep track of allocated instances.
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*/
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typedef struct {
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PinName tx;
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PinName rx;
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} uart_t;
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static uart_t nordic_internal_uart[NORDIC_UART_COUNT] = {
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{ NC, NC },
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#if (NORDIC_UART_COUNT == 2)
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{ NC, NC }
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#endif
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};
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/**
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* Brief Find hardware instance for the provided UART pin.
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*
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* The function will search the PeripheralPin map for a pre-allocated
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* assignment. If none is found the allocation map will be searched
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* to see if the same pins have been assigned an instance before.
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*
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* If no assignement is found and there is an empty slot left in the
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* map, the pins are stored in the map and the hardware instance is
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* returned.
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*
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* If no free instances are available, the default instance is returned.
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*
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* Parameter tx tx pin.
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* Parameter rx rx pin.
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*
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* Return Hardware instance associated with provided pins.
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*/
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int pin_instance_uart(PinName tx, PinName rx)
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{
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int instance = NC;
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/* Search pin map for pre-allocated instance */
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for (size_t index = 0; ((PinMap_UART[index].tx != NC) && (PinMap_UART[index].rx != NC)); index++) {
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/* Compare pins to entry. */
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if ((PinMap_UART[index].tx == tx) && (PinMap_UART[index].rx == rx)) {
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DEBUG_PRINTF("found: %d %d %d\r\n", tx, rx, PinMap_UART[index].instance);
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/* Instance found, save result. */
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instance = PinMap_UART[index].instance;
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/* Lock out entry in map. */
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nordic_internal_uart[instance].tx = tx;
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nordic_internal_uart[instance].rx = rx;
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break;
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}
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}
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/* No instance was found in static map. */
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if (instance == NC) {
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/* Search dynamic map for entry. */
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for (size_t index = 0; index < NORDIC_UART_COUNT; index++) {
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/* Pins match previous dynamic allocation, return instance. */
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if ((nordic_internal_uart[index].tx == tx) && (nordic_internal_uart[index].rx == rx)) {
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instance = index;
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break;
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}
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}
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}
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/* No instance was found in dynamic map. */
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if (instance == NC) {
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/* Search dynamic map for empty slot. */
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for (size_t index = 0; index < NORDIC_UART_COUNT; index++) {
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/* Empty slot found, reserve slot by storing pins. */
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if ((nordic_internal_uart[index].tx == NC) && (nordic_internal_uart[index].rx == NC)) {
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nordic_internal_uart[index].tx = tx;
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nordic_internal_uart[index].rx = rx;
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instance = index;
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break;
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}
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}
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}
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#if defined(DEFAULT_UART_INSTANCE)
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/* Exhausted all options. Return default value. */
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if (instance == NC) {
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instance = DEFAULT_UART_INSTANCE;
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}
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#endif
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DEBUG_PRINTF("UART: %d %d %d\r\n", tx, rx, instance);
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return instance;
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}
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@ -50,6 +50,15 @@ typedef struct {
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|
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extern const PinMapPWM PinMap_PWM[];
|
||||
|
||||
/* Data structure for pre-allocated UART instances. */
|
||||
typedef struct {
|
||||
PinName tx;
|
||||
PinName rx;
|
||||
int instance;
|
||||
} PinMapUART;
|
||||
|
||||
extern const PinMapUART PinMap_UART[];
|
||||
|
||||
/**
|
||||
* @brief Find hardware instance for the provided I2C pins.
|
||||
*
|
||||
|
|
@ -110,6 +119,26 @@ int pin_instance_spi(PinName mosi, PinName miso, PinName clk);
|
|||
*/
|
||||
int pin_instance_pwm(PinName pwm);
|
||||
|
||||
/**
|
||||
* @brief Find hardware instance for the provided UART pins.
|
||||
*
|
||||
* The function will search the PeripheralPin map for a pre-allocated
|
||||
* assignment. If none is found the allocation map will be searched
|
||||
* to see if the same pins have been assigned an instance before.
|
||||
*
|
||||
* If no assignement is found and there is an empty slot left in the
|
||||
* map, the pins are stored in the map and the hardware instance is
|
||||
* returned.
|
||||
*
|
||||
* If no free instances are available, the default instance is returned.
|
||||
*
|
||||
* @param[in] tx tx pin.
|
||||
* @param[in] rx rx pin.
|
||||
*
|
||||
* @return Hardware instance associated with provided pins.
|
||||
*/
|
||||
int pin_instance_uart(PinName tx, PinName rx);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
File diff suppressed because it is too large
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Reference in New Issue