ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Added support for ADI EV-COG-AD4050LZ platform.

pull/5144/head
Dave Wu 2017-09-20 14:37:22 +10:00
parent a0d55036f9
commit 00b1e72e49
129 changed files with 61780 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/.mbedignore Executable file
View File

@ -0,0 +1,28 @@
bsp/adc/adi_adc_data.c
bsp/adc/adi_adc_data_v1.c
bsp/adc/adi_adc_v1.c
bsp/beep/adi_beep_v1.c
bsp/crc/adi_crc_data.c
bsp/crc/adi_crc_v1.c
bsp/crypto/adi_crypto_v1.c
bsp/dma/adi_dma_pl230_v2.c
bsp/flash/adi_flash_data.c
bsp/flash/adi_flash_v1.c
bsp/gpio/adi_gpio_v1.c
bsp/i2c/adi_i2c_data.c
bsp/i2c/adi_i2c_v1.c
bsp/pwr/adi_pwr_v1.c
bsp/rtc/adi_rtc_data.c
bsp/rtc/adi_rtc_data_v1.c
bsp/rtc/adi_rtc_v1.c
bsp/sport/adi_sport_data_v1.c
bsp/sport/adi_sport_v1.c
bsp/uart/adi_uart_data_v1.c
bsp/uart/adi_uart_v1.c
bsp/spi/adi_spi_data.c
bsp/spi/adi_spi_data_v1.c
bsp/spi/adi_spi_v1.c
bsp/tmr/adi_tmr_data.c
bsp/tmr/adi_tmr_data_v1.c
bsp/tmr/adi_tmr_v1.c
bsp/wdt/adi_wdt_v1.c

136
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TARGET_EV_COG_AD4050LZ/PeripheralNames.h Executable file
View File

@ -0,0 +1,136 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
OSC32KCLK = 0,
} RTCName;
typedef enum {
UART_0 = 0,
UART_1 = 1,
UART_2 = 2,
UART_3 = 3,
UART_4 = 4,
} UARTName;
#define STDIO_UART_TX USBTX
#define STDIO_UART_RX USBRX
#define STDIO_UART UART_0
typedef enum {
I2C_0 = 0,
I2C_1 = 1,
I2C_2 = 2,
} I2CName;
#define TPM_SHIFT 8
typedef enum {
PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
PWM_11 = (1 << TPM_SHIFT) | (2), // FTM1 CH2
PWM_12 = (1 << TPM_SHIFT) | (3), // FTM1 CH3
PWM_13 = (1 << TPM_SHIFT) | (4), // FTM1 CH4
PWM_14 = (1 << TPM_SHIFT) | (5), // FTM1 CH5
PWM_15 = (1 << TPM_SHIFT) | (6), // FTM1 CH6
PWM_16 = (1 << TPM_SHIFT) | (7), // FTM1 CH7
PWM_17 = (2 << TPM_SHIFT) | (0), // FTM2 CH0
PWM_18 = (2 << TPM_SHIFT) | (1), // FTM2 CH1
PWM_19 = (2 << TPM_SHIFT) | (2), // FTM2 CH2
PWM_20 = (2 << TPM_SHIFT) | (3), // FTM2 CH3
PWM_21 = (2 << TPM_SHIFT) | (4), // FTM2 CH4
PWM_22 = (2 << TPM_SHIFT) | (5), // FTM2 CH5
PWM_23 = (2 << TPM_SHIFT) | (6), // FTM2 CH6
PWM_24 = (2 << TPM_SHIFT) | (7), // FTM2 CH7
// could be 4 or could be 3... not sure what register
// this is for... too much abstraction
PWM_25 = (3 << TPM_SHIFT) | (0), // FTM3 CH0
PWM_26 = (3 << TPM_SHIFT) | (1), // FTM3 CH1
PWM_27 = (3 << TPM_SHIFT) | (2), // FTM3 CH2
PWM_28 = (3 << TPM_SHIFT) | (3), // FTM3 CH3
PWM_29 = (3 << TPM_SHIFT) | (4), // FTM3 CH4
PWM_30 = (3 << TPM_SHIFT) | (5), // FTM3 CH5
PWM_31 = (3 << TPM_SHIFT) | (6), // FTM3 CH6
PWM_32 = (3 << TPM_SHIFT) | (7), // FTM3 CH7
} PWMName;
typedef enum {
ADC0_VIN0 = 0,
ADC0_VIN1 = 1,
ADC0_VIN2 = 2,
ADC0_VIN3 = 3,
ADC0_VIN4 = 4,
ADC0_VIN5 = 5,
ADC0_VIN6 = 6,
ADC0_VIN7 = 7
} ADCName;
typedef enum {
DAC_0 = 0
} DACName;
typedef enum {
SPI_0 = 0,
SPI_1 = 1,
SPI_2 = 2,
} SPIName;
#ifdef __cplusplus
}
#endif
#endif

221
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TARGET_EV_COG_AD4050LZ/PinNames.h Executable file
View File

@ -0,0 +1,221 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
/*
The ADuCM4050 is made in two package variants.
64 lead LFCSP & 72 ball WLCSP
There are some differences for Port 2 between the two variants
WLCSP also has Port 3.
The #define ADUCM4050_LFCSP is used to determine which variant the code
is built for.
For LFCSP leave the #define in, to build for ADUCM4050_WLCSP remove.
*/
#define ADUCM4050_LFCSP
#include "cmsis.h"
#include "adi_gpio.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
//update
#define GPIO_PORT_SHIFT 12
typedef enum {
P0_00 = (0 << GPIO_PORT_SHIFT | 0 ),
P0_01 = (0 << GPIO_PORT_SHIFT | 1 ),
P0_02 = (0 << GPIO_PORT_SHIFT | 2 ),
P0_03 = (0 << GPIO_PORT_SHIFT | 3 ),
P0_04 = (0 << GPIO_PORT_SHIFT | 4 ),
P0_05 = (0 << GPIO_PORT_SHIFT | 5 ),
P0_06 = (0 << GPIO_PORT_SHIFT | 6 ),
P0_07 = (0 << GPIO_PORT_SHIFT | 7 ),
P0_08 = (0 << GPIO_PORT_SHIFT | 8 ),
P0_09 = (0 << GPIO_PORT_SHIFT | 9 ),
P0_10 = (0 << GPIO_PORT_SHIFT | 10),
P0_11 = (0 << GPIO_PORT_SHIFT | 11),
P0_12 = (0 << GPIO_PORT_SHIFT | 12),
P0_13 = (0 << GPIO_PORT_SHIFT | 13),
P0_14 = (0 << GPIO_PORT_SHIFT | 14),
P0_15 = (0 << GPIO_PORT_SHIFT | 15),
P1_00 = (1 << GPIO_PORT_SHIFT | 0 ),
P1_01 = (1 << GPIO_PORT_SHIFT | 1 ),
P1_02 = (1 << GPIO_PORT_SHIFT | 2 ),
P1_03 = (1 << GPIO_PORT_SHIFT | 3 ),
P1_04 = (1 << GPIO_PORT_SHIFT | 4 ),
P1_05 = (1 << GPIO_PORT_SHIFT | 5 ),
P1_06 = (1 << GPIO_PORT_SHIFT | 6 ),
P1_07 = (1 << GPIO_PORT_SHIFT | 7 ),
P1_08 = (1 << GPIO_PORT_SHIFT | 8 ),
P1_09 = (1 << GPIO_PORT_SHIFT | 9 ),
P1_10 = (1 << GPIO_PORT_SHIFT | 10),
P1_11 = (1 << GPIO_PORT_SHIFT | 11),
P1_12 = (1 << GPIO_PORT_SHIFT | 12),
P1_13 = (1 << GPIO_PORT_SHIFT | 13),
P1_14 = (1 << GPIO_PORT_SHIFT | 14),
P1_15 = (1 << GPIO_PORT_SHIFT | 15),
P2_00 = (2 << GPIO_PORT_SHIFT | 0 ),
P2_01 = (2 << GPIO_PORT_SHIFT | 1 ),
P2_02 = (2 << GPIO_PORT_SHIFT | 2 ),
P2_03 = (2 << GPIO_PORT_SHIFT | 3 ),
P2_04 = (2 << GPIO_PORT_SHIFT | 4 ),
P2_05 = (2 << GPIO_PORT_SHIFT | 5 ),
P2_06 = (2 << GPIO_PORT_SHIFT | 6 ),
P2_07 = (2 << GPIO_PORT_SHIFT | 7 ),
P2_08 = (2 << GPIO_PORT_SHIFT | 8 ),
P2_09 = (2 << GPIO_PORT_SHIFT | 9 ),
P2_10 = (2 << GPIO_PORT_SHIFT | 10),
P2_11 = (2 << GPIO_PORT_SHIFT | 11),
// USB Pins
USBTX = P0_10,
USBRX = P0_11,
USBTX1 = P1_15,
USBRX1 = P2_00,
// mbed original LED naming
LED1 = P2_02,
LED2 = P2_10,
LED3 = LED2,
LED4 = LED1,
//Push buttons
PB0 = P1_00, // BTN1
PB1 = P0_09, // BTN2
BOOT = P1_01,
WAKE0 = P0_15, // JP15 to select
WAKE1 = P1_00, // JP8 (BTN1 jumper) to select
WAKE2 = P0_13, // JP4 to select
WAKE3 = P2_01, // JP15 to select
// SPI Pins
SPI0_SCLK = P0_00,
SPI0_MOSI = P0_01,
SPI0_MISO = P0_02,
SPI0_CS0 = P0_03,
SPI0_CS1 = P1_10,
SPI0_CS2 = P2_08,
SPI0_CS3 = P2_09,
SPI1_SCLK = P1_06,
SPI1_MOSI = P1_07,
SPI1_MISO = P1_08,
SPI1_CS0 = P1_09,
SPI1_CS1 = P2_11,
SPI1_CS2 = P2_02,
SPI1_CS3 = P1_10,
SPI2_SCLK = P1_02,
SPI2_MOSI = P1_03,
SPI2_MISO = P1_04,
SPI2_CS0 = P1_05,
SPI2_CS1 = P0_09,
SPI2_CS2 = P2_10,
SPI2_CS3 = P2_07,
// ADC Pins
ADC_VIN0 = P2_03,
ADC_VIN1 = P2_04,
ADC_VIN2 = P2_05,
ADC_VIN3 = P2_06,
ADC_VIN4 = P2_07,
ADC_VIN5 = P2_08,
ADC_VIN6 = P2_09,
ADC_VIN7 = P2_10,
// Arduino Headers
D0 = P0_10, // UART0_TXD
D1 = P0_11, // UART0_RXD
D2 = P0_15, // INT_WAKE0
D3 = P0_13, // EXT_INT_WAKE2
D4 = P0_09, // EXT_SPI2_CS1
D5 = P2_01, // INT_WAKE3 or EXT_RTC1_SS1 via JP8
D6 = P1_11, // GPIO_27
D7 = P0_12, // GPIO_08 or GPIO_12 via JP7
D8 = P1_12, // GPIO_28
D9 = P1_14, // GPIO_30
D10 = SPI0_CS2, // P2_08
D11 = SPI0_MOSI, // P0_01
D12 = SPI0_MISO, // P0_02
D13 = SPI0_SCLK, // P0_00
I2C_SCL = P0_04, // I2C_SCL
I2C_SDA = P0_05, // I2C_SDA
A0 = P2_03, // ADC0
A1 = P2_04, // EXT_ADC1
A2 = P2_05, // EXT_ADC2
A3 = P2_06, // ADC3
A4 = P2_07, // SPI2_CS3
A5 = P2_10, // EXT_GPIO42
// Not connected
NC = (int)0xFFFFFFFF
} PinName;
typedef enum {
PullNone = 0,
PullDown = 1,
PullUp = 2,
PullDefault = PullNone
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

286
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TARGET_EV_COG_AD4050LZ/device/startup_ADuCM4050.c Executable file
View File

@ -0,0 +1,286 @@
/*!
*****************************************************************************
* @file: startup_ADuCM4050.c
* @brief: Interrupt table and default handlers for ADuCM4x50
* @version: $Revision: $
* @date: $Date: $
*-----------------------------------------------------------------------------
*
Copyright (c) 2010-2017 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
#ifdef __CC_ARM
#include <stdint.h>
#include <rt_misc.h>
#endif
#include <cmsis.h>
#include <startup_ADuCM4050.h>
#include <mbed_rtx.h>
/*----------------------------------------------------------------------------
Checksum options
*----------------------------------------------------------------------------*/
#if defined (__CC_ARM)
__attribute__ ((at(0x000001A0u)))
#elif defined(__ICCARM__)
__root
#endif
const uint32_t SECTION_PLACE(blank_checksum[],".checksum") =
{
BLANKX60,BLANKX600
};
/*----------------------------------------------------------------------------
A relocated IVT is requested. Provision for IVT relocation
to RAM during startup. This allows for dynamic interrupt
vector patching required by RTOS. Places the relocated IVT
at the start of RAM. We need (72 + 15 + 1)*4 = 352 bytes,
which address 0x20000000.
*----------------------------------------------------------------------------*/
#ifdef __ICCARM__
void (*__Relocated___Vectors[NVIC_NUM_VECTORS])(void) @(NVIC_RAM_VECTOR_ADDRESS);
#else
void (*__Relocated___Vectors[NVIC_NUM_VECTORS])(void) __attribute__((at(NVIC_RAM_VECTOR_ADDRESS)));
#endif /* __ICCARM__ */
/*----------------------------------------------------------------------------
External function Declaration
*----------------------------------------------------------------------------*/
extern void SramInit(void);
/*----------------------------------------------------------------------------
Exception / Interrupt Handler
*----------------------------------------------------------------------------*/
WEAK_FUNCTION( NMI_Handler )
WEAK_FUNCTION( HardFault_Handler )
WEAK_FUNCTION( MemManage_Handler )
WEAK_FUNCTION( BusFault_Handler )
WEAK_FUNCTION( UsageFault_Handler )
WEAK_FUNCTION( SVC_Handler )
WEAK_FUNCTION( DebugMon_Handler )
WEAK_FUNCTION( PendSV_Handler )
WEAK_FUNCTION( SysTick_Handler )
WEAK_FUNCTION( RTC1_Int_Handler )
WEAK_FUNCTION( Ext_Int0_Handler )
WEAK_FUNCTION( Ext_Int1_Handler )
WEAK_FUNCTION( Ext_Int2_Handler )
WEAK_FUNCTION( Ext_Int3_Handler )
WEAK_FUNCTION( WDog_Tmr_Int_Handler )
WEAK_FUNCTION( Vreg_over_Int_Handler )
WEAK_FUNCTION( Battery_Voltage_Int_Handler)
WEAK_FUNCTION( RTC0_Int_Handler )
WEAK_FUNCTION( GPIO_A_Int_Handler )
WEAK_FUNCTION( GPIO_B_Int_Handler )
WEAK_FUNCTION( GP_Tmr0_Int_Handler )
WEAK_FUNCTION( GP_Tmr1_Int_Handler )
WEAK_FUNCTION( Flash0_Int_Handler )
WEAK_FUNCTION( UART0_Int_Handler )
WEAK_FUNCTION( SPI0_Int_Handler )
WEAK_FUNCTION( SPI2_Int_Handler )
WEAK_FUNCTION( I2C0_Slave_Int_Handler )
WEAK_FUNCTION( I2C0_Master_Int_Handler )
WEAK_FUNCTION( DMA_Err_Int_Handler )
WEAK_FUNCTION( DMA_SPIH_TX_Int_Handler )
WEAK_FUNCTION( DMA_SPIH_RX_Int_Handler )
WEAK_FUNCTION( DMA_SPORT0A_Int_Handler )
WEAK_FUNCTION( DMA_SPORT0B_Int_Handler )
WEAK_FUNCTION( DMA_SPI0_TX_Int_Handler )
WEAK_FUNCTION( DMA_SPI0_RX_Int_Handler )
WEAK_FUNCTION( DMA_SPI1_TX_Int_Handler )
WEAK_FUNCTION( DMA_SPI1_RX_Int_Handler )
WEAK_FUNCTION( DMA_UART0_TX_Int_Handler )
WEAK_FUNCTION( DMA_UART0_RX_Int_Handler )
WEAK_FUNCTION( DMA_I2C0_STX_Int_Handler )
WEAK_FUNCTION( DMA_I2C0_SRX_Int_Handler )
WEAK_FUNCTION( DMA_I2C0_MX_Int_Handler )
WEAK_FUNCTION( DMA_AES0_IN_Int_Handler )
WEAK_FUNCTION( DMA_AES0_OUT_Int_Handler )
WEAK_FUNCTION( DMA_FLASH0_Int_Handler )
WEAK_FUNCTION( SPORT0A_Int_Handler )
WEAK_FUNCTION( SPORT0B_Int_Handler )
WEAK_FUNCTION( Crypto_Int_Handler )
WEAK_FUNCTION( DMA_ADC0_Int_Handler )
WEAK_FUNCTION( GP_Tmr2_Int_Handler )
WEAK_FUNCTION( Crystal_osc_Int_Handler )
WEAK_FUNCTION( SPI1_Int_Handler )
WEAK_FUNCTION( PLL_Int_Handler )
WEAK_FUNCTION( RNG_Int_Handler )
WEAK_FUNCTION( Beep_Int_Handler )
WEAK_FUNCTION( ADC0_Int_Handler )
WEAK_FUNCTION( DMA_SIP0_Int_Handler )
WEAK_FUNCTION( DMA_SIP1_Int_Handler )
WEAK_FUNCTION( DMA_SIP2_Int_Handler )
WEAK_FUNCTION( DMA_SIP3_Int_Handler )
WEAK_FUNCTION( DMA_SIP4_Int_Handler )
WEAK_FUNCTION( DMA_SIP5_Int_Handler )
WEAK_FUNCTION( DMA_SIP6_Int_Handler )
WEAK_FUNCTION( DMA_SIP7_Int_Handler )
WEAK_FUNCTION( UART1_Int_Handler )
WEAK_FUNCTION( DMA_UART1_TX_Int_Handler )
WEAK_FUNCTION( DMA_UART1_RX_Int_Handler )
WEAK_FUNCTION( RGB_Tmr_Int_Handler )
WEAK_FUNCTION( Root_Clk_Err_Handler )
/*----------------------------------------------------------------------------
Exception / Interrupt Vector table
*----------------------------------------------------------------------------*/
const pFunc SECTION_PLACE(IVT_NAME[104],VECTOR_SECTION) = {
(pFunc) INITIAL_SP, /* Initial Stack Pointer */
ADUCM4050_VECTORS
};
/*----------------------------------------------------------------------------
* Initialize .bss and .data for GNU
*----------------------------------------------------------------------------*/
#if defined( __GNUC__) && !defined (__CC_ARM)
void zero_bss(void)
{
uint32_t *pSrc, *pDest;
uint32_t *pTable __attribute__((unused));
#ifdef __STARTUP_COPY_MULTIPLE
/* Multiple sections scheme.
*
* Between symbol address __copy_table_start__ and __copy_table_end__,
* there are array of triplets, each of which specify:
* offset 0: LMA of start of a section to copy from
* offset 4: VMA of start of a section to copy to
* offset 8: size of the section to copy. Must be multiply of 4
*
* All addresses must be aligned to 4 bytes boundary.
*/
pTable = &__copy_table_start__;
for (; pTable < &__copy_table_end__; pTable = pTable + 3) {
pSrc = (uint32_t*)*(pTable + 0);
pDest = (uint32_t*)*(pTable + 1);
for (; pDest < (uint32_t*)(*(pTable + 1) + *(pTable + 2)) ; ) {
*pDest++ = *pSrc++;
}
}
#else
/* Single section scheme.
*
* The ranges of copy from/to are specified by following symbols
* __etext: LMA of start of the section to copy from. Usually end of text
* __data_start__: VMA of start of the section to copy to
* __data_end__: VMA of end of the section to copy to
*
* All addresses must be aligned to 4 bytes boundary.
*/
pSrc = &__etext;
pDest = &__data_start__;
for ( ; pDest < &__data_end__ ; ) {
*pDest++ = *pSrc++;
}
#endif /*__STARTUP_COPY_MULTIPLE */
/* This part of work usually is done in C library startup code. Otherwise,
* define this macro to enable it in this startup.
*
* There are two schemes too. One can clear multiple BSS sections. Another
* can only clear one section. The former is more size expensive than the
* latter.
*
* Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
* Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
*/
#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
/* Multiple sections scheme.
*
* Between symbol address __copy_table_start__ and __copy_table_end__,
* there are array of tuples specifying:
* offset 0: Start of a BSS section
* offset 4: Size of this BSS section. Must be multiply of 4
*/
pTable = &__zero_table_start__;
for (; pTable < &__zero_table_end__; pTable = pTable + 2) {
pDest = (uint32_t*)*(pTable + 0);
for (; pDest < (uint32_t*)(*(pTable + 0) + *(pTable + 1)) ; ) {
*pDest++ = 0;
}
}
#elif defined (__STARTUP_CLEAR_BSS)
/* Single BSS section scheme.
*
* The BSS section is specified by following symbols
* __bss_start__: start of the BSS section.
* __bss_end__: end of the BSS section.
*
* Both addresses must be aligned to 4 bytes boundary.
*/
pDest = &__bss_start__;
for ( ; pDest < &__bss_end__ ; ) {
*pDest++ = 0ul;
}
#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
}
#endif
/*----------------------------------------------------------------------------
* Function : Reset_Handler (-15)
* Description : Reset event handler
*----------------------------------------------------------------------------*/
void Reset_Handler(void)
{
/* Initialize SRAM configuration. */
SramInit();
#if defined(__GNUC__) && !defined (__CC_ARM)
zero_bss();
#endif
/* Setup system. */
SystemInit();
/* Call remaining startup code and then main. */
RESET_EXCPT_HNDLR();
}
/*----------------------------------------------------------------------------
Default Handler for Exceptions / Interrupts
*----------------------------------------------------------------------------*/
#if defined(__CC_ARM) || defined (__GNUC__)
void Default_Handler(void)
{
while(1);
}
#endif

236
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TARGET_EV_COG_AD4050LZ/device/startup_ADuCM4050.h Executable file
View File

@ -0,0 +1,236 @@
/*!
*****************************************************************************
* @file: startup_ADuCM4050.h
* @brief: CMSIS Cortex-M4 Core Peripheral Access Layer Header File for
* ADI ADuCxxx Device Series
* @version: $Revision: $
* @date: $Date: $
*-----------------------------------------------------------------------------
*
Copyright (c) 2010-2017 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
/*
WEAK_FUNC(func)
If this is available for a compiler, apply whatever attributes are needed
to a function definition ("func") to flag that the function is a "weak" one.
VECTOR_SECTION
A particular setup may have a requirement that the vector table be placed
in a particular section. This specifies the name of that section
RESET_EXCPT_HNDLR
A particular setup may have a requirement for a different reset handler.
This specifies the name of that handler.
*/
#ifndef __STARTUP_H__
#define __STARTUP_H__
#include <adi_types.h>
#define VECTOR_SECTION ".vectors"
#ifdef __CC_ARM
extern unsigned Image$$ADUCM_HEAP$$Base[];
extern unsigned Image$$ADUCM_HEAP$$ZI$$Limit[];
void Default_Handler(void);
#define SECTION_NAME(sectionname) __attribute__ ((section(sectionname)))
#define SECTION_PLACE(def,sectionname) def __attribute__ ((section(sectionname)))
#define IVT_NAME __Vectors
#define RESET_EXCPT_HNDLR __main
#define COMPILER_NAME "ARMCC"
#define WEAK_FUNCTION(x) void x (void) __attribute__ ((weak, alias("Default_Handler")));
#elif defined(__ICCARM__)
/*
* IAR MISRA C 2004 error suppressions:
*
* Pm093 (rule 18.4): use of union - overlapping storage shall not be used.
* Required for interrupt vector table entries.
*
* Pm140 (rule 11.3): a cast should not be performed between a pointer type and an integral type
* The rule makes an exception for memory-mapped register accesses.
*/
#pragma diag_suppress=Pm093,Pm140
#define SECTION_PLACE(def,sectionname) def @ sectionname
#define SECTION_NAME(sectionname) def @ sectionname
#define IVT_NAME __vector_table
#define WEAK_FUNC(func) __weak func
#define RESET_EXCPT_HNDLR __iar_program_start
#define COMPILER_NAME "ICCARM"
#define WEAK_FUNCTION(x) WEAK_FUNC ( void x (void)) { while(1){} }
#elif defined(__GNUC__)
extern unsigned __etext;
extern unsigned __data_start__;
extern unsigned __data_end__;
extern unsigned __copy_table_start__;
extern unsigned __copy_table_end__;
extern unsigned __zero_table_start__;
extern unsigned __zero_table_end__;
extern unsigned __bss_start__;
extern unsigned __bss_end__;
extern unsigned __StackTop;
void Default_Handler(void);
/*----------------------------------------------------------------------------
External References
*----------------------------------------------------------------------------*/
#ifndef __START
extern void _start(void) __attribute__((noreturn)); /* PreeMain (C library entry point) */
#define RESET_EXCPT_HNDLR _start
#else
extern int __START(void) __attribute__((noreturn)); /* main entry point */
#define RESET_EXCPT_HNDLR __START
#endif
#ifndef __STACK_SIZE
#define __STACK_SIZE 0x00000400
#endif
#if !defined(__HEAP_SIZE) || (__HEAP_SIZE <= 0)
#define __HEAP_SIZE 0x00000C00
#endif
#define SECTION_NAME(sectionname) __attribute__ ((section(sectionname)))
#define SECTION_PLACE(def,sectionname) def __attribute__ ((section(sectionname)))
#define IVT_NAME __Vectors
#define COMPILER_NAME "GNUC"
#define WEAK_FUNCTION(x) void x (void) __attribute__ ((weak, alias("Default_Handler")));
#define __STARTUP_CLEAR_BSS_MULTIPLE
#endif // __GNUC__
#define LASTCRCPAGE 0
#define BLANKX4 0xFFFFFFFF
#define BLANKX20 BLANKX4,BLANKX4,BLANKX4,BLANKX4,BLANKX4,BLANKX4,BLANKX4,BLANKX4
#define BLANKX100 BLANKX20,BLANKX20,BLANKX20,BLANKX20,BLANKX20,BLANKX20,BLANKX20,BLANKX20
#define BLANKX600 BLANKX100,BLANKX100,BLANKX100,BLANKX100,BLANKX100,BLANKX100
#define BLANKX60 BLANKX20,BLANKX20,BLANKX20
void RESET_EXCPT_HNDLR(void);
void Reset_Handler(void);
/* IVT typedefs. */
typedef void( *pFunc )( void );
#define ADUCM4050_VECTORS \
/* Configure Initial Stack Pointer, using linker-generated symbols */\
Reset_Handler, /* -15 */ \
NMI_Handler, /* -14 */ \
HardFault_Handler, /* -13 */ \
MemManage_Handler, /* -12 */ \
BusFault_Handler, /* -11 */ \
UsageFault_Handler, /* -10 */ \
0, /* -9 */ \
0, /* -8 */ \
0, /* -7 */ \
0, /* -6 */ \
SVC_Handler, /* -5 */ \
DebugMon_Handler, /* -4 */ \
0, /* -3 */ \
PendSV_Handler, /* -2 */ \
SysTick_Handler, /* -1 */ \
/* External interrupts */ \
RTC1_Int_Handler, /* 0 */ \
Ext_Int0_Handler, /* 1 */ \
Ext_Int1_Handler, /* 2 */ \
Ext_Int2_Handler, /* 3 */ \
Ext_Int3_Handler, /* 4 */ \
WDog_Tmr_Int_Handler, /* 5 */ \
Vreg_over_Int_Handler, /* 6 */ \
Battery_Voltage_Int_Handler, /* 7 */ \
RTC0_Int_Handler, /* 8 */ \
GPIO_A_Int_Handler, /* 9 */ \
GPIO_B_Int_Handler, /* 10 */ \
GP_Tmr0_Int_Handler, /* 11 */ \
GP_Tmr1_Int_Handler, /* 12 */ \
Flash0_Int_Handler, /* 13 */ \
UART0_Int_Handler, /* 14 */ \
SPI0_Int_Handler, /* 15 */ \
SPI2_Int_Handler, /* 16 */ \
I2C0_Slave_Int_Handler, /* 17 */ \
I2C0_Master_Int_Handler, /* 18 */ \
DMA_Err_Int_Handler, /* 19 */ \
DMA_SPIH_TX_Int_Handler, /* 20 */ \
DMA_SPIH_RX_Int_Handler, /* 21 */ \
DMA_SPORT0A_Int_Handler, /* 22 */ \
DMA_SPORT0B_Int_Handler, /* 23 */ \
DMA_SPI0_TX_Int_Handler, /* 24 */ \
DMA_SPI0_RX_Int_Handler, /* 25 */ \
DMA_SPI1_TX_Int_Handler, /* 26 */ \
DMA_SPI1_RX_Int_Handler, /* 27 */ \
DMA_UART0_TX_Int_Handler, /* 28 */ \
DMA_UART0_RX_Int_Handler, /* 29 */ \
DMA_I2C0_STX_Int_Handler, /* 30 */ \
DMA_I2C0_SRX_Int_Handler, /* 31 */ \
DMA_I2C0_MX_Int_Handler, /* 32 */ \
DMA_AES0_IN_Int_Handler, /* 33 */ \
DMA_AES0_OUT_Int_Handler, /* 34 */ \
DMA_FLASH0_Int_Handler, /* 35 */ \
SPORT0A_Int_Handler, /* 36 */ \
SPORT0B_Int_Handler, /* 37 */ \
Crypto_Int_Handler, /* 38 */ \
DMA_ADC0_Int_Handler, /* 39 */ \
GP_Tmr2_Int_Handler, /* 40 */ \
Crystal_osc_Int_Handler, /* 41 */ \
SPI1_Int_Handler, /* 42 */ \
PLL_Int_Handler, /* 43 */ \
RNG_Int_Handler, /* 44 */ \
Beep_Int_Handler, /* 45 */ \
ADC0_Int_Handler, /* 46 */ \
0, /* 47 */ \
0, /* 48 */ \
0, /* 49 */ \
0, /* 50 */ \
0, /* 51 */ \
0, /* 52 */ \
0, /* 53 */ \
0, /* 54 */ \
0, /* 55 */ \
DMA_SIP0_Int_Handler, /* 56 */ \
DMA_SIP1_Int_Handler, /* 57 */ \
DMA_SIP2_Int_Handler, /* 58 */ \
DMA_SIP3_Int_Handler, /* 59 */ \
DMA_SIP4_Int_Handler, /* 60 */ \
DMA_SIP5_Int_Handler, /* 61 */ \
DMA_SIP6_Int_Handler, /* 62 */ \
DMA_SIP7_Int_Handler, /* 63 */ \
0, /* 64 */ \
0, /* 65 */ \
UART1_Int_Handler, /* 66 */ \
DMA_UART1_TX_Int_Handler, /* 67 */ \
DMA_UART1_RX_Int_Handler, /* 68 */ \
RGB_Tmr_Int_Handler, /* 69 */ \
0, /* 70 */ \
Root_Clk_Err_Handler, /* 71 */ \
0,0,0,0,0,0,0,0, /* 72 - 79 */ \
(pFunc)BLANKX4, (pFunc)BLANKX4, /* security_options */ \
(pFunc)BLANKX4, (pFunc)BLANKX4, \
(pFunc)0xA79C3203u, (pFunc)LASTCRCPAGE, \
(pFunc)BLANKX4, (pFunc)BLANKX4 /* 80 - 87 */
#endif /* __STARTUP_H__ */

322
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TARGET_EV_COG_AD4050LZ/device/system_ADuCM4050.c Executable file
View File

@ -0,0 +1,322 @@
/**************************************************************************//**
* @file system_ADuCM4050.c
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer Source File for
* Device ADuCM4x50
* @version V3.10
* @date 23. November 2012
*
******************************************************************************/
/* Copyright (c) 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
Portions Copyright (c) 2016 - 2017 Analog Devices, Inc.
---------------------------------------------------------------------------*/
#include <cmsis.h>
#include <adi_pwr.h>
#include <startup_ADuCM4050.h>
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#ifdef ADI_DEBUG
/* only needed in debug mode */
uint32_t lfClock = 0u; /* "lf_clk" coming out of LF mux */
#endif
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
/* Note that these variables will be re-initialized to the value set here by the
LIBC startup code, so if other clock values are required, make sure set them
here.
*/
uint32_t hfClock = __HFOSC; /* "root_clk" output of HF mux */
uint32_t gpioClock = 0u; /* external GPIO clock */
uint32_t SystemCoreClock = __HFOSC; /*!< System Clock Frequency (Core Clock) */
/*----------------------------------------------------------------------------
Clock functions
*----------------------------------------------------------------------------*/
/*!
* Update the clock.
*
* @param none
* @return none
*
* @brief Updates the variable SystemCoreClock and must be called whenever
* the core clock is changed during program execution.
*/
void SystemCoreClockUpdate(void)
{
uint32_t val, nDivisor, nMulfactor, div2, mul2;
#ifdef ADI_DEBUG
/* "lfclock" is only used during debug checks... */
/* LF clock is always 32k, whether osc or xtal */
lfClock = __LFCLK; /* for beep, wdt and lcd */
if (lfClock == 0u) {
while (1) {}
}
#endif
/* Update Core Clock sources */
/* update the HF clock */
switch (pADI_CLKG0_CLK->CTL0 & BITM_CLKG_CLK_CTL0_CLKMUX ) {
case HFMUX_INTERNAL_OSC_VAL:
hfClock = __HFOSC;
break;
case HFMUX_EXTERNAL_XTAL_VAL:
hfClock = __HFXTAL;
break;
case HFMUX_SYSTEM_SPLL_VAL:
/* Calculate System PLL output frequency */
if ((pADI_CLKG0_CLK->CTL0 & BITM_CLKG_CLK_CTL0_PLL_IPSEL) != 0u) {
/* PLL input from HFXTAL */
val = __HFXTAL;
} else {
/* PLL input from HFOSC */
val = __HFOSC;
}
/* PLL NSEL multiplier */
nMulfactor = (pADI_CLKG0_CLK->CTL3 & BITM_CLKG_CLK_CTL3_SPLLNSEL) >> BITP_CLKG_CLK_CTL3_SPLLNSEL;
/* PLL MSEL divider */
nDivisor = (pADI_CLKG0_CLK->CTL3 & BITM_CLKG_CLK_CTL3_SPLLMSEL) >> BITP_CLKG_CLK_CTL3_SPLLMSEL;
/* PLL NSEL multiplier */
mul2 = (pADI_CLKG0_CLK->CTL3 & BITM_CLKG_CLK_CTL3_SPLLMUL2) >> BITP_CLKG_CLK_CTL3_SPLLMUL2;
/* PLL MSEL divider */
div2 = (pADI_CLKG0_CLK->CTL3 & BITM_CLKG_CLK_CTL3_SPLLDIV2) >> BITP_CLKG_CLK_CTL3_SPLLDIV2;
val = ((val << mul2) * nMulfactor / nDivisor) >> div2;
hfClock = val;
break;
case HFMUX_GPIO_VAL:
hfClock = gpioClock;
break;
default:
return;
} /* end switch */
SystemCoreClock = hfClock;
}
/*!
* Configure the SRAM banks
*
* @return none
*
* @brief Setup the SRAM banks.
* Initialize the SRAM configuration and retention.
*/
void SramInit(void)
{
/* On reset, there is no SRAM retention. Any retention has to be explicitly
* set here. */
adi_system_EnableRetention(ADI_SRAM_BANK_1 |
ADI_SRAM_BANK_3 |
ADI_SRAM_BANK_4 |
ADI_SRAM_BANK_5 |
ADI_SRAM_BANK_6 |
ADI_SRAM_BANK_7, true);
/* To disable the instruction SRAM and entire 64K of SRAM is used as DSRAM */
adi_system_EnableISRAM(false);
/* To disable the instruction cache */
adi_system_EnableCache(false);
}
/*!
* Initialize the system
*
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the relocate vector table.
*/
void SystemInit (void)
{
uint32_t IntStatus;
IntStatus = __get_PRIMASK();
__disable_irq();
/* Set boot ROM IVT. */
SCB->VTOR = (uint32_t)NVIC_FLASH_VECTOR_ADDRESS;
/* Set all three (USGFAULTENA, BUSFAULTENA, and MEMFAULTENA) fault enable bits
* in the System Control Block, System Handler Control and State Register
* otherwise these faults are handled as hard faults.
*/
SCB->SHCSR = SCB_SHCSR_USGFAULTENA_Msk |
SCB_SHCSR_BUSFAULTENA_Msk |
SCB_SHCSR_MEMFAULTENA_Msk ;
#if (__FPU_PRESENT == 1u) && (__FPU_USED == 1u)
/* the FPU is disabled by default so enable FPU (NEON and VFP)
* set the System Control Block, Coprocessor Access Control Register bits:
* CP10 = grant CP10 coprocessor privileges and user mode access (full access)
* CP11 = grant CP11 coprocessor privileged and user mode access (full access)
* (CP10 and CP11 MUST be the same or "BEHAVIOR IS UNPREDICTABLE")
*/
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 for Full Access */
#endif
/* Flush instruction and data pipelines to insure assertion of new settings. */
__ISB();
__DSB();
adi_pwr_Init();
adi_pwr_SetClockDivider(ADI_CLOCK_HCLK,1);
adi_pwr_SetClockDivider(ADI_CLOCK_PCLK,1);
/* Set up the LF clock MUX. Currently LFXTAL is unstable so use the
internal LF Oscillator instead. LFXTAL is still required to be enabled
as it is required by RTC0. This LFXTAL issue is going to be fixed
in the next revision of the silicon. */
adi_pwr_EnableClockSource(ADI_CLOCK_SOURCE_LFXTAL,true);
adi_pwr_SetLFClockMux(ADI_CLOCK_MUX_LFCLK_LFOSC);
adi_pwr_EnableClockSource(ADI_CLOCK_SOURCE_LFOSC,true);
__set_PRIMASK(IntStatus);
}
/*!
* @brief Enables or disables the cache.
* @param bEnable Specify whether to enable/disable cache.
* - true : Enable cache.
* - false: Disable cache.
* @return none
*/
void adi_system_EnableCache(bool bEnable)
{
pADI_FLCC0_CACHE->KEY = CACHE_CONTROLLER_KEY;
if( bEnable == true ) {
pADI_FLCC0_CACHE->SETUP |= BITM_FLCC_CACHE_SETUP_ICEN;
} else {
pADI_FLCC0_CACHE->SETUP &= ~BITM_FLCC_CACHE_SETUP_ICEN;
}
}
/*!
* @brief This enables or disables instruction SRAM
*
* @param bEnable Enable/disable the instruction SRAM.
* - true : Enable instruction SRAM.
* - false : Disable instruction SRAM.
* @return none
* @note The appropriate linker file needs to support the configuration.
*/
void adi_system_EnableISRAM(bool bEnable)
{
if( bEnable == true ) {
pADI_PMG0_TST->SRAM_CTL |= BITM_PMG_TST_SRAM_CTL_INSTREN;
} else {
pADI_PMG0_TST->SRAM_CTL &= ~BITM_PMG_TST_SRAM_CTL_INSTREN;
}
}
/*!
* @brief This enables/disable SRAM retention during the hibernation.
* @param eBank: Specify which SRAM banks. Multiple banks can be set
/ using a logical OR of the banks.
* @param bEnable Enable/disable the retention for specified SRAM bank.
* - true : Enable retention during hibernation.
* - false: Disable retention during hibernation.
* @return ADI_SYS_SUCCESS Configured successfully.
* @return ADI_SYS_FAILURE Invalid bank, or banks, specified. Any incorrect
* or invalid bank options will result in failure and
* no changes will have been applied.
* @note The appropriate linker file needs to support the configuration.
* BANK 0 is always retained.
* BANKS 1 can be retained individually.
* BANK 2 is never retained.
* BANKS 3 and 4 can only be mutually retained.
* BANKS 5 can be retained individually.
* BANKS 6 and 7 can only be mutually retained.
*/
ADI_SYS_RESULT adi_system_EnableRetention(ADI_SRAM_BANK eBank, bool bEnable)
{
uint32_t retainBits = 0u;
#ifdef ADI_DEBUG
if((0u != (eBank & ADI_SRAM_BANK_0)) ||
(0u != (eBank & ADI_SRAM_BANK_2))) {
/* Banks 0 and 2 are not selectable */
return ADI_SYS_FAILURE;
}
/* Are banks 3 or 4 selected? */
if(0u != (eBank & (ADI_SRAM_BANK_3 | ADI_SRAM_BANK_4))) {
/* If so, the only valid option is for both to be retained. */
if((eBank & (ADI_SRAM_BANK_3 | ADI_SRAM_BANK_4)) != (ADI_SRAM_BANK_3 | ADI_SRAM_BANK_4)) {
return ADI_SYS_FAILURE;
}
}
/* Are banks 6 or 7 selected? */
if(0u != (eBank & (ADI_SRAM_BANK_6 | ADI_SRAM_BANK_7))) {
/* If so, the only valid option is for both to be retained */
if((eBank & (ADI_SRAM_BANK_6 | ADI_SRAM_BANK_7)) != (ADI_SRAM_BANK_6 | ADI_SRAM_BANK_7)) {
return ADI_SYS_FAILURE;
}
}
#endif
if((eBank & ADI_SRAM_BANK_1) != 0u) {
retainBits |= BITM_PMG_SRAMRET_RET1;
}
if((eBank & (ADI_SRAM_BANK_3 | ADI_SRAM_BANK_4)) != 0u) {
retainBits |= BITM_PMG_SRAMRET_RET2;
}
if((eBank & ADI_SRAM_BANK_5) != 0u) {
retainBits |= BITM_PMG_SRAMRET_RET3;
}
if((eBank & (ADI_SRAM_BANK_6 | ADI_SRAM_BANK_7)) != 0u) {
retainBits |= BITM_PMG_SRAMRET_RET4;
}
/* Unlock the SRAMRET register using the PWRKEY.
* If there is any chance that this sequence can be interrupted then it
* should be protected by disabling interrupts. A write to any other
* register on the APB bus before writing to PMG_SRAMRET will return the
* protection to the lock state. */
pADI_PMG0->PWRKEY = PWRKEY_VALUE_KEY;
if(bEnable) {
pADI_PMG0->SRAMRET |= retainBits;
} else {
pADI_PMG0->SRAMRET &= ~(retainBits);
}
return ADI_SYS_SUCCESS;
}

52
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct Executable file
View File

@ -0,0 +1,52 @@
;******************************************************************************
; File: ADuCM4050.sct
; Scatter loading file for Analog Devices ADuCM4050 processor
;
; Copyright (c) 2011 - 2014 ARM LIMITED
; Copyright (c) 2016 - 2017 Analog Devices, Inc.
;
; All rights reserved.
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; - Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; - Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; - Neither the name of ARM nor the names of its contributors may be used
; to endorse or promote products derived from this software without
; specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;******************************************************************************
LR_IROM1 0x00000000 0x0007F000 {
FLASH0 0x00000000 0x00000800 {
*(.vectors, +First)
*(.checksum)
}
ER_IROM1 AlignExpr(ImageLimit(FLASH0), 16) 0x0007E800 {
; load address = execution address
*(InRoot$$Sections)
*(+RO)
}
RW_IRAM1 0x20040000 EMPTY 0 { }
ADUCM_IRAM2 0x20000200 0x7E00 { *(+RW) }
ADUCM_IRAM3 0x20048000 0x10000 { *(+ZI) }
ADUCM_HEAP AlignExpr(ImageLimit(RW_IRAM1), 16) EMPTY
(ImageBase(ADUCM_IRAM3) - 0x2000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ; heap
}

214
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld Executable file
View File

@ -0,0 +1,214 @@
/*
* Portions Copyright (c) 2016 Analog Devices, Inc.
*
* Based on Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld file in
* ARM.CMSIS.4.5.0.pack.
*/
/* Linker script to configure memory regions. */
MEMORY
{
/* The first 0x800 bytes of flash */
FLASH0 (rx) : ORIGIN = 0x00000000, LENGTH = 0x800
/* The remaining bytes of flash minus 4KB Protected Key Storage */
FLASH (rx) : ORIGIN = 0x00000800, LENGTH = 512k - 4k - 0x800
/* SRAM bank 0 */
DSRAM_A (rwx) : ORIGIN = 0x20000200, LENGTH = 32k - 0x200
/* SRAM bank 3+4+5+6+7 */
DSRAM_B (rwx) : ORIGIN = 0x20048000, LENGTH = 64k
/* stack must not be in bank 1,2,7 where ISRAM or CACHE
are set at power on */
}
/* Library configurations */
GROUP(libgcc.a libc.a libm.a libnosys.a)
/* Custom stack and heap sizes */
__stack_size__ = 0x2000;
__heap_size__ = 0x6000;
/* select custom or default sizes for stack and heap */
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0C00;
/* Linker script to place sections and symbol values.
* It references the following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines the following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __copy_table_start__
* __copy_table_end__
* __zero_table_start__
* __zero_table_end__
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
* __Vectors_End
* __Vectors_Size
*/
ENTRY(Reset_Handler)
SECTIONS
{
.vectors :
{
KEEP(*(.vectors))
__Vectors_End = .;
__Vectors_Size = __Vectors_End - __Vectors;
__end__ = .;
KEEP(*(.checksum))
} > FLASH0
.security_options :
{
. = ALIGN(4);
KEEP(*(.security_options))
. = ALIGN(4);
} > FLASH0
.text :
{
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
/* To copy multiple ROM to RAM sections,
* uncomment .copy.table section and,
* define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
/*
.copy.table :
{
. = ALIGN(4);
__copy_table_start__ = .;
LONG (__etext)
LONG (__data_start__)
LONG (__data_end__ - __data_start__)
LONG (__etext2)
LONG (__data2_start__)
LONG (__data2_end__ - __data2_start__)
__copy_table_end__ = .;
} > FLASH
*/
/* To clear multiple BSS sections,
* uncomment .zero.table section and,
* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
.zero.table :
{
. = ALIGN(4);
__zero_table_start__ = .;
LONG (__bss_start__)
LONG (__bss_end__ - __bss_start__)
LONG (__bss2_start__)
LONG (__bss2_end__ - __bss2_start__)
__zero_table_end__ = .;
} > FLASH
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
KEEP(*(.jcr*))
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > DSRAM_A
.bss :
{
. = ALIGN(16);
__bss2_start__ = .;
*(COMMON)
. = ALIGN(16);
__bss2_end__ = .;
__bss_start__ = .;
*(.bss*)
. = ALIGN(16);
__bss_end__ = .;
} > DSRAM_B
__StackTop = ORIGIN(DSRAM_B);
__StackLimit = __StackTop - STACK_SIZE;
__HeapLimit = __StackLimit;
__HeapBase = __HeapLimit - HEAP_SIZE;
__end__ = __HeapBase;
PROVIDE(end = __end__);
PROVIDE(__stack = __StackTop);
}

48
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf Executable file
View File

@ -0,0 +1,48 @@
/******************************************************************************
* File: ADuCM4050.icf
* ILINK Configuration File for Analog Devices ADuCM4050 processor
*
* Copyright (c) 2011 - 2014 ARM LIMITED
* Copyright (c) 2016 - 2017 Analog Devices, Inc.
*
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
define memory mem with size = 4G;
define region ROM_PAGE0_INTVEC = mem:[from 0x00000000 size 0x000001A0];
define region ROM_PAGE0_CHECKSUM = mem:[from 0x000001A0 size 0x00000660];
define region ROM_REGION = mem:[from 0x00000800 size 506K];
define region RAM_bank1_region = mem:[from 0x20040000 size 0x00008000];
define region RAM_bank2_region = mem:[from 0x20000200 size 0x00007E00]
| mem:[from 0x20048000 size 0x00010000];
define block CSTACK with alignment = 16, size = 0x2000 { };
define block HEAP with alignment = 16, size = 0x6000 { };
do not initialize { section .noinit };
initialize by copy { rw };
place at start of ROM_PAGE0_INTVEC { ro section .vectors };
place in ROM_PAGE0_CHECKSUM { ro section .checksum };
place in ROM_REGION { ro };
place at end of RAM_bank1_region { block CSTACK };
place at start of RAM_bank1_region { block HEAP };
place in RAM_bank2_region { rw };

138
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/PeripheralPins.c Executable file
View File

@ -0,0 +1,138 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
/*
The ADuCM4050 is made in two package variants.
64 lead LFCSP & 72 ball WLCSP
There are some differences for Port 2 between the two variants
WLCSP also has Port 3.
The #define ADUCM4050_LFCSP is used to determine which variant the code
is built for.
For LFCSP leave the #define in, to build for ADUCM4050_WLCSP remove.
*/
#define ADUCM4050_LFCSP
#include "PeripheralPins.h"
/************UART***************/
const PinMap PinMap_UART_TX[] = {
{P0_10, UART_0, 1},
{P1_15, UART_1, 2},
{NC, NC, 0}
};
const PinMap PinMap_UART_RX[] = {
{P0_11, UART_0, 1},
{P2_00, UART_1, 2},
{NC, NC, 0}
};
/************SPI***************/
const PinMap PinMap_SPI_SCLK[] = {
{P0_00, SPI_0, 1},
{P1_06, SPI_1, 1},
{P1_02, SPI_2, 1},
{NC, NC, 0}
};
const PinMap PinMap_SPI_MOSI[] = {
{P0_01, SPI_0, 1},
{P1_07, SPI_1, 1},
{P1_03, SPI_2, 1},
{NC, NC, 0}
};
const PinMap PinMap_SPI_MISO[] = {
{P0_02, SPI_0, 1},
{P1_08, SPI_1, 1},
{P1_04, SPI_2, 1},
{NC, NC, 0}
};
#if defined(ADUCM4050_LFCSP)
const PinMap PinMap_SPI_SSEL[] = {
{P0_03, SPI_0, 1},
{P1_09, SPI_1, 1},
{P2_10, SPI_2, 1},
{NC, NC, 0}
};
#else
const PinMap PinMap_SPI_SSEL[] = {
{P0_03, SPI_0, 1},
{P1_09, SPI_1, 1},
{P2_15, SPI_2, 1},
{NC, NC, 0}
};
#endif
/************I2C***************/
const PinMap PinMap_I2C_SDA[] = {
{P0_05, I2C_0, 1},
{NC, NC, 0}
};
const PinMap PinMap_I2C_SCL[] = {
{P0_04, I2C_0, 1},
{NC, NC, 0}
};
/************ADC***************/
const PinMap PinMap_ADC[] = {
{P2_03, ADC0_VIN0, 1},
{P2_04, ADC0_VIN1, 1},
{P2_05, ADC0_VIN2, 1},
{P2_06, ADC0_VIN3, 1},
{P2_07, ADC0_VIN4, 1},
{P2_08, ADC0_VIN5, 1},
{P2_09, ADC0_VIN6, 1},
#ifdef ADUCM4050_LFCSP
{P2_10, ADC0_VIN7, 1},
#endif
{NC, NC, 0}
};
/************RTC***************/
const PinMap PinMap_RTC[] = {
{NC, OSC32KCLK, 0},
};

67
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/PeripheralPins.h Executable file
View File

@ -0,0 +1,67 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifndef MBED_PERIPHERALPINS_H
#define MBED_PERIPHERALPINS_H
#include "pinmap.h"
#include "PeripheralNames.h"
/************RTC***************/
extern const PinMap PinMap_RTC[];
/************ADC***************/
extern const PinMap PinMap_ADC[];
/************I2C***************/
extern const PinMap PinMap_I2C_SDA[];
extern const PinMap PinMap_I2C_SCL[];
/************UART***************/
extern const PinMap PinMap_UART_TX[];
extern const PinMap PinMap_UART_RX[];
/************SPI***************/
extern const PinMap PinMap_SPI_SCLK[];
extern const PinMap PinMap_SPI_MOSI[];
extern const PinMap PinMap_SPI_MISO[];
extern const PinMap PinMap_SPI_SSEL[];
#endif

216
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/analogin_api.c Executable file
View File

@ -0,0 +1,216 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include "mbed_assert.h"
#include "analogin_api.h"
#if DEVICE_ANALOGIN
#include "adi_adc_def.h"
#include "pinmap.h"
#include "PeripheralPins.h"
/** Analogin hal structure. analogin_s is declared in the target's hal
*/
typedef struct analogin_s analogin_t;
#ifdef __cplusplus
extern "C" {
#endif
/* ADC Device number */
#define ADC_DEV_NUM (0u)
/* Memory Required for adc driver */
static uint32_t DeviceMemory[(ADI_ADC_MEMORY_SIZE+3)/4];
/* Active channel */
static uint32_t adi_pin2channel(PinName pin);
/**
* \defgroup hal_analogin Analogin hal functions
* @{
*/
/** Initialize the analogin peripheral
*
* Configures the pin used by analogin.
* @param obj The analogin object to initialize
* @param pin The analogin pin name
*/
void analogin_init(analogin_t *obj, PinName pin)
{
ADI_ADC_HANDLE hDevice;
bool bCalibrationDone = false;
bool bReady = false;
ADCName peripheral;
uint32_t function, channel;
peripheral = (ADCName)pinmap_peripheral(pin, &PinMap_ADC[0]); // gives peripheral
MBED_ASSERT(peripheral != (ADCName)NC);
/* verify read function */
function = pinmap_function(pin, &PinMap_ADC[0]);
MBED_ASSERT(function == 1);
/* Configure PORT2_MUX registers */
pin_function(pin, function);
/* Configure active channel */
channel = adi_pin2channel(pin);
MBED_ASSERT(channel != 0xFFFFFFFF);
obj->UserBuffer.nChannels = channel;
/* Open the ADC device */
adi_adc_Open(ADC_DEV_NUM, DeviceMemory, sizeof(DeviceMemory),&hDevice);
obj->hDevice = hDevice;
/* Power up ADC */
adi_adc_PowerUp (hDevice, true);
/* Set ADC reference */
adi_adc_SetVrefSource (hDevice, ADI_ADC_VREF_SRC_INT_2_50_V);
/* Enable ADC sub system */
adi_adc_EnableADCSubSystem (hDevice, true);
/* Wait untilthe ADC is ready for sampling */
while(bReady == false) {
adi_adc_IsReady (hDevice, &bReady);
}
/* Start calibration */
adi_adc_StartCalibration (hDevice);
/* Wait until calibration is done */
while (!bCalibrationDone) {
adi_adc_IsCalibrationDone (hDevice, &bCalibrationDone);
}
/* Set the delay time */
adi_adc_SetDelayTime ( hDevice, obj->DelayCycles);
/* Set the acquisition time. (Application need to change it based on the impedence) */
adi_adc_SetAcquisitionTime ( hDevice, obj->SampleCycles);
}
/** Read the input voltage, represented as a float in the range [0.0, 1.0]
*
* @param obj The analogin object
* @return A floating value representing the current input voltage
*/
float analogin_read(analogin_t *obj)
{
float fl32 = (float)analogin_read_u16(obj)/(float)4095.0;
return(fl32);
}
/** Read the value from analogin pin, represented as an unsigned 16bit value
*
* @param obj The analogin object
* @return An unsigned 16bit value representing the current input voltage
*/
uint16_t analogin_read_u16(analogin_t *obj)
{
ADI_ADC_HANDLE hDevice = obj->hDevice;
ADI_ADC_BUFFER *pAdcBuffer;
/* Submit the buffer to the driver */
adi_adc_SubmitBuffer (hDevice, &obj->UserBuffer);
/* Enable the ADC */
adi_adc_Enable (hDevice, true);
adi_adc_GetBuffer (hDevice, &pAdcBuffer);
MBED_ASSERT(pAdcBuffer == &obj->UserBuffer);
return( (uint16_t) ( ((uint16_t *)pAdcBuffer->pDataBuffer)[(pAdcBuffer->nNumConversionPasses) - 1]) );
}
/* Retrieve te active channel correspondoing to the input pin */
static uint32_t adi_pin2channel(PinName pin)
{
uint32_t activech;
switch(pin) {
case ADC_VIN0:
activech = ADI_ADC_CHANNEL_0;
break;
case ADC_VIN1:
activech = ADI_ADC_CHANNEL_1;
break;
case ADC_VIN2:
activech = ADI_ADC_CHANNEL_2;
break;
case ADC_VIN3:
activech = ADI_ADC_CHANNEL_3;
break;
case ADC_VIN4:
activech = ADI_ADC_CHANNEL_4;
break;
case ADC_VIN5:
activech = ADI_ADC_CHANNEL_5;
break;
case ADC_VIN6:
activech = ADI_ADC_CHANNEL_6;
break;
case ADC_VIN7:
activech = ADI_ADC_CHANNEL_7;
break;
default:
activech = (uint32_t) 0xFFFFFFFF;
break;
}
return((uint32_t) activech);
}
/**@}*/
#ifdef __cplusplus
}
#endif
#endif // #if DEVICE_ANALOGIN

46
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/cmsis.h Executable file
View File

@ -0,0 +1,46 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifndef MBED_CMSIS_H
#define MBED_CMSIS_H
#define __C
#include "adi_processor.h"
#include "cmsis_nvic.h"
#endif

78
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/cmsis_nvic.h Executable file
View File

@ -0,0 +1,78 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#include "cmsis.h"
#define NVIC_USER_IRQ_OFFSET 16
#define NVIC_USER_IRQ_NUMBER 72
#define NVIC_NUM_VECTORS (NVIC_USER_IRQ_OFFSET + NVIC_USER_IRQ_NUMBER)
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
#define NVIC_FLASH_VECTOR_ADDRESS 0x0
#ifdef __cplusplus
extern "C" {
#endif
/** Set the ISR for IRQn
*
* Sets an Interrupt Service Routine vector for IRQn; if the feature is available, the vector table is relocated to SRAM
* the first time this function is called
* @param[in] IRQn The Interrupt Request number for which a vector will be registered
* @param[in] vector The ISR vector to register for IRQn
*/
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
/** Get the ISR registered for IRQn
*
* Reads the Interrupt Service Routine currently registered for IRQn
* @param[in] IRQn The Interrupt Request number the vector of which will be read
* @return Returns the ISR registered for IRQn
*/
uint32_t NVIC_GetVector(IRQn_Type IRQn);
#ifdef __cplusplus
}
#endif
#endif

48
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/device.h Executable file
View File

@ -0,0 +1,48 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#define DEVICE_ID_LENGTH 24
#include "objects.h"
#endif

89
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/flash_api.c Executable file
View File

@ -0,0 +1,89 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifdef DEVICE_FLASH
#include "flash_api.h"
#include "flash_data.h"
#include "mbed_critical.h"
// This file is automagically generated
// This is a flash algo binary blob. It is PIC (position independent code) that should be stored in RAM
static unsigned FLASH_ALGO[] = {
0x20004A4B,0x60111E41,0x6211494A,0x60912107,0x074B6811,0xF011D5FC,0xD0000F30,0x21002001,
0x47706211,0x2400B510,0xD1082A01,0xF872F000,0x6D09493F,0xD00207C8,0xFFE2F7FF,0x46204604,
0x493BBD10,0x62082000,0xB5104770,0xF862F000,0x4010E8BD,0x4601E7D4,0x20004A35,0x60131E43,
0x49346191,0x21066211,0x68116091,0xD5FC074B,0x0F30F011,0x2001D000,0x62112100,0xB57C4770,
0x4B2C4C2B,0x62232500,0xF04FE03E,0x602333FF,0xD3042908,0x61236813,0x61636853,0xF04FE025,
0xE9CD33FF,0x29083300,0xE8DFD21A,0x1619F001,0x0A0D1013,0x79910407,0x1006F88D,0xF88D7951,
0x79111005,0x1004F88D,0xF88D78D1,0x78911003,0x1002F88D,0xF88D7851,0x78111001,0x1000F88D,
0x1300E9DD,0x61636121,0x60E02108,0x60A32304,0xF0136823,0xD0010F30,0xE0072501,0x075B6823,
0x3008D5FC,0x32083908,0xD1BE2900,0x62202000,0xBD7C4628,0x21004806,0x4A066041,0x4A066202,
0x22046342,0x22016382,0x62016542,0x00004770,0x40018000,0x676C7565,0xB8950950,0
};
static const flash_algo_t flash_algo_config = {
.init = 0x00000025,
.uninit = 0x00000043,
.erase_sector = 0x00000057,
.program_page = 0x0000007F,
.static_base = 0x0000013C,
.algo_blob = FLASH_ALGO
};
static const sector_info_t sectors_info[] = {
{0x0, 0x800},
};
static const flash_target_config_t flash_target_config = {
.page_size = 0x800,
.flash_start = 0x0,
.flash_size = 0x0007F000,
.sectors = sectors_info,
.sector_info_count = sizeof(sectors_info) / sizeof(sector_info_t)
};
void flash_set_target_config(flash_t *obj)
{
obj->flash_algo = &flash_algo_config;
obj->target_config = &flash_target_config;
}
#endif

144
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/gpio_api.c Executable file
View File

@ -0,0 +1,144 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include "mbed_assert.h"
#include "gpio_api.h"
#include "pinmap.h"
#include "adi_gpio.h"
#define MUX_FUNC_0 0x0
#define NUM_GPIO_PORTS 4
extern uint8_t gpioMemory[ADI_GPIO_MEMORY_SIZE];
extern uint8_t gpio_initialized;
static uint16_t gpio_oen[NUM_GPIO_PORTS] = {0};
static uint16_t gpio_output_val[NUM_GPIO_PORTS] = {0};
/******************************************************************************
Function definitions
*****************************************************************************/
uint32_t gpio_set(PinName pin)
{
MBED_ASSERT(pin != (PinName)NC);
uint32_t pin_num = pin & 0xFF;
pin_function(pin, MUX_FUNC_0);
return (1 << pin_num);
}
void gpio_init(gpio_t *obj, PinName pin)
{
obj->pin = pin;
if (pin == (PinName)NC)
return;
// Initialize the GPIO driver. This function
// initializes the GPIO driver only once globally.
if (!gpio_initialized)
adi_gpio_Init(gpioMemory, ADI_GPIO_MEMORY_SIZE);
pin_function(pin, MUX_FUNC_0);
}
void gpio_mode(gpio_t *obj, PinMode mode)
{
uint32_t pin = obj->pin;
pin_mode((PinName)pin, mode);
}
void gpio_dir(gpio_t *obj, PinDirection direction)
{
MBED_ASSERT(obj->pin != (PinName)NC);
uint32_t port = obj->pin >> GPIO_PORT_SHIFT;
uint32_t pin_num = obj->pin & 0xFF;
if (direction == PIN_OUTPUT) {
adi_gpio_OutputEnable((ADI_GPIO_PORT)port, 1 << pin_num, true);
// save the input/output configuration
gpio_oen[port] |= (1 << pin_num);
} else {
adi_gpio_InputEnable((ADI_GPIO_PORT)port, 1 << pin_num, true);
// save the input/output configuration
gpio_oen[port] &= (~(1 << pin_num));
}
}
void gpio_write(gpio_t *obj, int value)
{
MBED_ASSERT(obj->pin != (PinName)NC);
uint32_t port = obj->pin >> GPIO_PORT_SHIFT;
uint32_t pin_num = obj->pin & 0xFF;
if (value & 1) {
adi_gpio_SetHigh((ADI_GPIO_PORT)port, (1 << pin_num));
// save the output port value
gpio_output_val[port] |= ((value & 1) << pin_num);
} else {
adi_gpio_SetLow((ADI_GPIO_PORT)port, (1 << pin_num));
// save the output port value
gpio_output_val[port] &= (~(1 << pin_num));
}
}
int gpio_read(gpio_t *obj)
{
MBED_ASSERT(obj->pin != (PinName)NC);
uint32_t port = obj->pin >> GPIO_PORT_SHIFT;
uint32_t pin_num = obj->pin & 0xFF;
uint16_t Data;
// check whether the pin is configured as input or output
if ((gpio_oen[port] >> pin_num) & 1)
Data = gpio_output_val[port] & (1 << pin_num);
else
// otherwise call GetData
adi_gpio_GetData((ADI_GPIO_PORT)port, (1 << pin_num), &Data);
return ((((uint32_t)Data) >> pin_num) & 1);
}

47
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/gpio_dev_mem.c Executable file
View File

@ -0,0 +1,47 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include <drivers/gpio/adi_gpio.h>
// ADI GPIO device driver state memory. Only one state memory is required globally.
uint8_t gpioMemory[ADI_GPIO_MEMORY_SIZE];
// Flag to indicate whether the GPIO driver has been initialized
uint8_t gpio_initialized = 0;

317
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/gpio_irq_api.c Executable file
View File

@ -0,0 +1,317 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include "gpio_irq_api.h"
#include "adi_gpio.h"
#include "adi_gpio_def.h"
#ifdef DEVICE_INTERRUPTIN
#define MAX_GPIO_LINES 16
#define MAX_GPIO_PORTS ADI_GPIO_NUM_PORTS
typedef struct {
unsigned int id;
gpio_irq_event event;
uint8_t int_enable;
} gpio_chan_info_t;
extern uint8_t gpioMemory[ADI_GPIO_MEMORY_SIZE];
extern uint8_t gpio_initialized;
static gpio_chan_info_t channel_ids[MAX_GPIO_PORTS][MAX_GPIO_LINES];
static gpio_irq_handler irq_handler = NULL;
/** Local interrupt callback routine.
*/
static void gpio_irq_callback(void *pCBParam, uint32_t Event, void *pArg)
{
uint16_t pin = *(ADI_GPIO_DATA*)pArg;
int index = 0;
// determine the index of the pin that caused the interrupt
while (pin) {
if (pin & 0x01) {
// call the user ISR. The argument Event is the port number of the GPIO line.
if (irq_handler != NULL)
irq_handler((uint32_t)channel_ids[Event][index].id, channel_ids[Event][index].event);
}
index++;
pin >>= 1;
}
}
/** Function to get the IENA and IENB register values.
* Added here based on code from ADuCM302x
*/
static ADI_GPIO_RESULT adi_gpio_GetGroupInterruptPins(const ADI_GPIO_PORT Port, const IRQn_Type eIrq,
const ADI_GPIO_DATA Pins, uint16_t* const pValue)
{
ADI_GPIO_TypeDef *pReg[ADI_GPIO_NUM_PORTS] = {pADI_GPIO0, pADI_GPIO1, pADI_GPIO2, pADI_GPIO3};
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
uint16_t Value = 0u;
pPort = pReg[Port];
switch (eIrq) {
case SYS_GPIO_INTA_IRQn:
Value = pPort->IENA;
break;
case SYS_GPIO_INTB_IRQn:
Value = pPort->IENB;
break;
default:
break; /* This shall never reach */
}
*pValue = (Value & Pins);
return (ADI_GPIO_SUCCESS);
}
/** Function to get the interrupt polarity register content.
* Added here based on code from ADuCM302x
*/
static ADI_GPIO_RESULT adi_gpio_GetGroupInterruptPolarity(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins,
uint16_t* const pValue)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
ADI_GPIO_TypeDef *pReg[ADI_GPIO_NUM_PORTS] = {pADI_GPIO0, pADI_GPIO1, pADI_GPIO2, pADI_GPIO3};
pPort = pReg[Port];
*pValue = (pPort->POL & Pins);
return (ADI_GPIO_SUCCESS);
}
/** Function to clear the relevant interrupt enable bits in both the IENA and IENB registers
* for the given GPIO pin.
*/
static void disable_pin_interrupt(ADI_GPIO_PORT port, uint32_t pin_number)
{
uint16_t int_reg_val;
// Read the current content of the IENA register
adi_gpio_GetGroupInterruptPins(port, SYS_GPIO_INTA_IRQn, 1 << pin_number, &int_reg_val);
// clear the bit for the pin
int_reg_val &= ~(1 << pin_number);
// write the interrupt register
adi_gpio_SetGroupInterruptPins(port, SYS_GPIO_INTA_IRQn, int_reg_val);
// Do the same to IENB
adi_gpio_GetGroupInterruptPins(port, SYS_GPIO_INTB_IRQn, 1 << pin_number, &int_reg_val);
// clear the bit for the pin
int_reg_val &= ~(1 << pin_number);
// write the interrupt register
adi_gpio_SetGroupInterruptPins(port, SYS_GPIO_INTB_IRQn, int_reg_val);
}
/** Function to set the relevant interrupt enable bits in either the IENA and IENB registers
* for the given GPIO pin.
*/
static void enable_pin_interrupt(ADI_GPIO_PORT port, uint32_t pin_number, IRQn_Type eIrq)
{
uint16_t int_reg_val;
// Read the current interrupt enable register content
adi_gpio_GetGroupInterruptPins(port, eIrq, 1 << pin_number, &int_reg_val);
// set the bit for the pin
int_reg_val |= (1 << pin_number);
// write the interrupt register
adi_gpio_SetGroupInterruptPins(port, eIrq, int_reg_val);
}
/** Initialize the GPIO IRQ pin
*
* @param obj The GPIO object to initialize
* @param pin The GPIO pin name
* @param handler The handler to be attached to GPIO IRQ
* @param id The object ID (id != 0, 0 is reserved)
* @return -1 if pin is NC, 0 otherwise
*/
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
{
uint32_t port = pin >> GPIO_PORT_SHIFT;
uint32_t pin_num = pin & 0xFF;
// check for valid pin and ID
if ((pin == NC) || (id == 0))
return -1;
// make sure gpio driver has been initialized
if (!gpio_initialized) {
adi_gpio_Init(gpioMemory,ADI_GPIO_MEMORY_SIZE);
gpio_initialized = 1;
}
// save the handler
if (handler)
irq_handler = handler;
// disable the interrupt for the given pin
disable_pin_interrupt((ADI_GPIO_PORT)port, pin_num);
// set the port pin as input
adi_gpio_InputEnable(port, 1 << pin_num, true);
// save the ID for future reference
channel_ids[port][pin_num].id = id;
channel_ids[port][pin_num].event = IRQ_NONE;
channel_ids[port][pin_num].int_enable = 0;
obj->id = id;
obj->pinname = pin;
return 0;
}
/** Release the GPIO IRQ PIN
*
* @param obj The gpio object
*/
void gpio_irq_free(gpio_irq_t *obj)
{
uint32_t port = obj->pinname >> GPIO_PORT_SHIFT;
uint32_t pin_num = obj->pinname & 0xFF;
// disable interrupt for the given pin
gpio_irq_disable(obj);
// clear the status table
channel_ids[port][pin_num].id = 0;
channel_ids[port][pin_num].event = IRQ_NONE;
channel_ids[port][pin_num].int_enable = 0;
}
/** Enable/disable pin IRQ event
*
* @param obj The GPIO object
* @param event The GPIO IRQ event
* @param enable The enable flag
*/
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
{
uint16_t int_polarity_reg;
uint32_t port = obj->pinname >> GPIO_PORT_SHIFT;
uint32_t pin_num = obj->pinname & 0xFF;
if (event == IRQ_NONE)
return;
// read the current polarity register
adi_gpio_GetGroupInterruptPolarity((ADI_GPIO_PORT)port, 1 << pin_num, &int_polarity_reg);
if (event == IRQ_RISE)
int_polarity_reg |= (1 << pin_num);
else
int_polarity_reg &= ~(1 << pin_num);
// set the polarity register
adi_gpio_SetGroupInterruptPolarity((ADI_GPIO_PORT)port, int_polarity_reg);
channel_ids[port][pin_num].event = event;
// enable interrupt for this pin if enable flag is set
if (enable)
gpio_irq_enable(obj);
else
gpio_irq_disable(obj);
}
/** Enable GPIO IRQ
*
* This is target dependent, as it might enable the entire port or just a pin
* @param obj The GPIO object
*/
void gpio_irq_enable(gpio_irq_t *obj)
{
uint32_t port = obj->pinname >> GPIO_PORT_SHIFT;
uint32_t pin_num = obj->pinname & 0xFF;
if (channel_ids[port][pin_num].event == IRQ_NONE)
return;
// Group all RISE interrupts in INTA and FALL interrupts in INTB
if (channel_ids[port][pin_num].event == IRQ_RISE) {
// set the callback routine
adi_gpio_RegisterCallback(SYS_GPIO_INTA_IRQn, gpio_irq_callback, obj);
enable_pin_interrupt((ADI_GPIO_PORT)port, pin_num, SYS_GPIO_INTA_IRQn);
} else if (channel_ids[port][pin_num].event == IRQ_FALL) {
// set the callback routine
adi_gpio_RegisterCallback(SYS_GPIO_INTB_IRQn, gpio_irq_callback, obj);
enable_pin_interrupt((ADI_GPIO_PORT)port, pin_num, SYS_GPIO_INTB_IRQn);
}
channel_ids[port][pin_num].int_enable = 1;
}
/** Disable GPIO IRQ
*
* This is target dependent, as it might disable the entire port or just a pin
* @param obj The GPIO object
*/
void gpio_irq_disable(gpio_irq_t *obj)
{
uint32_t port = obj->pinname >> GPIO_PORT_SHIFT;
uint32_t pin_num = obj->pinname & 0xFF;
if (channel_ids[port][pin_num].event == IRQ_NONE)
return;
// Group all RISE interrupts in INTA and FALL interrupts in INTB
if (channel_ids[port][pin_num].event == IRQ_RISE)
disable_pin_interrupt((ADI_GPIO_PORT)port, pin_num);
else if (channel_ids[port][pin_num].event == IRQ_FALL)
disable_pin_interrupt((ADI_GPIO_PORT)port, pin_num);
channel_ids[port][pin_num].int_enable = 0;
}
#endif // #ifdef DEVICE_INTERRUPTIN

61
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/gpio_object.h Executable file
View File

@ -0,0 +1,61 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifndef MBED_GPIO_OBJECT_H
#define MBED_GPIO_OBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
PinName pin;
} gpio_t;
static inline int gpio_is_connected(const gpio_t *obj)
{
return obj->pin != (PinName)NC;
}
#ifdef __cplusplus
}
#endif
#endif

238
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/i2c_api.c Executable file
View File

@ -0,0 +1,238 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include "mbed_assert.h"
#include "i2c_api.h"
#if DEVICE_I2C
#include "cmsis.h"
#include "pinmap.h"
#include "mbed_error.h"
#include "PeripheralPins.h"
#include "drivers/i2c/adi_i2c.h"
#if defined(BUILD_I2C_MI_DYNAMIC)
#if defined(ADI_DEBUG)
#warning "BUILD_I2C_MI_DYNAMIC is defined. Memory allocation for I2C will be dynamic"
int adi_i2c_memtype = 0;
#endif
#else
static uint8_t i2c_Mem[ADI_I2C_MEMORY_SIZE];
static ADI_I2C_HANDLE i2c_Handle;
#if defined(ADI_DEBUG)
#warning "BUILD_I2C_MI_DYNAMIC is NOT defined. Memory allocation for I2C will be static"
int adi_i2c_memtype = 1;
#endif
#endif
void i2c_init(i2c_t *obj, PinName sda, PinName scl)
{
uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA);
uint32_t i2c_scl = pinmap_peripheral(scl, PinMap_I2C_SCL);
ADI_I2C_HANDLE *pI2C_Handle;
uint8_t *I2C_Mem;
ADI_I2C_RESULT I2C_Return = ADI_I2C_SUCCESS;
uint32_t I2C_DevNum = I2C_0; /* ADuCM4050 only has 1 I2C port */
#if defined(BUILD_I2C_MI_DYNAMIC)
I2C_DevNum = I2C_0;
pI2C_Handle = &obj->I2C_Handle;
obj->pI2C_Handle = pI2C_Handle;
I2C_Mem = obj->I2C_Mem;
#else
I2C_DevNum = I2C_0;
pI2C_Handle = &i2c_Handle;
obj->pI2C_Handle = pI2C_Handle;
I2C_Mem = &i2c_Mem[0];
#endif
obj->instance = pinmap_merge(i2c_sda, i2c_scl);
MBED_ASSERT((int)obj->instance != NC);
pinmap_pinout(sda, PinMap_I2C_SDA);
pinmap_pinout(scl, PinMap_I2C_SCL);
SystemCoreClockUpdate();
I2C_Return = adi_i2c_Open(I2C_DevNum, I2C_Mem, ADI_I2C_MEMORY_SIZE, pI2C_Handle);
if (I2C_Return) {
obj->error = I2C_EVENT_ERROR;
return;
}
I2C_Return = adi_i2c_Reset(*pI2C_Handle);
if (I2C_Return) {
obj->error = I2C_EVENT_ERROR;
return;
}
}
int i2c_start(i2c_t *obj)
{
return 0;
}
int i2c_stop(i2c_t *obj)
{
return 0;
}
void i2c_frequency(i2c_t *obj, int hz)
{
ADI_I2C_HANDLE I2C_Handle;
ADI_I2C_RESULT I2C_Return = ADI_I2C_SUCCESS;
I2C_Handle = *obj->pI2C_Handle;
I2C_Return = adi_i2c_SetBitRate(I2C_Handle, (uint32_t) hz);
if (I2C_Return) {
obj->error = I2C_EVENT_ERROR;
return;
}
}
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
{
ADI_I2C_RESULT I2C_Return;
ADI_I2C_TRANSACTION I2C_inst;
uint8_t I2C_PrologueData = 0x00;
uint32_t I2C_Errors; /* HW Error result */
ADI_I2C_HANDLE I2C_Handle;
I2C_Handle = *obj->pI2C_Handle;
I2C_Return = adi_i2c_SetSlaveAddress(I2C_Handle, (address & 0x0000FFFF));
I2C_inst.pPrologue = &I2C_PrologueData;
I2C_inst.nPrologueSize = 0;
I2C_inst.pData = (uint8_t*) data;
I2C_inst.nDataSize = length;
I2C_inst.bReadNotWrite = true;
I2C_inst.bRepeatStart = stop;
I2C_Return = adi_i2c_ReadWrite(I2C_Handle, &I2C_inst, &I2C_Errors);
if (I2C_Return) {
obj->error = I2C_EVENT_ERROR;
return -1;
} else {
return length;
}
}
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
{
ADI_I2C_RESULT I2C_Return = ADI_I2C_SUCCESS;
ADI_I2C_TRANSACTION I2C_inst;
uint8_t I2C_PrologueData = 0x00;
uint32_t I2C_Errors; /* HW Error result */
ADI_I2C_HANDLE I2C_Handle;
I2C_Handle = *obj->pI2C_Handle;
I2C_Return = adi_i2c_SetSlaveAddress(I2C_Handle, (address & 0x0000FFFF));
I2C_inst.pPrologue = &I2C_PrologueData;
I2C_inst.nPrologueSize = 0;
I2C_inst.pData = (uint8_t*) data;
I2C_inst.nDataSize = length;
I2C_inst.bReadNotWrite = false;
I2C_inst.bRepeatStart = stop;
I2C_Return = adi_i2c_ReadWrite(I2C_Handle, &I2C_inst, &I2C_Errors);
if (I2C_Return) {
obj->error = I2C_EVENT_ERROR;
return -1;
} else {
return length;
}
}
void i2c_reset(i2c_t *obj)
{
return;
}
int i2c_byte_read(i2c_t *obj, int last)
{
return 0;
}
int i2c_byte_write(i2c_t *obj, int data)
{
return 0;
}
#if DEVICE_I2CSLAVE
void i2c_slave_mode(i2c_t *obj, int enable_slave)
{
}
int i2c_slave_receive(i2c_t *obj)
{
}
int i2c_slave_read(i2c_t *obj, char *data, int length)
{
return length;
}
int i2c_slave_write(i2c_t *obj, const char *data, int length)
{
return length;
}
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
{
}
#endif // #if DEVICE_I2CSLAVE
#endif // #if DEVICE_I2C

269
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/lp_ticker_api.c Executable file
View File

@ -0,0 +1,269 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include <sys/platform.h>
#include "lp_ticker_api.h"
#include <drivers/rtc/adi_rtc.h>
#include <drivers/pwr/adi_pwr.h>
#include "adi_rtc_def.h"
#ifdef DEVICE_LOWPOWERTIMER
// define base LF clock frequncy in Hz
#define LFCLK_FREQUENCY_HZ 32768
// RTC prescaler for the LF clock
#define RTC_PRESCALER 0
/* time for each tick of the LF clock in us */
#define TIME_US_PER_TICK ((float)1000000/(float)(LFCLK_FREQUENCY_HZ>>RTC_PRESCALER))
// The number of RTC clock ticks it takes to set & enable the alarm
#define TICKS_TO_ENABLE_ALARM 10
// Mask to limit the value of the RTC value to 27 bits so the converted time in us fits
// in 32-bits
#define MAX_TICK_MASK ((1 << 27) - 1)
static unsigned char rtc1_memory[ADI_RTC_MEMORY_SIZE];
static ADI_RTC_HANDLE hRTC1_Device;
/**
* \defgroup hal_LpTicker Low Power Ticker Functions
* @{
*/
/**
* Local stream-lined alarm setting function.
*
*/
static int set_rtc_alarm_interrupt(ADI_RTC_HANDLE const hDevice, uint32_t nAlarm)
{
ADI_RTC_DEVICE *pDevice = hDevice;
uint16_t cr0;
ADI_INT_STATUS_ALLOC();
// Section to enable interrupts
// The interrupt used is ADI_RTC_ALARM_INT
// Set the Alarm interrupt enable and Alarm enable bits in cr0
cr0 = BITM_RTC_CR0_ALMEN | (1u << BITP_RTC_CR0_ALMINTEN);
// Set the alarm value
/* Wait till previously posted write to Alram Register to complete */
PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
ADI_ENTER_CRITICAL_REGION();
/* Program the alarm count registers. */
pDevice->pRTCRegs->ALM0 = (uint16_t)nAlarm;
pDevice->pRTCRegs->ALM1 = (uint16_t)(nAlarm >> 16);
pDevice->pRTCRegs->ALM2 = 0u;
ADI_EXIT_CRITICAL_REGION();
/* Wait till write to Control Register to take effect */
SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
// Enable alarm
/* Wait till previously posted write to Control Register to complete */
PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDALM1|BITM_RTC_SR1_WPNDALM0)
ADI_ENTER_CRITICAL_REGION();
/* set RTC alarm and interrupt enable */
pDevice->pRTCRegs->CR0 |= cr0;
ADI_EXIT_CRITICAL_REGION();
/* Wait till write to Control Register to take effect */
SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
return ADI_RTC_SUCCESS;
}
/**
* Local RTC 1 ISR callback function.
*
*/
static void rtc1_Callback (void *pCBParam, uint32_t nEvent, void *EventArg)
{
/* process RTC interrupts (cleared by driver) */
if (ADI_RTC_ALARM_INT & nEvent) {
lp_ticker_irq_handler();
}
}
/** Get low power ticker's data
*
* @return The low power ticker data
*/
/*
const ticker_data_t* get_lp_ticker_data()
{
}*/
/* HAL lp ticker */
/** Initialize the low power ticker
*
*/
void lp_ticker_init()
{
// open the rtc device
adi_rtc_Open(1, rtc1_memory, ADI_RTC_MEMORY_SIZE, &hRTC1_Device);
// set the prescaler value
adi_rtc_SetPreScale(hRTC1_Device, RTC_PRESCALER);
// register call back for events
adi_rtc_RegisterCallback(hRTC1_Device, rtc1_Callback, hRTC1_Device);
// reset the RTC counter
adi_rtc_SetCount(hRTC1_Device, 0);
// set the trim value
adi_rtc_SetTrim(hRTC1_Device, ADI_RTC_TRIM_INTERVAL_14, ADI_RTC_TRIM_1, ADI_RTC_TRIM_SUB);
adi_rtc_EnableTrim(hRTC1_Device, true);
// enable the RTC
adi_rtc_Enable(hRTC1_Device, true);
}
/** Read the current counter
*
* @return The current timer's counter value in microseconds
*/
uint32_t lp_ticker_read()
{
uint32_t count;
float t;
// get current count
adi_rtc_GetCount(hRTC1_Device, &count);
// Throw away top 5 bits to avoid overflow and convert ticks to us
count &= MAX_TICK_MASK;
t = (float)count * TIME_US_PER_TICK;
return (uint32_t)t;
}
/** Set interrupt for specified timestamp
*
* @param timestamp The time in microseconds to be set
*/
void lp_ticker_set_interrupt(timestamp_t timestamp)
{
uint32_t rtcCount, trunc_rtcCount, set_tick, tick_delta, alarm_tick;
// compute the tick value based on the given alarm time
set_tick = (uint32_t)((float)(timestamp) / TIME_US_PER_TICK);
// get current count
adi_rtc_GetCount(hRTC1_Device, &rtcCount);
// compute the number of ticks required for the alarm
trunc_rtcCount = rtcCount & MAX_TICK_MASK;
// if set_tick is less than the current RTC count, the counter has
// missed the desired time, so set tick_delta to 0
if (set_tick >= trunc_rtcCount) {
tick_delta = set_tick - trunc_rtcCount;
} else {
tick_delta = 0;
}
// compute the absolute RTC alarm count required
alarm_tick = rtcCount + tick_delta;
// check if the desired alarm duration is less than TICKS_TO_ENABLE_ALARM,
// if so just wait it out rather than setting the alarm
if (tick_delta <= TICKS_TO_ENABLE_ALARM) {
// otherwise if the alarm time is less than the current RTC count + the time
// it takes to enable the alarm, just wait until the desired number of counts
// has expired rather than using the interrupt, then call the user ISR directly.
do {
adi_rtc_GetCount(hRTC1_Device, &rtcCount);
} while (rtcCount < alarm_tick);
rtc1_Callback(NULL, ADI_RTC_ALARM_INT, NULL);
return;
}
// set the alarm otherwise
set_rtc_alarm_interrupt(hRTC1_Device, alarm_tick);
}
/** Disable low power ticker interrupt
*
*/
void lp_ticker_disable_interrupt()
{
adi_rtc_EnableInterrupts(hRTC1_Device, ADI_RTC_ALARM_INT, false);
}
/** Clear the low power ticker interrupt
*
*/
void lp_ticker_clear_interrupt()
{
ADI_RTC_DEVICE *pDevice = hRTC1_Device;
NVIC_ClearPendingIRQ(pDevice->eIRQn);
return;
}
/** Set pending interrupt that should be fired right away.
*
* The ticker should be initialized prior calling this function.
*/
void lp_ticker_fire_interrupt(void)
{
ADI_RTC_DEVICE *pDevice = hRTC1_Device;
NVIC_SetPendingIRQ(pDevice->eIRQn);
}
#endif
/**@}*/

112
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/objects.h Executable file
View File

@ -0,0 +1,112 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifndef MBED_OBJECTS_H
#define MBED_OBJECTS_H
#include "cmsis.h"
#include "PeripheralNames.h"
#include "PinNames.h"
//#include "target_config.h"
#include "gpio_object.h"
#include "adi_i2c.h"
#include "adi_spi.h"
#include "adi_adc.h"
#ifdef __cplusplus
extern "C" {
#endif
struct gpio_irq_s {
unsigned int id;
PinName pinname;
};
struct sleep_s {
int temp;
};
struct serial_s {
int index;
};
struct trng_s {
uint8_t dummy;
};
#define BUILD_I2C_MI_DYNAMIC
struct i2c_s {
uint32_t instance;
uint32_t error;
ADI_I2C_HANDLE *pI2C_Handle;
#if defined(BUILD_I2C_MI_DYNAMIC)
ADI_I2C_HANDLE I2C_Handle;
uint8_t I2C_Mem[ADI_I2C_MEMORY_SIZE];
#endif
};
#define BUILD_SPI_MI_DYNAMIC
struct spi_s {
uint32_t instance;
uint32_t error;
ADI_SPI_HANDLE *pSPI_Handle;
#if defined(BUILD_SPI_MI_DYNAMIC)
ADI_SPI_HANDLE SPI_Handle;
uint8_t SPI_Mem[ADI_SPI_MEMORY_SIZE];
#endif
};
#include "gpio_object.h"
struct analogin_s {
ADI_ADC_HANDLE hDevice;
ADI_ADC_BUFFER UserBuffer;
uint8_t DelayCycles;
uint8_t SampleCycles;
};
#ifdef __cplusplus
}
#endif
#endif

103
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/pinmap.c Executable file
View File

@ -0,0 +1,103 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include "mbed_assert.h"
#include "pinmap.h"
#include "mbed_error.h"
#include "PinNames.h"
#include "adi_gpio.h"
void pin_function(PinName pin, int function)
{
// pin is composed of port and pin
// function is the function number (the mux selection number shifted by the pin value
// and written to pin mux register, each pin mux takes 2 bits hence multiplying by 2)
MBED_ASSERT(pin != (PinName)NC);
uint8_t port = pin >> GPIO_PORT_SHIFT;
uint32_t cfg_reg, mask;
volatile uint32_t *pGPIO_CFG;
switch (port) {
case 0:
pGPIO_CFG = (volatile uint32_t *)REG_GPIO0_CFG;
break;
case 1:
pGPIO_CFG = (volatile uint32_t *)REG_GPIO1_CFG;
break;
case 2:
pGPIO_CFG = (volatile uint32_t *)REG_GPIO2_CFG;
break;
default:
return;
}
cfg_reg = *pGPIO_CFG;
// clear the corresponding 2 bit field first before writing the function
// bits
mask = ~(3 << (pin * 2));
cfg_reg = cfg_reg & mask | (function << (pin*2));
*pGPIO_CFG = cfg_reg;
}
void pin_mode(PinName pin, PinMode mode)
{
MBED_ASSERT(pin != (PinName)NC);
uint8_t port = pin >> GPIO_PORT_SHIFT;
uint32_t pin_reg_value = 2 ^ (0xFF & pin);
switch (mode) {
case PullNone:
adi_gpio_PullUpEnable((ADI_GPIO_PORT)port, (ADI_GPIO_DATA) pin_reg_value,false);
break;
case PullDown:
case PullUp:
adi_gpio_PullUpEnable((ADI_GPIO_PORT)port, (ADI_GPIO_DATA) pin_reg_value,true);
break;
default:
break;
}
}

94
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/rtc_api.c Executable file
View File

@ -0,0 +1,94 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include "rtc_api.h"
#if DEVICE_RTC
#include "adi_rtc.h"
#include "adi_pwr.h"
#define RTC_DEVICE_NUM 0
static uint8_t aRtcDevMem0[ADI_RTC_MEMORY_SIZE];
static ADI_RTC_HANDLE hDevice0 = NULL;
void rtc_init(void)
{
/* initialize driver */
adi_rtc_Open(RTC_DEVICE_NUM,aRtcDevMem0,ADI_RTC_MEMORY_SIZE,&hDevice0);
adi_rtc_Enable(hDevice0, true);
}
void rtc_free(void)
{
adi_rtc_Close(hDevice0);
}
/*
* Little check routine to see if the RTC has been enabled
* 0 = Disabled, 1 = Enabled
*/
int rtc_isenabled(void)
{
uint32_t ControlReg;
adi_rtc_GetControl (hDevice0, ADI_RTC_CONTROL_REGISTER_0,&ControlReg);
return((int) (ControlReg & BITM_RTC_CR0_CNTEN));
}
time_t rtc_read(void)
{
time_t currentCount;
adi_rtc_GetCount(hDevice0, (uint32_t *)(&currentCount));
return(currentCount);
}
void rtc_write(time_t t)
{
adi_rtc_SetCount (hDevice0, t);
}
#endif // #if DEVICE_RTC

352
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/serial_api.c Executable file
View File

@ -0,0 +1,352 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include "serial_api.h"
#if DEVICE_SERIAL
// math.h required for floating point operations for baud rate calculation
#include <math.h>
#include "mbed_assert.h"
#include <string.h>
#include "cmsis.h"
#include "pinmap.h"
#include "PeripheralPins.h"
#include "drivers/uart/adi_uart.h"
#define ADI_UART_MEMORY_SIZE (ADI_UART_BIDIR_MEMORY_SIZE)
#define ADI_UART_NUM_DEVICES 2
static ADI_UART_HANDLE hDevice[ADI_UART_NUM_DEVICES];
static uint32_t UartDeviceMem[ADI_UART_NUM_DEVICES][(ADI_UART_MEMORY_SIZE + 3)/4];
static uint32_t serial_irq_ids[ADI_UART_NUM_DEVICES] = {0};
static uart_irq_handler irq_handler = NULL;
int stdio_uart_inited = 0;
serial_t stdio_uart;
int rxbuffer[2];
int txbuffer[2];
static void uart_callback(void *pCBParam, uint32_t Event, void *pArg)
{
MBED_ASSERT(irq_handler);
serial_t *obj = pCBParam;
if (Event == ADI_UART_EVENT_TX_BUFFER_PROCESSED)
irq_handler(serial_irq_ids[obj->index], TxIrq);
else if (Event == ADI_UART_EVENT_RX_BUFFER_PROCESSED)
irq_handler(serial_irq_ids[obj->index], RxIrq);
}
void serial_free(serial_t *obj)
{
adi_uart_Close(hDevice[obj->index]);
}
void serial_baud(serial_t *obj, int baudrate)
{
uint32_t uartdivc,uartdivm,uartdivn,uartosr;
// figures based on PCLK of 26MHz
switch (baudrate) {
case 9600:
uartdivc= 28;
uartdivm= 3;
uartdivn= 46;
uartosr= 3;
break;
case 19200:
uartdivc= 14;
uartdivm= 3;
uartdivn= 46;
uartosr= 3;
break;
case 38400:
uartdivc= 07;
uartdivm= 3;
uartdivn= 46;
uartosr= 3;
break;
case 57600:
uartdivc= 14;
uartdivm= 1;
uartdivn= 15;
uartosr= 3;
break;
case 115200:
uartdivc= 03;
uartdivm= 2;
uartdivn= 719;
uartosr= 3;
break;
case 230400:
uartdivc= 03;
uartdivm= 1;
uartdivn= 359;
uartosr= 3;
break;
default: // default of 9600kbps
uartdivc= 28;
uartdivm= 3;
uartdivn= 46;
uartosr= 3;
break;
}
adi_uart_ConfigBaudRate(hDevice[obj->index],uartdivc,uartdivm,uartdivn,uartosr);
}
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
{
int convertedparity = ADI_UART_NO_PARITY;
int convertedstopbits = ADI_UART_ONE_STOPBIT;
if (stop_bits)
convertedstopbits = ADI_UART_ONE_AND_HALF_TWO_STOPBITS;
if (parity == ParityOdd)
convertedparity = ADI_UART_ODD_PARITY;
else if (parity == ParityEven)
convertedparity = ADI_UART_EVEN_PARITY;
else if (parity == ParityForced1)
convertedparity = ADI_UART_ODD_PARITY_STICKY;
else if (parity == ParityForced0)
convertedparity = ADI_UART_EVEN_PARITY_STICKY;
adi_uart_SetConfiguration(hDevice[obj->index], convertedparity, convertedstopbits, (data_bits - 5));
}
#ifndef ADI_UART_TRANSFER_MODE
void serial_init(serial_t *obj, PinName tx, PinName rx)
{
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
obj->index = pinmap_merge(uart_tx, uart_rx);
MBED_ASSERT((int)obj->index != NC);
adi_uart_Open(obj->index,ADI_UART_DIR_BIDIRECTION,UartDeviceMem[obj->index],ADI_UART_MEMORY_SIZE,&hDevice[obj->index]);
serial_baud(obj, 9600);
serial_format(obj, 8, ParityNone, 1);
pinmap_pinout(tx, PinMap_UART_TX);
pinmap_pinout(rx, PinMap_UART_RX);
if (tx != NC) {
pin_mode(tx, PullUp);
}
if (rx != NC) {
pin_mode(rx, PullUp);
}
if (obj->index == STDIO_UART) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
}
int serial_readable(serial_t *obj)
{
bool bAvailable = false;
adi_uart_IsRxBufferAvailable(hDevice[obj->index], &bAvailable);
return bAvailable;
}
int serial_getc(serial_t *obj)
{
int c;
void *pBuff;
uint32_t pHwError;
adi_uart_SubmitRxBuffer(hDevice[obj->index], &rxbuffer[obj->index], 1, 1);
adi_uart_GetRxBuffer(hDevice[obj->index], &pBuff, &pHwError);
c = (unsigned) rxbuffer[obj->index];
return (c);
}
int serial_writable(serial_t *obj)
{
bool bAvailable = false;
adi_uart_IsTxBufferAvailable(hDevice[obj->index], &bAvailable);
return bAvailable;
}
void serial_putc(serial_t *obj, int c)
{
void *pBuff;
uint32_t pHwError;
txbuffer[obj->index]= (char) c;
adi_uart_SubmitTxBuffer(hDevice[obj->index],&txbuffer[obj->index], 1, 1);
adi_uart_GetTxBuffer(hDevice[obj->index], &pBuff, &pHwError);
return;
}
#else
void serial_init(serial_t *obj, PinName tx, PinName rx)
{
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
obj->index = pinmap_merge(uart_tx, uart_rx);
MBED_ASSERT((int)obj->index != NC);
adi_uart_Open(obj->index, ADI_UART_DIR_BIDIRECTION, UartDeviceMem[obj->index], ADI_UART_MEMORY_SIZE, &hDevice[obj->index]);
serial_baud(obj, 9600);
serial_format(obj, 8, ParityNone, 1);
pinmap_pinout(tx, PinMap_UART_TX);
pinmap_pinout(rx, PinMap_UART_RX);
if (tx != NC) {
pin_mode(tx, PullUp);
}
if (rx != NC) {
pin_mode(rx, PullUp);
}
if (obj->index == STDIO_UART) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
// set maximum FIFO depth
adi_uart_SetRxFifoTriggerLevel(hDevice[obj->index], ADI_UART_RX_FIFO_TRIG_LEVEL_14BYTE);
// enable FIFO
adi_uart_EnableFifo(hDevice[obj->index], true);
}
int serial_getc(serial_t *obj)
{
int c;
uint32_t hwErr;
adi_uart_Read(hDevice[obj->index], (void *) &c, 1, false, &hwErr);
return (c);
}
void serial_putc(serial_t *obj, int c)
{
uint32_t hwErr;
adi_uart_Write(hDevice[obj->index], &c, 1, false, &hwErr);
return;
}
int serial_readable(serial_t *obj)
{
return 0;
}
int serial_writable(serial_t *obj)
{
return 0;
}
#endif
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
{
MBED_ASSERT(obj);
adi_uart_RegisterCallback(hDevice[obj->index], &uart_callback, obj);
if (enable) {
} else {
}
}
void serial_pinout_tx(PinName tx)
{
pinmap_pinout(tx, PinMap_UART_TX);
}
void serial_break_set(serial_t *obj)
{
adi_uart_ForceTxBreak(hDevice[obj->index], true);
}
void serial_break_clear(serial_t *obj)
{
adi_uart_ForceTxBreak(hDevice[obj->index], false);
}
#if DEVICE_SERIAL_ASYNCH
uint8_t serial_tx_active(serial_t *obj)
{
return 0;
}
uint8_t serial_rx_active(serial_t *obj)
{
return 0;
}
int serial_irq_handler_asynch(serial_t *obj)
{
return 0;
}
int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
{
return 0;
}
void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
{
}
void serial_tx_abort_asynch(serial_t *obj)
{
}
void serial_rx_abort_asynch(serial_t *obj)
{
}
#endif
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
{
MBED_ASSERT(obj);
irq_handler = handler;
serial_irq_ids[obj->index] = id;
}
#endif

255
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/sleep.c Executable file
View File

@ -0,0 +1,255 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include "sleep_api.h"
#ifdef DEVICE_SLEEP
#include "adi_pwr.h"
#include "adi_pwr_def.h"
#include "adi_rtos_map.h"
#include "adi_ADuCM4050_device.h"
#include "sleep.h"
/**
* Function to put processor into sleep (FLEXI mode only).
*/
static void go_into_WFI(const ADI_PWR_POWER_MODE PowerMode)
{
uint32_t savedPriority;
uint16_t savedWDT;
uint16_t ActiveWDT;
uint32_t scrSetBits = 0u;
uint32_t scrClrBits = 0u;
uint32_t IntStatus = 0u;
/* pre-calculate the sleep-on-exit set/clear bits */
scrSetBits |= SCB_SCR_SLEEPONEXIT_Msk;
/* wfi without deepsleep or sleep-on-exit */
scrClrBits |= (uint32_t)(BITM_NVIC_INTCON0_SLEEPDEEP | BITM_NVIC_INTCON0_SLEEPONEXIT);
ADI_ENTER_CRITICAL_REGION();
{ /* these lines must be in a success-checking loop if they are not inside critical section */
/* Uninterruptable unlock sequence */
pADI_PMG0->PWRKEY = ADI_PMG_KEY;
/* Clear the previous mode and set new mode */
pADI_PMG0->PWRMOD = (uint32_t) ( ( pADI_PMG0->PWRMOD & (uint32_t) (~BITM_PMG_PWRMOD_MODE) ) | PowerMode );
}
/* Update the SCR (sleepdeep and sleep-on-exit bits) */
SCB->SCR = ((SCB->SCR | scrSetBits) & ~scrClrBits);
/* save/restore current Base Priority Level */
savedPriority = __get_BASEPRI();
/* assert caller's priority threshold (left-justified), currently set to 0, i.e. disable interrupt masking */
__set_BASEPRI(0);
/* save/restore WDT control register (which is not retained during hibernation) */
savedWDT = pADI_WDT0->CTL;
/* optimization: compute local WDT enable flag once (outside the loop) */
ActiveWDT = ((savedWDT & BITM_WDT_CTL_EN) >> BITP_WDT_CTL_EN);
/* SAR-51938: insure WDT is fully synchronized or looping on interrupts
in hibernate mode may lock out the sync bits.
In hibernate mode (during which the WDT registers are not retained),
the WDT registers will have been reset to default values after each
interrupt exit and we require a WDT clock domain sync.
We also need to insure a clock domain sync before (re)entering the WFI
in case an interrupt did a watchdog kick.
Optimization: only incur WDT sync overhead (~100us) if the WDT is enabled.
*/
if (ActiveWDT > 0u) {
while ((pADI_WDT0->STAT & (uint32_t)(BITM_WDT_STAT_COUNTING | BITM_WDT_STAT_LOADING | BITM_WDT_STAT_CLRIRQ)) != 0u) {
;
}
}
__DSB(); /* bus sync to insure register writes from interrupt handlers are always complete before WFI */
/* NOTE: aggressive compiler optimizations can muck up critical timing here, so reduce if hangs are present */
/* The WFI loop MUST reside in a critical section because we need to insure that the interrupt
that is planned to take us out of WFI (via a call to adi_pwr_ExitLowPowerMode()) is not
dispatched until we get into the WFI. If that interrupt sneaks in prior to our getting to the
WFI, then we may end up waiting (potentially forever) for an interrupt that has already occurred.
*/
__WFI();
/* Recycle the critical section so that other (non-wakeup) interrupts are dispatched.
This allows *pnInterruptOccurred to be set from any interrupt context.
*/
ADI_EXIT_CRITICAL_REGION();
/* nop */
ADI_ENTER_CRITICAL_REGION();
/* ...still within critical section... */
/* Restore previous base priority */
__set_BASEPRI(savedPriority);
/* conditionally, restore WDT control register.
avoid unnecessary WDT writes which will invoke a sync problem
described above as SAR-51938: going into hibernation with pending,
unsynchronized WDT writes may lock out the sync bits.
Note: it takes over 1000us to sync WDT writes between the 26MHz and
32kHz clock domains, so this write may actually impact the NEXT
low-power entry.
*/
if (ActiveWDT > 0u) {
pADI_WDT0->CTL = savedWDT;
}
/* clear sleep-on-exit bit to avoid sleeping on exception return to thread level */
SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;
__DSB(); /* bus sync before re-enabling interrupts */
ADI_EXIT_CRITICAL_REGION();
}
/**
* Function to enable/disable clock gating for the available clocks.
* PCLK overrides all the other clocks.
*/
void set_clock_gating(peripheral_clk_t eClk, int enable)
{
uint32_t flag;
switch (eClk) {
case PCLK:
flag = 1 << BITP_CLKG_CLK_CTL5_PERCLKOFF;
break;
case GPT0_CLOCK:
flag = 1 << BITP_CLKG_CLK_CTL5_GPTCLK0OFF;
break;
case GPT1_CLOCK:
flag = 1 << BITP_CLKG_CLK_CTL5_GPTCLK1OFF;
break;
case GPT2_CLOCK:
flag = 1 << BITP_CLKG_CLK_CTL5_GPTCLK2OFF;
break;
case I2C_CLOCK:
flag = 1 << BITP_CLKG_CLK_CTL5_UCLKI2COFF;
break;
case GPIO_CLOCK:
flag = 1 << BITP_CLKG_CLK_CTL5_GPIOCLKOFF;
break;
case TIMER_RGB_CLOCK:
flag = 1 << BITP_CLKG_CLK_CTL5_TMRRGBCLKOFF;
break;
default:
return;
}
// if enable, set the bit otherwise clear the bit
if (enable)
pADI_CLKG0_CLK->CTL5 |= flag;
else
pADI_CLKG0_CLK->CTL5 &= (~flag);
}
/** Send the microcontroller to sleep
*
* The processor is setup ready for sleep, and sent to sleep using __WFI(). In this mode, the
* system clock to the core is stopped until a reset or an interrupt occurs. This eliminates
* dynamic power used by the processor, memory systems and buses. The processor, peripheral and
* memory state are maintained, and the peripherals continue to work and can generate interrupts.
*
* The processor can be woken up by any internal peripheral interrupt or external pin interrupt.
*
* @note
* The mbed interface semihosting is disconnected as part of going to sleep, and can not be restored.
* Flash re-programming and the USB serial port will remain active, but the mbed program will no longer be
* able to access the LocalFileSystem
*
* This mode puts the processor into FLEXI mode however the peripheral clocks are not gated
* hence they are still active.
*/
void hal_sleep(void)
{
// set to go into the FLEXI mode where the processor is asleep and all peripherals are
// still active
go_into_WFI(ADI_PWR_MODE_FLEXI);
}
/** Send the microcontroller to deep sleep
*
* This processor is setup ready for deep sleep, and sent to sleep using __WFI(). This mode
* has the same sleep features as sleep plus it powers down peripherals and clocks. All state
* is still maintained.
*
* The processor can only be woken up by an external interrupt on a pin or a watchdog timer.
*
* @note
* The mbed interface semihosting is disconnected as part of going to sleep, and can not be restored.
* Flash re-programming and the USB serial port will remain active, but the mbed program will no longer be
* able to access the LocalFileSystem
*
* This mode puts the processor into FLEXI mode and all the peripheral clocks are clock gated
* hence they are inactive until interrupts are generated in which case the processor is awaken
* from sleep.
*/
void hal_deepsleep(void)
{
// set clock gating to all the peripheral clocks
set_clock_gating(PCLK, 1);
// set to go into the FLEXI mode with peripheral clocks gated.
go_into_WFI(ADI_PWR_MODE_FLEXI);
// when exiting, clear all peripheral clock gating bits. This is done to enable clocks that aren't
// automatically re-enabled out of sleep such as the GPIO clock.
pADI_CLKG0_CLK->CTL5 = 0;
}
#endif // #ifdef DEVICE_SLEEP

69
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/sleep.h Executable file
View File

@ -0,0 +1,69 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifndef __SLEEP__H__
#define __SLEEP__H__
/* Enumeration to specify peripheral clock types:
General purpose timer clocks 0-2,
I2C clock,
GPIO clock,
RGB timer clock.
Peripheral clock (PCLK) controls all the peripheral clocks, including
all the clocks mentioned previously
*/
typedef enum {
GPT0_CLOCK = 0,
GPT1_CLOCK,
GPT2_CLOCK,
I2C_CLOCK,
GPIO_CLOCK,
TIMER_RGB_CLOCK,
PCLK
} peripheral_clk_t;
/* Function to enable/disable clock gating for the available clocks.
PCLK overrides all the other clocks.
*/
void set_clock_gating(peripheral_clk_t eClk, int enable);
#endif // #ifndef __SLEEP_H__

346
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/spi_api.c Executable file
View File

@ -0,0 +1,346 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include <math.h>
#include "mbed_assert.h"
#include <adi_types.h>
#include "spi_api.h"
#if DEVICE_SPI
#include "cmsis.h"
#include "pinmap.h"
#include "mbed_error.h"
#include "PeripheralPins.h"
#include "drivers/spi/adi_spi.h"
#if defined(BUILD_SPI_MI_DYNAMIC)
#if defined(ADI_DEBUG)
#warning "BUILD_SPI_MI_DYNAMIC is defined. Memory allocation for SPI will be dynamic"
int adi_spi_memtype = 0;
#endif
#else
ADI_SPI_HANDLE spi_Handle0;
uint8_t spi_Mem0[ADI_SPI_MEMORY_SIZE];
ADI_SPI_HANDLE spi_Handle1;
uint8_t spi_Mem1[ADI_SPI_MEMORY_SIZE];
ADI_SPI_HANDLE spi_Handle2;
uint8_t spi_Mem2[ADI_SPI_MEMORY_SIZE];
#if defined(ADI_DEBUG)
#warning "BUILD_SPI_MI_DYNAMIC is NOT defined. Memory allocation for SPI will be static"
int adi_spi_memtype = 1;
#endif
#endif
/** Initialize the SPI peripheral
*
* Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
* @param[out] obj The SPI object to initialize
* @param[in] mosi The pin to use for MOSI
* @param[in] miso The pin to use for MISO
* @param[in] sclk The pin to use for SCLK
* @param[in] ssel The pin to use for SSEL
*/
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
{
// determine the SPI to use
uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
uint32_t spi_sclk = pinmap_peripheral(sclk, PinMap_SPI_SCLK);
uint32_t spi_ssel = pinmap_peripheral(ssel, PinMap_SPI_SSEL);
uint32_t spi_data = pinmap_merge(spi_mosi, spi_miso);
uint32_t spi_cntl = pinmap_merge(spi_sclk, spi_ssel);
ADI_SPI_HANDLE *pSPI_Handle;
uint8_t *SPI_Mem;
ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS;
uint32_t nDeviceNum = 0;
ADI_SPI_CHIP_SELECT spi_cs = ADI_SPI_CS_NONE;
#if defined(BUILD_SPI_MI_DYNAMIC)
if (mosi == SPI0_MOSI) {
nDeviceNum = SPI_0;
} else if (mosi == SPI1_MOSI) {
nDeviceNum = SPI_1;
} else if (mosi == SPI2_MOSI) {
nDeviceNum = SPI_2;
}
pSPI_Handle = &obj->SPI_Handle;
obj->pSPI_Handle = pSPI_Handle;
SPI_Mem = obj->SPI_Mem;
#else
if (mosi == SPI0_MOSI) {
nDeviceNum = SPI_0;
pSPI_Handle = &spi_Handle0;
SPI_Mem = &spi_Mem0[0];
} else if (mosi == SPI1_MOSI) {
nDeviceNum = SPI_1;
pSPI_Handle = &spi_Handle1;
SPI_Mem = &spi_Mem1[0];
} else if (mosi == SPI2_MOSI) {
nDeviceNum = SPI_2;
pSPI_Handle = &spi_Handle2;
SPI_Mem = &spi_Mem2[0];
}
obj->pSPI_Handle = pSPI_Handle;
#endif
obj->instance = pinmap_merge(spi_data, spi_cntl);
MBED_ASSERT((int)obj->instance != NC);
// pin out the spi pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
pinmap_pinout(miso, PinMap_SPI_MISO);
pinmap_pinout(sclk, PinMap_SPI_SCLK);
if (ssel != NC) {
pinmap_pinout(ssel, PinMap_SPI_SSEL);
}
SystemCoreClockUpdate();
SPI_Return = adi_spi_Open(nDeviceNum, SPI_Mem, ADI_SPI_MEMORY_SIZE, pSPI_Handle);
if (SPI_Return) {
obj->error = SPI_EVENT_ERROR;
return;
}
if (ssel != NC) {
if ( (ssel == SPI0_CS0) || (ssel == SPI1_CS0) || (ssel == SPI2_CS0)) {
spi_cs = ADI_SPI_CS0;
} else if ( (ssel == SPI0_CS1) || (ssel == SPI1_CS1) || (ssel == SPI2_CS1)) {
spi_cs = ADI_SPI_CS1;
} else if ( (ssel == SPI0_CS2) || (ssel == SPI1_CS2) || (ssel == SPI2_CS2)) {
spi_cs = ADI_SPI_CS2;
} else if ( (ssel == SPI0_CS3) || (ssel == SPI1_CS3) || (ssel == SPI2_CS3)) {
spi_cs = ADI_SPI_CS3;
}
SPI_Return = adi_spi_SetChipSelect(*pSPI_Handle, spi_cs);
if (SPI_Return) {
obj->error = SPI_EVENT_ERROR;
return;
}
}
}
/** Release a SPI object
*
* TODO: spi_free is currently unimplemented
* This will require reference counting at the C++ level to be safe
*
* Return the pins owned by the SPI object to their reset state
* Disable the SPI peripheral
* Disable the SPI clock
* @param[in] obj The SPI object to deinitialize
*/
void spi_free(spi_t *obj)
{
ADI_SPI_HANDLE SPI_Handle;
ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS;
SPI_Handle = *obj->pSPI_Handle;
SPI_Return = adi_spi_Close(SPI_Handle);
if (SPI_Return) {
obj->error = SPI_EVENT_ERROR;
return;
}
}
/** Configure the SPI format
*
* Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
* The default bit order is MSB.
* @param[in,out] obj The SPI object to configure
* @param[in] bits The number of bits per frame
* @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
* @param[in] slave Zero for master mode or non-zero for slave mode
*
** Configure the data transmission format
*
* @param bits Number of bits per SPI frame (4 - 16)
* @param mode Clock polarity and phase mode (0 - 3)
*
* @code
* mode | POL PHA
* -----+--------
* 0 | 0 0
* 1 | 0 1
* 2 | 1 0
* 3 | 1 1
* @endcode
*/
void spi_format(spi_t *obj, int bits, int mode, int slave)
{
ADI_SPI_HANDLE SPI_Handle;
ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS;
bool_t master;
master = !((bool_t)slave);
SPI_Handle = *obj->pSPI_Handle;
SPI_Return = adi_spi_SetMasterMode(SPI_Handle, master);
if (SPI_Return) {
obj->error = SPI_EVENT_ERROR;
return;
}
}
/** Set the SPI baud rate
*
* Actual frequency may differ from the desired frequency due to available dividers and bus clock
* Configures the SPI peripheral's baud rate
* @param[in,out] obj The SPI object to configure
* @param[in] hz The baud rate in Hz
*/
void spi_frequency(spi_t *obj, int hz)
{
ADI_SPI_HANDLE SPI_Handle;
ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS;
SPI_Handle = *obj->pSPI_Handle;
SPI_Return = adi_spi_SetBitrate(SPI_Handle, (uint32_t) hz);
if (SPI_Return) {
obj->error = SPI_EVENT_ERROR;
return;
}
}
/** Write a byte out in master mode and receive a value
*
* @param[in] obj The SPI peripheral to use for sending
* @param[in] value The value to send
* @return Returns the value received during send
*/
int spi_master_write(spi_t *obj, int value)
{
ADI_SPI_TRANSCEIVER transceive;
uint8_t TxBuf;
uint8_t RxBuf;
ADI_SPI_HANDLE SPI_Handle;
ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS;
TxBuf = (uint8_t)value;
transceive.pReceiver = &RxBuf;
transceive.ReceiverBytes = 1; /* link transceive data size to the remaining count */
transceive.nRxIncrement = 1; /* auto increment buffer */
transceive.pTransmitter = &TxBuf; /* initialize data attributes */
transceive.TransmitterBytes = 1; /* link transceive data size to the remaining count */
transceive.nTxIncrement = 1; /* auto increment buffer */
transceive.bDMA = false;
transceive.bRD_CTL = false;
SPI_Handle = *obj->pSPI_Handle;
SPI_Return = adi_spi_MasterReadWrite(SPI_Handle, &transceive);
if (SPI_Return) {
obj->error = SPI_EVENT_ERROR;
return 1;
}
return((int)RxBuf);
}
/** Check if a value is available to read
*
* @param[in] obj The SPI peripheral to check
* @return non-zero if a value is available
*/
int spi_slave_receive(spi_t *obj)
{
return 0;
}
/** Get a received value out of the SPI receive buffer in slave mode
*
* Blocks until a value is available
* @param[in] obj The SPI peripheral to read
* @return The value received
*/
int spi_slave_read(spi_t *obj)
{
return 0;
}
/** Write a value to the SPI peripheral in slave mode
*
* Blocks until the SPI peripheral can be written to
* @param[in] obj The SPI peripheral to write
* @param[in] value The value to write
*/
void spi_slave_write(spi_t *obj, int value)
{
return;
}
/** Write a block out in master mode and receive a value
*
* The total number of bytes sent and recieved will be the maximum of
* tx_length and rx_length. The bytes written will be padded with the
* value 0xff.
*
* @param[in] obj The SPI peripheral to use for sending
* @param[in] tx_buffer Pointer to the byte-array of data to write to the device
* @param[in] tx_length Number of bytes to write, may be zero
* @param[in] rx_buffer Pointer to the byte-array of data to read from the device
* @param[in] rx_length Number of bytes to read, may be zero
* @param[in] write_fill Default data transmitted while performing a read
* @returns
* The number of bytes written and read from the device. This is
* maximum of tx_length and rx_length.
*/
int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill)
{
return 0;
}
#endif

96
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/trng_api.c Executable file
View File

@ -0,0 +1,96 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#if defined(DEVICE_TRNG)
#include <stdlib.h>
#include <adi_rng.h>
#include <adi_pwr.h>
#include "cmsis.h"
#include "trng_api.h"
// Sampling counter values
// Prescaler: 0 - 10
// LenReload: 0 - 4095
#define TRNG_CNT_VAL 4095
#define TRNG_PRESCALER 2
static ADI_RNG_HANDLE RNGhDevice; /* Memory to handle CRC Device */
static uint32_t RngDevMem[(ADI_RNG_MEMORY_SIZE + 3)/4]; /* Data buffers for Random numbers */
void trng_init(trng_t *obj)
{
(void)obj;
adi_rng_Open(0,RngDevMem,sizeof(RngDevMem),&RNGhDevice);
// Set sample length for the H/W RN accumulator
adi_rng_SetSampleLen(RNGhDevice, TRNG_PRESCALER, TRNG_CNT_VAL);
// Enable the RNG
adi_rng_Enable(RNGhDevice, true);
}
void trng_free(trng_t *obj)
{
(void)obj;
adi_rng_Enable(RNGhDevice, false);
adi_rng_Close(RNGhDevice);
}
int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_length)
{
(void)obj;
bool bRNGRdy;
uint32_t nRandomNum, i;
for (i = 0; i < length; ) {
// wait for the RNG ready to give a random number
adi_rng_GetRdyStatus(RNGhDevice, &bRNGRdy);
if (bRNGRdy) {
// read the random number
adi_rng_GetRngData(RNGhDevice, &nRandomNum);
output[i++] = (uint8_t) nRandomNum;
}
}
*output_length = length;
return 0;
}
#endif

346
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/us_ticker.c Executable file
View File

@ -0,0 +1,346 @@
/*******************************************************************************
* Copyright (c) 2010-2017 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
* INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
* CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#include <stdint.h>
#include <stdio.h>
#include <drivers/tmr/adi_tmr.h>
#include <drivers/pwr/adi_pwr.h>
#include <drivers/gpio/adi_gpio.h>
#ifndef BITM_TMR_RGB_CTL_EN
#define BITM_TMR_RGB_CTL_EN BITM_TMR_CTL_EN
#endif
typedef uint32_t timestamp_t;
// defined in mbed_us_ticker_api.c which calls the ticker_irq_handler() routine
// defined in mbed_ticker_api.c
void us_ticker_irq_handler(void);
static int us_ticker_inited = 0;
static ADI_TMR_CONFIG tmrConfig, tmr2Config;
static volatile uint32_t Upper_count = 0, largecnt = 0;
static ADI_TMR_TypeDef * adi_tmr_registers[ADI_TMR_DEVICE_NUM] = {pADI_TMR0, pADI_TMR1, pADI_TMR2};
#if defined(__ADUCM302x__)
static const IRQn_Type adi_tmr_interrupt[ADI_TMR_DEVICE_NUM] = {TMR0_EVT_IRQn, TMR1_EVT_IRQn, TMR2_EVT_IRQn};
#elif defined(__ADUCM4x50__)
static const IRQn_Type adi_tmr_interrupt[ADI_TMR_DEVICE_NUM] = {TMR0_EVT_IRQn, TMR1_EVT_IRQn, TMR2_EVT_IRQn, TMR_RGB_EVT_IRQn};
#else
#error TMR is not ported for this processor
#endif
/*---------------------------------------------------------------------------*
Local functions
*---------------------------------------------------------------------------*/
static void GP1CallbackFunction(void *pCBParam, uint32_t Event, void * pArg)
{
Upper_count++;
}
static uint32_t get_current_time(void)
{
uint16_t tmrcnt0, tmrcnt1;
uint32_t totaltmr0, totaltmr1;
uint32_t uc1, tmrpend0, tmrpend1;
do {
volatile uint32_t *ucptr = &Upper_count;
/*
* Carefully coded to prevent race conditions. Do not make changes unless you understand all the
* implications.
*
* Note this function can be called with interrupts globally disabled or enabled. It has been coded to work in both cases.
*
* TMR0 and TMR1 both run from the same synchronous clock. TMR0 runs at 26MHz and TMR1 runs at 26/256MHz.
* TMR1 generates an interrupt every time it overflows its 16 bit counter. TMR0 runs faster and provides
* the lowest 8 bits of the current time count. When TMR0 and TMR1 are combined, they provide 24 bits of
* timer precision. i.e. (TMR0.CURCNT & 0xff) + (TMR1.CURCNT << 8)
*
* There are several race conditions protected against:
* 1. TMR0 and TMR1 are both read at the same time, however, on rare occasions, one will have incremented before the other.
* Therefore we read both timer counters, and check if the middle 8 bits match, if they don't then read the counts again
* until they do. This ensures that one or the other counters are stable with respect to each other.
*
* 2. TMR1.CURCNT and Upper_count racing. Prevent this by disabling the TMR1 interrupt, which stops Upper_count increment interrupt (GP1CallbackFunction).
* Then check pending bit of TMR1 to see if we missed Upper_count interrupt, and add it manually later.
*
* 3. Race between the TMR1 pend, and the TMR1.CURCNT read. Even with TMR1 interrupt disabled, the pend bit
* may be set while TMR1.CURCNT is being read. We don't know if the pend bit matches the TMR1 state.
* To prevent this, the pending bit is read twice, and we see if it matches; if it doesn't, loop around again.
*
* Note the TMR1 interrupt is enabled on each iteration of the loop to flush out any pending TMR1 interrupt,
* thereby clearing any TMR1 pend's. This have no effect if this routine is called with interrupts globally disabled.
*/
NVIC_DisableIRQ(adi_tmr_interrupt[ADI_TMR_DEVICE_GP1]); // Prevent Upper_count increment
tmrpend0 = NVIC_GetPendingIRQ(adi_tmr_interrupt[ADI_TMR_DEVICE_GP1]);
// Check if there is a pending interrupt for timer 1
__DMB(); // memory barrier: read GP0 before GP1
tmrcnt0 = adi_tmr_registers[ADI_TMR_DEVICE_GP0]->CURCNT; // to minimize skew, read both timers manually
__DMB(); // memory barrier: read GP0 before GP1
tmrcnt1 = adi_tmr_registers[ADI_TMR_DEVICE_GP1]->CURCNT; // read both timers manually
totaltmr0 = tmrcnt0; // expand to u32 bits
totaltmr1 = tmrcnt1; // expand to u32 bits
tmrcnt0 &= 0xff00u;
tmrcnt1 <<= 8;
__DMB();
uc1 = *ucptr; // Read Upper_count
tmrpend1 = NVIC_GetPendingIRQ(adi_tmr_interrupt[ADI_TMR_DEVICE_GP1]);
// Check for a pending interrupt again. Only leave loop if they match
NVIC_EnableIRQ(adi_tmr_interrupt[ADI_TMR_DEVICE_GP1]); // enable interrupt on every loop to allow TMR1 interrupt to run
} while ((tmrcnt0 != tmrcnt1) || (tmrpend0 != tmrpend1));
totaltmr1 <<= 8; // Timer1 runs 256x slower
totaltmr1 += totaltmr0 & 0xffu; // Use last 8 bits of Timer0 as it runs faster
// totaltmr1 now contain 24 bits of significance
if (tmrpend0) { // If an interrupt is pending, then increment local copy of upper count
uc1++;
}
uint64_t Uc = totaltmr1; // expand out to 64 bits unsigned
Uc += ((uint64_t) uc1) << 24; // Add on the upper count to get the full precision count
// Divide Uc by 26 (26MHz converted to 1MHz) todo scale for other clock freqs
Uc *= 1290555u; // Divide total(1/26) << 25
Uc >>= 25; // shift back. Fixed point avoid use of floating point divide.
// Compiler does this inline using shifts and adds.
return Uc;
}
static void calc_event_counts(uint32_t timestamp)
{
uint32_t calc_time, blocks, offset;
uint64_t aa;
calc_time = get_current_time();
offset = timestamp - calc_time; // offset in useconds
if (offset > 0xf0000000u) // if offset is a really big number, assume that timer has already expired (i.e. negative)
offset = 0u;
if (offset > 10u) { // it takes 10us to user timer routine after interrupt. Offset timer to account for that.
offset -= 10u;
} else
offset = 0u;
aa = (uint64_t) offset;
aa *= 26u; // convert from 1MHz to 26MHz clock. todo scale for other clock freqs
blocks = aa >> 7;
blocks++; // round
largecnt = blocks>>1; // communicate to event_timer() routine
}
static void event_timer()
{
if (largecnt) {
uint32_t cnt = largecnt;
if (cnt > 65535u) {
cnt = 0u;
} else
cnt = 65536u - cnt;
tmr2Config.nLoad = cnt;
tmr2Config.nAsyncLoad = cnt;
adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, tmr2Config);
adi_tmr_Enable(ADI_TMR_DEVICE_GP2, true);
} else {
us_ticker_irq_handler();
}
}
/*
* Interrupt routine for timer 2
*
* largecnt counts how many timer ticks should be counted to reach timer event.
* Each interrupt happens every 65536 timer ticks, unless there are less than 65536 ticks to count.
* In that case do the remaining timers ticks.
*
* largecnt is a global that is used to communicate between event_timer and the interrupt routine
* On entry, largecnt will be any value larger than 0.
*/
static void GP2CallbackFunction(void *pCBParam, uint32_t Event, void * pArg)
{
if (largecnt >= 65536u) {
largecnt -= 65536u;
} else
largecnt = 0;
if (largecnt < 65536u) {
adi_tmr_Enable(ADI_TMR_DEVICE_GP2, false);
event_timer();
}
}
/*---------------------------------------------------------------------------*
us_ticker HAL APIs
*---------------------------------------------------------------------------*/
void us_ticker_init(void)
{
if (us_ticker_inited) {
return;
}
us_ticker_inited = 1;
/*--------------------- GP TIMER INITIALIZATION --------------------------*/
/* Set up GP0 callback function */
adi_tmr_Init(ADI_TMR_DEVICE_GP0, NULL, NULL, false);
/* Set up GP1 callback function */
adi_tmr_Init(ADI_TMR_DEVICE_GP1, GP1CallbackFunction, NULL, true);
/* Set up GP1 callback function */
adi_tmr_Init(ADI_TMR_DEVICE_GP2, GP2CallbackFunction, NULL, true);
/* Configure GP0 to run at 26MHz */
tmrConfig.bCountingUp = true;
tmrConfig.bPeriodic = true;
tmrConfig.ePrescaler = ADI_TMR_PRESCALER_1; // TMR0 at 26MHz
tmrConfig.eClockSource = ADI_TMR_CLOCK_PCLK; // TMR source is PCLK (most examples use HFOSC)
tmrConfig.nLoad = 0;
tmrConfig.nAsyncLoad = 0;
tmrConfig.bReloading = false;
tmrConfig.bSyncBypass = true; // Allow x1 prescale: requires PCLK as a clk
adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP0, tmrConfig);
/* Configure GP1 to have a period 256 times longer than GP0 */
tmrConfig.nLoad = 0;
tmrConfig.nAsyncLoad = 0;
tmrConfig.ePrescaler = ADI_TMR_PRESCALER_256; // TMR1 = 26MHz/256
adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP1, tmrConfig);
/* Configure GP2 for doing event counts */
tmr2Config.bCountingUp = true;
tmr2Config.bPeriodic = true;
tmr2Config.ePrescaler = ADI_TMR_PRESCALER_256; // TMR2 at 26MHz/256
tmr2Config.eClockSource = ADI_TMR_CLOCK_PCLK; // TMR source is PCLK (most examples use HFOSC)
tmr2Config.nLoad = 0;
tmr2Config.nAsyncLoad = 0;
tmr2Config.bReloading = false;
tmr2Config.bSyncBypass = true; // Allow x1 prescale
adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, tmr2Config);
/*------------------------- GP TIMER ENABLE ------------------------------*/
/* Manually enable both timers to get them started at the same time
*
*/
adi_tmr_registers[ADI_TMR_DEVICE_GP0]->CTL |= (uint16_t) BITM_TMR_RGB_CTL_EN;
adi_tmr_registers[ADI_TMR_DEVICE_GP1]->CTL |= (uint16_t) BITM_TMR_RGB_CTL_EN;
}
uint32_t us_ticker_read()
{
uint32_t curr_time;
if (!us_ticker_inited) {
us_ticker_init();
}
curr_time = get_current_time();
return curr_time;
}
void us_ticker_disable_interrupt(void)
{
adi_tmr_Enable(ADI_TMR_DEVICE_GP2, false);
}
void us_ticker_clear_interrupt(void)
{
NVIC_ClearPendingIRQ(TMR2_EVT_IRQn);
}
void us_ticker_set_interrupt(timestamp_t timestamp)
{
/* timestamp is when interrupt should fire.
*
* This MUST not be called if another timer event is currently enabled.
*
*/
calc_event_counts(timestamp); // use timestamp to calculate largecnt to control number of timer interrupts
event_timer(); // uses largecnt to initiate timer interrupts
}
/** Set pending interrupt that should be fired right away.
*
* The ticker should be initialized prior calling this function.
*
* This MUST not be called if another timer event is currently enabled.
*/
void us_ticker_fire_interrupt(void)
{
NVIC_SetPendingIRQ(TMR2_EVT_IRQn);
}
/*
** EOF
*/

26
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/ADuCM4050.h Executable file
View File

@ -0,0 +1,26 @@
/*
** ADuCM4050.h
**
** Copyright (C) 2016 Analog Devices, Inc. All Rights Reserved.
**
*/
#ifndef ADUCM4050_H
#define ADUCM4050_H
#include <ADuCM4050_cdef.h>
#include <ADuCM4050_device.h>
#define __CM4_REV 0x0001U /*!< CM4 Core Revision r0p1 */
#define __MPU_PRESENT 1u /*!< MPU present */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1u /*!< FPU present */
#endif
#define __NVIC_PRIO_BITS 3u /*!< Number of Bits for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< 1 if different SysTick Config is used */
#include <core_cm4.h>
#include "system_ADuCM4050.h"
#endif /* ADUCM4050_H */

18
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/ADuCM4050_cdef.h Executable file
View File

@ -0,0 +1,18 @@
/*
** ADuCM4050_cdef.h
**
** Copyright (C) 2016 Analog Devices, Inc. All Rights Reserved.
**
*/
#ifndef _WRAP_ADUCM4050_CDEF_H
#define _WRAP_ADUCM4050_CDEF_H
#include <ADuCM4050_def.h>
#include <stdint.h>
#include <sys/adi_cio_macros.h>
#include <sys/adi_ADuCM4050_cdef.h>
#endif /* _WRAP_ADUCM4050_CDEF_H */

34
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/ADuCM4050_def.h Executable file
View File

@ -0,0 +1,34 @@
/*
** ADuCM4050_def.h
**
** Copyright (C) 2016-2017 Analog Devices, Inc. All Rights Reserved.
**
*/
#ifndef _WRAP_ADUCM4050_DEF_H
#define _WRAP_ADUCM4050_DEF_H
#ifdef __ICCARM__
/* IAR MISRA C 2004 error suppressions:
*
* Pm008 (rule 2.4): sections of code should not be 'commented out'.
* Some comments are wrongly identified as code.
*
* Pm009 (rule 5.1): identifiers shall not rely on significance of more than 31 characters.
* The YODA-generated headers rely on more. The IAR compiler supports that.
*/
_Pragma("diag_suppress=Pm008,Pm009")
#endif /* __ICCARM__ */
#ifdef __IASMARM__
/* Define masks to plain numeric literal for IAR assembler. */
#define _ADI_MSK_3( mask, smask, type ) (mask)
#endif /* __IASMARM__ */
#include <sys/adi_ADuCM4050.h>
#ifdef __ICCARM__
_Pragma("diag_default=Pm008,Pm009")
#endif /* __ICCARM__ */
#endif /* _WRAP_ADUCM4050_DEF_H */

29
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/ADuCM4050_device.h Executable file
View File

@ -0,0 +1,29 @@
/*
** ADuCM4050_device.h
**
** Copyright (C) 2016 Analog Devices, Inc. All Rights Reserved.
**
*/
#ifndef _WRAP_ADUCM4050_DEVICE_H
#define _WRAP_ADUCM4050_DEVICE_H
#include <ADuCM4050_typedefs.h>
#include <sys/adi_cio_macros.h>
#ifdef __ICCARM__
/* IAR MISRA C 2004 error suppressions:
*
* Pm093 (rule 18.4): use of union - overlapping storage shall not be used.
* Unions are required by sys/adi_ADuCM4050_device.h.
*/
_Pragma("diag_suppress=Pm093")
#endif /* __ICCARM__ */
#include <sys/adi_ADuCM4050_device.h>
#ifdef __ICCARM__
_Pragma("diag_default=Pm093")
#endif /* __ICCARM__ */
#endif /* _WRAP_ADUCM4050_DEVICE_H */

31
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/ADuCM4050_typedefs.h Executable file
View File

@ -0,0 +1,31 @@
/*
** ADuCM4050_typedefs.h
**
** Copyright (C) 2016 Analog Devices, Inc. All Rights Reserved.
**
*/
#ifndef _WRAP_ADUCM4050_TYPEDEFS_H
#define _WRAP_ADUCM4050_TYPEDEFS_H
#include <stdint.h>
#ifdef __ICCARM__
/* IAR MISRA C 2004 error suppressions:
*
* Pm008 (rule 2.4): sections of code should not be 'commented out'.
* Some comments are wrongly identified as code.
*
* Pm093 (rule 18.4): use of union - overlapping storage shall not be used.
* Unions are required by sys/adi_ADuCM4050_typedefs.h.
*/
_Pragma("diag_suppress=Pm008,Pm093")
#endif /* __ICCARM__ */
#include <sys/adi_ADuCM4050_typedefs.h>
#ifdef __ICCARM__
_Pragma("diag_default=Pm008,Pm093")
#endif /* __ICCARM__ */
#endif /* _WRAP_ADUCM4050_TYPEDEFS_H */

2371
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adc/adi_adc.c Executable file
View File

File diff suppressed because it is too large Load Diff

19
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adc/adi_adc_data.c Executable file
View File

@ -0,0 +1,19 @@
#ifndef ADI_ADC_DATA_C
#define ADI_ADC_DATA_C
#include <drivers/adc/adi_adc.h>
#include <drivers/dma/adi_dma.h>
#include "adi_adc_def.h"
/*! \cond PRIVATE */
static ADI_ADC_INFO AdcDevInfo[] = {
{
NULL,
(ADI_ADC_TypeDef*)REG_ADC0_CFG
}
};
/*! \endcond */
#endif /* ADI_ADC_DATA_C */

120
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adc/adi_adc_def.h Executable file
View File

@ -0,0 +1,120 @@
/*! \cond PRIVATE */
#ifndef ADI_ADC_DEF
#define ADI_ADC_DEF
#include <drivers/adc/adi_adc.h>
#include <adi_processor.h>
#if defined(__ECC__)
#define ALIGN
#define ALIGN4 _Pragma("align(4)")
#elif defined(__ICCARM__)
#define ALIGN _Pragma("pack()")
#define ALIGN4 _Pragma("pack(4)")
#elif defined (__GNUC__)
#define ALIGN _Pragma("pack()")
#define ALIGN4 _Pragma("pack(4)")
#endif
#define IS_IN_STATE(X) ((pDevice->nDriverStatus & (uint32_t)(X)) == (uint32_t)(X))
#define IS_NOT_IN_STATE(X) ((pDevice->nDriverStatus & (uint32_t)(X)) == 0u)
#define IS_IN_ALL_STATES(X) ((pDevice->nDriverStatus & (uint32_t)(X)) == (uint32_t)(X))
#define IS_IN_ANY_STATE(X) ((pDevice->nDriverStatus & (uint32_t)(X)) != 0u)
#define IS_NOT_IN_ANY_STATE(X) ((pDevice->nDriverStatus & (uint32_t)(X)) == 0u)
#define SET_STATE(X) (pDevice->nDriverStatus |= (uint32_t)(X))
#define CLR_STATE(X) (pDevice->nDriverStatus &= ~((uint32_t)(X)))
#define NUM_ADC_CHANNELS (8u)
#define NUM_ADC_COMPARATOR_CHANNELS (4u)
/* To keep state for the driver for error checking */
typedef enum __ADC_STATUS {
ADC_STATUS_POWERED_UP = (1u << 0),
ADC_STATUS_SUB_SYSTEM_EN = (1u << 1),
ADC_STATUS_SUB_SYSTEM_READY = (1u << 2),
ADC_STATUS_NON_BLOCKING_EN = (1u << 3),
ADC_STATUS_BLOCKING_EN = (1u << 4),
ADC_STATUS_COMPARATOR_EN = (1u << 5),
ADC_STATUS_SAMPLING_IN_PROGRESS = (1u << 6),
ADC_STATUS_CALIBRATION_EN = (1u << 7),
ADC_STATUS_CALIBRATION_DONE = (1u << 8),
ADC_STATUS_BATTERY_DONE = (1u << 9),
ADC_STATUS_OVERSAMPLING_EN = (1u << 10),
ADC_STATUS_AVGERAGING_EN = (1u << 11),
ADC_STATUS_TEMP_SENSOR_EN = (1u << 12),
ADC_STATUS_TMP_DONE = (1u << 13),
ADC_STATUS_TMP2_DONE = (1u << 14),
} ADC_STATUS;
typedef enum __ADC_FIFO_MODE {
ADC_FIFO_MODE_INIT,
ADC_FIFO_MODE_ENABLED,
ADC_FIFO_MODE_INTERRUPT_PROCESS,
ADC_FIFO_MODE_INTERRUPT_OVERFLOW,
ADC_FIFO_MODE_DMA_BUFFER_PROCESS,
ADC_FIFO_MODE_DMA_INVALID_DESC,
ADC_FIFO_MODE_ABORT
} ADC_FIFO_MODE;
typedef enum __ADC_BUFFER_CONFIG {
ADC_BUFFER_CONFIG_BUFFER_SINGLE_CONV_EN = ((uint32_t)1u << 1u),
ADC_BUFFER_CONFIG_BUFFER_AUTO_MODE_EN = ((uint32_t)1u << 0u),
} ADC_BUFFER_CONFIG;
typedef enum __ADC_BUFFER_STATUS {
ADC_BUFFER_STATUS_OK = ((uint32_t)1u << 0u),
ADC_BUFFER_STATUS_OVERFLOW = ((uint32_t)1u << 1u)
} ADC_BUFFER_STATUS;
typedef struct __ADC_INT_BUFFER {
uint16_t nConfig;
uint16_t nStatus;
ADI_ADC_BUFFER *pUserBuffer;
uint16_t* pCurDataBuffer;
uint32_t nNumSamplesRemaining;
uint32_t nChannels;
} ADC_INT_BUFFER;
typedef struct __ADC_ACTIVE_DATA {
uint32_t nCurChannel;
} ADC_ACTIVE_DATA;
typedef ADI_ADC_RESULT (*ADC_MANAGE_FIFO_FUNC)(struct __ADI_ADC_DEVICE *pDevice, ADC_FIFO_MODE eFifoMode);
typedef struct __ADI_ADC_DEVICE
{
volatile uint32_t nDriverStatus;
ADI_ADC_TypeDef *pReg;
void* pCBParam;
ADI_CALLBACK pfCallback;
ADC_ACTIVE_DATA ActData;
ADC_MANAGE_FIFO_FUNC pfManageFifo;
ADC_INT_BUFFER s_Buffer;
uint8_t ComparitorHi;
uint8_t ComparitorLo;
uint8_t ComparitorHys;
SEM_VAR_DECLR
} ADI_ADC_DEVICE;
typedef struct __ADI_ADC_INFO
{
ADI_ADC_HANDLE hDevice;
ADI_ADC_TypeDef* pReg;
} ADI_ADC_INFO;
#endif /* ADI_ADC_DEF */
/*! \endcond */

60
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adi_callback.h Executable file
View File

@ -0,0 +1,60 @@
/*!
*****************************************************************************
@file: adi_callback.h
@brief: callback APIs.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*****************************************************************************/
#ifndef ADI_CALLBACK_H
#define ADI_CALLBACK_H
#include <stdint.h>
/**
* @brief Device Drivers Callback function definition
*/
typedef void (* ADI_CALLBACK) ( /*!< Callback function pointer */
void *pCBParam, /*!< Client supplied callback param */
uint32_t Event, /*!< Event ID specific to the Driver/Service */
void *pArg); /*!< Pointer to the event specific argument */
#endif /* ADI_CALLBACK_H */

137
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adi_cyclecount.h Executable file
View File

@ -0,0 +1,137 @@
/*
*******************************************************************************
* @brief: Framework to preform cycle count measurements
*
* @details this is a framework for monitoring the cycle counts
* for ISRs and APIs. The framework uses systick.
*******************************************************************************
Copyright(c) 2016 Analog Devices, Inc. All Rights Reserved.
This software is proprietary and confidential. By using this software you agree
to the terms of the associated Analog Devices License Agreement.
******************************************************************************/
#ifndef ADI_CYCLECOUNT_H
#define ADI_CYCLECOUNT_H
#include <stdbool.h>
#include <stdint.h>
#include <adi_cycle_counting_config.h>
/** @addtogroup cyclecount_logging Cycle Counting Framework
* @{
*/
/*!
* 64-bit integer to record cycle counts.
* Since UINT32_MAX = 4,294,967,296 cycles
* at 26 MHz this would allow us to record for 165 seconds
* before the system would wrap around.
* By moving to a 64-bit integer we can record for 11,248 years.
*/
typedef uint64_t adi_cyclecount_t;
/*!
* The systick timer is a 24-bit count down timer
* The initial value can, therefore, be up to 0xFFFFFF
* The larger the value the fewer interrupts that will be taken
* and the less impact cycle counting will have on the system
*/
#define ADI_CYCLECOUNT_SYSTICKS (0xFFFFFFu)
/*!
* Cycle counting nesting is supported via a cycle counting stack. The initial
* value of the stack index is one less than the starting stack
* index (0)
*/
#define ADI_CYCLECOUNT_INITIAL_STACK_INDEX (-1)
/*!
* Cycle Count API function return values.
*/
typedef enum {
ADI_CYCLECOUNT_SUCCESS, /*!< API completed successfully */
ADI_CYCLECOUNT_ADD_ENTITY_FAILURE, /*!< There is not enough space in the cycle counting entity array. Consider increasing the size via the #ADI_CYCLECOUNT_NUMBER_USER_DEFINED_APIS static configuration macro */
ADI_CYCLECOUNT_INVALID_ID, /*!< The API/ISR ID is invalid. */
ADI_CYCLECOUNT_FAILURE /*!< API did not complete successfully. */
} ADI_CYCLECOUNT_RESULT;
/*!
* List of cycle counting IDs for the ISRs and APIs that can record cycle counts.
* Items enumerated here must be aligned with adi_cyclecounting_identifiers
*
* Note that the ID numbering starts at 1. ID==0 is not used.
* Note that the application can extend this list via static configuration (see adi_cycle_counting_config.h) and
* via the adi_cyclecount_addEntity() API.
*/
#define ADI_CYCLECOUNT_ISR_EXT_3 1u /*!< Cycle count ID for EXT3 Interrupt Handler. */
#define ADI_CYCLECOUNT_ISR_UART 2u /*!< Cycle count ID for UART Interrupt Handler. */
#define ADI_CYCLECOUNT_ISR_DMA_UART_TX 3u /*!< Cycle count ID for UART DMA TX Interrupt Handler. */
#define ADI_CYCLECOUNT_ISR_DMA_UART_RX 4u /*!< Cycle count ID for UART DMA RX Interrupt Handler. */
#define ADI_CYCLECOUNT_ISR_TMR_COMMON 5u /*!< Cycle count ID for Timer Interrupt Handler. */
#define ADI_CYCLECOUNT_ISR_RTC 6u /*!< Cycle count ID for RTC Interrupt Handler.*/
#define ADI_CYCLECOUNT_ISR_SPI 7u /*!< Cycle count ID for SPI Interrupt Handler. */
#define ADI_CYCLECOUNT_ISR_CRC 8u /*!< Cycle count ID for CRC Interrupt Handler. */
#define ADI_CYCLECOUNT_ISR_SPORT 9u /*!< Cycle count ID for SPORT Interrupt Handler. */
#define ADI_CYCLECOUNT_ID_COUNT 10u /*!< Number of cycle count ISRs and APIs. Must be one greater than the last ID. */
/*!
* The following are tracked when cycle counting
* Maximum number of cycle counts
* Minimum number of cycle counts
* Average number of cycle counts
*/
typedef struct
{
adi_cyclecount_t max_cycles_adjusted; /*!< Tracks the adjusted max cycle count */
adi_cyclecount_t min_cycles_adjusted; /*!< Tracks the adjusted min cycle count */
adi_cyclecount_t average_cycles_adjusted; /*!< Tracks the adjusted average cycle count */
adi_cyclecount_t max_cycles_unadjusted; /*!< Tracks the unadjusted max cycle count */
adi_cyclecount_t min_cycles_unadjusted; /*!< Tracks the unadjusted min cycle count */
adi_cyclecount_t average_cycles_unadjusted; /*!< Tracks the unadjusted average cycle count */
uint32_t sample_count; /*!< Number of cycle count samples recorded, used to compute the average */
} ADI_CYCLECOUNT_LOG;
/*!
* Cycle counting has to be enabled in the cycle counting configuration file
* If enabled then cycle counting related macros map to the cycle counting APIs.
* If not enabled, then the macros maps to a NOP
*/
#if defined(ADI_CYCLECOUNT_ENABLED) && (ADI_CYCLECOUNT_ENABLED == 1u)
#define ADI_CYCLECOUNT_INITIALIZE() adi_cyclecount_init() /*!< Initialize the cycle counting data structures */
#define ADI_CYCLECOUNT_STORE(id) adi_cyclecount_store(id) /*!< Record the number of cycles for the specified ISR or API */
#define ADI_CYCLECOUNT_REPORT() adi_cyclecount_report() /*!< Generate a cycle counting report */
#else
#define ADI_CYCLECOUNT_INITIALIZE() do{}while(0) /*!< Initialize the cycle counting data structures */
#define ADI_CYCLECOUNT_STORE(id) do{}while(0) /*!< Record the number of cycles for the specified ISR or API */
#define ADI_CYCLECOUNT_REPORT() do{}while(0) /*!< Generate a cycle counting report */
#endif
/* Forward API declarations */
extern ADI_CYCLECOUNT_RESULT adi_cyclecount_start(void);
extern ADI_CYCLECOUNT_RESULT adi_cyclecount_stop(void);
extern adi_cyclecount_t adi_cyclecount_get(void);
extern ADI_CYCLECOUNT_RESULT adi_cyclecount_store(uint32_t id);
extern void adi_cyclecount_init(void);
extern void adi_cyclecount_report(void);
extern ADI_CYCLECOUNT_RESULT adi_cyclecount_addEntity(const char *EntityName, uint32_t *pid);
/**@}*/
#endif /* ADI_CYCLECOUNT_H */

67
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adi_processor.h Executable file
View File

@ -0,0 +1,67 @@
/*!
*****************************************************************************
* @file: adi_processor.h
* @brief: Include appropriate CMSIS device header.
*-----------------------------------------------------------------------------
*
Copyright (c) 2010-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
#ifndef __ADI_PROCESSOR_H__
#define __ADI_PROCESSOR_H__
/* Default to ADuCM4050 if no processor macro is defined. */
#if !defined(__ADUCM4050__)
#define __ADUCM4050__
#endif
/* Define a family macro */
#if !defined(__ADUCM4x50__)
#define __ADUCM4x50__
#endif
/* Include CMSIS device header for selected target processor. */
#if defined(__ADUCM4050__)
#include <ADuCM4050.h>
#endif
#endif /* __ADI_PROCESSOR_H__ */

18
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adi_types.h Executable file
View File

@ -0,0 +1,18 @@
#ifndef __ADI_TYPES_H__
#define __ADI_TYPES_H__
/* obtain integer types ... */
#include <stdint.h>
/* obtain boolean types ... */
#include <stdbool.h>
/* define required types that are not provided by stdint.h or stdbool.h ... */
typedef bool bool_t;
typedef char char_t;
typedef float float32_t;
#if !defined(__NO_FLOAT64)
typedef long double float64_t;
#endif
#endif /* __ADI_TYPES_H__ */

63
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adi_version.h Executable file
View File

@ -0,0 +1,63 @@
/*!
*****************************************************************************
* @file: adi_version.h
* @brief: Version macros for ADI ADuCMxxx Device Series
*-----------------------------------------------------------------------------
*
Copyright (c) 2010-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
#ifndef __ADI_VERSION_H__
#define __ADI_VERSION_H__
/* use a 32-bit versioning scheme that supports numerical compares */
#define ADI_VERSION_MAJOR 1u /* must be <= 255 */
#define ADI_VERSION_MINOR 0u /* must be <= 255 */
#define ADI_VERSION_BUILD 0u /* must be <= 255 */
#define ADI_VERSION_PATCH 0u /* must be <= 255 */
#define ADI_CONSTRUCT_VERSION(a,b,c,d) (((a) << 24u) | ((b) << 16u) | ((c) << 8u) | (d))
/* known versions */
#define ADI_VERSION_1_0_0_0 ADI_CONSTRUCT_VERSION(1u,0u,0u,0u)
/* test current version against known predefines (see SystemInit() example in system.c) */
#define ADI_VERSION_CURRENT ADI_CONSTRUCT_VERSION(ADI_VERSION_MAJOR, ADI_VERSION_MINOR, ADI_VERSION_BUILD, ADI_VERSION_PATCH)
#endif /* __ADI_VERSION_H__ */

751
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/beep/adi_beep.c Executable file
View File

@ -0,0 +1,751 @@
/*! *****************************************************************************
* @file: adi_beep.c
* @brief: BEEP device driver global file.
* @details: This a global file which includes a specific file based on the processor family.
* This included file will be containing BEEP device driver functions.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#include <adi_processor.h>
#include <stddef.h>
#include <assert.h>
#include <drivers/beep/adi_beep.h>
#include <rtos_map/adi_rtos_map.h>
#include "adi_beep_def.h"
/** @addtogroup BEEP_Driver BEEP Driver
* @{
* @brief Beeper Driver
* @note The application must include drivers/beep/adi_beep.h to use this driver.
*/
#ifdef __ICCARM__
/*
* IAR MISRA C 2004 error suppressions.
*
* Pm123 (rule 8.5): there shall be no definition of objects or functions in a header file
* This isn't a header as such.
*
* Pm073 (rule 14.7): a function should have a single point of exit.
* Pm143 (rule 14.7): a function should have a single point of exit at the end of the function.
* Multiple returns are used for error handling.
*
* Pm050 (rule 14.2): a null statement shall only occur on a line by itself
* Needed for null expansion of ADI_INSTALL_HANDLER and others.
*
* Pm140 (rule 11.3): a cast should not be performed between a pointer type and an integral type
* Required for MMR addresses and callback parameters.
*
* Pm031: (MISRA C 2004 rule 12.7) bitwise operations shall not be performed on signed integer types
* Required for MMR manipulations.
*
* Pm152: (MISRA C 2004 rule 17.4) array indexing shall only be applied to objects defined as an array type
* Required for adi_beep_PlaySequence() to access the user-supplied array of notes.
*
* Pm141: (MISRA C 2004 rule 11.4) a cast should not be performed between a pointer to object type and a
* different pointer to object type, this casts from type.
* Required to store a an array of varying size in a device structure.
*
* Required for adi_beep_PlaySequence() to access the user-supplied array of notes.
*/
#pragma diag_suppress=Pm123,Pm073,Pm143,Pm050,Pm140,Pm031,Pm152,Pm141
#endif /* __ICCARM__ */
/*========== D A T A ==========*/
static ADI_BEEP_DRIVER adi_beep_Device[1];
/*! \cond PRIVATE */
/* Handler for the BEEP interrupt */
void Beep_Int_Handler(void);
/* debug handle checker */
#ifdef ADI_DEBUG
#define ADI_BEEP_INVALID_HANDLE(h) (&adi_beep_Device[0] != (h))
#endif
/* definition for the BEEP IRQ - there is only ever one instance of the
* BEEP driver, so reducing space by using a #define rather than including
* it in the device structure. */
#define BEEP_IRQ (BEEP_EVT_IRQn)
#if ADI_BEEP_CFG_SEQUENCE_REPEAT_VALUE == 0
/* A single note is requested. Only enable the AEND int. */
#define INTERRUPT_ON_SEQEND (0)
#define INTERRUPT_ON_AEND (1)
#else
/* A two-tone sequence is requested. Only enable the SEQEND int. */
#define INTERRUPT_ON_SEQEND (1)
#define INTERRUPT_ON_AEND (0)
#endif
/*! \endcond */
static const ADI_BEEP_STATIC_INIT gBeeperStaticConfigData[ADI_BEEP_MAX_DEVID] = {
/* single instance of Beeper device */
{
/* configuration register */
( (INTERRUPT_ON_SEQEND << BITP_BEEP_CFG_SEQATENDIRQ)
| (INTERRUPT_ON_AEND << BITP_BEEP_CFG_AENDIRQ)
| (ADI_BEEP_CFG_SEQUENCE_REPEAT_VALUE << BITP_BEEP_CFG_SEQREPEAT)
),
/* Status register (interrupt clears) */
(ADI_BEEP_ALL_INTERRUPTS),
/* ToneA control register */
( ((uint32_t)ADI_BEEP_TONEA_DISABLE << BITP_BEEP_TONEA_DIS)
| ((uint32_t)ADI_BEEP_TONEA_FREQUENCY << BITP_BEEP_TONEA_FREQ)
| ((uint32_t)ADI_BEEP_TONEA_DURATION << BITP_BEEP_TONEA_DUR)
),
/* ToneB control register */
( ((uint32_t)ADI_BEEP_TONEB_DISABLE << BITP_BEEP_TONEB_DIS)
| ((uint32_t)ADI_BEEP_TONEB_FREQUENCY << BITP_BEEP_TONEB_FREQ)
| ((uint32_t)ADI_BEEP_TONEB_DURATION << BITP_BEEP_TONEB_DUR)
)
}
};
/*! \endcond */
/*!
* @brief BEEP Initialization
*
* @param[in] DeviceNum Integer specifying the ID of Beeper to use.
* @param[in] pMemory Pointer to the memory to be used by the driver.
* Size of the memory should be at least #ADI_BEEP_MEMORY_SIZE bytes.
* @param[in] MemorySize Size of the memory passed in pMemory parameter.
* @param[out] phDevice Pointer to a location that the device data pointer
* will be written upon successful initialization.
*
* @return Status
* - #ADI_BEEP_SUCCESS Success: BEEP device driver initialized successfully.
* - #ADI_BEEP_SEMAPHORE_FAILED The BEEP sempahore could not be created.
* - #ADI_BEEP_ALREADY_INITIALIZED [D] The BEEP is already initialized.
* - #ADI_BEEP_NULL_PTR [D] Null pointer.
* - #ADI_BEEP_BAD_DEV_ID [D] The device number is invalid.
*
* Initialize the BEEP device for use. The core NVIC BEEP interrupt is enabled. This API
* must preceed all other beeper API calls and the handle returned must be passed to all other beeper API
* calls.
*
*
* @note The contents of \a phDevice will be set to NULL upon failure.\n\n
*
* @note The BEEP device driver will clear all pending interrupts and disable all beeper
* interrupts during beeper device initialization.
*
* @note CALLBACKS: If a callback is registered, it will be called on
* completion of the note or sequence. The "Event" parameter will
* contain which event occurred, either ADI_BEEP_INTERRUPT_SEQUENCE_END
* or ADI_BEEP_INTERRUPT_NOTE_END.
*
* @warning This API will put the beeper in preconfigured mode as defined in
* adi_beep_config.h file.
* Refer adi_beep_config.h file to see which all features can be preconfigured.
*
* @sa adi_beep_Close().
*/
ADI_BEEP_RESULT adi_beep_Open(ADI_BEEP_DEV_ID const DeviceNum,
void* const pMemory,
uint32_t const MemorySize,
ADI_BEEP_HANDLE* const phDevice)
{
ADI_BEEP_DRIVER *pDevice;
ADI_BEEP_DEV_DATA *pData;
/* store a bad handle in case of failure */
*phDevice = (ADI_BEEP_HANDLE) NULL;
#ifdef ADI_DEBUG
if (DeviceNum >= ADI_BEEP_MAX_DEVID)
{
return ADI_BEEP_BAD_DEV_ID;
}
if (pMemory == NULL)
{
return ADI_BEEP_NULL_PTR;
}
assert (MemorySize >= sizeof(ADI_BEEP_DRIVER));
#endif
/* local pointer to instance data */
pDevice = &adi_beep_Device[DeviceNum];
pDevice->pReg = pADI_BEEP0;
pDevice->pData = (ADI_BEEP_DEV_DATA*)pMemory;
pData = pDevice->pData;
#ifdef ADI_DEBUG
if (ADI_BEEP_STATE_UNINITIALIZED != adi_beep_Device[DeviceNum].pData->state)
{
return ADI_BEEP_ALREADY_INITIALIZED;
}
#endif
pData->cbFunc = NULL;
pData->cbParam = NULL;
SEM_CREATE(pDevice->pData, "BEEP_SEM", ADI_BEEP_SEMAPHORE_FAILED);
/* set statically configured initialization data */
ADI_BEEP_STATIC_INIT const* pInitData = &gBeeperStaticConfigData[DeviceNum];
ADI_BEEP_TypeDef *pReg = pDevice->pReg;
pReg->CFG = pInitData->BEEP_CFG;
pReg->STAT = pInitData->BEEP_STAT;
pReg->TONEA = pInitData->BEEP_TONEA;
pReg->TONEB = pInitData->BEEP_TONEB;
/* enable beeper interrupts in NVIC */
NVIC_EnableIRQ(BEEP_IRQ);
/* mark driver initialized */
pData->state = ADI_BEEP_STATE_INITIALIZED;
/* store handle at application handle pointer */
*phDevice = (ADI_BEEP_HANDLE)pDevice;
return ADI_BEEP_SUCCESS; /* initialized */
}
/*!
* @brief Uninitialize and deallocate a BEEP device.
*
* @param[in] hDevice Device handle obtained from #adi_beep_Open().
*
* @return Status
* - #ADI_BEEP_SUCCESS Success: Call completed successfully.
* - #ADI_BEEP_BAD_DEV_HANDLE [D] Error: Invalid device handle parameter.
* - #ADI_BEEP_NOT_INITIALIZED [D] Error: Device has not been initialized for use, see #adi_beep_Open().
*
* Uninitialize and release an allocated BEEP device for other use. The core NVIC BEEP interrupt is disabled.
*
* @sa adi_beep_Open().
*/
ADI_BEEP_RESULT adi_beep_Close(ADI_BEEP_HANDLE const hDevice)
{
ADI_BEEP_DRIVER *pDevice;
ADI_BEEP_DEV_DATA *pData;
ADI_BEEP_TypeDef *pReg;
pDevice = (ADI_BEEP_DRIVER*)hDevice;
pData = pDevice->pData;
pReg = pDevice->pReg;
#ifdef ADI_DEBUG
if (ADI_BEEP_INVALID_HANDLE(hDevice))
{
return ADI_BEEP_BAD_DEV_HANDLE;
}
if (ADI_BEEP_STATE_UNINITIALIZED == pData->state)
{
return ADI_BEEP_NOT_INITIALIZED;
}
#endif
/* uninitialize */
NVIC_DisableIRQ(BEEP_IRQ);
pData->state = ADI_BEEP_STATE_UNINITIALIZED;
pData->cbFunc = NULL;
pReg->CFG = 0u;
pReg->STAT = 0u;
pReg->TONEA = 0u;
pReg->TONEB = 0u;
SEM_DELETE(pDevice->pData, ADI_BEEP_SEMAPHORE_FAILED);
return ADI_BEEP_SUCCESS;
}
/*!
* @brief Register a callback for the beeper driver.
*
* @param[in] hDevice Device handle obtained from #adi_beep_Open().
* @param[in] pfCallback The application supplied callback which will be called to notify device
* related events.
* @param[in] pCBParam The application supplied callback parameter which can be passed back in
* the callback function.
*
* @return Status
* - #ADI_BEEP_SUCCESS Call completed successfully.
* - #ADI_BEEP_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_BEEP_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_beep_Open().
*
* Registers a callback for the beeper interrupts. When an interrupt occurs, the
* driver will handle any required interaction with the hardware and then call
* the registered callback.
*
* @sa adi_beep_Open().
*/
ADI_BEEP_RESULT adi_beep_RegisterCallback(ADI_BEEP_HANDLE const hDevice,
ADI_CALLBACK pfCallback,
void* const pCBParam)
{
ADI_BEEP_DRIVER *pDevice = (ADI_BEEP_DRIVER*)hDevice;
ADI_INT_STATUS_ALLOC();
#ifdef ADI_DEBUG
if (ADI_BEEP_INVALID_HANDLE(hDevice)) {
return ADI_BEEP_BAD_DEV_HANDLE;
}
if (ADI_BEEP_STATE_UNINITIALIZED == pDevice->pData->state) {
return ADI_BEEP_NOT_INITIALIZED;
}
#endif
/* Assign the callback within a critical region. */
ADI_ENTER_CRITICAL_REGION();
pDevice->pData->cbFunc = pfCallback;
pDevice->pData->cbParam = pCBParam;
ADI_EXIT_CRITICAL_REGION();
return ADI_BEEP_SUCCESS;
}
#if ADI_BEEP_INCLUDE_PLAY_SEQUENCE == 1
/*!
* @brief Play a beeper tone sequence.
*
* @param[in] hDevice Device handle obtained from #adi_beep_Open().
* @param[in] aSequence The sequence of notes to be played by the beeper.
* @param[in] count The number of notes in the sequence, must be a multiple
* of two, and a maximum size of 254 notes.
*
* @return Status
* - #ADI_BEEP_SUCCESS Success: Call completed successfully.
* - #ADI_BEEP_INVALID_COUNT Sequence count must be multiples of two.
* - #ADI_BEEP_NULL_PTR [D] Null pointer.
* - #ADI_BEEP_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_BEEP_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_beep_Open().
*
* Programs the A/B tone pair to play a sequence of notes. The sequnce can be
* stopped by calling adi_beep_Enable(..., false). The beeper will be enabled
* and disabled internally by the driver. This code, and supporting data, can
* be removed by setting ADI_BEEP_INCLUDE_PLAY_SEQUENCE == 0 in the
* adi_beep_config.h configuration file.
*
* @sa adi_beep_Open().
* @sa adi_beep_Enable()
*/
ADI_BEEP_RESULT adi_beep_PlaySequence(ADI_BEEP_HANDLE const hDevice,
ADI_BEEP_NOTE aSequence[],
uint8_t count)
{
ADI_BEEP_DRIVER *pDevice = (ADI_BEEP_DRIVER*)hDevice;
ADI_BEEP_TypeDef *pReg = pDevice->pReg;
uint16_t nSeqCnt = 0u;
ADI_INT_STATUS_ALLOC();
#ifdef ADI_DEBUG
if (ADI_BEEP_INVALID_HANDLE(hDevice)) {
return ADI_BEEP_BAD_DEV_HANDLE;
}
if (ADI_BEEP_STATE_UNINITIALIZED == pDevice->pData->state) {
return ADI_BEEP_NOT_INITIALIZED;
}
if (NULL == aSequence) {
return ADI_BEEP_NULL_PTR;
}
/* The sequence count must be a multiple of two, be greater than 1
* and must be a maximum of (127 * 2) notes in length. The hardware supports a
* sequence of up to 127, and there are two notes associated with that. */
if (((127u * 2u) < count) ||
((count % 2u) != 0u) ||
(count < 2u)) {
return ADI_BEEP_INVALID_COUNT;
}
#endif
/* Two notes are loaded at a time, and the sequence count refers to
* the number of times that both tone registers should be played. */
nSeqCnt = ((uint16_t)count) >> 1u;
ADI_ENTER_CRITICAL_REGION();
/* make a hole, and disable the beeper */
pReg->CFG &= (uint16_t)~(BITM_BEEP_CFG_SEQREPEAT | BITM_BEEP_CFG_AENDIRQ | BITM_BEEP_CFG_EN);
pReg->TONEA = ( (uint16_t)((uint16_t)aSequence[0].frequency << ADI_BEEP_TONE_FREQ_BITPOS)
|(uint16_t)((uint16_t)aSequence[0].duration << ADI_BEEP_TONE_DUR_BITPOS) );
pReg->TONEB = ( (uint16_t)((uint16_t)aSequence[1].frequency << ADI_BEEP_TONE_FREQ_BITPOS)
|(uint16_t)((uint16_t)aSequence[1].duration << ADI_BEEP_TONE_DUR_BITPOS) );
/* program new sequence count, while preserving everything else */
pReg->CFG |= (BITM_BEEP_CFG_EN |
BITM_BEEP_CFG_BSTARTIRQ |
BITM_BEEP_CFG_SEQATENDIRQ |
(uint16_t)((uint16_t)(nSeqCnt) << BITP_BEEP_CFG_SEQREPEAT));
pDevice->pData->pSeqArray = (ADI_BEEP_NOTE(*)[])aSequence;
pDevice->pData->nSeqMax = count;
pDevice->pData->nSeqIndex = 2u;
/* We're now playing, but not blocked */
pDevice->pData->state |= (ADI_BEEP_STATE_PLAYING);
ADI_EXIT_CRITICAL_REGION();
return ADI_BEEP_SUCCESS;
}
#endif
/*!
* @brief Play a single note/beep.
*
* @param[in] hDevice Device handle obtained from #adi_beep_Open().
* @param[in] note The note to play.
*
* @return Status
* - #ADI_BEEP_SUCCESS Success: Call completed successfully.
* - #ADI_BEEP_BAD_DEV_HANDLE [D] Error: Invalid device handle parameter.
* - #ADI_BEEP_NOT_INITIALIZED [D] Error: Device has not been initialized for use, see #adi_beep_Open().
*
* Programs the A tone to play a single note.
*
* @sa adi_beep_Open().
*/
ADI_BEEP_RESULT adi_beep_PlayNote(ADI_BEEP_HANDLE const hDevice,
ADI_BEEP_NOTE note)
{
ADI_BEEP_DRIVER *pDevice;
ADI_BEEP_TypeDef *pReg;
ADI_INT_STATUS_ALLOC();
pDevice = (ADI_BEEP_DRIVER*)hDevice;
pReg = pDevice->pReg;
#ifdef ADI_DEBUG
if (ADI_BEEP_INVALID_HANDLE(hDevice)) {
return ADI_BEEP_BAD_DEV_HANDLE;
}
if (ADI_BEEP_STATE_UNINITIALIZED == pDevice->pData->state) {
return ADI_BEEP_NOT_INITIALIZED;
}
#endif
ADI_ENTER_CRITICAL_REGION();
/* Clear any previous sequence setup, and disable the beeper */
pReg->CFG &= (uint16_t)~(BITM_BEEP_CFG_SEQREPEAT | BITM_BEEP_CFG_EN);
/* Set Tone A */
pReg->TONEA = ( (uint16_t)((uint16_t)note.frequency << ADI_BEEP_TONE_FREQ_BITPOS)
|(uint16_t)((uint16_t)note.duration << ADI_BEEP_TONE_DUR_BITPOS) );
/* program new sequence count, while preserving everything else */
pReg->CFG |= (BITM_BEEP_CFG_EN | BITM_BEEP_CFG_AENDIRQ);
/* We're now playing but not blocked */
pDevice->pData->state |= (ADI_BEEP_STATE_PLAYING);
ADI_EXIT_CRITICAL_REGION();
return ADI_BEEP_SUCCESS;
}
/*!
* @brief Play a a repeating two-tone beep. Similar to an alarm.
*
* @param[in] hDevice Device handle obtained from #adi_beep_Open().
* @param[in] noteA The note to play first.
* @param[in] noteB The note to play second.
* @param[in] count The number of times to repeat the two-note signal,
* maximum of 127.
*
*
* @return Status
* - #ADI_BEEP_SUCCESS Success: Call completed successfully.
* - #ADI_BEEP_BAD_DEV_HANDLE [D] Error: Invalid device handle parameter.
* - #ADI_BEEP_NOT_INITIALIZED [D] Error: Device has not been initialized for use, see #adi_beep_Open().
*
* Programs the beeper to play a repeating two-tone signal.
* The count argument refers to the number of iterations of both notes, not
* just a single note.
*
* @sa adi_beep_Open().
* @sa adi_beep_PlayNote().
* @sa adi_beep_PlayNSequence().
*/
ADI_BEEP_RESULT adi_beep_PlayTwoTone(ADI_BEEP_HANDLE const hDevice,
ADI_BEEP_NOTE noteA,
ADI_BEEP_NOTE noteB,
uint8_t count)
{
ADI_BEEP_DRIVER *pDevice;
ADI_BEEP_TypeDef *pReg;
ADI_INT_STATUS_ALLOC();
pDevice = (ADI_BEEP_DRIVER*)hDevice;
pReg = pDevice->pReg;
#ifdef ADI_DEBUG
if (ADI_BEEP_INVALID_HANDLE(hDevice)) {
return ADI_BEEP_BAD_DEV_HANDLE;
}
if (ADI_BEEP_STATE_UNINITIALIZED == pDevice->pData->state) {
return ADI_BEEP_NOT_INITIALIZED;
}
#endif
ADI_ENTER_CRITICAL_REGION();
/* make a hole, and disable the beeper */
pReg->CFG &= (uint16_t)~(BITM_BEEP_CFG_SEQREPEAT | BITM_BEEP_CFG_AENDIRQ |BITM_BEEP_CFG_EN);
pReg->TONEA = ( (uint16_t)((uint16_t)noteA.frequency << ADI_BEEP_TONE_FREQ_BITPOS)
|(uint16_t)((uint16_t)noteA.duration << ADI_BEEP_TONE_DUR_BITPOS) );
pReg->TONEB = ( (uint16_t)((uint16_t)noteB.frequency << ADI_BEEP_TONE_FREQ_BITPOS)
|(uint16_t)((uint16_t)noteB.duration << ADI_BEEP_TONE_DUR_BITPOS) );
/* program new sequence count, while preserving everything else */
pReg->CFG |= (BITM_BEEP_CFG_EN | BITM_BEEP_CFG_SEQATENDIRQ |(uint16_t)((uint16_t)count << BITP_BEEP_CFG_SEQREPEAT));
/* We're now playing but not blocked */
pDevice->pData->state |= (ADI_BEEP_STATE_PLAYING);
ADI_EXIT_CRITICAL_REGION();
return ADI_BEEP_SUCCESS;
}
/*!
* @brief Enable or disable the beeper. Other APIs will automatically enable the beeper if required,
* so this function is best used in the following situations:
* - when only using static configuration, i.e. start playing the notes
* set up in static adi_beep_config.h.
* - Otherwise, this can be used to stop the beeper during playback,
* when started from any other API.
*
* @param[in] hDevice Device handle obtained from #adi_beep_Open().
* @param[in] bFlag true to enable the device, false to stop playback.
*
* @return Status
* - #ADI_BEEP_SUCCESS Success: Call completed successfully.
* - #ADI_BEEP_BAD_DEV_HANDLE [D] Error: Invalid device handle parameter.
* - #ADI_BEEP_NOT_INITIALIZED [D] Error: Device has not been initialized for use, see #adi_beep_Open().
*
* @sa adi_beep_Open().
*/
ADI_BEEP_RESULT adi_beep_Enable(ADI_BEEP_HANDLE const hDevice, bool const bFlag)
{
ADI_BEEP_DRIVER *pDevice;
ADI_BEEP_TypeDef *pReg;
ADI_INT_STATUS_ALLOC();
pDevice = (ADI_BEEP_DRIVER*)hDevice;
pReg = pDevice->pReg;
#ifdef ADI_DEBUG
if (ADI_BEEP_INVALID_HANDLE(hDevice)) {
return ADI_BEEP_BAD_DEV_HANDLE;
}
if (ADI_BEEP_STATE_UNINITIALIZED == pDevice->pData->state) {
return ADI_BEEP_NOT_INITIALIZED;
}
#endif
ADI_ENTER_CRITICAL_REGION();
if (bFlag == true) {
/* All the registers should already be set - just enable the beep */
pReg->CFG |= BITM_BEEP_CFG_EN;
pDevice->pData->state |= (ADI_BEEP_STATE_PLAYING);
}
else {
pReg->CFG &= (uint16_t)~(BITM_BEEP_CFG_EN);
pDevice->pData->state &= ~(ADI_BEEP_STATE_PLAYING);
}
ADI_EXIT_CRITICAL_REGION();
return ADI_BEEP_SUCCESS;
}
/*!
* @brief Wait for the current playback to finish. This is a blocking call,
* that will not return until the current playback (if any) has finished.
* If there is no current playback, it will return immediately.
*
* @param[in] hDevice Device handle obtained from #adi_beep_Open().
*
* @return Status
* - #ADI_BEEP_SUCCESS Success: Call completed successfully.
* - #ADI_BEEP_FAILURE Error: Semaphore failure.
* - #ADI_BEEP_BAD_DEV_HANDLE [D] Error: Invalid device handle parameter.
* - #ADI_BEEP_NOT_INITIALIZED [D] Error: Device has not been initialized for use, see #adi_beep_Open().
*
* @sa adi_beep_Open().
*/
ADI_BEEP_RESULT adi_beep_Wait(ADI_BEEP_HANDLE const hDevice)
{
ADI_BEEP_DRIVER *pDevice;
bool wait = false;
ADI_INT_STATUS_ALLOC();
pDevice = (ADI_BEEP_DRIVER*)hDevice;
#ifdef ADI_DEBUG
if (ADI_BEEP_INVALID_HANDLE(hDevice)) {
return ADI_BEEP_BAD_DEV_HANDLE;
}
if (ADI_BEEP_STATE_UNINITIALIZED == pDevice->pData->state) {
return ADI_BEEP_NOT_INITIALIZED;
}
#endif
ADI_ENTER_CRITICAL_REGION();
if((pDevice->pData->state | ADI_BEEP_STATE_PLAYING) > 0u) {
/* We are going to pend on the semaphore, no matter what. */
pDevice->pData->state |= ADI_BEEP_STATE_BLOCKED;
wait = true;
}
ADI_EXIT_CRITICAL_REGION();
if(wait == true) {
/* Wait for the completion interrupt to post */
SEM_PEND(pDevice->pData, ADI_BEEP_SEMAPHORE_FAILED);
}
return ADI_BEEP_SUCCESS;
}
/*! \cond PRIVATE */
/*! @brief BEEP device driver interrupt handler. Overrides weakly-bound
* default interrupt handler in the startup file. */
void Beep_Int_Handler(void)
{
ISR_PROLOG();
#if ADI_BEEP_INCLUDE_PLAY_SEQUENCE == 1
ADI_BEEP_DEV_DATA *pData;
ADI_BEEP_NOTE noteA, noteB;
#endif
ADI_BEEP_DRIVER *pDevice = &adi_beep_Device[ADI_BEEP_DEVID_0]; /* so far, there is only one BEEP, so this is safe */
ADI_BEEP_TypeDef *pReg = pDevice->pReg;
uint16_t fired = ADI_BEEP_ALL_INTERRUPTS;
register uint16_t candidate;
/* Make sure our driver is up and running. */
if (ADI_BEEP_STATE_UNINITIALIZED != pDevice->pData->state) {
/* read both status and mask registers */
candidate = pReg->CFG & ADI_BEEP_ALL_INTERRUPTS; /* Take the fired interrupts */
fired = candidate; /* ...and a copy. */
candidate = candidate & pReg->STAT; /* ...and remove the unused set interrupt bits */
/* From this driver's perspective, there are only two states
* to watch for - finished playing, or continuing the playing sequence.
* Finished will be handled here. */
if((candidate & (BITM_BEEP_CFG_SEQATENDIRQ | BITM_BEEP_CFG_AENDIRQ)) > 0u) {
/* If we are blocked, unblock by posting the semaphore */
if((pDevice->pData->state | ADI_BEEP_STATE_BLOCKED) > 0u) {
SEM_POST(pDevice->pData);
}
/* Reset the device playing status. */
pDevice->pData->state &= ~(ADI_BEEP_STATE_PLAYING | ADI_BEEP_STATE_BLOCKED);
/* ...and disable the device. */
pReg->CFG &= (uint16_t)(~(BITM_BEEP_CFG_EN));
/* forward the interrupt to the user if they are watching it and it has fired */
/* pass the interrupt as the event. */
if (pDevice->pData->cbFunc != NULL) {
pDevice->pData->cbFunc (pDevice->pData->cbParam, (uint32_t)candidate, NULL);
}
}
#if ADI_BEEP_INCLUDE_PLAY_SEQUENCE == 1
/* The second state is if we are playing a longer sequence, so this
* interrupt may be to move the sequence along. */
if ((BITM_BEEP_CFG_BSTARTIRQ & candidate) != 0u) {
/* Get a local copy of data, to shorten the following code. */
pData = pDevice->pData;
/* If there's still data to play */
if(pData->nSeqIndex < pData->nSeqMax) {
/* Move the sequence along.*/
noteA = (*pData->pSeqArray)[pData->nSeqIndex];
pData->nSeqIndex++;
noteB = (*pData->pSeqArray)[pData->nSeqIndex];
pData->nSeqIndex++;
/* Any values written will not impact the current tones,
* they will take effect after the current tone is completed */
pReg->TONEA = ( (uint16_t)((uint16_t)noteA.frequency << ADI_BEEP_TONE_FREQ_BITPOS)
| (uint16_t)((uint16_t)noteA.duration << ADI_BEEP_TONE_DUR_BITPOS) );
pReg->TONEB = ( (uint16_t)((uint16_t)noteB.frequency << ADI_BEEP_TONE_FREQ_BITPOS)
| (uint16_t)((uint16_t)noteB.duration << ADI_BEEP_TONE_DUR_BITPOS) );
}
}
#endif
}
/* clear the watched interrupt(s) that fired */
pReg->STAT |= (uint16_t)(fired & ADI_BEEP_ALL_INTERRUPTS); /* only write allowed interrupt bits */
ISR_EPILOG();
}
/*! \endcond */
/*@}*/

128
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/beep/adi_beep_def.h Executable file
View File

@ -0,0 +1,128 @@
/*!
*****************************************************************************
* @file: adi_beep_def.h
* @brief: BEEP Device Driver definition
*-----------------------------------------------------------------------------
*
* Copyright (c) 2016 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
* TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
* PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
#ifndef _ADI_BEEP_DEF_H_
#define _ADI_BEEP_DEF_H_
/*! \cond PRIVATE */
#include <drivers/beep/adi_beep.h>
/*!
*****************************************************************************
* An interrupt mask covering all Beeper interrupts.
*****************************************************************************/
#define ADI_BEEP_ALL_INTERRUPTS ( BITM_BEEP_CFG_SEQATENDIRQ \
| BITM_BEEP_CFG_SEQNEARENDIRQ \
| BITM_BEEP_CFG_BENDIRQ \
| BITM_BEEP_CFG_BSTARTIRQ \
| BITM_BEEP_CFG_AENDIRQ \
| BITM_BEEP_CFG_ASTARTIRQ)
#define ADI_BEEP_TONE_DISABLE (BITM_BEEP_TONEA_DIS) /*!< Beeper tone disable bit */
#define ADI_BEEP_TONE_FREQ_BITPOS (BITP_BEEP_TONEA_FREQ) /*!< Beeper tone frequency bitfield position */
#define ADI_BEEP_TONE_DUR_BITPOS (BITP_BEEP_TONEA_DUR) /*!< Beeper tone duration bitfield position */
#define ADI_BEEP_TONE_FREQ_MASK (BITM_BEEP_TONEA_FREQ) /*!< Beeper tone frequency bitfield mask */
#define ADI_BEEP_TONE_DUR_MASK (BITM_BEEP_TONEA_DUR) /*!< Beeper tone duration bitfield mask */
/*!
*****************************************************************************
* ADI_BEEP_STATE
*
* BEEP driver state. Used for internal tracking of the BEEP device initialization
* progress during the adi_beep_Open(). Also used to insure the BEEP device has been
* properly initialized as a prerequisite to using the balance of the BEEP API.
*
*****************************************************************************/
typedef uint8_t ADI_BEEP_STATE;
#define ADI_BEEP_STATE_UNINITIALIZED 0u /*!< BEEP is not initialized. */
#define ADI_BEEP_STATE_INITIALIZED (1u << 1u) /*!< BEEP is initialized. */
#define ADI_BEEP_STATE_PLAYING (1u << 2u) /*!< BEEP is currently playing. */
#define ADI_BEEP_STATE_BLOCKED (1u << 3u) /*!< BEEP has blocked, waiting completion. */
/*!
* \struct ADI_BEEP_DEV_DATA
* Beeper device internal instance data structure.
*/
typedef struct _ADI_BEEP_DEV_DATA
{
volatile ADI_BEEP_STATE state; /*!< Device state */
ADI_CALLBACK cbFunc; /*!< Callback function */
void *cbParam; /*!< Callback parameter */
#if ADI_BEEP_INCLUDE_PLAY_SEQUENCE == 1
ADI_BEEP_NOTE (*pSeqArray)[]; /*!< Pointer to a user-allocated array of notes. */
volatile uint8_t nSeqIndex; /*!< Index for incrementing sequence */
uint8_t nSeqMax; /*!< Size of the sequence */
#endif
SEM_VAR_DECLR
} ADI_BEEP_DEV_DATA;
/*! \struct ADI_BEEP_DRIVER_STRUCT
* BEEP Device Structure
*/
typedef struct _ADI_BEEP_DRIVER_STRUCT
{
ADI_BEEP_TypeDef *pReg; /*!< Pointer to register base */
ADI_BEEP_DEV_DATA *pData; /*!< Pointer to device data structure */
} ADI_BEEP_DRIVER_STRUCT;
/*! \struct ADI_BEEP_STATIC_INIT
* conditionally create static initialization data based on adi_beep_config.h settings
*/
typedef struct {
uint16_t BEEP_CFG; /*!< Beeper configuration register */
uint16_t BEEP_STAT; /*!< Beeper status register */
uint16_t BEEP_TONEA; /*!< Beeper ToneA register */
uint16_t BEEP_TONEB; /*!< Beeper ToneB register */
} ADI_BEEP_STATIC_INIT;
/* alias for the actual device structure */
typedef ADI_BEEP_DRIVER_STRUCT ADI_BEEP_DRIVER;
/*! \endcond */
#endif /* _ADI_BEEP_DEF_H_ */

127
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/common.h Executable file
View File

@ -0,0 +1,127 @@
/*!
*****************************************************************************
* @file: common.h
* @brief: Common include file for all example
*-----------------------------------------------------------------------------
*
Copyright (c) 2010-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
#ifndef COMMON_H
#define COMMON_H
#ifdef __ICCARM__
/*
* Pm106 (rule 20.9): the input/output library <stdio.h> shall not be used in
production code
* The purpose of this header is to provide I/O facilities based on stdio.
*/
#pragma diag_suppress=Pm106
#endif /* __ICCARM__ */
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <stddef.h>
#include <string.h>
#ifdef __ICCARM__
/*
* IAR MISRA C 2004 error suppressions.
*
* Pm011 (rule 6.3): The basic types of char, int, short, long, float shall not be used.
* Pm064 (rule 16.1): functions with variable number of arguments shall not be used.
*/
#pragma diag_suppress=Pm011,Pm064
#endif /* __ICCARM__ */
#ifdef __cplusplus
extern "C" {
#endif
/* Enable REDIRECT_OUTPUT_TO_UART to send the output to UART terminal. */
/* #define REDIRECT_OUTPUT_TO_UART */
extern char aDebugString[150];
#ifdef __ICCARM__
/*
* Pm154 (rule 19.10): in the definition of a function-like macro, each instance
* of a parameter shall be enclosed in parentheses
* The __VA_ARGS__ macro cannot be enclosed in parentheses.
*/
#pragma diag_suppress=Pm154
#endif /* __ICCARM__ */
#define DEBUG_MESSAGE(...) \
do { \
sprintf(aDebugString,__VA_ARGS__); \
common_Perf(aDebugString); \
} while(0)
#ifdef __ICCARM__
#pragma diag_default=Pm154
#endif /* __ICCARM__ */
#define DEBUG_RESULT(s,result,expected_value) \
do { \
if ((result) != (expected_value)) { \
sprintf(aDebugString,"%s %d", __FILE__,__LINE__); \
common_Fail(aDebugString); \
sprintf(aDebugString,"%s Error Code: 0x%08X\n\rFailed\n\r",(s),(result)); \
common_Perf(aDebugString); \
exit(0); \
} \
} while (0)
/********************************************************************************
* API function prototypes
*********************************************************************************/
void common_Init(void);
void common_Pass(void);
void common_Fail(char *FailureReason);
void common_Perf(char *InfoString);
#ifdef __cplusplus
}
#endif
#endif /* COMMON_H */

342
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_adc_config.h Executable file
View File

@ -0,0 +1,342 @@
/*!
*****************************************************************************
@file: adi_adc_config.h
@brief: Configuration options for ADC driver.
This is specific to the ADC driver and will be included by the driver.
It is not required for the application to include this header file.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_ADC_CONFIG_H
#define ADI_ADC_CONFIG_H
#include <adi_global_config.h>
/** @defgroup ADC_Driver_Cfg Static Configuration
* @ingroup ADC_Driver
*/
/** @addtogroup ADC_Driver_Cfg Static Configuration
* @{
*/
/************* ADC Driver configurations ***************/
/*! Configure the default ADC configuration. Oversampling support must be enabled for resolution >12-bits.\n
Valid values are 12 to 16
*/
#define ADI_ADC_CFG_RESOLUTION (12)
/*! Configure the default Vref\n
3 - External Reference
2 - Battery Voltage
1 - 2.5V Internal Reference\n
0 - 1.25V Internal Reference\n
*/
#define ADI_ADC_CFG_VREF (1)
/*! Enable/Disable MULTI acquisitions of ADC data.
When enabled, DMA will be used for ADC readings which is
the preferred transfer method for multiple transactions.
Otherwise all will be interrupt driven. \n
1 - Enable MULTI (DMA) acquisitions \n
0 - Disable MULTI (use Interrupt) acquisitions \n
*/
#define ADI_ADC_ENABLE_MULTI_ACQUIRE (1)
/*! Enable/Disable HI/LO Digital Comparator limits \n
1 - Enable HI/LO Digital Comparator limits\n
0 - Disable HI/LO Digital Comparator limits\n
*/
#define ADI_ADC_ENABLE_STATIC_COMPARATOR (1)
/*! Enable/Disable Channel0 limit comparator \n
1 - Enable HI Digital Comparator limit\n
0 - Disable HI Digital Comparator limit\n
*/
#define ADI_ADC_COMPARATOR_AIN0_HI_EN (0) /* 0 or 1 */
/*! Set the Channel0 limit comparator value \n
Sets the HI limit value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN0_HI_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN0_HI_VAL (4095) /* Range: 0 to 4095 */
/*! Enable/Disable Channel0 limit comparator \n
1 - Enable LO Digital Comparator limit\n
0 - Disable LO Digital Comparator limit\n
*/
#define ADI_ADC_COMPARATOR_AIN0_LO_EN (1) /* 0 or 1 */
/*! Set the Channel0 limit comparator value. \n
Sets the LO limit value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN0_LO_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN0_LO_VAL (0) /* Range: 0 to 4095 */
/*! Enable/Disable Channel0 hysteresis and monitor cycles \n
1 - Enable hysteresis and monitor cycles\n
0 - Disable hysteresis and monitor cycles\n
*/
#define ADI_ADC_COMPARATOR_AIN0_HYS_EN (1) /* 0 or 1 */
/*! Set the Channel0 limit comparator hysteresis value. \n
Sets the hysteresis value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN0_HYS_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN0_HYS_VAL (0) /* 9 bits, 0 to 511 */
/*! Set the Channel0 limit comparator hysteresis monitor value. \n
Sets the monitor value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN0_HYS_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN0_HYS_CYC (0) /* 3 bits, 0 to 7 */
/*! Enable/Disable Channel1 limit comparator \n
1 - Enable HI Digital Comparator limit\n
0 - Disable HI Digital Comparator limit\n
*/
#define ADI_ADC_COMPARATOR_AIN1_HI_EN (0) /* 0 or 1 */
/*! Set the Channel1 limit comparator value \n
Sets the HI limit value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN1_HI_EN is set to 1. \n
*/
#define ADI_ADC_COMPARATOR_AIN1_HI_VAL (4095) /* Range: 0 to 4095 */
/*! Enable/Disable Channel1 limit comparator \n
1 - Enable LO Digital Comparator limit\n
0 - Disable LO Digital Comparator limit\n
*/
#define ADI_ADC_COMPARATOR_AIN1_LO_EN (0) /* 0 or 1 */
/*! Set the Channel1 limit comparator value. \n
Sets the LO limit value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN1_LO_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN1_LO_VAL (0) /* Range: 0 to 4095 */
/*! Enable/Disable Channel1 hysteresis and monitor cycles \n
1 - Enable hysteresis and monitor cycles\n
0 - Disable hysteresis and monitor cycles\n
*/
#define ADI_ADC_COMPARATOR_AIN1_HYS_EN (0) /* 0 or 1 */
/*! Set the Channel1 limit comparator hysteresis value. \n
Sets the hysteresis value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN1_HYS_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN1_HYS_VAL (0) /* 9 bits, 0 to 511 */
/*! Set the Channel1 limit comparator hysteresis monitor value. \n
Sets the monitor value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN1_HYS_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN1_HYS_CYC (0) /* 3 bits, 0 to 7 */
/*! Enable/Disable Channel2 limit comparator \n
1 - Enable HI Digital Comparator limit\n
0 - Disable HI Digital Comparator limit\n
*/
#define ADI_ADC_COMPARATOR_AIN2_HI_EN (0) /* 0 or 1 */
/*! Set the Channel2 limit comparator value \n
Sets the HI limit value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN2_HI_EN is set to 1. \n
*/
#define ADI_ADC_COMPARATOR_AIN2_HI_VAL (4095) /* Range: 0 to 4095 */
/*! Enable/Disable Channel2 limit comparator \n
1 - Enable LO Digital Comparator limit\n
0 - Disable LO Digital Comparator limit\n
*/
#define ADI_ADC_COMPARATOR_AIN2_LO_EN (0) /* 0 or 1 */
/*! Set the Channel2 limit comparator value. \n
Sets the LO limit value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN2_LO_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN2_LO_VAL (0) /* Range: 0 to 4095 */
/*! Enable/Disable Channel2 hysteresis and monitor cycles \n
1 - Enable hysteresis and monitor cycles\n
0 - Disable hysteresis and monitor cycles\n
*/
#define ADI_ADC_COMPARATOR_AIN2_HYS_EN (0) /* 0 or 1 */
/*! Set the Channel2 limit comparator hysteresis value. \n
Sets the hysteresis value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN2_HYS_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN2_HYS_VAL (0) /* 9 bits, 0 to 511 */
/*! Set the Channel2 limit comparator hysteresis monitor value. \n
Sets the monitor value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN2_HYS_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN2_HYS_CYC (0) /* 3 bits, 0 to 7 */
/*! Enable/Disable Channel3 limit comparator \n
1 - Enable HI Digital Comparator limit\n
0 - Disable HI Digital Comparator limit\n
*/
#define ADI_ADC_COMPARATOR_AIN3_HI_EN (0) /* 0 or 1 */
/*! Set the Channel3 limit comparator value \n
Sets the HI limit value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN3_HI_EN is set to 1. \n
*/
#define ADI_ADC_COMPARATOR_AIN3_HI_VAL (4095) /* Range: 0 to 4095 */
/*! Enable/Disable Channel3 limit comparator \n
1 - Enable LO Digital Comparator limit\n
0 - Disable LO Digital Comparator limit\n
*/
#define ADI_ADC_COMPARATOR_AIN3_LO_EN (0) /* 0 or 1 */
/*! Set the Channel3 limit comparator value. \n
Sets the LO limit value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN3_LO_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN3_LO_VAL (0) /* Range: 0 to 4095 */
/*! Enable/Disable Channel3 hysteresis and monitor cycles \n
1 - Enable hysteresis and monitor cycles\n
0 - Disable hysteresis and monitor cycles\n
*/
#define ADI_ADC_COMPARATOR_AIN3_HYS_EN (0) /* 0 or 1 */
/*! Set the Channel3 limit comparator hysteresis value. \n
Sets the hysteresis value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN3_HYS_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN3_HYS_VAL (0) /* 9 bits, 0 to 511 */
/*! Set the Channel3 limit comparator hysteresis monitor value. \n
Sets the monitor value for the channel, only \n
relevant if ADI_ADC_COMPARATOR_AIN3_HYS_EN is set to 1.\n
*/
#define ADI_ADC_COMPARATOR_AIN3_HYS_CYC (0) /* 3 bits, 0 to 7 */
/************** Macro validation *****************************/
#if (ADI_ADC_CFG_RESOLUTION < 12) || (ADI_ADC_CFG_RESOLUTION > 16)
#error "ADI_ADC_CFG_RESOLUTION is invalid"
#endif
#if (ADI_ADC_CFG_VREF < 0) || (ADI_ADC_CFG_VREF > 3)
#error "ADI_ADC_CFG_VREF is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN0_HI_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN0_HI_VAL > (4095))
#error "ADI_ADC_COMPARATOR_AIN0_HI_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN1_HI_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN1_HI_VAL > (4095))
#error "ADI_ADC_COMPARATOR_AIN1_HI_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN2_HI_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN2_HI_VAL > (4095))
#error "ADI_ADC_COMPARATOR_AIN2_HI_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN3_HI_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN3_HI_VAL > (4095))
#error "ADI_ADC_COMPARATOR_AIN3_HI_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN0_LO_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN0_LO_VAL > (4095))
#error "ADI_ADC_COMPARATOR_AIN0_LO_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN1_LO_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN1_LO_VAL > (4095))
#error "ADI_ADC_COMPARATOR_AIN1_LO_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN2_LO_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN2_LO_VAL > (4095))
#error "ADI_ADC_COMPARATOR_AIN2_LO_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN3_LO_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN3_LO_VAL > (4095))
#error "ADI_ADC_COMPARATOR_AIN3_HI_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN0_HYS_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN0_HYS_VAL > (511))
#error "ADI_ADC_COMPARATOR_AIN0_HYS_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN1_HYS_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN1_HYS_VAL > (511))
#error "ADI_ADC_COMPARATOR_AIN1_HYS_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN2_HYS_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN2_HYS_VAL > (511))
#error "ADI_ADC_COMPARATOR_AIN2_HYS_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN3_HYS_VAL < (0)) || (ADI_ADC_COMPARATOR_AIN3_HYS_VAL > (511))
#error "ADI_ADC_COMPARATOR_AIN3_HYS_VAL is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN0_HYS_CYC < (0)) || (ADI_ADC_COMPARATOR_AIN0_HYS_CYC > (7))
#error "ADI_ADC_COMPARATOR_AIN0_HYS_CYC is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN1_HYS_CYC < (0)) || (ADI_ADC_COMPARATOR_AIN1_HYS_CYC > (7))
#error "ADI_ADC_COMPARATOR_AIN1_HYS_CYC is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN2_HYS_CYC < (0)) || (ADI_ADC_COMPARATOR_AIN2_HYS_CYC > (7))
#error "ADI_ADC_COMPARATOR_AIN2_HYS_CYC is invalid"
#endif
#if (ADI_ADC_COMPARATOR_AIN3_HYS_CYC < (0)) || (ADI_ADC_COMPARATOR_AIN3_HYS_CYC > (7))
#error "ADI_ADC_COMPARATOR_AIN3_HYS_CYC is invalid"
#endif
/*! @} */
#endif /* ADI_ADC_CONFIG_H */

164
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_beep_config.h Executable file
View File

@ -0,0 +1,164 @@
/*!
*****************************************************************************
@file: adi_beep_config.h
@brief: Configuration options for BEEP driver.
This is specific to the BEEP driver and will be included by the driver.
It is not required for the application to include this header file.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_BEEP_CONFIG_H
#define ADI_BEEP_CONFIG_H
#include <adi_global_config.h>
#ifdef __ICCARM__
/* IAR MISRA C 2004 error suppressions.
*
* Pm009 (rule 5.1): identifiers shall not rely on significance of more than 31 characters.
* IAR compiler supports longer identifiers.
*/
#pragma diag_suppress=Pm009
#endif /* __ICCARM__ */
/** @addtogroup BEEP_Driver_Config Static Configuration
* @ingroup BEEP_Driver
* @{
*/
/************* BEEP Driver configurations ***************/
/*! Enable the inclusion of adi_beep_PlaySequence(). This \n
API requires more data in the device structures to manage \n
the longer playing sequences, along with extra code in \n
the interrupt handler. \n
0 - adi_beep_PlaySequence() omitted.\n
1 - adi_beep_PlaySequence() is included. */
#define ADI_BEEP_INCLUDE_PLAY_SEQUENCE 1
/************* BEEP controller static configurations ***************/
/*! Configure beeper disable.\n
0 - Beeper enabled.\n
1 - Beeper disabled. */
#define ADI_BEEP_CFG_BEEPER_DISABLE 0
/*! Configure beeper sequence, when using static configuration. \n
0 - Single note (Tone A only).\n
1-255 - Sequence mode repeat count (Tone A then B sequentially). */
#define ADI_BEEP_CFG_SEQUENCE_REPEAT_VALUE 5
/* TONEA CONTROL REGISTER */
/*! Initial ToneA Disable.\n
0 - ToneA Enabled.\n
1 - ToneA Disabled. */
#define ADI_BEEP_TONEA_DISABLE 0
/*! Initial ToneA Frequency.\n
0-3 - Rest Tone (no oscillation).\n
4-127 - Oscillate at 32kHz/freq Hz. */
#define ADI_BEEP_TONEA_FREQUENCY 20
/*! Initial ToneA Duration.\n
0-254 - Play for 4ms*duration.\n
255 - Play for infinite duration. */
#define ADI_BEEP_TONEA_DURATION 2
/* TONEB CONTROL REGISTER */
/*! Initial ToneB Disable.\n
0 - ToneB Enabled.\n
1 - ToneB Disabled. */
#define ADI_BEEP_TONEB_DISABLE 0
/*! Initial ToneB Frequency. \n
0-3 - Rest Tone (no oscillation).\n
4-127 - Oscillate at 32kHz/freq Hz. */
#define ADI_BEEP_TONEB_FREQUENCY 50
/*! Initial ToneB Duration.\n
0-254 - Play for 4ms*duration.\n
255 - Play for infinite duration. */
#define ADI_BEEP_TONEB_DURATION 2
#ifdef __ICCARM__
/*
* Pm085 (rule 19.11): identifiers in pre-processor directives should be defined before use
* The macros in the the following #if directives are defined to enum constants by default.
*/
#pragma diag_suppress=Pm085
#endif /* __ICCARM__ */
#if (ADI_BEEP_TONEA_DISABLE > 1)
#error "Invalid configuration"
#endif
#if ( ADI_BEEP_TONEA_FREQUENCY > 127 )
#error "Invalid configuration"
#endif
#if ( ADI_BEEP_TONEA_DURATION > 255 )
#error "Invalid configuration"
#endif
#if (ADI_BEEP_TONEB_DISABLE > 1)
#error "Invalid configuration"
#endif
#if ( ADI_BEEP_TONEB_FREQUENCY > 127 )
#error "Invalid configuration"
#endif
#if ( ADI_BEEP_TONEB_DURATION > 255 )
#error "Invalid configuration"
#endif
#ifdef __ICCARM__
#pragma diag_default=Pm009,Pm085
#endif /* __ICCARM__ */
/*! @} */
#endif /* ADI_BEEP_CONFIG_H */

100
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_crc_config.h Executable file
View File

@ -0,0 +1,100 @@
/*!
*****************************************************************************
@file: adi_crc_config.h
@brief: Configuration options for CRC driver.
This is specific to the CRC driver and will be included by the driver.
It is not required for the application to include this header file.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_CRC_CONFIG_H
#define ADI_CRC_CONFIG_H
#include <adi_global_config.h>
/** @defgroup CRC_Driver_Cfg Static Configuration
* @ingroup CRC_Driver
*/
/** @addtogroup CRC_Driver_Cfg Static Configuration
* @{
*/
/************* CRC Driver configurations ***************/
/*!
Enable DMA support in the driver code.\n
1 - To have the DMA support code in the driver.\n
0 - To eliminate the DMA support. Operates in core mode.\n
*/
#define ADI_CRC_CFG_ENABLE_DMA_SUPPORT 0
/*!
Enable Byte mirroring option\n
1 - To enable byte mirroring \n
0 - To disable the byte mirroring.
*/
#define ADI_CFG_CRC_ENABLE_BYTE_MIRRORING 0
/*!
Enable Bit mirroring option\n
1 - To enable bit mirroring \n
0 - To disable the bit mirroring.
*/
#define ADI_CFG_CRC_ENABLE_BIT_MIRRORING 0
/*!
To specify the seed value for CRC computation
*/
#define ADI_CFG_CRC_SEED_VALUE (0xFFFFFFFFu)
/*!
To specify the polynomial to be used for CRC computation
*/
#define ADI_CFG_CRC_POLYNOMIAL (0x04C11DB7u)
/*!
To specify the Software DMA channel to be used for the CRC computation
0 -> DMA channel SIP0, ..., 7 -> DMA channel SIP7
*/
#define ADI_CFG_CRC_SOFTWARE_DMA_CHANNEL_ID 7
#endif /* ADI_CRC_CONFIG_H */
/*! @} */

138
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_crypto_config.h Executable file
View File

@ -0,0 +1,138 @@
/*!
*****************************************************************************
@file: adi_crypto_config.h
@brief: Configuration options for Crypto driver.
This is specific to the Crypto driver and will be included by the driver.
It is not required for the application to include this header file.
-----------------------------------------------------------------------------
Copyright (c) 2014-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef __ADI_CRYPTO_CONFIG_H__
#define __ADI_CRYPTO_CONFIG_H__
#include <adi_global_config.h>
/** @addtogroup Crypto_Driver_Config Static Configuration
* @ingroup Crypto_Driver
* @{
*/
/************* Crypto Driver configurations ***************/
/*! Enable/Disable ECB Support\n
1 - Enable ECB Support\n
0 - Disable ECB Support\n
*/
#define ADI_CRYPTO_ENABLE_ECB_SUPPORT (1)
/*! Enable/Disable CTR Support\n
1 - Enable CTR Support\n
0 - Disable CTR Support\n
*/
#define ADI_CRYPTO_ENABLE_CTR_SUPPORT (1)
/*! Enable/Disable CBC Support\n
1 - Enable CBC Support\n
0 - Disable CBC Support\n
*/
#define ADI_CRYPTO_ENABLE_CBC_SUPPORT (1)
/*! Enable/Disable CCM Support\n
1 - Enable CCM Support\n
0 - Disable CCM Support\n
*/
#define ADI_CRYPTO_ENABLE_CCM_SUPPORT (1)
/*! Enable/Disable CMAC Support\n
1 - Enable CMAC Support\n
0 - Disable CMAC Support\n
*/
#define ADI_CRYPTO_ENABLE_CMAC_SUPPORT (1)
/*! Enable/Disable HMAC Support\n
1 - Enable HMAC Support\n
0 - Disable HMAC Support\n
*/
#define ADI_CRYPTO_ENABLE_HMAC_SUPPORT (1)
/*! Enable/Disable SHA Support\n
1 - Enable SHA Support\n
0 - Disable SHA Support\n
*/
#define ADI_CRYPTO_ENABLE_SHA_SUPPORT (1)
/*! Enable/Disable DMA Support\n
1 - Enable DMA Support\n
0 - Disable DMA Support
*/
#define ADI_CRYPTO_ENABLE_DMA_SUPPORT (1)
/*! Enable/Disable DMA Transfer by default\n
1 - Enable DMA \n
0 - Disable DMA
*/
#define ADI_CRYPTO_ENABLE_DMA (1)
/*! SHA output format\n
1 - Big-Endian \n
0 - Little-Endian
*/
#define ADI_CRYPTO_SHA_OUTPUT_FORMAT (1)
/************** Macro validation *****************************/
#if ((ADI_CRYPTO_ENABLE_DMA_SUPPORT != 0) && (ADI_CRYPTO_ENABLE_DMA_SUPPORT != 1))
#error "ADI_CRYPTO_ENABLE_DMA_SUPPORT is invalid"
#endif
#if ((ADI_CRYPTO_ENABLE_DMA != 0) && (ADI_CRYPTO_ENABLE_DMA != 1))
#error "ADI_CRYPTO_ENABLE_DMA is invalid"
#endif
#if ((ADI_CRYPTO_ENABLE_DMA == 1) && (ADI_CRYPTO_ENABLE_DMA_SUPPORT == 0))
#error "DMA cannot be enabled if DMA support is disabled"
#endif
/*! @} */
#endif /* __ADI_CRYPTO_CONFIG_H__ */

105
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_cycle_counting_config.h Executable file
View File

@ -0,0 +1,105 @@
/*! *****************************************************************************
* @file adi_cycle_counting_config.h
* @brief Cycle Counting Framework configuration
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_CYCLE_COUNTING_CONFIG_H
#define ADI_CYCLE_COUNTING_CONFIG_H
/** @addtogroup CYCLE_COUNTING_Config Static Configuration
* @ingroup cyclecount_logging
* @{
*/
/************* Cycle Counting Configuration ***************/
/*! Global enable. This must be enabled for any other functionality to work\n
0u disabled
1u enabled
*/
#define ADI_CYCLECOUNT_ENABLED (0u)
/*! SPI Interrupt Mode ISR Cycle Counting Enabled\n
0 - Disables the recording of SPI ISR cycle counting.
1 - Enables the recording of SPI ISR cycle counting.
*/
#define ADI_CYCLECOUNT_SPI_ISR_ENABLED (0u)
/*! CRC Interrupt Mode ISR Cycle Counting Enabled\n
0 - Disables the recording of CRC ISR cycle counting.
1 - Enables the recording of CRC ISR cycle counting.
*/
#define ADI_CYCLECOUNT_CRC_ISR_ENABLED (0u)
/*! SPORT Interrupt Mode ISR Cycle Counting Enabled\n
0 - Disables the recording of SPORT ISR cycle counting.
1 - Enables the recording of SPORT ISR cycle counting.
*/
#define ADI_CYCLECOUNT_SPORT_ISR_ENABLED (0u)
/*! UART Interrupt Mode ISR Cycle Counting Enabled\n
0 - Disables the recording of UART ISR cycle counting.
1 - Enables the recording of UART ISR cycle counting.
*/
#define ADI_CYCLECOUNT_UART_ISR_ENABLED (0u)
/*! A user application may desire/require cycle counting in an application defined API
or ISR. Set this macro to the number of required.
*/
#define ADI_CYCLECOUNT_NUMBER_USER_DEFINED_APIS (0u)
/*!
* Cycle count 'stack' nesting depth. Adjust as needed.
* This should map to the maximum number of nested interrupts an application might experience.
*/
#define ADI_CYCLECOUNT_STACK_SIZE 10
/**
* @}
*/
#endif /* ADI_CYCLE_COUNTING_CONFIG_H */

299
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_flash_config.h Executable file
View File

@ -0,0 +1,299 @@
/*!
*****************************************************************************
@file: adi_flash_config.h
@brief: Configuration options for flash driver.
This is specific to the flash driver and will be included by the driver.
It is not required for the application to include this header file.
@version: $Revision: 33205 $
@date: $Date: 2016-01-11 05:46:07 -0500 (Mon, 11 Jan 2016) $
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_FLASH_CONFIG_H
#define ADI_FLASH_CONFIG_H
#include <adi_global_config.h>
/** @addtogroup Flash_Driver_Config Static Configuration
* @ingroup Flash_Driver
* @{
*/
/****SETTINGS THAT LIVE IN FEE INTERRUPT ENABLE (IEN) REGISTER****/
/*!
* Configure a response to the 2-bit ECC ERROR events (in IEN).
* - 0 Do not generate a response to ECC Error Events.
* - 1 Generate Bus Errors in response to ECC Error Events.
* - 2 Generate IRQs in response to ECC Error Events.
*/
#define ADI_FEE_CFG_ECC_ERROR_RESPONSE (1u)
/*!
* Configure a response to the 1-bit ECC CORRECTION events (in IEN).
* - 0 Do not generate a response to ECC correction Events.
* - 1 Generate Bus Errors in response to ECC correction Events.
* - 2 Generate IRQs in response to ECC correction Events.
*/
#define ADI_FEE_CFG_ECC_CORRECTION_RESPONSE (2u)
/****SETTINGS THAT LIVE IN FEE TIME PARAMETER 0 (TIME_PARAM0) REGISTER****/
/* It is recommended to NOT MODIFY flash timing parameters without keen insight and caution */
/*!
* Configure flash non-volatile mass erase hold time.\n
* Upper 4-bits of 11-bit value.\n
* (Lower bits are hard-coded to 0x14.)\n
* Hardware default value is 0xb.
*/
#define ADI_FEE_CFG_PARAM0_TNVH1 (0xbu)
/*!
* Configure flash erase time.\n
* Upper 4-bits of 19-bit value.\n
* (Lower bits are hard-coded to 0x7370.)\n
* Hardware default value is 0x8.
*/
#define ADI_FEE_CFG_PARAM0_TERASE (0x8u)
/*!
* Configure flash recovery time.\n
* Upper 4-bits of 8-bit value.\n
* (Lower bits are hard-coded to 0x2.)\n
* Hardware default value is 0x9.
*/
#define ADI_FEE_CFG_PARAM0_TRCV (0x9u)
/*!
* Configure flash non-volatile hold time.\n
* Upper 4-bits of 8-bit value.\n
* (Lower bits are hard-coded to 0x1.)\n
* Hardware default value is 0x5.
*/
#define ADI_FEE_CFG_PARAM0_TNVH (0x5u)
/*!
* Configure flash program time.\n
* Upper 4-bits of 10-bit value.\n
* (Lower bits are hard-coded to 0x7.)\n
* Hardware default value is 0x0.
*/
#define ADI_FEE_CFG_PARAM0_TPROG (0x0u)
/*!
* Configure flash NVSTR-to-program setup time.\n
* Upper 4-bits of 8-bit value.\n
* (Lower bits are hard-coded to 0x2.)\n
* Hardware default value is 0x9.
*/
#define ADI_FEE_CFG_PARAM0_TPGS (0x9u)
/*!
* Configure flash program/erase-to-NVSTR setup time.\n
* Upper 4-bits of 8-bit value.\n
* (Lower bits are hard-coded to 0x1.)\n
* Hardware default value is 0x5.
*/
#define ADI_FEE_CFG_PARAM0_TNVS (0x5u)
/*!
* Configure flash reference clock divide-by-2 setting.\n
* All timing parameters are referenced to this parameter.
* - 0 Reference clock is not divided.
* - 1 Reference clock is divided by 2.\n
* Hardware default value is 0x0.
*/
#define ADI_FEE_CFG_PARAM0_CLKDIV (0x0u)
/****SETTINGS THAT LIVE IN FEE TIME PARAMETER 1 (TIME_PARAM1) REGISTER****/
/* It is recommended to NOT MODIFY flash timing parameters without keen insight and caution */
/*!
* Configure flash read access wait states.\n
* Number of 3-bit read access wait states to use.\n
* Maximum allowed value is 0x4.\n
* Hardware default value is 0x0.
*/
#define ADI_FEE_CFG_PARAM1_WAITESTATES (0x0u)
/*!
* Configure flash sleep mode wake-up time.\n
* Upper 4-bits of 8-bit value.\n
* (Lower bits are hard-coded to 0xb.)\n
* Hardware default value is 0x4.
*/
#define ADI_FEE_CFG_PARAM1_TWK (0x4u)
/****SETTINGS THAT LIVE IN FEE SYSTEM ABOUT ENABLE (ABOUT_EN_XX) REGISTERS****/
/*!
* Configure lower (0-31) flash system interrupt abort enables.\n
* Allows system interrupts to abort an ongoing flash command.\n
* Only 64 system interrupts are supported.\n
* Lower interrupts (0-31) are encoded in ADI_FEE_CFG_ABORT_EN_LO,
* - 0 Corresponding interrupt is prevented from aborting flash command.
* - 1 Corresponding interrupt is allowed to abort flash command.\n
* Hardware default value is 0x0.
*/
#define ADI_FEE_CFG_ABORT_EN_LO (0x0u)
/*!
* Configure upper (32-63) flash system interrupt abort enables.\n
* Allows system interrupts to abort an ongoing flash command.\n
* Only 64 system interrupts are supported.\n
* Upper interrupts (32-63) are encoded in ADI_FEE_CFG_ABORT_EN_HI.
* - 0 Corresponding interrupt is prevented from aborting flash command.
* - 1 Corresponding interrupt is allowed to abort flash command.\n
* Hardware default value is 0x0.
*/
#define ADI_FEE_CFG_ABORT_EN_HI (0x0u)
/****SETTINGS THAT LIVE IN ECC CONFIG REGISTER (ECC_CFG) REGISTER****/
/*!
* ECC Start Page Pointer (in ECC_CFG).
*/
#define ADI_FEE_CFG_ECC_START_PAGE (0u)
/*!
* Enable/Disable ECC for info space (in ECC_CFG).
* - 1 Enable Info Space.
* - 0 Disable Info Space.
*/
#define ADI_FEE_CFG_ENABLE_ECC_FOR_INFO_SPACE (0u)
/*!
* Enable/Disable ECC (in ECC_CFG).
* - 1 Enable ECC.
* - 0 Disable ECC.
*/
#define ADI_FEE_CFG_ENABLE_ECC (0u)
/************* Flash Driver Configuration Settings Checkers ***************/
/* IEN CHECKS */
#if ((ADI_FEE_CFG_ECC_ERROR_RESPONSE < 0u) || (ADI_FEE_CFG_ECC_ERROR_RESPONSE > 2u))
#error "ADI_FEE_CFG_ECC_ERROR_RESPONSE should be in the range 0-2."
#endif
#if ((ADI_FEE_CFG_ECC_CORRECTION_RESPONSE < 0u) || (ADI_FEE_CFG_ECC_CORRECTION_RESPONSE > 2u))
#error "ADI_FEE_CFG_ECC_CORRECTION_RESPONSE should be in the range 0-2."
#endif
/* PARAM0 CHECKS */
#if ((ADI_FEE_CFG_PARAM0_TNVH1 < 0u) || (ADI_FEE_CFG_PARAM0_TNVH1 > 15u))
#error "ADI_FEE_CFG_PARAM0_TNVH1 should be in the range 0-15."
#endif
#if ((ADI_FEE_CFG_PARAM0_TERASE < 0u) || (ADI_FEE_CFG_PARAM0_TERASE > 15u))
#error "ADI_FEE_CFG_PARAM0_TERASE should be in the range 0-15."
#endif
#if ((ADI_FEE_CFG_PARAM0_TRCV < 0u) || (ADI_FEE_CFG_PARAM0_TRCV > 15u))
#error "ADI_FEE_CFG_PARAM0_TRCV should be in the range 0-15."
#endif
#if ((ADI_FEE_CFG_PARAM0_TNVH1 < 0u) || (ADI_FEE_CFG_PARAM0_TNVH1 > 15u))
#error "ADI_FEE_CFG_PARAM0_TNVH1 should be in the range 0-15."
#endif
#if ((ADI_FEE_CFG_PARAM0_TPROG < 0u) || (ADI_FEE_CFG_PARAM0_TPROG > 15u))
#error "ADI_FEE_CFG_PARAM0_TPROG should be in the range 0-15."
#endif
#if ((ADI_FEE_CFG_PARAM0_TPGS < 0u) || (ADI_FEE_CFG_PARAM0_TPGS > 15u))
#error "ADI_FEE_CFG_PARAM0_TPGS should be in the range 0-15."
#endif
#if ((ADI_FEE_CFG_PARAM0_TNVS < 0u) || (ADI_FEE_CFG_PARAM0_TNVS > 15u))
#error "ADI_FEE_CFG_PARAM0_TNVS should be in the range 0-15."
#endif
#if ((ADI_FEE_CFG_PARAM0_CLKDIV < 0u) || (ADI_FEE_CFG_PARAM0_CLKDIV > 1u))
#error "ADI_FEE_CFG_PARAM0_CLKDIV should be in the range 0-1."
#endif
/* PARAM1 CHECKS */
#if ((ADI_FEE_CFG_PARAM1_WAITESTATES < 0u) || (ADI_FEE_CFG_PARAM1_WAITESTATES > 4u))
#error "ADI_FEE_CFG_PARAM1_WAITESTATES should be in the range 0-4."
#endif
#if ((ADI_FEE_CFG_PARAM1_TWK < 0u) || (ADI_FEE_CFG_PARAM1_TWK > 15u))
#error "ADI_FEE_CFG_PARAM1_TWK should be in the range 0-15."
#endif
/* ABORT_EN_XX CHECKS */
#if ((ADI_FEE_CFG_ABORT_EN_LO < 0u) || (ADI_FEE_CFG_ABORT_EN_LO > 0XFFFFu))
#error "ADI_FEE_CFG_ABORT_EN_LO should be in 32-bit range."
#endif
#if ((ADI_FEE_CFG_ABORT_EN_HI < 0u) || (ADI_FEE_CFG_ABORT_EN_HI > 0XFFFFu))
#error "ADI_FEE_CFG_ABORT_EN_HI should be in 32-bit range."
#endif
/* ECC_CFG CHECKS */
#if (((ADI_FEE_CFG_ECC_START_PAGE >> 8u) << 8) != ADI_FEE_CFG_ECC_START_PAGE)
#error "ADI_FEE_CFG_ECC_START_PAGE has invalid bits set in lower 8-bits."
#endif
#if ((ADI_FEE_CFG_ENABLE_ECC_FOR_INFO_SPACE != 0u) && (ADI_FEE_CFG_ENABLE_ECC_FOR_INFO_SPACE != 1u))
#error "ADI_FEE_CFG_ENABLE_ECC_FOR_INFO_SPACE should be 1 or 0."
#endif
#if ((ADI_FEE_CFG_ENABLE_ECC != 0u) && (ADI_FEE_CFG_ENABLE_ECC != 1u))
#error "ADI_FEE_CFG_ENABLE_ECC should be 1 or 0."
#endif
/*! @} */
#endif /* ADI_FLASH_CONFIG_H */

131
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_global_config.h Executable file
View File

@ -0,0 +1,131 @@
/*!
*****************************************************************************
@file: adi_global_config.h
@brief: Configuration options for all the drivers.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_GLOBAL_CONFIG_H
#define ADI_GLOBAL_CONFIG_H
/** @addtogroup GLOBAL_Driver_Config Global Static Configuration
* @brief Configuration options for all the drivers.
* @{
*/
/*! @name RTOS used
* In order to be used in a multi-threaded application, the device drivers
* may require the use of some RTOS-specific signals like semaphores or actions
* may be required when entering/exiting an interrupt. By specifying the RTOS
* that the application uses, the drivers can map their requirements to the
* specific RTOS, without requiring an OS abstraction layer.
* @note This macros do not add the RTOS sources to the application, users need
* to set up the source and include paths in their application themselves
* @note If the RTOS specified is not in the list of supported RTOS the build
* mechanism fails
*/
/**@{*/
/*! @hideinitializer Indicates that no RTOS is used (bare-metal applications) */
#define ADI_CFG_RTOS_NO_OS (1)
/*! @hideinitializer Indicates that Micrium uCOS-III is used */
#define ADI_CFG_RTOS_MICRIUM_III (2)
/*! @hideinitializer Indicates that Micrium FreeRTOS is used */
#define ADI_CFG_RTOS_FREERTOS (3)
/*! Configure the RTOS required across the project.
It can be configured to one of the following macros:
- #ADI_CFG_RTOS_NO_OS
- #ADI_CFG_RTOS_MICRIUM_III
- #ADI_CFG_RTOS_FREERTOS
*/
#define ADI_CFG_RTOS ADI_CFG_RTOS_NO_OS
/**@}*/
/*! @name Low power mode support
All applications may have to block when a buffer is being processed. In the
case of an RTOS application, when a task is blocked waiting for a buffer, a
different task can run. If no tasks are available then the idle task runs.
In many RTOS the idle task can be configured so it perform actions like
entering low power modes.
In the case of a bare-metal (no RTOS) application, since there are no other
tasks to be run, the driver can enter low power modes itself when it blocks.
*/
/*! Configures the drivers to enter low power mode (Flexi mode)
when waiting for a buffer to be processed. This macro is applicable
only when the drivers are operating in the bare metal mode (No RTOS).
The possible values it can be configured to are:
- 1 : Low power mode support required.
- 0 : Low power mode support not required.
*/
#define ADI_CFG_ENTER_LOW_PWR_MODE_SUPPORT (1)
/**@}*/
/*
** Verify the macro configuration
*/
#if ((ADI_CFG_RTOS != ADI_CFG_RTOS_NO_OS) && \
(ADI_CFG_RTOS != ADI_CFG_RTOS_MICRIUM_III) && \
(ADI_CFG_RTOS != ADI_CFG_RTOS_FREERTOS))
#error "ADI_CFG_RTOS macro wrongly configured"
#endif /* ADI_CFG_RTOS verification */
#if ((ADI_CFG_ENTER_LOW_PWR_MODE_SUPPORT != 0) && \
(ADI_CFG_ENTER_LOW_PWR_MODE_SUPPORT != 1))
#error "ADI_CFG_ENTER_LOW_PWR_MODE_SUPPORT macro is wrongly configured"
#endif
#if ((ADI_CFG_ENTER_LOW_PWR_MODE_SUPPORT == 1) && \
(ADI_CFG_RTOS != ADI_CFG_RTOS_NO_OS))
#error "ADI_CFG_ENTER_LOW_PWR_MODE_SUPPORT cannot be set to 1 in multi-threaded applications"
#endif
/**
* @}
*/
#endif /* ADI_GLOBAL_CONFIG_H */

226
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_i2c_config.h Executable file
View File

@ -0,0 +1,226 @@
/*!
*****************************************************************************
@file: adi_i2c_config.h
@brief: Configuration options for I2C driver.
This is specific to the I2C driver and will be included by the driver.
It is not required for the application to include this header file.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_I2C_CONFIG_H
#define ADI_I2C_CONFIG_H
#include <adi_global_config.h>
/** @addtogroup I2C_Driver_Config Static Configuration
* @ingroup I2C_Driver
* @{
*/
/************* I2C Driver configurations ***************/
/*! Master control register TX FIFO decrement control bit.\n
1 - Decrement master TX FIFO status when a byte has been fully serialized.\n
0 - Decrement master TX FIFO status when a byte is unloaded from the TX FIFO,
but not yet serialized on the bus. */
#define ADI_I2C_CFG_MCTL_MXMITDEC (0)
/*! Master control register STOP condition interrupt enable.\n
1 - Enable completion interrupt when a STOP condition is detected.\n
0 - Disable completion interrupt when a STOP condition is detected. */
#define ADI_I2C_CFG_MCTL_IENCMP (1)
/*! Master control register NACK (NotACKnowledge) interrupt enable.\n
1 - Enable NACK interrupt when an acknowledge is not received.\n
0 - Disable NACK interrupt when an acknowledge is not received. */
#define ADI_I2C_CFG_MCTL_IENACK (1)
/*! Master control register ALOST (Arbitration LOST) interrupt enable.\n
1 - Enable ALOST interrupt when bus arbitration is lost.\n
0 - Disable ALOST interrupt when bus arbitration is lost. */
#define ADI_I2C_CFG_MCTL_IENALOST (1)
/*! Master control register clock stretch enable.\n
1 - Enable clock stretch by slave device.\n
0 - Disable clock stretch by slave device. */
#define ADI_I2C_CFG_MCTL_STRETCHSCL (0)
/*! Master control register internal loopback enable.\n
1 - Enable internal looping of SCL and SDA outputs onto their corresponding inputs.\n
0 - Disable internal looping of SCL and SDA outputs onto their corresponding inputs. */
#define ADI_I2C_CFG_MCTL_LOOPBACK (0)
/*! Master control register start condition back-off disable.\n
1 - Enables controller to compete for bus ownership even if another device is driving a START condition.\n
0 - Disables controller to compete for bus ownership even if another device is driving a START condition. */
#define ADI_I2C_CFG_MCTL_COMPLETE (0)
/*! Master control register device enable.\n
1 - Enable controller as a Master device.\n
0 - Disables controller as a Master device. */
#define ADI_I2C_CFG_MCTL_MASEN (0)
/*!
* Standard Clock divider Clock-HI settings.
* Assuming a 26 MHz core clock, the following settings
* will be useful: \n
* - For STANDARD (100 kHz) rate, use: HI= 25, LO= 31. \n
* - For FAST (400 kHz) rate, use: HI=123, LO=129. \n
* \n
* @note The clock high setting varies with pull-up loading,
* board layout, slew-rate, etc., so exact settings are somewhat
* empirical. The clock high counter does not start until
* a logic high transition is sensed on the clock line, so
* variability in this logic transaction will alter the
* effective clock rate. This results from the internal
* clock-stretch hardware feature supporting a slave slow device
* that may hold off the master by holding the clock line low.
*
* @sa ADI_I2C_CFG_DIV_LOW
*/
#define ADI_I2C_CFG_DIV_HIGH (25)
/*! Standard Clock divider Clock-LO setting
*
* @sa ADI_I2C_CFG_DIV_HIGH
*/
#define ADI_I2C_CFG_DIV_LOW (31)
/*! Shared control reset START/STOP detect circuit.\n
1 - Reset the SCL and SDA synchronizers, START/STOP detect logic, and LINEBUSY detect logic.\n
0 - Do nothing. */
#define ADI_I2C_CFG_SHCTL_RST (0)
/*! Timing control filter disable.\n
1 - Disable digital input clock filter.\n
0 - Enable digital input clock filter (1 PCLK). */
#define ADI_I2C_CFG_TCTL_FILTEROFF (0)
/*! Timing control data input hold time requirement to recognize START/STOP condition (5-bit max).\n
Value - Minimum data input hold time count in units of PCLK period. (Value = Thd/PCLK-period) */
#define ADI_I2C_CFG_TCTL_THDATIN (1)
/*! Master automatic stretch mode duration (4-bit), e.g., (in binary):\n
- 0b0000 - No SCL clock stretching.\n
- 0b0001 - Timeout after hold SCL LOW 2^1 = 2 bit-times.\n
- 0b0010 - Timeout after hold SCL LOW 2^2 = 4 bit-times.\n
- ...\n
- 0b1110 - Timeout after hold SCL LOW 2^14 = 16,384 bit-times.\n
- 0b1111 - Hold SCL LOW with no timeout.\n
\n
Where "bit-time" is computed by CLKDIV values and incoming UCLK (see HRM). */
#define ADI_I2C_CFG_ASTRETCH_MST (0)
/*! Unformatted, 7-bit max width I2C "7-bit Addressing" slave device address value (unshifted and excluding R/W direction bit).\n
For example, the value:\n
0x50 - Is the "raw" (unencoded) slave address for the "Aardvark Activity Board" ATMEL AT24C02 I2C slave EEPROM device.\n
It is encoded (upshifted by one and ORed with R/W direction bit) on the I2C bus as:\n
- 0xA0 for write operations, or\n
- 0xA1 for read operations */
#define ADI_I2C_CFG_SLAVE_ADDRESS (0x50)
/***********************************\
|* Check for overflowing values... *|
\***********************************/
#if (ADI_I2C_CFG_MCTL_MXMITDEC >> 1)
#error "Decrement TX FIFO status config value too wide"
#endif
#if (ADI_I2C_CFG_MCTL_IENCMP >> 1)
#error "Transaction complete (STOP) interrupt enable config value too wide"
#endif
#if (ADI_I2C_CFG_MCTL_IENACK >> 1)
#error "NACK interrupt enable config value too wide"
#endif
#if (ADI_I2C_CFG_MCTL_IENALOST >> 1)
#error "ALOST interrupt enable config value too wide"
#endif
#if (ADI_I2C_CFG_MCTL_STRETCHSCL >> 1)
#error "Clock stretch enable config value too wide"
#endif
#if (ADI_I2C_CFG_MCTL_LOOPBACK >> 1)
#error "Loopback enable config value too wide"
#endif
#if (ADI_I2C_CFG_MCTL_COMPLETE >> 1)
#error "Start back-off disable config value too wide"
#endif
#if (ADI_I2C_CFG_MCTL_MASEN >> 1)
#error "Master device enable config value too wide"
#endif
#if (ADI_I2C_CFG_DIV_HIGH >> 8)
#error "Clock HIGH time config value too wide"
#endif
#if (ADI_I2C_CFG_DIV_LOW >> 8)
#error "Clock LOW time config value too wide"
#endif
#if (ADI_I2C_CFG_SHCTL_RST >> 1)
#error "Shared control reset config value too wide"
#endif
#if (ADI_I2C_CFG_TCTL_FILTEROFF >> 1)
#error "Timing control filter-off config value too wide"
#endif
#if (ADI_I2C_CFG_TCTL_THDATIN >> 5)
#error "Timing control filter-off config value too wide"
#endif
#if (ADI_I2C_CFG_ASTRETCH_MST >> 4)
#error "Master clock stretch config value too wide"
#endif
#if (ADI_I2C_CFG_SLAVE_ADDRESS >> 7)
#error "Slave address config value too wide"
#endif
/*! @} */
#endif /* ADI_I2C_CONFIG_H */

638
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_pwr_config.h Executable file
View File

@ -0,0 +1,638 @@
/*
*****************************************************************************
@file: adi_pwr_config.h
@brief: Configuration options for PWR driver.
This is specific to the PWR driver and will be included by the source file.
It is not required for the application to include this header file.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_PWR_CONFIG_H
#define ADI_PWR_CONFIG_H
#include <adi_global_config.h>
#ifdef __ICCARM__
/* IAR MISRA C 2004 error suppressions.
*
* Pm009 (rule 5.1): identifiers shall not rely on significance of more than 31 characters.
* The YODA-generated headers rely on more. The IAR compiler supports that.
*/
#pragma diag_suppress=Pm009
#endif /* __ICCARM__ */
/** @addtogroup PWR_Driver_Config Static Configuration
* @ingroup Power_Driver
* @{
*/
/*! Enable the code to support input clock through the GPIO pin
0 - No support for input clock through the GPIO pin.
1 - Support for input clock through the GPIO pin.
*/
#define ADI_PWR_CFG_ENABLE_CLOCK_SOURCE_GPIO 0
/*-------------------------------------------------------------------------------
Set of MACROs for configuring the clock
--------------------------------------------------------------------------------*/
/* Oscillator Control Register */
/*!
32 KHz clock select mux. This clock connects to beeper, RTC.\n
0 - Internal 32 KHz oscillator is selected.\n
1 - External 32 KHz crystal is selected..
*/
#define ADI_PWR_LF_CLOCK_MUX 0
/*!
High frequency internal oscillator enable\n
0 - The HFOSC oscillator is disabled and placed in a low power state\n
1 - The HFOSC oscillator is enabled.
*/
#define ADI_PWR_HFOSC_CLOCK_ENABLE 1
/*!
Low frequency external oscillator enable and placed in a low power state\n
0 - The LFXTAL oscillator is disabled\n
1 - The LFXTAL oscillator is enabled.
*/
#define ADI_PWR_LFXTAL_CLOCK_ENABLE 0
/*!
High frequency external oscillator enable\n
0 - The HFXTAL oscillator is disabled and placed in a low power state\n
1 - The HFXTAL oscillator is enabled.
*/
#define ADI_PWR_HFXTAL_CLOCK_ENABLE 0
/*!
Low frequency external clock fail interrupt enable \n
0 - The LFXTAL clock monitor and clock fail interrupt disabled \n
1 - The LFXTAL clock monitor and clock fail interrupt enabled.
*/
#define ADI_PWR_LFXTAL_CLOCK_MON_ENABLE 0
/*!
Automatic switching of the LF Mux to LF Oscillator on LFXTAL failure. \n
0 - Disables Automatic switching of LF Mux to LF Oscillator on LFXTAL failure \n
1 - Disables Automatic switching of LF Mux to LF Oscillator on LFXTAL failure.
*/
#define ADI_PWR_LFXTAL_FAIL_AUTO_SWITCH_ENABLE 0
/*!
Low frequency crystal Robust mode enable. The Robust mode enables the LFXTAL oscillator to work also when an
additional resistive load is placed between the crystal pins and GND. \n
0 - Selects Normal mode \n
1 - Selects Robust mode
*/
#define ADI_PWR_LFXTAL_ROBUST_MODE_ENABLE 0
/*!
Low frequency crystal Robust mode load select. The amount of loading tolerated when robust mode is enabled. \n
0 - No Trim, and big resistive loads not tolerated. \n
1 - 20 Mohm load mode, greater than 20 Mohm load allowed. \n
2 - 10 Mohm load mode, greater than 10 Mohm load allowed. \n
3 - 5 Mohm load mode, 5 Mohm load allowed on both IO pins.
*/
#define ADI_PWR_LFXTAL_ROBUST_LOAD_SELECT 0
/*!
Root clock monitor and Clock Fail interrupt enable.
0 - Disable Root Clock Monitor and Clock Fail interrupt.
1 - Enable Root Clock Monitor and Clock Fail interrupt.
*/
#define ADI_PWR_ROOT_CLOCK_MON_INT_ENABLE 0
/*!
Enable Auto switch to High Frequency Oscillator (HFOSC) when Root Clock Fails.
0 - Disable Automatic switching of the Root Clock.
1 - Enable Automatic switching of the Root Clock.
*/
#define ADI_PWR_ROOT_CLOCK_FAIL_AUTOSWITCH_ENABLE 0
/********** Miscellaneous clock setting register CTL0 *************/
/*!
Selecting the input clock for Root Clock mux. Determines which single shared clock source
is used by the PCLK, and HCLK dividers. \n
0 - HFOSC High frequency internal oscillator \n
1 - HFXTAL High frequency external oscillator\n
2 - SPLL Output of System PLL is selected\n
3 - External GPIO port is selected
*/
#define ADI_PWR_INPUT_TO_ROOT_CLOCK_MUX 0
/*!
GPIO clock out select. Selects the clock to be routed to the GPIO clock out pin. \n
0 - Root Clock (ROOT_CLK)\n
1 - Low Frequency Clock (LF_CLK) \n
2 - ADC Clock (ACLK) \n
3 - HCLK_BUS \n
4 - HCLK_CORE \n
5 - Peripheral Clock (PCLK)
6 - Reference Clock for Flash controller timer (RCLK)\n
7 - Mux of HFOSC, HFXTAL clock (RHP_CLK)\n
8 - GP Timer 0 clock (GPT0_CLK)\n
9 - GP Timer 1 clock (GPT1_CLK)\n
10 - Peripherals operating at HCLK (HCLK_P)\n
11 - PLL Clock out (PCLK)\n
12 - RTC0 Clock \n
13 - HP Buck Clock (HPBUCK_CLK)\n
14 - HP Buck Non overlap clock\n
15 - RTC1 generated clock
*/
#define ADI_PWR_GPIO_CLOCK_OUT_SELECT 0
/*!
Flash reference clock and HPBUCK clock source mux. \n
0 - sourcing from HFOSC (High frequency internal oscillator) \n
2 - sourcing from external HFXTAL( High frequency external oscillator 26M Hz )\n
3 - sourcing from external HFXTAL( High frequency external oscillator 16M Hz )
*/
#define ADI_PWR_INPUT_TO_RCLK_MUX 0
/*!
Selecting the input clock for the system PLL clock. \n
0 - sourcing from HFOSC (High frequency internal oscillator) \n
1 - sourcing from HFXTAL(High frequency external oscillator) \n
2 - GPIO Input clock. \n
3 - GPIO Input clock.
*/
#define ADI_PWR_INPUT_TO_SPLL_MUX 0
/*!
External Low frequency crystal interrupt enable.\n
0 - Disable the interrupt for LF clock \n
1 - Enable the interrupt for LF clock
*/
#define ADI_PWR_LFXTAL_CLOCK_INTERRUPT_ENABLE 0
/*!
External Hight frequency crystal interrupt enable.\n
0 - Disable the interrupt for HFXTAL clock \n
1 - Enable the interrupt for HFXTAL clock
*/
#define ADI_PWR_HFXTAL_CLOCK_INTERRUPT_ENABLE 0
/********** Clock divider register CTL1 ***************/
/*!
HCLK divide count.Determines the HCLK rate based on the following equation: HCLK = ROOT_CLK/HCLKDIVCNT.
0 - 63 is valid range.
*/
#define ADI_PWR_HCLK_DIVIDE_COUNT 4
/*!
PCLK divide count.Determines the PCLK rate based on the following equation: PCLK = ROOT_CLK/PCLKDIVCNT.
0 - 63 is valid range.
*/
#define ADI_PWR_PCLK_DIVIDE_COUNT 4
/*!
ACLK divide count.Determines the ACLK rate based on the following equation: ACLK = ROOT_CLK/ACLKDIVCNT.
0 - 63 is valid range.
*/
#define ADI_PWR_ACLK_DIVIDE_COUNT 16
/************* HF Oscillator divide clock select register CTL2 ***********/
/*!
HF Oscillator auto divide by one clock selection during wakeup from Flexi power mode.
When enabled enabled (Set to 1), the frequency undivided 26MHz HF oscillator clock itself will be used during the wake up.
The undivided HFOSC clock is selected automatically by clearing the HFOSCDIVCLKSEL register content to 0, which selects the HFOSC/1 clock.This updated divided by 1 clock selection will remain same until the new divider value is written to this register.
When disabled (Set to 0), this fast wake up feature will be disabled and the HFOSCDIVCLKSEL register will remain unchanged
during the wakeup.
0 - Auto select HFOSC/1 clock during wakeup from Flexi mode is disable.
1 - Auto select HFOSC/1 clock during wakeup from Flexi mode is enabled.
*/
#define ADI_PWR_HFOSC_AUTO_DIV_BY_1 0
/*!
HF Oscillator divide select.
0 - HFOSC/1. \n
1 - HFOSC/2. \n
2 - HFOSC/4. \n
3 - HFOSC/8. \n
4 - HFOSC/16. \n
5 - HFOSC/32.
*/
#define ADI_PWR_HFOSC_DIVIDE_SELECT 0
/****** System PLL Register CTL3 *****/
/*!
System PLL N multiplier(SPLL_NSEL). Sets the N value used to obtain the multiplication
factor N/M of the PLL.
8 - 31 is valid range.
*/
#define ADI_PWR_SPLL_MUL_FACTOR 26
/*!
System PLL division by 2. Controls if an optional divide by two is placed on the PLL output.\n
0 - The System PLL is not divided. Its output frequency equals that selected by the N/M ratio \n
1 - The System PLL is divided by two. Its output frequency equals that selected by the N/M ratio
with an additional divide by 2
*/
#define ADI_PWR_SPLL_ENABLE_DIV2 0
/*!
System PLL enable. Controls if the PLL should be enabled or placed in its low power state. \n
0 - The system PLL is disabled and is in its power down state\n
1 - The system PLL is enabled.
*/
#define ADI_PWR_SPLL_ENABLE 0
/*!
System PLL interrupt enable.Controls if the core should be interrupted on a PLL lock/PLL unlock or no interrupt generated.\n
0 - Disable the SPLL interrupt generation\n
1 - Enable the SPLL interrupt generation
*/
#define ADI_PWR_SPLL_INTERRUPT_ENABLE 0
/*!
System PLL M Divider(SPLL_MSEL). Sets the M value used to obtain the multiplication
factor N/M of the PLL.
2 - 15 is valid range.
*/
#define ADI_PWR_SPLL_DIV_FACTOR 13
/*!
system PLL multiply by 2. This bit is used to configure if the VCO clock frequency should be multiplied by 2 or 1.\n
0 - The System PLL is multiplied by 1.\n
1 - The System PLL is multiplied by 2.
*/
#define ADI_PWR_SPLL_ENABLE_MUL2 0
/********** User Clock Gating Control CTL5 ********************/
/*!
This can be used to enable/disable clock to GPT0. \n
0 - Disable the clock to GPT0\n
1 - Enable the clock to GPT0
*/
#define ADI_PWR_GPT0_CLOCK_ENABLE 1
/*!
This can be used to enable/disable clock to GPT1. \n
0 - Disable the clock to GPT1\n
1 - Enable the clock to GPT1
*/
#define ADI_PWR_GPT1_CLOCK_ENABLE 1
/*!
This can be used to enable/disable clock to GPT2. \n
0 - Disable the clock to GPT2\n
1 - Enable the clock to GPT2
*/
#define ADI_PWR_GPT2_CLOCK_ENABLE 1
/*!
This can be used to enable/disable clock to I2C. \n
0 - Disable the clock to I2C\n
1 - Enable the clock to I2C
*/
#define ADI_PWR_I2C_CLOCK_ENABLE 1
/*!
This can be used to enable/disable clock to GPIO. \n
0 - Disable the clock to GPIO\n
1 - Enable the clock to GPIO
*/
#define ADI_PWR_GPIO_CLOCK_ENABLE 1
/*!
This can be used to enable/disable all clocks connected to peripherals. \n
0 - Disable the Clock supply to peripherals\n
1 - Enable the Clock supply to peripherals
*/
#define ADI_PWR_PCLK_ENABLE 0
/*!
This can be used to enable/disable clocks to Timer RGB. \n
0 - Disable the Clock supply to Timer RGB \n
1 - Enable the Clock supply to Timer RGB
*/
#define ADI_PWR_TIMER_RGB_ENABLE 1
/*-------------------------------------------------------------------------------
Set of macros for configuring the power management module
--------------------------------------------------------------------------------*/
/********* Interrupt enable register IEN ********/
/*!
Enabling the interrupt if the Battery voltage falls below 1.8V.\n
0 - Disable Battery voltage interrupt \n
1 - Enable Battery voltage interrupt.
*/
#define ADI_PWR_ENABLE_VBAT_INTERRUPT 0
/*!
Enabling the interrupt for under VREG voltage (i.e less than 1V).\n
0 - Disable VREG under voltage interrupt \n
1 - Enable VREG under voltage interrupt.
*/
#define ADI_PWR_ENABLE_VREG_UNDER_VOLTAGE_INTERRUPT 0
/*!
Enabling the interrupt for over VREG voltage (i.e above than 1.32V).\n
0 - Disable VREG over voltage interrupt \n
1 - Enable VREG over voltage interrupt.
*/
#define ADI_PWR_ENABLE_VREG_OVER_VOLTAGE_INTERRUPT 0
/*!
Enabling the interrupt for Battery range.\n
0 - Disable battery voltage range interrupt \n
1 - Enable battery voltage range interrupt
*/
#define ADI_PWR_ENABLE_BATTERY_VOLTAGE_RANGE_INTERRUPT 0
/*!
Battery voltage range for generating the interrupt.\n
0 - Configure to generate interrupt if VBAT > 2.75V \n
1 - Configure to generate interrupt if VBAT is between 2.75 and 1.6V \n
2 - Configure to generate interrupt if VBAT is between 2.3V and 1.6V
*/
#define ADI_PWR_BATTERY_VOLTAGE_RANGE_FOR_INTERRUPT 0
/********* HP Buck control register CTL1 ********/
/*!
Enable or disable HP Buck.\n
0 - Disable HP Buck.
1 - Enable HP Buck.
*/
#define ADI_PWR_HP_BUCK_ENABLE 0
/*!
HP Buck Load mode.\n
0 - HP Buck low load mode. Can be set when the system is running at
less than 26 Mhz. \n
1 - HP Buck High load mode. Can be set when the system is running at
more than 26 Mh.
*/
#define ADI_PWR_HP_BUCK_LOAD_MODE 0
/*!
HP Buck low power mode.\n
The HPBUCK Low Power mode can be selected, when the Chip is in Flexi Power mode
and low power modules such as Timer, Beeper only are enabled
0 - HPBUCK Low power mode is disabled. \n
1 - HPBUCK Low power mode is enabled.
*/
#define ADI_PWR_HP_BUCK_LOW_POWER_MODE 0
/********* Power mode register ********/
/*!
Enable or disable monitoring battery voltage (VBAT) during HIBERNATE Mode. \n
0 - Battery voltage monitoring is enabled.
1 - Battery voltage monitoring is disabled.
By default battery voltage monitoring during hibernate is enabled.
*/
#define ADI_PWR_ENABLE_BATTERY_VOLTAGE_MONITORING 0
/*******************************************************************************
M A C R O V A L I D A T I O N
*******************************************************************************/
#if ( ADI_PWR_CFG_ENABLE_CLOCK_SOURCE_GPIO > 1 )
#error "Invalid configuration set for ADI_PWR_CFG_ENABLE_CLOCK_SOURCE_GPIO"
#endif
#if ( ADI_PWR_LF_CLOCK_MUX > 1 )
#error "Invalid configuration set for ADI_PWR_LF_CLOCK_MUX"
#endif
#if ( ADI_PWR_HFOSC_CLOCK_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_HFOSC_CLOCK_ENABLE"
#endif
#if ( ADI_PWR_LFXTAL_CLOCK_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_LFXTAL_CLOCK_ENABLE"
#endif
#if ( ADI_PWR_HFXTAL_CLOCK_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_HFXTAL_CLOCK_ENABLE"
#endif
#if ( ADI_PWR_LFXTAL_CLOCK_MON_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_LFXTAL_CLOCK_MON_ENABLE"
#endif
#if ( ADI_PWR_LFXTAL_FAIL_AUTO_SWITCH_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_LFXTAL_FAIL_AUTO_SWITCH_ENABLE"
#endif
#if ( ADI_PWR_LFXTAL_ROBUST_MODE_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_LFXTAL_ROBUST_MODE_ENABLE"
#endif
#if ( ADI_PWR_LFXTAL_ROBUST_LOAD_SELECT > 3 )
#error "Invalid configuration set for ADI_PWR_LFXTAL_ROBUST_LOAD_SELECT"
#endif
#if ( ADI_PWR_ROOT_CLOCK_MON_INT_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_ROOT_CLOCK_MON_INT_ENABLE"
#endif
#if ( ADI_PWR_ROOT_CLOCK_FAIL_AUTOSWITCH_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_ROOT_CLOCK_FAIL_AUTOSWITCH_ENABLE"
#endif
#if ( ADI_PWR_INPUT_TO_ROOT_CLOCK_MUX > 3 )
#error "Invalid configuration set for ADI_PWR_INPUT_TO_ROOT_CLOCK_MUX"
#endif
#if ( ADI_PWR_GPIO_CLOCK_OUT_SELECT > 15 )
#error "Invalid configuration set for ADI_PWR_GPIO_CLOCK_OUT_SELECT"
#endif
#if ( ADI_PWR_INPUT_TO_RCLK_MUX > 3 )
#error "Invalid configuration set for ADI_PWR_INPUT_TO_RCLK_MUX"
#endif
#if ( ADI_PWR_INPUT_TO_SPLL_MUX > 3 )
#error "Invalid configuration set for ADI_PWR_INPUT_TO_SPLL_MUX"
#endif
#if ( ADI_PWR_LFXTAL_CLOCK_INTERRUPT_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_LFXTAL_CLOCK_INTERRUPT_ENABLE"
#endif
#if ( ADI_PWR_HFXTAL_CLOCK_INTERRUPT_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_HFXTAL_CLOCK_INTERRUPT_ENABLE"
#endif
#if ( ADI_PWR_HCLK_DIVIDE_COUNT > 63 )
#error "Invalid configuration set for ADI_PWR_HCLK_DIVIDE_COUNT"
#endif
#if ( ADI_PWR_PCLK_DIVIDE_COUNT > 63 )
#error "Invalid configuration set for ADI_PWR_PCLK_DIVIDE_COUNT"
#endif
#if ( ADI_PWR_ACLK_DIVIDE_COUNT > 63 )
#error "Invalid configuration set for ADI_PWR_ACLK_DIVIDE_COUNT"
#endif
#if ( ADI_PWR_HFOSC_AUTO_DIV_BY_1 > 1 )
#error "Invalid configuration set for ADI_PWR_HFOSC_AUTO_DIV_BY_1"
#endif
#if ( ADI_PWR_HFOSC_DIVIDE_SELECT > 5 )
#error "Invalid configuration set for ADI_PWR_HFOSC_DIVIDE_SELECT"
#endif
#if ( ADI_PWR_SPLL_MUL_FACTOR < 8 || ADI_PWR_SPLL_MUL_FACTOR > 31 )
#error "Invalid configuration set for ADI_PWR_SPLL_MUL_FACTOR"
#endif
#if ( ADI_PWR_SPLL_ENABLE_DIV2 > 1 )
#error "Invalid configuration set for ADI_PWR_SPLL_ENABLE_DIV2"
#endif
#if ( ADI_PWR_SPLL_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_SPLL_ENABLE"
#endif
#if ( ADI_PWR_SPLL_INTERRUPT_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_SPLL_INTERRUPT_ENABLE"
#endif
#if ( ADI_PWR_SPLL_DIV_FACTOR < 2 || ADI_PWR_SPLL_DIV_FACTOR > 15 )
#error "Invalid configuration set for ADI_PWR_SPLL_DIV_FACTOR"
#endif
#if ( ADI_PWR_SPLL_ENABLE_MUL2 > 1 )
#error "Invalid configuration set for ADI_PWR_SPLL_ENABLE_MUL2"
#endif
#if ( ADI_PWR_GPT0_CLOCK_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_GPT0_CLOCK_ENABLE"
#endif
#if ( ADI_PWR_GPT1_CLOCK_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_GPT1_CLOCK_ENABLE"
#endif
#if ( ADI_PWR_GPT2_CLOCK_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_GPT2_CLOCK_ENABLE"
#endif
#if ( ADI_PWR_I2C_CLOCK_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_I2C_CLOCK_ENABLE"
#endif
#if ( ADI_PWR_GPIO_CLOCK_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_GPIO_CLOCK_ENABLE"
#endif
#if ( ADI_PWR_PCLK_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_PCLK_ENABLE"
#endif
#if ( ADI_PWR_TIMER_RGB_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_TIMER_RGB_ENABLE"
#endif
#if ( ADI_PWR_ENABLE_VBAT_INTERRUPT > 1 )
#error "Invalid configuration set for ADI_PWR_ENABLE_VBAT_INTERRUPT"
#endif
#if ( ADI_PWR_ENABLE_VREG_UNDER_VOLTAGE_INTERRUPT > 1 )
#error "Invalid configuration set for ADI_PWR_ENABLE_VREG_UNDER_VOLTAGE_INTERRUPT"
#endif
#if ( ADI_PWR_ENABLE_VREG_OVER_VOLTAGE_INTERRUPT > 1 )
#error "Invalid configuration set for ADI_PWR_ENABLE_VREG_OVER_VOLTAGE_INTERRUPT"
#endif
#if ( ADI_PWR_ENABLE_BATTERY_VOLTAGE_RANGE_INTERRUPT > 1 )
#error "Invalid configuration set for ADI_PWR_ENABLE_BATTERY_VOLTAGE_RANGE_INTERRUPT"
#endif
#if ( ADI_PWR_BATTERY_VOLTAGE_RANGE_FOR_INTERRUPT > 2 )
#error "Invalid configuration set for ADI_PWR_BATTERY_VOLTAGE_RANGE_FOR_INTERRUPT"
#endif
#if ( ADI_PWR_HP_BUCK_ENABLE > 1 )
#error "Invalid configuration set for ADI_PWR_HP_BUCK_ENABLE"
#endif
#if ( ADI_PWR_HP_BUCK_LOAD_MODE > 1 )
#error "Invalid configuration set for ADI_PWR_HP_BUCK_LOAD_MODE"
#endif
#if ( ADI_PWR_HP_BUCK_LOW_POWER_MODE > 1 )
#error "Invalid configuration set for ADI_PWR_HP_BUCK_LOW_POWER_MODE"
#endif
#if ( ADI_PWR_ENABLE_BATTERY_VOLTAGE_MONITORING > 1 )
#error "Invalid configuration set for ADI_PWR_ENABLE_BATTERY_VOLTAGE_MONITORING"
#endif
/*! @} */
#ifdef __ICCARM__
#pragma diag_default=Pm009
#endif /* __ICCARM__ */
#endif /* ADI_PWR_CONFIG_H */

106
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_rng_config.h Executable file
View File

@ -0,0 +1,106 @@
/*!
*****************************************************************************
@file: adi_rng_config.h
@brief: Configuration options for RNG driver.
This is specific to the RNG driver and will be included by the driver.
It is not required for the application to include this header file.
-----------------------------------------------------------------------------
Copyright (c) 2012-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_RNG_CONFIG_H__
#define ADI_RNG_CONFIG_H__
#include <adi_global_config.h>
/** @defgroup RNG_Driver_Cfg RNG Driver Configuration
* @ingroup RNG_Driver
*/
/*! \addtogroup RNG_Driver_Cfg RNG Driver Configuration
* @{
*/
/************* RNG Driver configurations ***************/
/************* RNG controller configurations ***************/
/*! RNG Control Register, bit 3\n
Enable only 8-bit generation\n
0 - Generate 32-bit random number\n
1 - Generate only 8-bit random number
*/
#define RNG0_CFG_ONLY_8_BIT 1
/*! RNG Sample Length Register, bits [11:0]\n
The register defines the number of samples to accumulate in the
CRC register when generating a random number.\n
Bits [11:0] contains the reload value of the sample counter
*/
#define RNG0_CFG_LENGTH_RELOAD 256u
/*! RNG Sample Length Register, bits [15:12]\n
The register defines the number of samples to accumulate in the
CRC register when generating a random number. The number of values
accumulated in the counter reload value is scaled by 2^prescaler.\n
Bits [15:12] contains the prescaler for the sample counter
*/
#define RNG0_CFG_LENGTH_PRESCALER 0u
/************** Macro validation *****************************/
#if ( RNG0_CFG_ONLY_8_BIT > 1 )
#error "Invalid configuration"
#endif
#if ( RNG0_CFG_LENGTH_RELOAD > 4095u )
#error "Invalid value for reload"
#endif
#if ( RNG0_CFG_LENGTH_PRESCALER > 10u )
#error "Invalid value for prescaler"
#endif
/*! @} */
#endif /* __ADI_RNG_CONFIG_H__ */

397
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_rtc_config.h Executable file
View File

@ -0,0 +1,397 @@
/*!
*****************************************************************************
@file: adi_rtc_config.h
@brief: Configuration options for Real Time Clock device driver.
This is specific to the RTC driver and will be included by the driver.
It is not required for the application to include this header file.
@version: $Revision: 33005 $
@date: $Date: 2015-12-12 10:43:13 -0500 (Sat, 12 Dec 2015) $
-----------------------------------------------------------------------------
Copyright (c) 2012-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_RTC_CONFIG_H__
#define ADI_RTC_CONFIG_H__
#include <adi_global_config.h>
/** @addtogroup RTC_Driver_Config Static Configuration
* @ingroup RTC_Driver
* @{
*/
/*!
* The safe write mode insures any pending writes that have not yet synchronized between the faster core clock
* domain and the internal RTC 32kHz clock domain are reconciled before multiple writes to the same RTC register
* are allowed
*/
#define ADI_RTC_CFG_ENABLE_SAFE_WRITE 1
/** @addtogroup RTC_Driver_Config_RTC0 RTC0 Static Configuration
* @ingroup RTC_Driver_Config
* @{
*/
/*
===================================================================
------------------------RTC-0 CONFIGURATION MACRO-----------------
===================================================================
*/
/*! Enable the Alarm */
#define RTC0_CFG_ENABLE_ALARM 0
/*! Enable the Alarm interrupt*/
#define RTC0_CFG_ENABLE_ALARM_INTERRUPT 0
/*! Enable the Trim */
#define RTC0_CFG_ENABLE_TRIM 0
/*! Enable the PENDERROR interrupt*/
#define RTC0_CFG_ENABLE_PENDERROR_INTERRUPT 0
/*! Enable the write sync interrupt*/
#define RTC0_CFG_ENABLE_WSYNC_INTERRUPT 0
/*! Enable the pend write interrupt*/
#define RTC0_CFG_ENABLE_WRITEPEND_INTERRUPT 0
/*! Initial the count Value*/
#define RTC0_CFG_COUNT_VALUE 0
/*! Initial the count Value-0*/
#define RTC0_CFG_COUNT_VALUE_0 0
/*! Initial the count Value-1*/
#define RTC0_CFG_COUNT_VALUE_1 0
/*! Alarm-0 Value*/
#define RTC0_CFG_ALARM_VALUE_0 0
/*! Alarm-1 Value*/
#define RTC0_CFG_ALARM_VALUE_1 0
/*! Trim interval*/
#define RTC0_CFG_TRIM_INTERVAL 0
/*! Trim interval with power of 2*/
#define RTC0_CFG_POW2_TRIM_INTERVAL 0
/*! Trim operation to be performed for RTC0*/
#define RTC0_CFG_TRIM_OPERATION 0
/*! Trim Value for RTC-0*/
#define RTC0_CFG_TRIM_VALUE 0
/*! GPIO Sample around Rising Edge of Sensor Strobe Channel 3.
* Enables sampling of Sensor Strobe GPIO inputs around rising edge of Sensor Strobe Channel 3 pulse.
*
* 0 No sampling of input around rising edge.
* 1 Input sampled one clock cycle before rising edge of Sensor Strobe.
* 10 Input sampled at rising edge of Sensor Strobe.
* 11 Input sampled one clock cycle after rising edge of Sensor Strobe.
*/
#define RTC0_SS3_SMPONRE 0
/*! GPIO Sample around Falling Edge of Sensor Strobe Channel 3.
* Enables sampling of Sensor Strobe GPIO inputs around falling edge of Sensor Strobe Channel 3 pulse.
*
* 0 No sampling of input around rising edge.
* 1 Input sampled one clock cycle before rising edge of Sensor Strobe.
* 10 Input sampled at rising edge of Sensor Strobe.
* 11 Input sampled one clock cycle after rising edge of Sensor Strobe.
*/
#define RTC0_SS3_SMPONFE 0
/*! GPIO Sample around Falling Edge of Sensor Strobe Channel 2. */
#define RTC0_SS2_SMPONFE 0
/*! GPIO Sample around Rising Edge of Sensor Strobe Channel 1. */
#define RTC0_SS1_SMPONRE 0
/*! GPIO Sample around Falling Edge of Sensor Strobe Channel 1. */
#define RTC0_SS1_SMPONFE 0
/*! Sensor Strobe's GP Input Sampling Mux
* SS 2 GPIO Pin 1
*
* GPMUX0/1.SSxGPINySEL 3’b000 3’b001 3’b010 3’b011 3’b100 3’b101 3’b110 3’b111
* RTCSSxGPIny p0[12] p2[0] p0[9] p0[8] p1[13] p1[2] p2[7] p2[9]
*/
#define RTC0_SS2_GPIN1SEL 0x4
/*! Sensor Strobe's GP Input Sampling Mux SS 2 GPIO Pin 0*/
#define RTC0_SS2_GPIN0SEL 0x3
/*! Sensor Strobe's GP Input Sampling Mux SS 1 GPIO Pin 2*/
#define RTC0_SS1_GPIN2SEL 0x2
/*! Sensor Strobe's GP Input Sampling Mux SS 1 GPIO Pin 1*/
#define RTC0_SS1_GPIN1SEL 0x1
/*! Sensor Strobe's GP Input Sampling Mux SS 1 GPIO Pin 0*/
#define RTC0_SS1_GPIN0SEL 0x0
/*! Sensor Strobe's GP Input Sampling Mux SS 3 GPIO Pin 2*/
#define RTC0_SS3_GPIN2SEL 0x0
/*! Sensor Strobe's GP Input Sampling Mux SS 3 GPIO Pin 1*/
#define RTC0_SS3_GPIN1SEL 0x7
/*! Sensor Strobe's GP Input Sampling Mux SS 3 GPIO Pin 0*/
#define RTC0_SS3_GPIN0SEL 0x6
/*! Sensor Strobe's GP Input Sampling Mux SS 2 GPIO Pin 2*/
#define RTC0_SS2_GPIN2SEL 0x5
/*! Differential output option for Sensor Strobe channel 3.
* Sensor Strobe channel3 is used as differential signal, actual RTC_SS3 out
* for this channel is available in corresponding GPIO.
* RTC_SS4 of Sensor Strobe channel 4 is used to provided inverted signal of RTC_SS3.
*/
#define RTC0_SS3_DIFFOUT 0
/*! Differential output option for Sensor Strobe channel 1.
* Sensor Strobe channel 1 is used as differential signal, actual RTC_SS1 out
* for this channel is available in corresponding GPIO.
* RTC_SS1 of Sensor Strobe channel 2 is used to provided inverted signal of RTC_SS1.
*/
#define RTC0_SS1_DIFFOUT 0
/*! @} */
/*
===================================================================
------------------------RTC-1 CONFIGURATION MACRO-----------------
===================================================================
*/
/** @addtogroup RTC_Driver_Config_RTC1 RTC1 Static Configuration
* @ingroup RTC_Driver_Config
* @{
*/
/*! Enable the Alarm */
#define RTC1_CFG_ENABLE_ALARM 0
/*! Enable the Alarm interrupt*/
#define RTC1_CFG_ENABLE_ALARM_INTERRUPT 0
/*! Enable the Trim */
#define RTC1_CFG_ENABLE_TRIM 0
/*! Enable the mod-60 Alarm */
#define RTC1_CFG_ENABLE_MOD60_ALARM 0
/*! Enable the mod-60 Alarm period*/
#define RTC1_CFG_ENABLE_MOD60_ALARM_PERIOD 0
/*! Enable the Alarm interrupt*/
#define RTC1_CFG_ENABLE_MOD60_ALARM_INTERRUPT 0
/*! Enable the ISOINT interrupt*/
#define RTC1_CFG_ENABLE_ISO_INTERRUPT 0
/*! Enable the PENDERROR interrupt*/
#define RTC1_CFG_ENABLE_PENDERROR_INTERRUPT 0
/*! Enable the write sync interrupt*/
#define RTC1_CFG_ENABLE_WSYNC_INTERRUPT 0
/*! Enable the pend write interrupt*/
#define RTC1_CFG_ENABLE_WRITEPEND_INTERRUPT 0
/*! Enable the RTC count interrupt*/
#define RTC1_CFG_ENABLE_COUNT_INTERRUPT 0
/*! Enable the prescaled modulo-1 interrupt*/
#define RTC1_CFG_ENABLE_MOD1_COUNT_INTERRUPT 0
/*! Enable the Trim interrupt*/
#define RTC1_CFG_ENABLE_TRIM_INTERRUPT 0
/*! Enable the Mod60 roll over interrupt*/
#define RTC1_CFG_CNT_MOD60_ROLLLOVER_INTERRUPT 0
/*! Prescale value for the RTC1*/
#define RTC1_CFG_PRESCALE 0
/*! Enable the counter roll over interrupt*/
#define RTC1_CFG_CNT_ROLLLOVER_INTERRUPT 0
/*! Initial the count Value-0*/
#define RTC1_CFG_COUNT_VALUE_0 0
/*! Initial the count Value-1*/
#define RTC1_CFG_COUNT_VALUE_1 0
/*! Alarm Value-0*/
#define RTC1_CFG_ALARM_VALUE_0 0
/*! Alarm Value-1*/
#define RTC1_CFG_ALARM_VALUE_1 0
/*! Alarm Value-2*/
#define RTC1_CFG_ALARM_VALUE_2 0
/*! Trim interval*/
#define RTC1_CFG_TRIM_INTERVAL 0
/*! Trim interval with power of 2*/
#define RTC1_CFG_POW2_TRIM_INTERVAL 0
/*! Trim operation to be performed for RTC1*/
#define RTC1_CFG_TRIM_OPERATION 0
/*! Trim Value for RTC-1*/
#define RTC1_CFG_TRIM_VALUE 0
/*! Enable the input capture channel-0*/
#define RTC1_CFG_IC0_ENABLE 0
/*! Enable the input capture channel-2*/
#define RTC1_CFG_IC2_ENABLE 0
/*! Enable the input capture channel-3*/
#define RTC1_CFG_IC3_ENABLE 0
/*! Enable the input capture channel-4*/
#define RTC1_CFG_IC4_ENABLE 0
/*! Enable the Sensor Strobe channel-1*/
#define RTC1_CFG_SS1_ENABLE 0
/*! Enable the Sensor Strobe channel-2*/
#define RTC1_CFG_SS2_ENABLE 0
/*! Enable the Sensor Strobe channel-3*/
#define RTC1_CFG_SS3_ENABLE 0
/*! Enable the Sensor Strobe channel-4*/
#define RTC1_CFG_SS4_ENABLE 0
/*! Enable the interrupt for input capture channel-0*/
#define RTC1_CFG_IC0_INT_ENABLE 0
/*! Enable the interrupt for input capture channel-2*/
#define RTC1_CFG_IC2_INT_ENABLE 0
/*! Enable the interrupt for input capture channel-3*/
#define RTC1_CFG_IC3_INT_ENABLE 0
/*! Enable the interrupt for input capture channel-4*/
#define RTC1_CFG_IC4_INT_ENABLE 0
/*! Enable the over write input capture channels*/
#define RTC1_CFG_IC_OVER_WRITE_ENABLE 0
/*! Polarity for input capture channel-0*/
#define RTC1_CFG_IC0_EDGE_POLARITY 0
/*! Polarity for input capture channel-2*/
#define RTC1_CFG_IC2_EDGE_POLARITY 0
/*! Polarity for input capture channel-3*/
#define RTC1_CFG_IC3_EDGE_POLARITY 0
/*! Polarity for input capture channel-4*/
#define RTC1_CFG_IC4_EDGE_POLARITY 0
/*! Enable the interrupt for Sensor Strobe channel-1*/
#define RTC1_CFG_SS1_INT_ENABLE 0
/*! Enable the interrupt for Sensor Strobe channel-2*/
#define RTC1_CFG_SS2_INT_ENABLE 0
/*! Enable the interrupt for Sensor Strobe channel-3*/
#define RTC1_CFG_SS3_INT_ENABLE 0
/*! Enable the interrupt for Sensor Strobe channel-4*/
#define RTC1_CFG_SS4_INT_ENABLE 0
/*! Enable the masking for Sensor Strobe channel-1*/
#define RTC1_CFG_SS1_MASK_ENABLE 0
/*! Enable the masking for Sensor Strobe channel-2*/
#define RTC1_CFG_SS2_MASK_ENABLE 0
/*! Enable the masking for Sensor Strobe channel-3*/
#define RTC1_CFG_SS3_MASK_ENABLE 0
/*! Enable the masking for Sensor Strobe channel-4*/
#define RTC1_CFG_SS4_MASK_ENABLE 0
/*! Enable the auto-reloading for Sensor Strobe channel-0*/
#define RTC1_CFG_SS1_AUTO_RELOADING_ENABLE 0
/*! Mask for Sensor Strobe channel-0 */
#define RTC1_CFG_SS1_MASK_VALUE 0
/*! Auto reload value for Sensor Strobe channel-0 */
#define RTC1_CFG_SS1_AUTO_RELOAD_VALUE 32768/2
/*! Sensor Strobe GP Input Sampling Mux
* SS2 GPIO Pin 1
*
* GPMUX0/1.SSxGPINySEL 3’b000 3’b001 3’b010 3’b011 3’b100 3’b101 3’b110 3’b111
* RTCSSxGPIny p0[12] p2[0] p0[9] p0[8] p1[13] p1[2] p2[7] p2[9]
*/
#define RTC1_SS2_GPIN1SEL 0x4
/*! Sensor Strobe's GP Input Sampling Mux SS 2 GPIO Pin 0*/
#define RTC1_SS2_GPIN0SEL 0x3
/*! Sensor Strobe's GP Input Sampling Mux SS 1 GPIO Pin 2*/
#define RTC1_SS1_GPIN2SEL 0x2
/*! Sensor Strobe's GP Input Sampling Mux SS 1 GPIO Pin 1*/
#define RTC1_SS1_GPIN1SEL 0x1
/*! Sensor Strobe's GP Input Sampling Mux SS 1 GPIO Pin 0*/
#define RTC1_SS1_GPIN0SEL 0x0
/*! Sensor Strobe's GP Input Sampling Mux SS 3 GPIO Pin 2*/
#define RTC1_SS3_GPIN2SEL 0x0
/*! Sensor Strobe's GP Input Sampling Mux SS 3 GPIO Pin 1*/
#define RTC1_SS3_GPIN1SEL 0x7
/*! Sensor Strobe's GP Input Sampling Mux SS 3 GPIO Pin 0*/
#define RTC1_SS3_GPIN0SEL 0x6
/*! Sensor Strobe's GP Input Sampling Mux SS 2 GPIO Pin 2*/
#define RTC1_SS2_GPIN2SEL 0x5
/*! Differential output option for Sensor Strobe channel 3.
* Sensor Strobe channel3 is used as differential signal, actual RTC_SS3 out
* for this channel is available in corresponding GPIO.
* RTC_SS4 of Sensor Strobe channel 4 is used to provided inverted signal of RTC_SS3.
*/
#define RTC1_SS3_DIFFOUT 0
/*! Differential output option for Sensor Strobe channel 1.
* Sensor Strobe channel 1 is used as differential signal, actual RTC_SS1 out
* for this channel is available in corresponding GPIO.
* RTC_SS1 of Sensor Strobe channel 2 is used to provided inverted signal of RTC_SS1.
*/
#define RTC1_SS1_DIFFOUT 0
/*! @} */
/*! @} */
#endif /* ADI_RTC_CONFIG_H__ */

592
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_spi_config.h Executable file
View File

@ -0,0 +1,592 @@
/*!
*****************************************************************************
@file: adi_spi_config.h
@brief: Configuration options for SPI driver.
This is specific to the SPI driver and will be included by the driver.
It is not required for the application to include this header file.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_SPI_CONFIG_H__
#define ADI_SPI_CONFIG_H__
#include <adi_global_config.h>
/** @addtogroup SPI_Driver_Config Static Configuration
* @ingroup SPI_Driver
* @{
*/
/*! Set this macro to the system clock frequency in hertz*/
#define ADI_CFG_SYSTEM_CLOCK_HZ (26000000u)
/************* SPI controller configurations ***************/
/* There are three SPI instances SPI0, SPI1 and SPI2 */
/* Each SPI has its own configuration macros */
/*----------------------------------------------------------*/
/* -------------------- SPI0 -------------------------------*/
/*----------------------------------------------------------*/
/** @addtogroup SPI_Driver_Config_SPI0 SPI0 Static Configuration
* @ingroup SPI_Driver_Config
* @{
*/
/*! If using SPI0 in master mode set this macro to 1. For slave mode set this macro to 0. */
#define ADI_SPI0_MASTER_MODE (1u)
/*! Set this macro to the SPI0 bit rate in hertz */
#define ADI_SPI0_CFG_BIT_RATE (2000000u)
/*! SPI0 enable\n
SPI configuration register: Bit[0]\n
1 - Enable SPI\n
0 - Disable SPI */
#define ADI_SPI0_CFG_ENABLE (0u)
/*! SPI0 clock phase mode\n
SPI configuration register: Bit[2]\n
1 - Serial clock pulses at the beginning of each serial bit transfer.\n
0 - Serial clock pulses at the end of each serial bit transfer. */
#define ADI_SPI0_CFG_CLK_PHASE (0u)
/*! SPI0 clock polarity\n
SPI configuration register: Bit[3]\n
1 - Serial clock idles high.\n
0 - Serial clock idles low. */
#define ADI_SPI0_CFG_CLK_POLARITY (0u)
/*! SPI0 wired OR mode\n
SPI configuration register: Bit[4]\n
1 - Enables open circuit output enable.\n
0 - Normal output levels. */
#define ADI_SPI0_CFG_WIRED_OR (0u)
/*! SPI0 LSB/MSB\n
SPI configuration register: Bit[5]\n
1 - MSB transmitted first.\n
0 - LSB transmitted first. */
#define ADI_SPI0_CFG_LSB_MSB (0u)
/*! SPI0 transfer initiate\n
SPI configuration register: Bit[6]\n
1 - SPI transfer is initiated with write to Tx FIFO register. Interrupts when Tx is empty.\n
0 - SPI transfer is initiated with a read of the Rx FIFO register. Interrupts when Rx is full.*/
#define ADI_SPI0_CFG_TRANSFER_INITIATE (0u)
/*! SPI0 Tx FIFO transfers zeros or last bit upon underflow\n
SPI configuration register: Bit[7]\n
1 - Tx FIFO sends zeros upon underflow.\n
0 - Tx FIFO repeats last bit upon underflow. */
#define ADI_SPI0_CFG_TX_UNDERFLOW (0u)
/*! SPI0 Rx FIFO overflows with received data or data is discarded\n
SPI configuration register: Bit[8]\n
1 - Rx FIFO receives data upon overflow.\n
0 - Rx FIFO discards received data upon overflow. */
#define ADI_SPI0_CFG_RX_OVERFLOW (0u)
/*! SPI0 slave mode MISO enable\n
SPI configuration register: Bit[9]\n
1 - MISO operates as normal in slave mode.\n
0 - MISO is disabled in slave mode. */
#define ADI_SPI0_CFG_MISO_ENABLE (0u)
/*! SPI0 internal loopback enable\n
SPI configuration register: Bit[10]\n
1 - MISO and MOSI is loopbacked internally.\n
0 - MISO and MOSI operates normally. */
#define ADI_SPI0_CFG_LOOPBACK (0u)
/*! SPI0 transfer and interrupt mode\n
SPI configuration register: Bit[11]\n
1 - SPI continuous transfers in which CS remains asserted until Tx is empty.\n
0 - SPI disable continuous transfer, each transfer consists of 8 bits of data.*/
#define ADI_SPI0_CFG_CONTINUOUS (0u)
/*! SPI0 Rx FIFO flush enable\n
SPI configuration register: Bit[12]\n
1 - Rx FIFO is flushed and all rx data is ignored and no interrupts are generated.\n
0 - Rx FIFO flush is disabled. */
#define ADI_SPI0_CFG_RX_FLUSH (0u)
/*! SPI0 Tx FIFO flush enable\n
SPI configuration register: Bit[13]\n
1 - Tx FIFO is flushed.\n
0 - Tx FIFO flush is disabled. */
#define ADI_SPI0_CFG_TX_FLUSH (0u)
/*! Reset Mode for CSERR. \n
SPI0 configuration register: Bit[14]\n
0 - To continue from where it stopped. SPI can receive the remaining bits
when CS gets asserted and Cortex has to ignore the CSERR interrupt.\n
1 - To enable resetting the bit counter and reset if there is a
CS error condition and the Cortex is expected to clear the SPI_EN bit.
*/
#define ADI_SPI0_CFG_CSERR_RESET (0u)
/*! SPI0 clock divide\n
SPI baud rate selection register: Bit[0:5]\n
Value between 0-63 that is used to divide the UCLK to generate
the SPI serial clock. */
#define ADI_SPI0_CFG_CLK_DIV (0u)
/*! SPI0 high frequency mode\n
SPI baud rate selection register: Bit[6]\n
1 - High frequency mode enabled.\n
0 - High frequency mode disabled. */
#define ADI_SPI0_CFG_HFM (0u)
/*! SPI0 reset mode for CSERR\n
SPI baud rate selection register: Bit[7]\n
1 - clear bit counter on CS error.\n
0 - do not clear bit counter on CS error. */
#define ADI_SPI0_CFG_CS_ERR (0u)
/*! SPI0 CS interrupt\n
SPI baud rate selection register: Bit[8]\n
1 - In continuous mode, generate interrupt on CS.\n
0 - In continuous mode, do not generate interrupt on CS. */
#define ADI_SPI0_CFG_CS_IRQ (0u)
/*! @} */
/*----------------------------------------------------------*/
/* -------------------- SPI1 -------------------------------*/
/*----------------------------------------------------------*/
/** @addtogroup SPI_Driver_Config_SPI1 SPI1 Static Configuration
* @ingroup SPI_Driver_Config
* @{
*/
/*! If using SPI1 in master mode set this macro to 1. For slave mode set this macro to 0. */
#define ADI_SPI1_MASTER_MODE (1u)
/*! Set this macro to the SPI1 bit rate in hertz */
#define ADI_SPI1_CFG_BIT_RATE (2000000u)
/*! SPI1 enable\n
SPI configuration register: Bit[0]\n
1 - Enable SPI\n
0 - Disable SPI */
#define ADI_SPI1_CFG_ENABLE (0u)
/*! SPI1 clock phase mode\n
SPI configuration register: Bit[2]\n
1 - Serial clock pulses at the beginning of each serial bit transfer.\n
0 - Serial clock pulses at the end of each serial bit transfer. */
#define ADI_SPI1_CFG_CLK_PHASE (0u)
/*! SPI1 clock polarity\n
SPI configuration register: Bit[3]\n
1 - Serial clock idles high.\n
0 - Serial clock idles low. */
#define ADI_SPI1_CFG_CLK_POLARITY (0u)
/*! SPI1 wired OR mode\n
SPI configuration register: Bit[4]\n
1 - Enables open circuit output enable.\n
0 - Normal output levels. */
#define ADI_SPI1_CFG_WIRED_OR (0u)
/*! SPI1 LSB/MSB\n
SPI configuration register: Bit[5]\n
1 - MSB transmitted first.\n
0 - LSB transmitted first. */
#define ADI_SPI1_CFG_LSB_MSB (0u)
/*! SPI1 transfer initiate\n
SPI configuration register: Bit[6]\n
1 - SPI transfer is initiated with write to Tx FIFO register. Interrupts when Tx is empty.\n
0 - SPI transfer is initiated with a read of the Rx FIFO register. Interrupts when Rx is full.*/
#define ADI_SPI1_CFG_TRANSFER_INITIATE (0u)
/*! SPI1 Tx FIFO transfers zeros or last bit upon underflow\n
SPI configuration register: Bit[7]\n
1 - Tx FIFO sends zeros upon underflow.\n
0 - Tx FIFO repeats last bit upon underflow. */
#define ADI_SPI1_CFG_TX_UNDERFLOW (0u)
/*! SPI1 Rx FIFO overflows with received data or data is discarded\n
SPI configuration register: Bit[8]\n
1 - Rx FIFO receives data upon overflow.\n
0 - Rx FIFO discards received data upon overflow. */
#define ADI_SPI1_CFG_RX_OVERFLOW (0u)
/*! SPI1 slave mode MISO enable\n
SPI configuration register: Bit[9]\n
1 - MISO operates as normal in slave mode.\n
0 - MISO is disabled in slave mode. */
#define ADI_SPI1_CFG_MISO_ENABLE (0u)
/*! SPI1 internal loopback enable\n
SPI configuration register: Bit[10]\n
1 - MISO and MOSI is loopbacked internally.\n
0 - MISO and MOSI operates normally. */
#define ADI_SPI1_CFG_LOOPBACK (0u)
/*! SPI1 transfer and interrupt mode\n
SPI configuration register: Bit[11]\n
1 - SPI continuous transfers in which CS remains asserted until Tx is empty.\n
0 - SPI disable continuous transfer, each transfer consists of 8 bits of data.*/
#define ADI_SPI1_CFG_CONTINUOUS (0u)
/*! SPI1 Rx FIFO flush enable\n
SPI configuration register: Bit[12]\n
1 - Rx FIFO is flushed and all rx data is ignored and no interrupts are generated.\n
0 - Rx FIFO flush is disabled. */
#define ADI_SPI1_CFG_RX_FLUSH (0u)
/*! SPI1 Tx FIFO flush enable\n
SPI configuration register: Bit[13]\n
1 - Tx FIFO is flushed.\n
0 - Tx FIFO flush is disabled. */
#define ADI_SPI1_CFG_TX_FLUSH (0u)
/*! Reset Mode for CSERR. \n
SPI1 configuration register: Bit[14]\n
0 - To continue from where it stopped. SPI can receive the remaining bits
when CS gets asserted and Cortex has to ignore the CSERR interrupt.\n
1 - To enable resetting the bit counter and reset if there is a
CS error condition and the Cortex is expected to clear the SPI_EN bit.
*/
#define ADI_SPI1_CFG_CSERR_RESET (0u)
/*! SPI1 clock divide\n
SPI baud rate selection register: Bit[0:5]\n
Value between 0-63 that is used to divide the UCLK to generate
the SPI serial clock. */
#define ADI_SPI1_CFG_CLK_DIV (0u)
/*! SPI1 high frequency mode\n
SPI baud rate selection register: Bit[6]\n
1 - High frequency mode enabled.\n
0 - High frequency mode disabled. */
#define ADI_SPI1_CFG_HFM (0u)
/*! SPI1 reset mode for CSERR\n
SPI baud rate selection register: Bit[7]\n
1 - clear bit counter on CS error.\n
0 - do not clear bit counter on CS error. */
#define ADI_SPI1_CFG_CS_ERR (0u)
/*! SPI1 CS interrupt\n
SPI baud rate selection register: Bit[8]\n
1 - In continuous mode, generate interrupt on CS.\n
0 - In continuous mode, do not generate interrupt on CS. */
#define ADI_SPI1_CFG_CS_IRQ
/*! @} */
/*----------------------------------------------------------*/
/* -------------------- SPI2 -------------------------------*/
/*----------------------------------------------------------*/
/** @addtogroup SPI_Driver_Config_SPI2 SPI2 Static Configuration
* @ingroup SP2_Driver_Config
* @{
*/
/*! If using SPI2 in master mode set this macro to 1. For slave mode set this macro to 0. */
#define ADI_SPI2_MASTER_MODE (1u)
/*! Set this macro to the SPI2 bit rate in hertz */
#define ADI_SPI2_CFG_BIT_RATE (2000000u)
/*! SPI2 enable\n
SPI configuration register: Bit[0]\n
1 - Enable SPI\n
0 - Disable SPI */
#define ADI_SPI2_CFG_ENABLE (0u)
/*! SPI2 clock phase mode\n
SPI configuration register: Bit[2]\n
1 - Serial clock pulses at the beginning of each serial bit transfer.\n
0 - Serial clock pulses at the end of each serial bit transfer. */
#define ADI_SPI2_CFG_CLK_PHASE (0u)
/*! SPI2 clock polarity\n
SPI configuration register: Bit[3]\n
1 - Serial clock idles high.\n
0 - Serial clock idles low. */
#define ADI_SPI2_CFG_CLK_POLARITY (0u)
/*! SPI2 wired OR mode\n
SPI configuration register: Bit[4]\n
1 - Enables open circuit output enable.\n
0 - Normal output levels. */
#define ADI_SPI2_CFG_WIRED_OR (0u)
/*! SPI2 LSB/MSB\n
SPI configuration register: Bit[5]\n
1 - MSB transmitted first.\n
0 - LSB transmitted first. */
#define ADI_SPI2_CFG_LSB_MSB (0u)
/*! SPI2 transfer initiate\n
SPI configuration register: Bit[6]\n
1 - SPI transfer is initiated with write to Tx FIFO register. Interrupts when Tx is empty.\n
0 - SPI transfer is initiated with a read of the Rx FIFO register. Interrupts when Rx is full.*/
#define ADI_SPI2_CFG_TRANSFER_INITIATE (0u)
/*! SPI2 Tx FIFO transfers zeros or last bit upon underflow\n
SPI configuration register: Bit[7]\n
1 - Tx FIFO sends zeros upon underflow.\n
0 - Tx FIFO repeats last bit upon underflow. */
#define ADI_SPI2_CFG_TX_UNDERFLOW (0u)
/*! SPI2 Rx FIFO overflows with received data or data is discarded\n
SPI configuration register: Bit[8]\n
1 - Rx FIFO receives data upon overflow.\n
0 - Rx FIFO discards received data upon overflow. */
#define ADI_SPI2_CFG_RX_OVERFLOW (0u)
/*! SPI2 slave mode MISO enable\n
SPI configuration register: Bit[9]\n
1 - MISO operates as normal in slave mode.\n
0 - MISO is disabled in slave mode. */
#define ADI_SPI2_CFG_MISO_ENABLE (0u)
/*! SPI2 internal loopback enable\n
SPI configuration register: Bit[10]\n
1 - MISO and MOSI is loopbacked internally.\n
0 - MISO and MOSI operates normally. */
#define ADI_SPI2_CFG_LOOPBACK (0u)
/*! SPI2 transfer and interrupt mode\n
SPI configuration register: Bit[11]\n
1 - SPI continuous transfers in which CS remains asserted until Tx is empty.\n
0 - SPI disable continuous transfer, each transfer consists of 8 bits of data.*/
#define ADI_SPI2_CFG_CONTINUOUS (0u)
/*! SPI2 Rx FIFO flush enable\n
SPI configuration register: Bit[12]\n
1 - Rx FIFO is flushed and all rx data is ignored and no interrupts are generated.\n
0 - Rx FIFO flush is disabled. */
#define ADI_SPI2_CFG_RX_FLUSH (0u)
/*! SPI2 Tx FIFO flush enable\n
SPI configuration register: Bit[13]\n
1 - Tx FIFO is flushed.\n
0 - Tx FIFO flush is disabled. */
#define ADI_SPI2_CFG_TX_FLUSH (0u)
/*! Reset Mode for CSERR. \n
SPI2 configuration register: Bit[14]\n
0 - To continue from where it stopped. SPI can receive the remaining bits
when CS gets asserted and Cortex has to ignore the CSERR interrupt.\n
1 - To enable resetting the bit counter and reset if there is a
CS error condition and the Cortex is expected to clear the SPI_EN bit.
*/
#define ADI_SPI2_CFG_CSERR_RESET (0u)
/*! SPI2 clock divide\n
SPI baud rate selection register: Bit[0:5]\n
Value between 0-63 that is used to divide the UCLK to generate
the SPI serial clock. */
#define ADI_SPI2_CFG_CLK_DIV (0u)
/*! SPI2 high frequency mode\n
SPI baud rate selection register: Bit[6]\n
1 - High frequency mode enabled.\n
0 - High frequency mode disabled. */
#define ADI_SPI2_CFG_HFM (0u)
/*! SPI2 reset mode for CSERR\n
SPI baud rate selection register: Bit[7]\n
1 - clear bit counter on CS error.\n
0 - do not clear bit counter on CS error. */
#define ADI_SPI2_CFG_CS_ERR (0u)
/*! SPI2 CS interrupt\n
SPI baud rate selection register: Bit[8]\n
1 - In continuous mode, generate interrupt on CS.\n
0 - In continuous mode, do not generate interrupt on CS. */
#define ADI_SPI2_CFG_CS_IRQ
/*! @} */
/************** Macro validation *****************************/
#if ( ADI_SPI0_CFG_BIT_RATE > (13000000u) ) || \
( ADI_SPI0_CFG_BIT_RATE > (13000000u) ) || \
( ADI_SPI0_CFG_BIT_RATE > (13000000u) )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_ENABLE > 1u ) || \
( ADI_SPI1_CFG_ENABLE > 1u ) || \
( ADI_SPI2_CFG_ENABLE > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_CLK_PHASE > 1u ) || \
( ADI_SPI1_CFG_CLK_PHASE > 1u ) || \
( ADI_SPI2_CFG_CLK_PHASE > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_CLK_POLARITY > 1u ) || \
( ADI_SPI1_CFG_CLK_POLARITY > 1u ) || \
( ADI_SPI2_CFG_CLK_POLARITY > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_WIRED_OR > 1u ) || \
( ADI_SPI1_CFG_WIRED_OR > 1u ) || \
( ADI_SPI2_CFG_WIRED_OR > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_LSB_MSB > 1u ) || \
( ADI_SPI1_CFG_LSB_MSB > 1u ) || \
( ADI_SPI2_CFG_LSB_MSB > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_TRANSFER_INITIATE > 1u ) || \
( ADI_SPI1_CFG_TRANSFER_INITIATE > 1u ) || \
( ADI_SPI2_CFG_TRANSFER_INITIATE > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_TX_UNDERFLOW > 1u ) || \
( ADI_SPI1_CFG_TX_UNDERFLOW > 1u ) || \
( ADI_SPI2_CFG_TX_UNDERFLOW > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_RX_OVERFLOW > 1u ) || \
( ADI_SPI1_CFG_RX_OVERFLOW > 1u ) || \
( ADI_SPI2_CFG_RX_OVERFLOW > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_MISO_ENABLE > 1u ) || \
( ADI_SPI1_CFG_MISO_ENABLE > 1u ) || \
( ADI_SPI2_CFG_MISO_ENABLE > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_LOOPBACK > 1u ) || \
( ADI_SPI1_CFG_LOOPBACK > 1u ) || \
( ADI_SPI2_CFG_LOOPBACK > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_CONTINUOUS > 1u ) || \
( ADI_SPI1_CFG_CONTINUOUS > 1u ) || \
( ADI_SPI2_CFG_CONTINUOUS > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_RX_FLUSH > 1u ) || \
( ADI_SPI1_CFG_RX_FLUSH > 1u ) || \
( ADI_SPI2_CFG_RX_FLUSH > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_SPI0_CFG_TX_FLUSH > 1u ) || \
( ADI_SPI1_CFG_TX_FLUSH > 1u ) || \
( ADI_SPI2_CFG_TX_FLUSH > 1u )
#error "Invalid configuration"
#endif
/*! @} */
#endif /* ADI_SPI_CONFIG_H__ */

355
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_sport_config.h Executable file
View File

@ -0,0 +1,355 @@
/*! ****************************************************************************
* @file adi_sport_config.h
* @brief Configuration options for SPORT driver.
* @details This is specific to the SPORT driver and will be included by the
* driver. It is not required for the application to include this
* header file.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef ADI_SPORT_CONFIG_H
#define ADI_SPORT_CONFIG_H
#include <adi_global_config.h>
/** @addtogroup SPORT_Driver_Config Static Configuration
* @ingroup SPORT_Driver
* @{
*/
/************* SPORT Driver configurations FOR SPORT-0-A ***************/
/*!
Frame Sync Multiplexer Select.\n
0 - Disable frame sync multiplexing\n
1 - Enable frame sync multiplexing.
*/
#define ADI_CFG_SPORT0A_ENABLE_FSMUXSEL (0u)
/*!
Clock Multiplexer Select.\n
0 - Disable serial clock multiplexing\n
1 - Enable serial clock multiplexing.
*/
#define ADI_CFG_SPORT0A_ENABLE_CKMUXSEL (1u)
/*!
Least-Significant Bit First.\n
0 - MSB first sent/received.\n
1 - LSB first sent/received.
*/
#define ADI_CFG_SPORT0A_LSB_FIRST (0u)
/*!
Serial Word Length in bits.\n
1 - 32 - SPORT word length
*/
#define ADI_CFG_SPORT0A_SERIAL_WLEN (32u)
/*!
Internal Clock.\n
0 - External clock.\n
1 - Internal clock.
*/
#define ADI_CFG_SPORT0A_INTERNAL_CLK (1u)
/*!
Operation Mode\n
0 - DSP standard.\n
1 - Timer_enable mode.
*/
#define ADI_CFG_SPORT0A_OPERATION_MODE (0u)
/*!
Clock Rising Edge\n
0 - Clock falling edge\n
1 - Clock rising edge.
*/
#define ADI_CFG_SPORT0A_CLOCK_EDGE (0u)
/*!
Frame Sync Required\n
0 - No frame sync required \n
1 - Frame sync required.
*/
#define ADI_CFG_SPORT0A_FS_REQUIRED (1u)
/*!
Internal Frame Sync\n
0 - External frame sync\n
1 - Internal frame sync
*/
#define ADI_CFG_SPORT0A_INTERNAL_FS (0u)
/*!
Data-Independent Frame Sync\n
0 - Data-dependent frame sync\n
1 - Data-independent frame
*/
#define ADI_CFG_SPORT0A_DATA_INDEPENDENT_FS (0u)
/*!
Active-Low Frame Sync\n
0 - Active high frame sync\n
1 - Active low frame sync
*/
#define ADI_CFG_SPORT0A_ACTIVE_LOW_FS (0u)
/*!
Late Frame Sync\n
0 - Early frame sync\n
1 - Late frame sync
*/
#define ADI_CFG_SPORT0A_LATE_FS (0u)
/*!
Enable Packing \n
0 - Disable\n
1 - 8-bit packing enable\n
2 - 16-bit packing enable
*/
#define ADI_CFG_SPORT0A_ENABLE_PACKING (0u)
/*!
Frame Sync Error Operation
0 - Flag the Frame Sync error\n
1 - When frame Sync error occurs, discard the receive data
*/
#define ADI_CFG_SPORT0A_FS_ERROR_OPERATION (1u)
/*!
Enabling Gated Clock\n
0 - Disable Gated Clock\n
1 - Enable Gated Clock
*/
#define ADI_CFG_SPORT0A_GATED_CLOCK (0u)
/*!
Serial Clock divisor.\n
0 - 65535 - Serial Clock Divisor which SPORT device use to calculate the serial
clock (ACLK) from the processor system clock (PCLK).
*/
#define ADI_CFG_SPORT0A_CLOCK_DIVISOR (2u)
/*!
Frame Sync Divisor.\n
0 - 128 - Frame Sync Divisor which select the number of transmit or receive clock
cycles that the half SPORT counts before generating a frame sync pulse.
*/
#define ADI_CFG_SPORT0A_FS_DIVISOR (0x40u)
/*!
CONVT to FS duration.\n
0 - 128 - Specify the value of the number of clocks which would be programmed
corresponding to the desired time duration from assertion of CONVT
signal to Frame sync signal
*/
#define ADI_CFG_SPORT0A_CONVT_FS_DURATION (1u)
/*!
Polarity of the Convt signal.\n
0 - Active High Polarity\n
1 - Active low Polarity
*/
#define ADI_CFG_SPORT0A_CONVT_POLARITY (0u)
/*!
CONVT signal width.\n
0 - 15 - Specify the value of the number of serial clocks for which CONVT
signal should be active
*/
#define ADI_CFG_SPORT0A_CONVT_WIDTH (1u)
#if defined(ADI_CFG_SPORT0A_SERIAL_WLEN)
#if (ADI_CFG_SPORT0A_SERIAL_WLEN <= 3u) || (ADI_CFG_SPORT0A_SERIAL_WLEN > 32u)
#error "Invalid word length : it must be between 4 and 32"
#endif
#else
#error "ADI_CFG_SPORT0A_SERIAL_WLEN undefined!!! "
#endif
/************* SPORT Driver configurations FOR SPORT-0-B ***************/
/*!
Least-Significant Bit First.\n
0 - MSB first sent/received.\n
1 - LSB first sent/received.
*/
#define ADI_CFG_SPORT0B_LSB_FIRST (0u)
/*!
Serial Word Length in bits.\n
1 - 32 - SPORT word length
*/
#define ADI_CFG_SPORT0B_SERIAL_WLEN (32u)
/*!
Internal Clock.\n
0 - External clock.\n
1 - Internal clock.
*/
#define ADI_CFG_SPORT0B_INTERNAL_CLK (1u)
/*!
Operation Mode\n
0 - DSP standard.\n
1 - Timer_enable mode.
*/
#define ADI_CFG_SPORT0B_OPERATION_MODE (0u)
/*!
Clock Rising Edge\n
0 - Clock falling edge\n
1 - Clock rising edge.
*/
#define ADI_CFG_SPORT0B_CLOCK_EDGE (0u)
/*!
Frame Sync Required\n
0 - No frame sync required \n
1 - Frame sync required.
*/
#define ADI_CFG_SPORT0B_FS_REQUIRED (1u)
/*!
Internal Frame Sync\n
0 - External frame sync\n
1 - Internal frame sync
*/
#define ADI_CFG_SPORT0B_INTERNAL_FS (1u)
/*!
Data-Independent Frame Sync\n
0 - Data-dependent frame sync\n
1 - Data-independent frame
*/
#define ADI_CFG_SPORT0B_DATA_INDEPENDENT_FS (0u)
/*!
Active-Low Frame Sync\n
0 - Active high frame sync\n
1 - Active low frame sync
*/
#define ADI_CFG_SPORT0B_ACTIVE_LOW_FS (0u)
/*!
Late Frame Sync\n
0 - Early frame sync\n
1 - Late frame sync
*/
#define ADI_CFG_SPORT0B_LATE_FS (0u)
/*!
Enable Packing \n
0 - Disable\n
1 - 8-bit packing enable\n
2 - 16-bit packing enable\n
*/
#define ADI_CFG_SPORT0B_ENABLE_PACKING (0u)
/*!
Frame Sync Error Operation\n
0 - Flag the Frame Sync error\n
1 - When frame Sync error occurs, discard the receive data
*/
#define ADI_CFG_SPORT0B_FS_ERROR_OPERATION (1u)
/*!
Enabling Gated Clock\n
0 - Disable Gated Clock\n
1 - Enable Gated Clock
*/
#define ADI_CFG_SPORT0B_GATED_CLOCK (0u)
/*!
Serial Clock divisor.\n
0 - 65535 - Serial Clock Divisor which SPORT device use to calculate the serial
clock (ACLK) from the processor system clock (PCLK).
*/
#define ADI_CFG_SPORT0B_CLOCK_DIVISOR (2u)
/*!
Frame Sync Divisor.\n
0 - 128 - Frame Sync Divisor which select the number of transmit or receive clock
cycles that the half SPORT counts before generating a frame sync pulse.
*/
#define ADI_CFG_SPORT0B_FS_DIVISOR (0x40u)
/*!
CONVT to FS duration.\n
0 - 128 - Specify the value of the number of clocks which would be programmed
corresponding to the desired time duration from assertion of CONVT
signal to Frame sync signal
*/
#define ADI_CFG_SPORT0B_CONVT_FS_DURATION (1u)
/*!
Polarity of the Convt signal.\n
0 - Active High Polarity\n
1 - Active low Polarity
*/
#define ADI_CFG_SPORT0B_CONVT_POLARITY (0u)
/*!
CONVT signal width.\n
0-15 - Specify the value of the number of serial clocks for which CONVT
signal should be active
*/
#define ADI_CFG_SPORT0B_CONVT_WIDTH (1u)
#if defined(ADI_CFG_SPORT0B_SERIAL_WLEN)
#if (ADI_CFG_SPORT0B_SERIAL_WLEN <= 3u) || (ADI_CFG_SPORT0B_SERIAL_WLEN > 32u)
#error "Invalid word length : it must be between 4 and 32"
#endif
#else
#error "ADI_CFG_SPORT0B_SERIAL_WLEN undefined!!! "
#endif
/*! @} */
#endif /* ADI_SPORT_CONFIG_H */

902
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_tmr_config.h Executable file
View File

@ -0,0 +1,902 @@
/*! *****************************************************************************
* @file adi_tmr_config.h
* @brief GP and RGB timer device driver configuration
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_TMR_CONFIG_H
#define ADI_TMR_CONFIG_H
#include <adi_global_config.h>
/** @addtogroup TMR_Driver_Config Static Configuration
* @ingroup TMR_Driver
* @{
*/
/*! Static configuration allows all 3 GP timers and the RGB timer to be configured
with the parameters in this file by simply calling #adi_tmr_Init. The user can
then call any of the configuration API's to override the static configuration,
or simply call #adi_tmr_Enable to start the timer. Since all of these parameters
must be stored in arrays for abstraction, using static configuration will increase the
data footprint. If the user doesn't call any of the runtime configuration API's, the
linker will throw them out and the code footprint will be reduced significantly. Using
static configuration also reduces cycle count and simplifies the user application.
Static configuration should be used if the timers need to be configured once and do not
need to be changed during the system lifetime.
0 - Disable static confiscation support. User must call #adi_tmr_ConfigTimer and other
configuration API's after calling #adi_tmr_Init and prior to calling #adi_tmr_Enable
in order to set up the timer.
1 - Enable static configuration support. The timer registers will be set based on the
settings in this file when #adi_tmr_Init is called.
*/
#define ADI_TIMER_ENABLE_STATIC_CONFIG_SUPPORT (0u)
/*************************************************************
GP Timer 0 Configuration
*************************************************************/
/** @addtogroup GPTimer0_Driver_Config GP Timer 0 Static Configuration
* @ingroup TMR_Driver_Config
* @{
*/
/*! Count up or down. Used to control whether the timer increments (counts up)
or decrements (counts down) the Up/Down counter, it can be set to\n
0 - Timer is set to count down.\n
1 - Timer is set to count up.
*/
#define TMR0_CFG_COUNT_UP (0u)
/*! Timer mode. Used to control whether the timer runs in periodic or
free running mode, it can be set to\n
0 - Timer is in free running mode.\n
1 - Timer is in periodic mode.
*/
#define TMR0_CFG_MODE (1u)
/*! Prescale factor. Controls the prescaler division factor
to the timer's selected clock. It can be set to\n
0 - source_clock/[1 or 4]\n
1 - source_clock/16\n
2 - source_clock/64\n
3 - source_clock/256
*/
#define TMR0_CFG_PRESCALE_FACTOR (0u)
/*! Timer clock source. Used to select a timer clock from the four
available clock sources, it can be set to\n
0 - Select PCLK\n
1 - Select HFOSC\n
2 - Select LFOSC\n
3 - Select LFXTAL
*/
#define TMR0_CFG_CLOCK_SOURCE (0u)
/*! Timer load value. The Up/Down counter is periodically loaded with this
value if periodic mode is selected. LOAD writes during Up/Down counter timeout events
are delayed until the event has passed. It can be set to any value from 0 to 65535.
*/
#define TMR0_CFG_LOAD_VALUE (0x8F9Cu)
/*! Timer asynchrounous load value. The Up/Down counter is periodically loaded with
this value if periodic mode is selected. Writing Asynchronous Load value takes
advantage of having the timer run on PCLK by bypassing clock synchronization
logic otherwise required. It can be set to any value from 0 to 65535.
*/
#define TMR0_CFG_ASYNC_LOAD_VALUE (0x8F9Cu)
/*! Reload control. This allows the user to select whether the Up/Down counter should be
reset only on a timeout event or also when interrupt is cleared. It can be set to\n
0 - Up/down counter is only reset on a time out event.\n
1 - Resets the up/down counter when the interrupt is cleared.
*/
#define TMR0_CFG_ENABLE_RELOADING (0u)
/*! Enable or disable Synchronization bypass\n
0 - Disable Synchronization bypass.\n
1 - Enable Synchronization bypass.
*/
#define TMR0_CFG_ENABLE_SYNC_BYPASS (0u)
/*************************************************************
GP Timer 0 Event Configuration
*************************************************************/
/*! Enable or disable event capture. It can be set to\n
0 - Disable event capturing.\n
1 - Enable event capturing.
*/
#define TMR0_CFG_ENABLE_EVENT_CAPTURE (1u)
/*! Enable or disable prescale reset\n
0 - Disable rescale reset.\n
1 - Enable rescale reset.
*/
#define TMR0_CFG_ENABLE_PRESCALE_RESET (0u)
/*! Event to be captured. One of the selected 40 events associated
with a general purpose time can be captured. It can be set to
a value of 0 - 39. Please refer hardware reference manual to know
which events can be captured by a particular GP timer.
*/
#define TMR0_CFG_EVENT_CAPTURE (27u)
/*************************************************************
GP Timer 0 PWM0 Configuration
*************************************************************/
/*! Timer PWM Enable Match. This will control PWM operation mode of the timer.
Toggle mode provides a 50% duty cycle and match mode provides a configurable
duty cycle by using the match value. This vlaue can be set to\n
0 - PWM in toggle mode.\n
1 - PWM in match mode.
*/
#define TMR0_CFG_ENABLE_PWM0_MATCH_MODE (1u)
/*! Timer PWM Idle state. This will control PWM idle state. It can be set to\n
0 - PWM idles low.\n
1 - PWM idles high.
*/
#define TMR0_CFG_PWM0_IDLE_STATE (1u)
/*! PWM Match value. The value is used when the PWM is operating in match mode.
The PWM output is asserted when the Up/Down counter is equal to this match value.
PWM output is deasserted again when a timeout event occurs.
If the match value is never reached, or occurs simultaneous to a timeout event,
the PWM output remains idle. It can be any value from 0 to 65535.
*/
#define TMR0_CFG_PWM0_MATCH_VALUE (0x0E5Cu)
/*! @} */
/*************************************************************
GP Timer 1 Configuration
*************************************************************/
/** @addtogroup GPTimer1_Driver_Config GP Timer 1 Static Configuration
* @ingroup TMR_Driver_Config
* @{
*/
/*! Count up or down. Used to control whether the timer increments (counts up)
or decrements (counts down) the Up/Down counter, it can be set to\n
0 - Timer is set to count down.\n
1 - Timer is set to count up.
*/
#define TMR1_CFG_COUNT_UP (0u)
/*! Timer mode. Used to control whether the timer runs in periodic or
free running mode, it can be set to\n
0 - Timer is in free running mode.\n
1 - Timer is in periodic mode.
*/
#define TMR1_CFG_MODE (1u)
/*! Prescale factor. Controls the prescaler division factor
to the timer's selected clock. It can be set to\n
0 - source_clock/[1 or 4]\n
1 - source_clock/16\n
2 - source_clock/64\n
3 - source_clock/256
*/
#define TMR1_CFG_PRESCALE_FACTOR (0u)
/*! Timer clock source. Used to select a timer clock from the four
available clock sources, it can be set to\n
0 - Select PCLK\n
1 - Select HFOSC\n
2 - Select LFOSC\n
3 - Select LFXTAL
*/
#define TMR1_CFG_CLOCK_SOURCE (0u)
/*! Timer load value. The Up/Down counter is periodically loaded with this
value if periodic mode is selected. LOAD writes during Up/Down counter timeout events
are delayed until the event has passed. It can be set to any value from 0 to 65535.
*/
#define TMR1_CFG_LOAD_VALUE (0x23E7u)
/*! Timer asynchronous load value. The Up/Down counter is periodically loaded with
this value if periodic mode is selected. Writing Asynchronous Load value takes
advantage of having the timer run on PCLK by bypassing clock synchronization
logic otherwise required. It can be set to any value from 0 to 65535.
*/
#define TMR1_CFG_ASYNC_LOAD_VALUE (0x23E7u)
/*! Reload control. This allows the user to select whether the Up/Down counter should be
reset only on a timeout event or also when interrupt is cleared. It can be set to\n
0 - Up/down counter is only reset on a time out event.\n
1 - Resets the up/down counter when the interrupt is cleared.
*/
#define TMR1_CFG_ENABLE_RELOADING (0u)
/*! Enable or disable Synchronization bypass\n
0 - Disable Synchronization bypass.\n
1 - Enable Synchronization bypass.
*/
#define TMR1_CFG_ENABLE_SYNC_BYPASS (0u)
/*************************************************************
GP Timer 1 Event Configuration
*************************************************************/
/*! Enable or disable event capture. It can be set to\n
0 - Disable event capturing.\n
1 - Enable event capturing.
*/
#define TMR1_CFG_ENABLE_EVENT_CAPTURE (1u)
/*! Enable or disable prescale reset\n
0 - Disable rescale reset.\n
1 - Enable rescale reset.
*/
#define TMR1_CFG_ENABLE_PRESCALE_RESET (0u)
/*! Event to be captured. One of the selected 40 events associated
with a general purpose time can be captured. It can be set to
a value of 0 - 39. Please refer hardware reference manual to know
which events can be captured by a particular GP timer.
*/
#define TMR1_CFG_EVENT_CAPTURE (28u)
/*************************************************************
GP Timer 1 PWM0 Configuration
*************************************************************/
/*! Timer PWM Enable Match. This will control PWM operation mode of the timer.
Toggle mode provides a 50% duty cycle and match mode provides a configurable
duty cycle by using the match value. This value can be set to\n
0 - PWM in toggle mode.\n
1 - PWM in match mode.
*/
#define TMR1_CFG_ENABLE_PWM0_MATCH_MODE (1u)
/*! Timer PWM Idle state. This will control PWM idle state. It can be set to\n
0 - PWM idles low.\n
1 - PWM idles high.
*/
#define TMR1_CFG_PWM0_IDLE_STATE (1u)
/*! PWM Match value. The value is used when the PWM is operating in match mode.
The PWM output is asserted when the Up/Down counter is equal to this match value.
PWM output is deasserted again when a timeout event occurs.
If the match value is never reached, or occurs simultaneous to a timeout event,
the PWM output remains idle. It can be any value from 0 to 65535.
*/
#define TMR1_CFG_PWM0_MATCH_VALUE (0x08F9u)
/*! @} */
/*************************************************************
GP Timer 2 Configuration
*************************************************************/
/** @addtogroup GPTimer2_Driver_Config GP Timer 2 Static Configuration
* @ingroup TMR_Driver_Config
* @{
*/
/*! Count up or down. Used to control whether the timer increments (counts up)
or decrements (counts down) the Up/Down counter, it can be set to\n
0 - Timer is set to count down.\n
1 - Timer is set to count up.
*/
#define TMR2_CFG_COUNT_UP (0u)
/*! Timer mode. Used to control whether the timer runs in periodic or
free running mode, it can be set to\n
0 - Timer is in free running mode.\n
1 - Timer is in periodic mode.
*/
#define TMR2_CFG_MODE (1u)
/*! Prescale factor. Controls the prescaler division factor
to the timer's selected clock. It can be set to\n
0 - source_clock/[1 or 4]\n
1 - source_clock/16\n
2 - source_clock/64\n
3 - source_clock/256
*/
#define TMR2_CFG_PRESCALE_FACTOR (0u)
/*! Timer clock source. Used to select a timer clock from the four
available clock sources, it can be set to\n
0 - Select PCLK\n
1 - Select HFOSC\n
2 - Select LFOSC\n
3 - Select LFXTAL
*/
#define TMR2_CFG_CLOCK_SOURCE (0u)
/*! Timer load value. The Up/Down counter is periodically loaded with this
value if periodic mode is selected. LOAD writes during Up/Down counter timeout events
are delayed until the event has passed. It can be set to any value from 0 to 65535.
*/
#define TMR2_CFG_LOAD_VALUE (0x0E5Cu)
/*! Timer asynchronous load value. The Up/Down counter is periodically loaded with
this value if periodic mode is selected. Writing Asynchronous Load value takes
advantage of having the timer run on PCLK by bypassing clock synchronization
logic otherwise required. It can be set to any value from 0 to 65535.
*/
#define TMR2_CFG_ASYNC_LOAD_VALUE (0x0E5Cu)
/*! Reload control. This allows the user to select whether the Up/Down counter should be
reset only on a timeout event or also when interrupt is cleared. It can be set to\n
0 - Up/down counter is only reset on a time out event.\n
1 - Resets the up/down counter when the interrupt is cleared.
*/
#define TMR2_CFG_ENABLE_RELOADING (0u)
/*! Enable or disable Synchronization bypass\n
0 - Disable Synchronization bypass.\n
1 - Enable Synchronization bypass.
*/
#define TMR2_CFG_ENABLE_SYNC_BYPASS (0u)
/*************************************************************
GP Timer 2 Event Configuration
*************************************************************/
/*! Enable or disable event capture. It can be set to\n
0 - Disable event capturing.\n
1 - Enable event capturing.
*/
#define TMR2_CFG_ENABLE_EVENT_CAPTURE (1u)
/*! Enable or disable prescale reset\n
0 - Disable rescale reset.\n
1 - Enable rescale reset.
*/
#define TMR2_CFG_ENABLE_PRESCALE_RESET (0u)
/*! Event to be captured. One of the selected 40 events associated
with a general purpose time can be captured. It can be set to
a value of 0 - 39. Please refer hardware reference manual to know
which events can be captured by a particular GP timer.
*/
#define TMR2_CFG_EVENT_CAPTURE (27u)
/*************************************************************
GP Timer 2 PWM0 Configuration
*************************************************************/
/*! Timer PWM Enable Match. This will control PWM operation mode of the timer.
Toggle mode provides a 50% duty cycle and match mode provides a configurable
duty cycle by using the match value. This value can be set to\n
0 - PWM in toggle mode.\n
1 - PWM in match mode.
*/
#define TMR2_CFG_ENABLE_PWM0_MATCH_MODE (1u)
/*! Timer PWM Idle state. This will control PWM idle state. It can be set to\n
0 - PWM idles low.\n
1 - PWM idles high.
*/
#define TMR2_CFG_PWM0_IDLE_STATE (1u)
/*! PWM Match value. The value is used when the PWM is operating in match mode.
The PWM output is asserted when the Up/Down counter is equal to this match value.
PWM output is deasserted again when a timeout event occurs.
If the match value is never reached, or occurs simultaneous to a timeout event,
the PWM output remains idle. It can be any value from 0 to 65535.
*/
#define TMR2_CFG_PWM0_MATCH_VALUE (0x02DFu)
/*! @} */
/*************************************************************
RGB Timer Configuration
*************************************************************/
/** @addtogroup RGBTimer_Driver_Config RGB Timer Static Configuration
* @ingroup TMR_Driver_Config
* @{
*/
/*! Count up or down. Used to control whether the timer increments (counts up)
or decrements (counts down) the Up/Down counter, it can be set to\n
0 - Timer is set to count down.\n
1 - Timer is set to count up.
*/
#define TMR3_CFG_COUNT_UP (0u)
/*! Timer mode. Used to control whether the timer runs in periodic or
free running mode, it can be set to\n
0 - Timer is in free running mode.\n
1 - Timer is in periodic mode.
*/
#define TMR3_CFG_MODE (1u)
/*! Prescale factor. Controls the prescaler division factor
to the timer's selected clock. It can be set to\n
0 - source_clock/[1 or 4]\n
1 - source_clock/16\n
2 - source_clock/64\n
3 - source_clock/256
*/
#define TMR3_CFG_PRESCALE_FACTOR (0u)
/*! Timer clock source. Used to select a timer clock from the four
available clock sources, it can be set to\n
0 - Select PCLK\n
1 - Select HFOSC\n
2 - Select LFOSC\n
3 - Select LFXTAL
*/
#define TMR3_CFG_CLOCK_SOURCE (0u)
/*! Timer load value. The Up/Down counter is periodically loaded with this
value if periodic mode is selected. LOAD writes during Up/Down counter timeout events
are delayed until the event has passed. It can be set to any value from 0 to 65535.
*/
#define TMR3_CFG_LOAD_VALUE (0x47CEu)
/*! Timer asynchronous load value. The Up/Down counter is periodically loaded with
this value if periodic mode is selected. Writing asynchronous Load value takes
advantage of having the timer run on PCLK by bypassing clock synchronization
logic otherwise required. It can be set to any value from 0 to 65535.
*/
#define TMR3_CFG_ASYNC_LOAD_VALUE (0x47CEu)
/*! Reload control. This allows the user to select whether the Up/Down counter should be
reset only on a timeout event or also when interrupt is cleared. It can be set to\n
0 - Up/down counter is only reset on a time out event.\n
1 - Resets the up/down counter when the interrupt is cleared.
*/
#define TMR3_CFG_ENABLE_RELOADING (0u)
/*! Enable or disable Synchronization bypass\n
0 - Disable Synchronization bypass.\n
1 - Enable Synchronization bypass.
*/
#define TMR3_CFG_ENABLE_SYNC_BYPASS (0u)
/*************************************************************
RGB Timer Event Configuration
*************************************************************/
/*! Enable or disable event capture. It can be set to\n
0 - Disable event capturing.\n
1 - Enable event capturing.
*/
#define TMR3_CFG_ENABLE_EVENT_CAPTURE (1u)
/*! Enable or disable prescale reset\n
0 - Disable rescale reset.\n
1 - Enable rescale reset.
*/
#define TMR3_CFG_ENABLE_PRESCALE_RESET (0u)
/*! Event to be captured. One of the selected 40 events associated
with a general purpose time can be captured. It can be set to
a value of 0 - 39. Please refer hardware reference manual to know
which events can be captured by a particular GP timer.
*/
#define TMR3_CFG_EVENT_CAPTURE (28u)
/*************************************************************
RGB Timer PWM0 Configuration
*************************************************************/
/*! Timer PWM Enable Match. This will control PWM operation mode of the timer.
Toggle mode provides a 50% duty cycle and match mode provides a configurable
duty cycle by using the match value. This value can be set to\n
0 - PWM in toggle mode.\n
1 - PWM in match mode.
*/
#define TMR3_CFG_ENABLE_PWM0_MATCH_MODE (1u)
/*! Timer PWM Idle state. This will control PWM idle state. It can be set to\n
0 - PWM idles low.\n
1 - PWM idles high.
*/
#define TMR3_CFG_PWM0_IDLE_STATE (1u)
/*! PWM Match value. The value is used when the PWM is operating in match mode.
The PWM output is asserted when the Up/Down counter is equal to this match value.
PWM output is deasserted again when a timeout event occurs.
If the match value is never reached, or occurs simultaneous to a timeout event,
the PWM output remains idle. It can be any value from 0 to 65535.
*/
#define TMR3_CFG_PWM0_MATCH_VALUE (0x23E7u)
/*************************************************************
RGB Timer PWM1 Configuration
*************************************************************/
/*! Timer PWM Enable Match. This will control PWM operation mode of the timer.
Toggle mode provides a 50% duty cycle and match mode provides a configurable
duty cycle by using the match value. This value can be set to\n
0 - PWM in toggle mode.\n
1 - PWM in match mode.
*/
#define TMR3_CFG_ENABLE_PWM1_MATCH_MODE (0u)
/*! Timer PWM Idle state. This will control PWM idle state. It can be set to\n
0 - PWM idles low.\n
1 - PWM idles high.
*/
#define TMR3_CFG_PWM1_IDLE_STATE (0u)
/*! PWM Match value. The value is used when the PWM is operating in match mode.
The PWM output is asserted when the Up/Down counter is equal to this match value.
PWM output is deasserted again when a timeout event occurs.
If the match value is never reached, or occurs simultaneous to a timeout event,
the PWM output remains idle. It can be any value from 0 to 65535.
*/
#define TMR3_CFG_PWM1_MATCH_VALUE (0u)
/*************************************************************
RGB Timer PWM2 Configuration
*************************************************************/
/*! Timer PWM Enable Match. This will control PWM operation mode of the timer.
Toggle mode provides a 50% duty cycle and match mode provides a configurable
duty cycle by using the match value. This value can be set to\n
0 - PWM in toggle mode.\n
1 - PWM in match mode.
*/
#define TMR3_CFG_ENABLE_PWM2_MATCH_MODE (0u)
/*! Timer PWM Idle state. This will control PWM idle state. It can be set to\n
0 - PWM idles low.\n
1 - PWM idles high.
*/
#define TMR3_CFG_PWM2_IDLE_STATE (0u)
/*! PWM Match value. The value is used when the PWM is operating in match mode.
The PWM output is asserted when the Up/Down counter is equal to this match value.
PWM output is deasserted again when a timeout event occurs.
If the match value is never reached, or occurs simultaneous to a timeout event,
the PWM output remains idle. It can be any value from 0 to 65535.
*/
#define TMR3_CFG_PWM2_MATCH_VALUE (0u)
/*! @} */
/*************************************************************
GP Timer 0 Macro Validation
**************************************************************/
#if TMR0_CFG_COUNT_UP > 1u
#error "Invalid configuration"
#endif
#if TMR0_CFG_MODE > 1u
#error "Invalid configuration"
#endif
#if TMR0_CFG_PRESCALE_FACTOR > 3u
#error "Invalid configuration"
#endif
#if TMR0_CFG_CLOCK_SOURCE > 3u
#error "Invalid configuration"
#endif
#if TMR0_CFG_LOAD_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
#if TMR0_CFG_ASYNC_LOAD_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
#if TMR0_CFG_ENABLE_RELOADING > 1u
#error "Invalid configuration"
#endif
#if TMR0_CFG_ENABLE_SYNC_BYPASS > 1u
#error "Invalid configuration"
#endif
#if TMR0_CFG_ENABLE_PRESCALE_RESET > 1u
#error "Invalid configuration"
#endif
#if TMR0_CFG_ENABLE_EVENT_CAPTURE > 1u
#error "Invalid configuration"
#endif
#if TMR0_CFG_EVENT_CAPTURE > 39u
#error "Invalid configuration"
#endif
#if TMR0_CFG_ENABLE_PWM0_MATCH_MODE > 1u
#error "Invalid configuration"
#endif
#if TMR0_CFG_PWM0_IDLE_STATE > 1u
#error "Invalid configuration"
#endif
#if TMR0_CFG_PWM0_MATCH_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
/*************************************************************
GP Timer 1 Macro Validation
**************************************************************/
#if TMR1_CFG_COUNT_UP > 1u
#error "Invalid configuration"
#endif
#if TMR1_CFG_MODE > 1u
#error "Invalid configuration"
#endif
#if TMR1_CFG_PRESCALE_FACTOR > 3u
#error "Invalid configuration"
#endif
#if TMR1_CFG_CLOCK_SOURCE > 3u
#error "Invalid configuration"
#endif
#if TMR1_CFG_LOAD_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
#if TMR1_CFG_ASYNC_LOAD_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
#if TMR1_CFG_ENABLE_RELOADING > 1u
#error "Invalid configuration"
#endif
#if TMR1_CFG_ENABLE_SYNC_BYPASS > 1u
#error "Invalid configuration"
#endif
#if TMR1_CFG_ENABLE_PRESCALE_RESET > 1u
#error "Invalid configuration"
#endif
#if TMR1_CFG_ENABLE_EVENT_CAPTURE > 1u
#error "Invalid configuration"
#endif
#if TMR1_CFG_EVENT_CAPTURE > 39u
#error "Invalid configuration"
#endif
#if TMR1_CFG_ENABLE_PWM0_MATCH_MODE > 1u
#error "Invalid configuration"
#endif
#if TMR1_CFG_PWM0_IDLE_STATE > 1u
#error "Invalid configuration"
#endif
#if TMR1_CFG_PWM0_MATCH_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
/*************************************************************
GP Timer 2 Macro Validation
**************************************************************/
#if TMR2_CFG_COUNT_UP > 1u
#error "Invalid configuration"
#endif
#if TMR2_CFG_MODE > 1u
#error "Invalid configuration"
#endif
#if TMR2_CFG_PRESCALE_FACTOR > 3u
#error "Invalid configuration"
#endif
#if TMR2_CFG_CLOCK_SOURCE > 3u
#error "Invalid configuration"
#endif
#if TMR2_CFG_LOAD_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
#if TMR2_CFG_ASYNC_LOAD_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
#if TMR2_CFG_ENABLE_RELOADING > 1u
#error "Invalid configuration"
#endif
#if TMR2_CFG_ENABLE_SYNC_BYPASS > 1u
#error "Invalid configuration"
#endif
#if TMR2_CFG_ENABLE_PRESCALE_RESET > 1u
#error "Invalid configuration"
#endif
#if TMR2_CFG_ENABLE_EVENT_CAPTURE > 1u
#error "Invalid configuration"
#endif
#if TMR2_CFG_EVENT_CAPTURE > 39u
#error "Invalid configuration"
#endif
#if TMR2_CFG_ENABLE_PWM0_MATCH_MODE > 1u
#error "Invalid configuration"
#endif
#if TMR2_CFG_PWM0_IDLE_STATE > 1u
#error "Invalid configuration"
#endif
#if TMR2_CFG_PWM0_MATCH_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
/*************************************************************
RGB Timer Macro Validation
**************************************************************/
#if TMR3_CFG_COUNT_UP > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_MODE > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_PRESCALE_FACTOR > 3u
#error "Invalid configuration"
#endif
#if TMR3_CFG_CLOCK_SOURCE > 3u
#error "Invalid configuration"
#endif
#if TMR3_CFG_LOAD_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
#if TMR3_CFG_ASYNC_LOAD_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
#if TMR3_CFG_ENABLE_RELOADING > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_ENABLE_SYNC_BYPASS > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_ENABLE_PRESCALE_RESET > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_ENABLE_EVENT_CAPTURE > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_EVENT_CAPTURE > 39u
#error "Invalid configuration"
#endif
#if TMR3_CFG_ENABLE_PWM0_MATCH_MODE > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_PWM0_IDLE_STATE > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_PWM0_MATCH_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
#if TMR3_CFG_ENABLE_PWM1_MATCH_MODE > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_PWM1_IDLE_STATE > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_PWM1_MATCH_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
#if TMR3_CFG_ENABLE_PWM2_MATCH_MODE > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_PWM2_IDLE_STATE > 1u
#error "Invalid configuration"
#endif
#if TMR3_CFG_PWM2_MATCH_VALUE > 0xFFFFu
#error "Invalid configuration"
#endif
/*! @} */
#endif /* ADI_TMR_CONFIG_H */

496
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_uart_config.h Executable file
View File

@ -0,0 +1,496 @@
/*!
*****************************************************************************
@file: adi_uart_config.h
@brief: Configuration options for UART driver.
This is specific to the UART driver and will be included by the driver.
It is not required for the application to include this header file.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_UART_CONFIG_H
#define ADI_UART_CONFIG_H
/** @addtogroup UART_Driver_Config Static Configuration
* @ingroup UART_Driver
* @{
*/
#include <adi_global_config.h>
/************** Common UART Driver configurations ************** */
/*!
Enable the autobaud detection. \n
Range: 0 to 1.
*/
#define ADI_UART_CFG_ENABLE_AUTOBAUD 1
/** @addtogroup UART0_Driver_Config UART0 Static Configuration
* @ingroup UART_Driver_Config
* @{
*/
/************** UART Driver configurations FOR UART 0 ************** */
/*!
Word length Select. \n
0 - 5 Bits word length. \n
1 - 6 Bits word length. \n
2 - 7 Bits word length. \n
3 - 8 Bits word length.
*/
#define ADI_UART0_CFG_WORD_LENGTH 3
/*!
Stop bit selection. \n
0 - Send 1 stop bit regardless of the word length. \n
1 - Send a number of stop bits based on the word length. \n
WORD-LENGTH 5 Bits => 1.5 Stop Bits. \n
WORD-LENGTH (6/7/8) Bits => 2 Stop Bits.
*/
#define ADI_UART0_CFG_STOP_BIT 1
/*!
Parity Enable. Used to control the parity bit. \n
0 - Parity will not be transmitted or checked. \n
1 - Parity will be transmitted and checked.
*/
#define ADI_UART0_CFG_ENABLE_PARITY 0
/*!
Parity Select. This bit only has meaning if parity is enabled. \n
0 - Odd parity will be transmitted and checked. \n
1 - Even parity will be transmitted and checked.
*/
#define ADI_UART0_CFG_PARITY_SELECTION 0
/*!
Stick Parity. Used to force parity to defined values. \n
0 - Parity will not be forced. \n
1 - Set parity based on the following bit settings: \n
EPS = 1 and PEN = 1, parity will be forced to 0. \n
EPS = 0 and PEN = 1, parity will be forced to 1. \n
EPS = 1/0 and PEN = 0, no parity will be transmitted.
*/
#define ADI_UART0_CFG_ENABLE_STICKY_PARITY 0
/*
Table 21-2: Baud Rate Examples Based on 26 MHz PCLK
Baud Rate OSR COMDIV DIVM DIVN
9600 3 24 3 1078
19200 3 12 3 1078
38400 3 8 2 1321
57600 3 4 3 1078
115200 3 4 1 1563
230400 3 2 1 1563
460800 3 1 1 1563
921,600 2 1 1 1563
1,000,000 2 1 1 1280
1,500,000 2 1 1 171
These are calculated with the UarDivCalculator tool.
*/
/*!
Fractional baud rate N divide value. \n
Range: 0 to 2047.
*/
#define ADI_UART0_CFG_DIVN 1078
/*!
Fractional baud rate M divide value. \n
Range: 1 to 3.
*/
#define ADI_UART0_CFG_DIVM 3
/*!
Fractional baud rate C divide value. \n
Range: 1 to 65535.
*/
#define ADI_UART0_CFG_DIVC 24
/*!
Over Sample Rate value. \n
Range: 0 to 3. \n
0 - Over sample by 4. \n
1 - Over sample by 8. \n
2 - Over sample by 16. \n
3 - Over sample by 32.
*/
#define ADI_UART0_CFG_OSR 3
/*!
Enable Internal FIFO. \n
Range: 0 to 1.
*/
#define ADI_UART0_CFG_ENABLE_FIFO 1
/*!
TRIG Level for UART device. \n
Range: 0 to 3. \n
0 - 1 byte to trig RX interrupt. \n
1 - 4 bytes to trig RX interrupt. \n
2 - 8 bytes to trig RX interrupt. \n
3 - 14 bytes to trig RX interrupt.
*/
#define ADI_UART0_CFG_TRIG_LEVEL 0
/*!
Hold TX while RX is active. \n
Range: 0 to 1.
*/
#define ADI_UART0_CFG_HOLD_TX 0
/*!
Disable RX when TX is active. \n
Range: 0 to 1. \n
0 - 1 byte to trig RX interrupt. \n
1 - 4 bytes to trig RX interrupt.
*/
#define ADI_UART0_CFG_DISABLE_RX 0
/*!
Configure the SOUT de-assertion earlier than full stop bit(s). \n
Range: 0 to 1. \n
0 - SOUT_EN de-assert same time as full stop bit(s). \n
1 - SOUT_EN de-assert half-bit earlier than full stop bit(s).
*/
#define ADI_UART0_CFG_DEASSERTION 0
/*!
Set the SOUT polarity low. \n
Range: 0 to 1. \n
0 - Active high. \n
1 - Active low.
*/
#define ADI_UART0_CFG_SOUT_POLARITY 0
/*!
Enable the RX status interrupt. \n
Range: 0 to 1.
*/
#define ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT 1
/*!
Enable the Modem status interrupt. \n
Range: 0 to 1.
*/
#define ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT 0
/*! @} */
/*************** UART Driver configurations FOR UART 1 **************/
/** @addtogroup UART1_Driver_Config UART1 Static Configuration
* @ingroup UART_Driver_Config
* @{
*/
/*!
Word length Select. \n
0 - 5 Bits word length. \n
1 - 6 Bits word length. \n
2 - 7 Bits word length. \n
3 - 8 Bits word length.
*/
#define ADI_UART1_CFG_WORD_LENGTH 3
/*!
Stop bit selection.\n
0 - Send 1 stop bit regardless of the word length. \n
1 - Send a number of stop bits based on the word length. \n
WORD-LENGTH 5 Bits => 1.5 Stop Bits. \n
WORD-LENGTH (6/7/8) Bits => 2 Stop Bits.
*/
#define ADI_UART1_CFG_STOP_BIT 1
/*!
Parity Enable. Used to control the parity bit. \n
0 - Parity will not be transmitted or checked. \n
1 - Parity will be transmitted and checked.
*/
#define ADI_UART1_CFG_ENABLE_PARITY 0
/*!
Parity Select. This bit only has meaning if parity is enabled. \n
0 - Odd parity will be transmitted and checked. \n
1 - Even parity will be transmitted and checked.
*/
#define ADI_UART1_CFG_PARITY_SELECTION 0
/*!
Stick Parity. Used to force parity to defined values. \n
0 - Parity will not be forced. \n
1 - Set parity based on the following bit settings: \n
EPS = 1 and PEN = 1, parity will be forced to 0. \n
EPS = 0 and PEN = 1, parity will be forced to 1. \n
EPS = 1/0 and PEN = 0, no parity will be transmitted.
*/
#define ADI_UART1_CFG_ENABLE_STICKY_PARITY 0
/*
Table 21-2: Baud Rate Examples Based on 26 MHz PCLK
Baud Rate OSR COMDIV DIVM DIVN
9600 3 24 3 1078
19200 3 12 3 1078
38400 3 8 2 1321
57600 3 4 3 1078
115200 3 4 1 1563
230400 3 2 1 1563
460800 3 1 1 1563
921,600 2 1 1 1563
1,000,000 2 1 1 1280
1,500,000 2 1 1 171
These are calculated with the UarDivCalculator tool.
*/
/*!
Fractional baud rate N divide value. \n
Range: 0 to 2047.
*/
#define ADI_UART1_CFG_DIVN 1563
/*!
Fractional baud rate M divide value. \n
Range: 1 to 3.
*/
#define ADI_UART1_CFG_DIVM 1
/*!
Fractional baud rate C divide value. \n
Range: 1 to 65535.
*/
#define ADI_UART1_CFG_DIVC 1
/*!
Over Sample Rate value. \n
Range: 0 to 3. \n
0 - Over sample by 4. \n
1 - Over sample by 8. \n
2 - Over sample by 16. \n
3 - Over sample by 32.
*/
#define ADI_UART1_CFG_OSR 3
/*!
Enable Internal FIFO. \n
Range: 0 to 1.
*/
#define ADI_UART1_CFG_ENABLE_FIFO 1
/*!
TRIG Level for UART device. \n
Range: 0 to 3. \n
0 - 1 byte to trig RX interrupt. \n
1 - 4 bytes to trig RX interrupt. \n
2 - 8 bytes to trig RX interrupt. \n
3 - 14 bytes to trig RX interrupt.
*/
#define ADI_UART1_CFG_TRIG_LEVEL 0
/*!
Hold TX while RX is active. \n
Range: 0 to 1.
*/
#define ADI_UART1_CFG_HOLD_TX 0
/*!
Disable RX when TX is active. \n
Range: 0 to 1. \n
0 - 1 byte to trig RX interrupt. \n
1 - 4 bytes to trig RX interrupt.
*/
#define ADI_UART1_CFG_DISABLE_RX 0
/*!
Configure the SOUT de-assertion earlier than full stop bit(s). \n
Range: 0 to 1. \n
0 - SOUT_EN de-assert same time as full stop bit(s). \n
1 - SOUT_EN de-assert half-bit earlier than full stop bit(s).
*/
#define ADI_UART1_CFG_DEASSERTION 0
/*!
Set the SOUT polarity low. \n
Range: 0 to 1. \n
0 - Active high. \n
1 - Active low.
*/
#define ADI_UART1_CFG_SOUT_POLARITY 0
/*!
Enable the RX status interrupt. \n
Range: 0 to 1.
*/
#define ADI_UART1_CFG_ENABLE_RX_STATUS_INTERRUPT 1
/*!
Enable the Modem status interrupt. \n
Range: 0 to 1.
*/
#define ADI_UART1_CFG_ENABLE_MODEM_STATUS_INTERRUPT 0
/*! @} */
/*! @} */
/*************** UART Driver Debug Checks ************** */
/* Check word length */
#if (((ADI_UART0_CFG_WORD_LENGTH < 0) || (ADI_UART0_CFG_WORD_LENGTH > 3)) || ((ADI_UART1_CFG_WORD_LENGTH < 0) || (ADI_UART1_CFG_WORD_LENGTH > 3)))
#error "Word length needs to be between 0 and 3"
#endif
/* Check stop bit */
#if (((ADI_UART0_CFG_STOP_BIT < 0) || (ADI_UART0_CFG_STOP_BIT > 1)) || ((ADI_UART1_CFG_STOP_BIT < 0) || (ADI_UART1_CFG_STOP_BIT > 1)))
#error "Stop bit selection needs to be 0 or 1"
#endif
/* Check parity enable */
#if (((ADI_UART0_CFG_ENABLE_PARITY < 0) || (ADI_UART0_CFG_ENABLE_PARITY > 1)) || ((ADI_UART1_CFG_ENABLE_PARITY < 0) || (ADI_UART1_CFG_ENABLE_PARITY > 1)))
#error "Parity Enable bit needs to be 0 or 1"
#endif
/* Check parity select */
#if (((ADI_UART0_CFG_PARITY_SELECTION < 0) || (ADI_UART0_CFG_PARITY_SELECTION > 1)) || ((ADI_UART1_CFG_PARITY_SELECTION < 0) || (ADI_UART1_CFG_PARITY_SELECTION > 1)))
#error "Parity bit selection needs to be 0 or 1"
#endif
/* Check enable sticky parity */
#if (((ADI_UART0_CFG_ENABLE_STICKY_PARITY < 0) || (ADI_UART0_CFG_ENABLE_STICKY_PARITY > 1)) || ((ADI_UART1_CFG_ENABLE_STICKY_PARITY < 0) || (ADI_UART1_CFG_ENABLE_STICKY_PARITY > 1)))
#error "Sticky parity enable needs to be 0 or 1"
#endif
/* Check fractional baudrate N divider value */
#if (((ADI_UART0_CFG_DIVN < 0) || (ADI_UART0_CFG_DIVN > 2047)) || ((ADI_UART1_CFG_DIVN < 0) || (ADI_UART1_CFG_DIVN > 2047)))
#error "Fractional baudrate N divider value needs to be between 0 and 2047"
#endif
/* Check fractional baudrate M divider value */
#if (((ADI_UART0_CFG_DIVM < 1) || (ADI_UART0_CFG_DIVM > 3)) || ((ADI_UART1_CFG_DIVM < 1) || (ADI_UART1_CFG_DIVM > 3)))
#error "Fractional baudrate M divider value needs to be between 1 and 3"
#endif
/* Check fractional baudrate C divider value */
#if (((ADI_UART0_CFG_DIVC < 1) || (ADI_UART0_CFG_DIVC > 65535)) || ((ADI_UART1_CFG_DIVC < 1) || (ADI_UART1_CFG_DIVC > 65535)))
#error "Fractional baudrate C divider value needs to be between 1 and 65535"
#endif
/* Check over same rate value */
#if (((ADI_UART0_CFG_OSR < 0) || (ADI_UART0_CFG_OSR > 3)) || ((ADI_UART1_CFG_OSR < 0) || (ADI_UART1_CFG_OSR > 3)))
#error "over sample rate value needs to be between 0 and 3"
#endif
/* Check enable internal FIFO */
#if (((ADI_UART0_CFG_ENABLE_FIFO < 0) || (ADI_UART0_CFG_ENABLE_FIFO > 1)) || ((ADI_UART1_CFG_ENABLE_FIFO < 0) || (ADI_UART1_CFG_ENABLE_FIFO > 1)))
#error "Enable internal FIFO needs to be 0 or 1"
#endif
/* Check UART trig level */
#if (((ADI_UART0_CFG_TRIG_LEVEL < 0) || (ADI_UART0_CFG_TRIG_LEVEL > 3)) || ((ADI_UART1_CFG_TRIG_LEVEL < 0) || (ADI_UART1_CFG_TRIG_LEVEL > 3)))
#error "Trig level for the UART device needs to be 0 or 1"
#endif
/* Check value for holding tx while rx is active */
#if (((ADI_UART0_CFG_HOLD_TX < 0) || (ADI_UART0_CFG_HOLD_TX > 1)) || ((ADI_UART1_CFG_HOLD_TX < 0) || (ADI_UART1_CFG_HOLD_TX > 1)))
#error "Value for holding Tx while Rx is active needs to be 0 or 1"
#endif
/* Check value de-assertion */
#if (((ADI_UART0_CFG_DEASSERTION < 0) || (ADI_UART0_CFG_DEASSERTION > 1)) || ((ADI_UART1_CFG_DEASSERTION < 0) || (ADI_UART1_CFG_DEASSERTION > 1)))
#error "Value for de-assertion needs to be 0 or 1"
#endif
/* Check value for SOUT polarity */
#if (((ADI_UART0_CFG_SOUT_POLARITY < 0) || (ADI_UART0_CFG_SOUT_POLARITY > 1)) || ((ADI_UART1_CFG_SOUT_POLARITY < 0) || (ADI_UART1_CFG_SOUT_POLARITY > 1)))
#error "Value for SOUT polarity needs to be 0 or 1"
#endif
/* Check value to enable autobaud detection */
#if ((ADI_UART_CFG_ENABLE_AUTOBAUD < 0) || (ADI_UART_CFG_ENABLE_AUTOBAUD > 1))
#error "Value for autobaud enable needs to be 0 or 1"
#endif
/* Check value to enable Rx status interrupt */
#if (((ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT < 0) || (ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT > 1)) || ((ADI_UART1_CFG_ENABLE_RX_STATUS_INTERRUPT < 0) || (ADI_UART1_CFG_ENABLE_RX_STATUS_INTERRUPT > 1)))
#error "Value to enable Rx status interrupt needs to be 0 or 1"
#endif
/* Check value to enable modem status interrupt */
#if (((ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT < 0) || (ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT > 1)) || ((ADI_UART1_CFG_ENABLE_MODEM_STATUS_INTERRUPT < 0) || (ADI_UART1_CFG_ENABLE_MODEM_STATUS_INTERRUPT > 1)))
#error "Value to enable modem status interrupt needs to be 0 or 1"
#endif
#endif /* ADI_UART_CONFIG_H */

119
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_wdt_config.h Executable file
View File

@ -0,0 +1,119 @@
/*! *****************************************************************************
* @file adi_wdt_config.h
* @brief WDT device driver configuration
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_WDT_CONFIG_H
#define ADI_WDT_CONFIG_H
/** @addtogroup WDT_Driver_Config Static Configuration
* @ingroup WDT_Driver
* @{
*/
/************* WDT Static Configuration ***************/
/*! WDT Timer Reload Value\n
Value used to reload the WDT count register after count expires.\n
0-65535 - WDT reload value (default is 0x0100).
*/
#define ADI_WDT_LOAD_VALUE (0x1000u)
/*! WDT Timer Mode\n
Selects WDT operating mode.\n
0 - WDT operates in free-running mode.\n
1 - WDT operates in periodic mode (default).
*/
#define ADI_WDT_CONTROL_TIMER_MODE (1u)
/*! WDT Clock Prescaler\n
Controls WDT clock prescale.\n
0 - WDT operates at (source clock)/1.\n
1 - WDT operates at (source clock)/16.\n
2 - WDT operates at (source clock)/256 (default).\n
*/
#define ADI_WDT_CONTROL_CLOCK_PRESCALER (2u)
/*! WDT Timeout Mode\n
Controls WDT timeout behaviour.\n
0 - WDT issues RESET on timeout (default).\n
1 - WDT issues INTERRUPT on timeout.
*/
#define ADI_WDT_CONTROL_TIMEOUT_MODE (0u)
/*! WDT Power Mode Disable\n
Controls WDT countdown in hibernate or halted mode.\n
0 - WDT continues to count down when core is halted or in hibernate.\n
1 - WDT pauses count down when core is halted or in hibernate (default).\n
*/
#define ADI_WDT_CONTROL_POWER_MODE (1u)
/************** Macro Validation *****************************/
#if ( ADI_WDT_LOAD_VALUE > 65535u )
#error "Invalid configuration"
#endif
#if ( ADI_WDT_CONTROL_TIMER_MODE > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_WDT_CONTROL_CLOCK_PRESCALER > 2u )
#error "Invalid configuration"
#endif
#if ( ADI_WDT_CONTROL_TIMEOUT_MODE > 1u )
#error "Invalid configuration"
#endif
#if ( ADI_WDT_CONTROL_POWER_MODE > 1u )
#error "Invalid configuration"
#endif
/**
* @}
*/
#endif /* ADI_WDT_CONFIG_H */

1279
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/crc/adi_crc.c Executable file
View File

File diff suppressed because it is too large Load Diff

92
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/crc/adi_crc_def.h Executable file
View File

@ -0,0 +1,92 @@
/*! *****************************************************************************
* @file: adi_crc_def.h
* @brief: Private header file for for CRC driver.
* @details
* This is a private header file for the CRC driver,
* which contains the API declarations, data and
* constant definitions used in driver implementation
-----------------------------------------------------------------------------
Copyright (c) 2010-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_CRC_DEF_H
#define ADI_CRC_DEF_H
/* CRC Driver includes */
#include <drivers/crc/adi_crc.h>
/*! \cond PRIVATE */
typedef struct __ADI_CRC_DEVICE ADI_CRC_DEVICE;
typedef ADI_CRC_RESULT (*CRC_BUFFER_SUBMIT) (ADI_CRC_DEVICE *pDevice, void *pBuffer, uint32_t NumBytes, uint32_t NumBits);
/* Enumeration of CRC operation status */
typedef enum
{
ADI_CRC_OP_IDLE = 0u, /* CRC idle */
ADI_CRC_OP_IN_PROGRESS = 0x01u, /* CRC operation in progress */
} ADI_CRC_OP_STATUS;
#pragma pack()
/* Structure to handle CRC Peripheral instance */
struct __ADI_CRC_DEVICE
{
volatile ADI_CRC_TypeDef *pReg;
CRC_BUFFER_SUBMIT pfSubmitBuffer; /* Function for submitting CRC data buffer for calculation */
ADI_CALLBACK pfCallback; /* Client supplied callback function */
void *pCBParam; /* Client supplied callback parameter */
void *pRemainingData; /* Pointer to the buffer containing remaining bytes */
uint32_t RemainingBytes; /* Remaining bytes */
uint32_t RemainingBits; /* Remaining bits */
ADI_CRC_OP_STATUS eCrcOpStatus; /* Current status of the CRC Operation */
};
/* Structure to hold CRC device specific information */
typedef struct
{
volatile ADI_CRC_TypeDef *pReg; /* CRC peripheral Registers */
ADI_CRC_HANDLE hDevice; /* CRC device handle */
} ADI_CRC_INFO;
/*! \endcond */
#endif /* ADI_CRC_DEF_H */

1577
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/crypto/adi_crypto.c Executable file
View File

File diff suppressed because it is too large Load Diff

209
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/crypto/adi_crypto_def.h Executable file
View File

@ -0,0 +1,209 @@
/*!
*****************************************************************************
@file: adi_crypto_def.h
@brief: Crypto Device Driver definitions for ADuCM4x50 processor
-----------------------------------------------------------------------------
Copyright (c) 2012-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_CRYPTO_DEF_H
#define ADI_CRYPTO_DEF_H
/*! \cond PRIVATE */
#include <drivers/dma/adi_dma.h>
#include <adi_crypto_config.h>
/* pick up compiler-specific alignment directives */
#include <drivers/general/adi_drivers_general.h>
#define ALIGN4 ALIGNED_PRAGMA(4)
/* Support Check MACROS */
#define CRYPTO_SUPPORT_KEY_REQUIRED ( \
(ADI_CRYPTO_ENABLE_ECB_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CTR_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CBC_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CCM_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CMAC_SUPPORT == 1) \
)
#define CRYPTO_SUPPORT_MODE_CCM_ONLY ( \
(ADI_CRYPTO_ENABLE_ECB_SUPPORT != 1) \
&& (ADI_CRYPTO_ENABLE_CTR_SUPPORT != 1) \
&& (ADI_CRYPTO_ENABLE_CBC_SUPPORT != 1) \
&& (ADI_CRYPTO_ENABLE_CCM_SUPPORT == 1) \
&& (ADI_CRYPTO_ENABLE_CMAC_SUPPORT != 1) \
&& (ADI_CRYPTO_ENABLE_SHA_SUPPORT != 1) \
)
#define CRYPTO_SUPPORT_MODE_ANY_NON_CCM ( \
(ADI_CRYPTO_ENABLE_ECB_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CTR_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CBC_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CMAC_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_SHA_SUPPORT == 1) \
)
#define CRYPTO_SUPPORT_MODE_ANY_NON_SHA ( \
(ADI_CRYPTO_ENABLE_ECB_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CTR_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CBC_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CMAC_SUPPORT == 1) \
|| (ADI_CRYPTO_ENABLE_CCM_SUPPORT == 1) \
)
/* define local MIN/MAX macros, if not already... */
#ifndef MIN
#define MIN(a,b) (((a)<(b))?(a):(b))
#endif
#ifndef MAX
#define MAX(a,b) (((a)>(b))?(a):(b))
#endif
/* various size macros */
#define MAX_CRYPTO_DMA_BYTES (DMA_TRANSFER_LIMIT * sizeof(uint32_t))
/* SHA hardware max chunk size attributes */
#define SHA_CHUNK_MAX_BYTES (64u)
#define SHA_CHUNK_MAX_BITS (SHA_CHUNK_MAX_BYTES * 8U)
#define SHA_CHUNK_MAX_WORDS (16u)
#define FIFO_WIDTH_IN_BITS (32u)
#define FIFO_WIDTH_IN_BYTES (FIFO_WIDTH_IN_BITS/8u)
#define FIFO_DEPTH (4u)
#define CRYPTO_INPUT_SIZE_IN_BITS (128u)
#define CRYPTO_INPUT_SIZE_IN_BYTES (CRYPTO_INPUT_SIZE_IN_BITS/8u)
#define SHA_OUTPUT_SIZE_IN_BITS (256u)
#define SHA_OUTPUT_SIZE_IN_BYTES (SHA_OUTPUT_SIZE_IN_BITS/8u)
/* MAKE SURE THIS STRUCT REMAINS *******PERFECTLY ALIGNED******* WITH USER
ADI_CRYPTO_TRANSACTION BECAUSE WE USE BCOPY TO INITIALIZE EACH NEW SUBMIT!
Internal compute structure reflecting mostly, user ADI_CRYPTO_TRANSACTION,
except for moving data pointers and remaining counts. Contents initialized
directly from from ADI_CRYPTO_TRANSACTION during buffer submit.
*/
typedef struct _CRYPTO_COMPUTE {
ADI_CRYPTO_CIPHER_MODE eCipherMode; /*!< Cipher mode to use */
ADI_CRYPTO_CODING_MODE eCodingMode; /*!< Coding Mode (Encryption or Decryption) */
ADI_CRYPTO_KEY_BYTE_SWAP eKeyByteSwap; /*!< KEY endianness */
ADI_CRYPTO_SHA_BYTE_SWAP eShaByteSwap; /*!< SHA endianness */
ADI_CRYPTO_AES_BYTE_SWAP eAesByteSwap; /*!< AES endianness */
uint8_t *pKey; /*!< Pointer to the key data pre-formatted as a byte array, according to eAesKeyLen. */
ADI_CRYPTO_AES_KEY_LEN eAesKeyLen; /*!< The length of the key */
uint32_t *pNextAuthInput; /* CCM mode: pointer to user prefix buffer */
uint32_t numAuthBytesRemaining; /* Length of the prefix buffer in bytes (should be a multiple of 16 bytes) */
uint32_t *pNextInput; /* Pointer to next user 32-bit input location */
uint32_t numInputBytesRemaining; /* Number of input bytes remaining */
uint32_t *pNextOutput; /* Pointer to next user 32-bit output location */
uint32_t numOutputBytesRemaining; /* Number of output bytes remaining */
uint8_t *pNonceIV; /*!< Pointer to user 16-byte array containing one of three values, depending on cipher mode:
CTR mode = 108-bit NONCE
CCM mode = 112-bit NONCE
CBC mode = 128-bit IV (Initialization Vector)
NONCE and IV assume little endian format, for example: CTR NONCE packing is:
NONCE[0] -> 7:0
NONCE[1] -> 15:8
...
NONCE[13] -> 103:96
NONCE[14](Bits 3:0) -> 107:104 */
uint32_t CounterInit; /*!< CTR/CCM mode: Counter Initialization Value (CTR=20-bit, CCM=16-bit) */
uint32_t numValidBytes; /*!< CCM mode: Number of valid bytes in the last (padding) block (1-16) */
uint32_t numShaBitsRemaining; /*!< SHA mode: Number of bits remaining in the SHA payload, which may be odd-sized */
} CRYPTO_COMPUTE;
/* Crypto device attributes */
typedef struct _CRYPTO_INFO {
ADI_CRYPT_TypeDef *pDev; /* Pointer to physical Crypto controller */
ADI_CRYPTO_HANDLE hDevice; /* Device Handle */
#if (ADI_CRYPTO_ENABLE_DMA_SUPPORT == 1)
IRQn_Type dmaInputIrqNum;
IRQn_Type dmaOutputIrqNum;
DMA_CHANn_TypeDef dmaInputChanNum;
DMA_CHANn_TypeDef dmaOutputChanNum;
volatile ADI_CRYPTO_RESULT dmaError; /* DMA error collector. */
#endif
} CRYPTO_INFO;
#ifdef __ICCARM__
/*
* Pm123 (RULE 8.5) there shall be no definition of objects or functions in a header file.
* Exception is to allow the Crypto device data type and instance to be declared simultaniously.
*/
#pragma diag_suppress=Pm123
#endif /* __ICCARM__ */
/* Crypto driver internal data */
struct __ADI_CRYPTO_DEV_DATA_TYPE {
bool bDeviceEnabled; /* Boolean flag to signify whether the device is enable/disabled */
bool bDmaEnabled; /* Boolean flag to signify whether the DMA is enable/disabled */
bool bCompletion; /* Boolean flag to signify whether a transaction is complete */
ADI_CRYPT_TypeDef *pDev; /* Pointer to physical Crypto controller */
CRYPTO_INFO *pDevInfo; /* access to device info */
CRYPTO_COMPUTE Computation; /* Active computation structure */
ADI_CRYPTO_TRANSACTION *pUserBuffer; /* saved user buffer pointer from submit */
ADI_CALLBACK pfCallback; /* User defined callback function */
void *pCBParam; /* User defined callback param */
ADI_CRYPTO_RESULT dmaErrorCode; /* saved DMA error code to return via user API */
SEM_VAR_DECLR /* Blocking object abstraction: "Semaphore" for rtos, "bLowPowerExitFlag" for non-rtos, etc. */
} ADI_CRYPTO_DEV_DATA_TYPE;
#ifdef __ICCARM__
#pragma diag_default=Pm123
#endif /* __ICCARM__ */
/*! \endcond */
#endif /* ADI_CRYPTO_DEF_H */

346
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/dma/adi_dma.c Executable file
View File

@ -0,0 +1,346 @@
/*! *****************************************************************************
* @file: adi_dma.c
* @brief: DMA manager global file.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
/*! \addtogroup DMA_Driver DMA Driver
* uDMA Device Driver.
* @{
*/
/*============= I N C L U D E S =============*/
#include <adi_processor.h>
#include <drivers/dma/adi_dma.h>
#include <adi_callback.h>
#include <rtos_map/adi_rtos_map.h>
#include <drivers/general/adi_drivers_general.h>
/*! \cond PRIVATE */
/*============= M I S R A =============*/
#ifdef __ICCARM__
/*
* IAR MISRA C 2004 error suppressions.
*
* Pm011 (rule 6.3): he basic types of char, int, short, long, float, and double should not be used
* Need to use bool.
*
* Pm140 (rule 11.3): a cast should not be performed between a pointer type and an integral type
* The rule makes an exception for memory-mapped register accesses.
*/
#pragma diag_suppress=Pm011,Pm140
#endif /* __ICCARM__ */
/*============= D E F I N E S =============*/
/* CCD array allocation macros */
#define CCD_ALIGN (0x400) /* Memory alignment required for CCD array */
#define CCD_SIZE (32u) /* Configure CCD allocation as an integral power of two,
i.e., 24 channels is allocated as 32 */
/*============= R E G I S T E R D E F I N E S =============*/
/*============= T Y P E D E F I N E S =============*/
/*! DMA Channel callback information structure */
typedef struct _DMA_CHANNEL {
ADI_CALLBACK pfCallback; /*!< Pointer to the callback func */
void* pCBParam; /*!< Application Callback param */
} DMA_CHANNEL_CALLBACK_INFO;
/*! \struct ADI_DMA_DEV_DATA
* DMA Device instance data structure
*
* CallbackInfo[NUM_DMA_CHANNELSn]
* The semantics of indexes used to access CallbackInfo elements is defined by the semantics
* of the bits in registers DMA_ERRCHNL_CLR and DMA_INVALIDDESC_CLR. The position of these
* bits define the channel nodes of the peripheral they map to, e.g. bit N maps to channel
* node N.
*/
typedef struct {
bool Initialized; /*!< track initialization state. See function adi_dma_Init) */
DMA_CHANNEL_CALLBACK_INFO CallbackInfo[NUM_DMA_CHANNELSn];
uint32_t ChannelsInUse; /*!< bits 0 to 26 record active channels */
} ADI_DMA_DEV_DATA;
/*============= D A T A =============*/
/* DMA descriptor arrays must be contiguous */
/* AND impose strict alignment requirements */
/* Each compiler has different alignment directives */
/* ALIGNED: DMA channel control data array declaration */
ADI_ALIGNED_PRAGMA(CCD_ALIGN)
static ADI_DCC_TypeDef gChannelControlDataArray[CCD_SIZE * 2u] ADI_ALIGNED_ATTRIBUTE(CCD_ALIGN)
#ifdef ADI_DMA_DESCRIPTORS_IN_VOLATILE_MEMORY
/* conditional placement of DMA descriptor table to volatile memory */
@ "volatile_ram";
#else
/* default placement to non-volatile memory (no override) */
;
#endif
/* pointer to the primary CCD array */
ADI_DCC_TypeDef* const pPrimaryCCD = &gChannelControlDataArray[0];
/* pointer to the alternate CCD array */
ADI_DCC_TypeDef* const pAlternateCCD = &gChannelControlDataArray[CCD_SIZE];
/*! DMA Device Driver Data instance
* 32 Channel Handles initialized to {0, 0}, i.e. call-back function pointer
* set to NULL and call-back function parameters set to NULL
*/
static ADI_DMA_DEV_DATA DMA_DevData = {
false, /*!< DMA device data not initialized. (See adi_dma_Init) */
{{0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0},
{0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0},
{0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0},
{0,0}, {0,0}, {0,0}},
0ul /*!< channels-in-use bitfield */
};
/*! pointer to the DMA Device Driver Data instance */
static ADI_DMA_DEV_DATA* const pDMA_DevData = &DMA_DevData;
/*============= Local function declarations =============*/
/*========== DMA HANDLERS ==========*/
/*! DMA Error Handler */
void DMA_Err_Int_Handler(void);
/*========== U T I L I T Y M A C R O S ==========*/
/*! \endcond*/
/*============= A P I I M P L E M E N T A T I O N S =============*/
/*!
* @brief Initialize the DMA peripheral
*
* @return none
*
* The application must call this API once
*
*/
void adi_dma_Init(void)
{
ADI_INT_STATUS_ALLOC();
ADI_ENTER_CRITICAL_REGION();
if( false == pDMA_DevData->Initialized )
{
pDMA_DevData->Initialized = true;
/* Enable the DMA Controller */
pADI_DMA0->CFG |= BITM_DMA_CFG_MEN;
/* Set descriptor memory base pointer on DMA controller */
pADI_DMA0->PDBPTR = (uint32_t)pPrimaryCCD;
/* Enable the DMA Error Interrupt */
NVIC_EnableIRQ(DMA_CHAN_ERR_IRQn);
/* Reset per-channel, bitmapped control registers (W1C) */
const uint32_t w1r_value = (uint32_t) ((1 << NUM_DMA_CHANNELSn) - 1);
pADI_DMA0->RMSK_SET = w1r_value;
pADI_DMA0->EN_CLR = w1r_value;
pADI_DMA0->ALT_CLR = w1r_value;
pADI_DMA0->PRI_CLR = w1r_value;
pADI_DMA0->ERRCHNL_CLR = w1r_value;
pADI_DMA0->ERR_CLR = w1r_value;
pADI_DMA0->INVALIDDESC_CLR = w1r_value;
}
ADI_EXIT_CRITICAL_REGION();
}
/**
* @brief Register a call-back function for a DMA channel.
*
* @param [in] eChannelID The ID of the DMA channel being assigned a call-back function.
* @param [in] pfCallback Pointer to the application callback function.
* @param [in] pCBParam Application callback parameter.
*
* @details The function registers a call-back function for the DMA channel node
* identified by eChannelID and stores the extra parameters this call-back function
* may require. A NULL callback function pointer means "DMA channel unused".
*
* @return Status
* - #ADI_DMA_SUCCESS Successfully registered a call-back function for the given DMA channel node.
* - #ADI_DMA_ERR_NOT_INITIALIZED [D] adi_dma_Init must be called prior registering a call-back function.
* - #ADI_DMA_ERR_INVALID_PARAMETER [D] Some parameter(s) passed to the function is invalid.
*/
ADI_DMA_RESULT adi_dma_RegisterCallback (
DMA_CHANn_TypeDef const eChannelID,
ADI_CALLBACK const pfCallback,
void* const pCBParam
)
{
ADI_DMA_RESULT result = ADI_DMA_SUCCESS;
#ifdef ADI_DEBUG
/* DMA must be initialized first */
if (false == pDMA_DevData->Initialized) {
result = ADI_DMA_ERR_NOT_INITIALIZED;
}else{
const size_t numChannelId = sizeof(pDMA_DevData->CallbackInfo) / sizeof(DMA_CHANNEL_CALLBACK_INFO);
if (numChannelId <= eChannelID) /*!< pDMA_DevData->CallbackInfo definition is invalid */
{
result = ADI_DMA_ERR_INVALID_PARAMETER;
}
}
if (ADI_DMA_SUCCESS == result) /* if no errors previously detected */
#endif
{
/* eChannelID cannot be out of range by definition (we use DMA_CHANn_TypeDef) */
DMA_CHANNEL_CALLBACK_INFO * pChannel = &pDMA_DevData->CallbackInfo[eChannelID];
/* Set the callback parameters */
pChannel->pfCallback = pfCallback; /* assign the pointer to a callback function */
pChannel->pCBParam = pCBParam; /* store the parameters to be used with the callback function */
const uint32_t nChannelBit = (1u << eChannelID);
if (NULL != pfCallback) {
pDMA_DevData->ChannelsInUse |= nChannelBit; /* set the bit to mark the channel as "being used" */
}else{
pDMA_DevData->ChannelsInUse &= (~nChannelBit); /* clear the bit to mark the channel as "not being used" */
}
}
return result;
}
/*! \cond PRIVATE */
#if defined(__ICCARM__)
/* ARM Cortex-M3/M4, IAR compiler (CMSIS standard) */
#define ADI_CLZ(X) __CLZ(X)
#elif defined(__GNUC__)
/* ARM Cortex-M3/M4, GNU-ARM compiler */
#define ADI_CLZ(X) __builtin_clz(X)
#elif defined(__CC_ARM)
/* ARM Cortex-M3/M4, Keil compiler */
#define ADI_CLZ(X) __clz(X)
#else
#error "Macro ADI_CLZ undefined!!!"
#endif
/*! DMA Error Handler
*
* The DMA Error handler looks at the channels in use which are flagged in register ERRCHNL_CLR
* or INVALIDDESC_CLR and calls the associated call-back functions, if defined. If a call-back
* function is undefined (NULL pointer) then it means the associated driver ignores these errors.
*
* Then, all the bits set in ERRCHNL_CLR and INVALIDDESC_CLR at the time the handler is called
* are cleared.
*/
void DMA_Err_Int_Handler(void)
{
ISR_PROLOG()
const uint32_t nErrClr = pADI_DMA0->ERR_CLR; /* get all the bits set in ERR_CLR */
const uint32_t nErrChnClr = pADI_DMA0->ERRCHNL_CLR; /* get all the bits set in ERRCHNL_CLR */
const uint32_t nInvdDescClr = pADI_DMA0->INVALIDDESC_CLR; /* get all the bits set in INVALIDDESC_CLR */
/* if there are invalid channel descriptors or channel errors amongts the channels in use */
uint32_t functionsToBeCalled = pDMA_DevData->ChannelsInUse & (nErrChnClr | nInvdDescClr);
if (functionsToBeCalled > 0u)
{
const uint32_t numBits = sizeof(uint32_t) << 3; /* maximum number of bits to be considered */
uint32_t nlz; /* number of leading zeroes in functionsToBeCalled */
/* For all the bits set in functionsToBeCalled, starting from the MSB */
for (nlz = (uint32_t) ADI_CLZ(functionsToBeCalled); nlz < numBits; nlz = (uint32_t) ADI_CLZ(functionsToBeCalled))
{
const uint32_t bitSet = numBits - nlz - 1u; /* bit position in functionsToBeCalled */
const uint32_t selected_bit = ((uint32_t)1u << bitSet);
DMA_CHANNEL_CALLBACK_INFO* pChannel = &pDMA_DevData->CallbackInfo[bitSet];
/* if there's a callback function to be called */
if (NULL != pChannel->pfCallback)
{
/* define the nature of the error: DMA bus error or else invalid descriptor */
uint32_t nEvent = ((nErrChnClr & selected_bit) != 0u)
? (uint32_t)ADI_DMA_EVENT_ERR_BUS
: (uint32_t)ADI_DMA_EVENT_ERR_INVALID_DESCRIPTOR;
/* report the error to the peripheral through the callback function */
pChannel->pfCallback (pChannel->pCBParam, nEvent, NULL );
}
functionsToBeCalled &= ~selected_bit; /* clear bit in functionsToBeCalled */
}
}
/* Clear the errors processed in the loop above */
pADI_DMA0->ERRCHNL_CLR = nErrChnClr; /* W1C: clear only all the bits set in nErrChnClr */
pADI_DMA0->INVALIDDESC_CLR = nInvdDescClr; /* W1C: clear only all the bits set in nInvdDescClr */
pADI_DMA0->ERR_CLR = nErrClr; /* W1C: clear only all the bits set in nErrClr */
ISR_EPILOG()
}
/*! \endcond*/
/**@}*/

346
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/adc/adi_adc.h Executable file
View File

@ -0,0 +1,346 @@
/*! *****************************************************************************
* @file adi_adc.h
* @brief Main include file for ADC Device driver definitions
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_ADC_H
#define ADI_ADC_H
#include <adi_processor.h>
#include <adi_callback.h>
#include <adi_adc_config.h>
#include <rtos_map/adi_rtos_map.h> /* for ADI_SEM_SIZE */
/** @addtogroup ADC_Driver ADC Driver
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif
/*! Amount of memory(In bytes) required by the ADC device driver for managing the operation
* of a ADC controller. The memory is passed to the driver when the driver is opended.
* The memory is completely owned by the driver till the the driver is closed.
*
*/
#define ADI_ADC_MEMORY_SIZE (48u + ADI_SEM_SIZE) /*!< Memory Size of the buffer required by the ADC driver */
/*!
* \enum ADI_ADC_RESULT
* ADC API return codes
*/
typedef enum {
ADI_ADC_SUCCESS = 0, /*!< No Error, API suceeded */
ADI_ADC_INVALID_DEVICE_NUM, /*!< Invalid device number passed */
ADI_ADC_INVALID_DEVICE_HANDLE, /*!< Invalid device handle passed */
ADI_ADC_INVALID_STATE, /*!< Invalid State */
ADI_ADC_INSUFFICIENT_MEMORY, /*!< Insufficient memory passed to the driver */
ADI_ADC_IN_USE, /*!< ADC is alreaady in use */
ADI_ADC_INVALID_PARAMETER, /*!< Invalid parameter passed to the driver */
ADI_ADC_NULL_POINTER, /*!< Null pointer passed when expecting a valid pointer */
ADI_ADC_FAILURE, /*!< General ADC Failure */
ADI_ADC_INVALID_SEQUENCE, /*!< Invalid sequence of API calls */
ADI_ADC_ERR_RTOS, /*!< RTOS error occurred */
ADI_ADC_INVALID_OPERATION, /*!< API call is an invalid operation */
ADI_ADC_INVALID_BUFFER, /*!< Buffer passed to the application is invalid */
ADI_ADC_BUFFER_OVERFLOW, /*!< Buffer overflow occurred */
ADI_ADC_DMA_ERROR, /*!< DMA Error occurred */
ADI_ADC_BAD_SYS_CLOCK, /*!< Could not retrieve core clock value. */
} ADI_ADC_RESULT;
/*!
* \enum ADI_ADC_VREF_SRC
* Voltage Reference source selection.
*/
typedef enum {
ADI_ADC_VREF_SRC_INT_1_25_V, /*!< 1.25V Internal Voltage Reference */
ADI_ADC_VREF_SRC_INT_2_50_V, /*!< 2.50V Internal Voltage Reference */
ADI_ADC_VREF_SRC_EXT, /*!< External Voltage Reference */
ADI_ADC_VREF_SRC_VBAT, /*!< Battery Voltage as Voltage Reference source */
} ADI_ADC_VREF_SRC;
/*!
* \enum ADI_ADC_RESOLUTION
* Resolution of the ADC.
*/
typedef enum {
ADI_ADC_RESOLUTION_12_BIT, /*!< 12-bit ADC Resolution */
ADI_ADC_RESOLUTION_13_BIT, /*!< 13-bit ADC Resolution */
ADI_ADC_RESOLUTION_14_BIT, /*!< 14-bit ADC Resolution */
ADI_ADC_RESOLUTION_15_BIT, /*!< 15-bit ADC Resolution */
ADI_ADC_RESOLUTION_16_BIT /*!< 16-bit ADC Resolution */
} ADI_ADC_RESOLUTION;
/*!
* \typedef ADI_ADC_CHANNEL
* Typedef for ADC Channels
*/
typedef uint32_t ADI_ADC_CHANNEL;
/*!
* defines for ADC Channels
*/
#define ADI_ADC_CHANNEL_0 (1u << 0u) /*!< ADC Channel 0 */
#define ADI_ADC_CHANNEL_1 (1u << 1u) /*!< ADC Channel 1 */
#define ADI_ADC_CHANNEL_2 (1u << 2u) /*!< ADC Channel 2 */
#define ADI_ADC_CHANNEL_3 (1u << 3u) /*!< ADC Channel 3 */
#define ADI_ADC_CHANNEL_4 (1u << 4u) /*!< ADC Channel 4 */
#define ADI_ADC_CHANNEL_5 (1u << 5u) /*!< ADC Channel 5 */
#define ADI_ADC_CHANNEL_6 (1u << 6u) /*!< ADC Channel 6 */
#define ADI_ADC_CHANNEL_7 (1u << 7u) /*!< ADC Channel 7 */
/*!
* \enum ADI_ADC_EVENT
* Callback events from the ADC driver.
*/
typedef enum {
ADI_ADC_EVENT_CALIBRATION_DONE, /*!< Calibration done event. arg to the callback function will be NULL. */
ADI_ADC_EVENT_ADC_READY, /*!< ADC Ready event. arg to the callback function will be null */
ADI_ADC_EVENT_OVERFLOW, /*!< Overflow event occurred. The channel(#ADI_ADC_CHANNEL) for which the overflow occurred will be passed as arg to the callback function. */
ADI_ADC_EVENT_HIGH_LIMIT_CROSSED, /*!< High Limit crossed event. The channel(#ADI_ADC_CHANNEL) for which the limit is crossed will be passed as arg to the callback function. */
ADI_ADC_EVENT_LOW_LIMIT_CROSSED, /*!< Low Limit crossed event. The channel(#ADI_ADC_CHANNEL) for which the limit is crossed will be passed as arg to the callback function. */
} ADI_ADC_EVENT;
/*! Structure which hold the details of the buffer and sampling details */
typedef struct __ADI_ADC_BUFFER {
uint32_t nChannels; /*!< Channels to sample. Should be an ORed value of #ADI_ADC_CHANNEL enum */
void* pDataBuffer; /*!< Pointer to the Buffer to read the sample value into. If single channel(say Channel 0) is selected
then the format of buffer will be <Chan0 conversion 0><Chan0 conversion 1><Chan0 conversion 2>.... but if
multiple channels (say Channel 1 and Channel2) are selected then the format of buffer will be
<Chan1 conversion 0><Chan2 conversion 0><Chan1 conversion 1><Chan2 conversion 1><Chan1 conversion 2><Chan2 conversion 2>....
\n The pBuffer should be 2 byte aligned.
\n
\n If N is the number of channels selected then in single iteration mode the number of samples
written to in the buffer will be N and for multiple iteration, the driver will try to fill the whole
buffer with data and it is preferred that the nBuffSize be able to accommodate a multiple of N samples.
*/
uint32_t nNumConversionPasses; /*!< Num of conversion passes */
uint32_t nBuffSize; /*!< Size of the buffer supplied */
} ADI_ADC_BUFFER;
/* Type def for the ADC Handle. */
typedef struct __ADI_ADC_DEVICE* ADI_ADC_HANDLE; /*!< ADC Device Handler */
/*============= A P I F U N C T I O N S P R O T O T Y P E S =============*/
/* Opens an ADC device instance. */
ADI_ADC_RESULT adi_adc_Open (
uint32_t nDeviceNum,
void* pMemory,
uint32_t nMemorySize,
ADI_ADC_HANDLE* phDevice
);
/* Close the given device instance */
ADI_ADC_RESULT adi_adc_Close(ADI_ADC_HANDLE hDevice);
/* Power up or power down the ADC */
ADI_ADC_RESULT adi_adc_PowerUp (ADI_ADC_HANDLE hDevice, bool bPowerUp);
/* Register the callback */
ADI_ADC_RESULT adi_adc_RegisterCallback(
ADI_ADC_HANDLE hDevice,
ADI_CALLBACK pfCallback,
void *pCBParam
);
/* Enables/Disables the ADC Subsystem */
ADI_ADC_RESULT adi_adc_EnableADCSubSystem (
ADI_ADC_HANDLE hDevice,
bool bEnable
);
/* Returns whether the ADC subsytem is ready */
ADI_ADC_RESULT adi_adc_IsReady (
ADI_ADC_HANDLE hDevice,
bool *pbReady
);
/* Set the voltage reference source */
ADI_ADC_RESULT adi_adc_SetVrefSource (
ADI_ADC_HANDLE hDevice,
ADI_ADC_VREF_SRC eVrefSrc
);
/* Enable/Disable current sink */
ADI_ADC_RESULT adi_adc_SinkEnable (
ADI_ADC_HANDLE hDevice,
bool bEnable
);
/* Start the ADC Calibration */
ADI_ADC_RESULT adi_adc_StartCalibration (
ADI_ADC_HANDLE hDevice
);
ADI_ADC_RESULT adi_adc_IsCalibrationDone (
ADI_ADC_HANDLE hDevice,
bool* pbCalibrationDone
);
/* Set the acquisition time of ADC in ADC clock cycles */
ADI_ADC_RESULT adi_adc_SetAcquisitionTime(
ADI_ADC_HANDLE hDevice,
uint32_t nAcqTimeInAClkCycles
);
/* Set the delay time of ADC in ADC cycles for multi iteration mode */
ADI_ADC_RESULT adi_adc_SetDelayTime(
ADI_ADC_HANDLE hDevice,
uint32_t nDelayInAClkCycles
);
/* set the resolution of ADC. The default resolution of ADC is 12-bit and the ADC increases the resolution by oversampling */
ADI_ADC_RESULT adi_adc_SetResolution (
ADI_ADC_HANDLE hDevice,
ADI_ADC_RESOLUTION eResolution
);
/* Enable Averaging for all ADC channels */
ADI_ADC_RESULT adi_adc_EnableAveraging (
ADI_ADC_HANDLE hDevice,
uint16_t nAveragingSamples
);
/* Configure low limit for an ADC channel when it's used as a digital comparator. */
ADI_ADC_RESULT adi_adc_SetLowLimit (
ADI_ADC_HANDLE hDevice,
ADI_ADC_CHANNEL eChannel,
bool bEnable,
uint16_t nLowLimit
);
/* Configure high limit for an ADC channel when it's used as a digital comparator. */
ADI_ADC_RESULT adi_adc_SetHighLimit (
ADI_ADC_HANDLE hDevice,
ADI_ADC_CHANNEL eChannel,
bool bEnable,
uint16_t nHighLimit
);
/* Configure hysteresis for an ADC channel when it's used as a digital comparator. */
ADI_ADC_RESULT adi_adc_SetHysteresis(
ADI_ADC_HANDLE hDevice,
ADI_ADC_CHANNEL eChannel,
bool bEnable,
uint16_t nHysteresis
);
/* Configure number of monitor cycles for an ADC channel when it's used as a digital comparator. */
ADI_ADC_RESULT adi_adc_SetNumMonitorCycles(
ADI_ADC_HANDLE hDevice,
ADI_ADC_CHANNEL eChannel,
uint32_t nNumMonitorCycles
);
/* Enable/Disable digital comparator for the given channel(s) */
ADI_ADC_RESULT adi_adc_EnableDigitalComparator (
ADI_ADC_HANDLE hDevice,
bool bEnableComparator
);
/* Submit buffer for sampling */
ADI_ADC_RESULT adi_adc_SubmitBuffer (
ADI_ADC_HANDLE hDevice,
ADI_ADC_BUFFER* pBuffer
);
/* Get a completed buffer from the driver */
ADI_ADC_RESULT adi_adc_GetBuffer(
ADI_ADC_HANDLE hDevice,
ADI_ADC_BUFFER** ppBuffer
);
/* Enable/Disable buffer processing */
ADI_ADC_RESULT adi_adc_Enable (
ADI_ADC_HANDLE hDevice,
bool bEnable
);
/* Check whether a completed buffer is available in the driver */
ADI_ADC_RESULT adi_adc_IsBufferAvailable(
ADI_ADC_HANDLE hDevice,
bool* pbIsBufferAvailable
);
/* Read the given channels. This will only return once the given amount of samples are collected */
ADI_ADC_RESULT adi_adc_ReadChannels (
ADI_ADC_HANDLE hDevice,
uint32_t nChannels,
uint32_t nNumConversionPasses,
void* pBuffer,
uint32_t nBuffLength
);
/* Get Battery Voltage */
ADI_ADC_RESULT adi_adc_GetBatteryVoltage (
ADI_ADC_HANDLE hDevice,
uint32_t nRefVoltage,
uint32_t* pnBatVoltage
);
/* Enable/Disable Temperature Sensor */
ADI_ADC_RESULT adi_adc_EnableTemperatureSensor (
ADI_ADC_HANDLE hDevice,
bool bEnable
);
/* Get the Temperature Value */
ADI_ADC_RESULT adi_adc_GetTemperature (
ADI_ADC_HANDLE hDevice,
uint32_t nRefVoltage,
int32_t* pnTemperature
);
#ifdef __cplusplus
}
#endif
/**@}*/
#endif /* ADI_ADC_H */

277
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/beep/adi_beep.h Executable file
View File

@ -0,0 +1,277 @@
/*! *****************************************************************************
* @file adi_beep.h
* @brief Main include file for BEEP device driver definitions
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
/** @addtogroup BEEP_Driver BEEP Driver
* @{
*/
#ifndef ADI_BEEP_H
#define ADI_BEEP_H
#include "adi_processor.h"
#include <adi_beep_config.h>
#include <adi_callback.h>
#include <rtos_map/adi_rtos_map.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*! Amount of memory(In bytes) required by the Beep device driver for managing the operation.
* This memory is completely owned by the driver till the end of the operation.
*/
#if ADI_BEEP_INCLUDE_PLAY_SEQUENCE == 1
/*! @hideinitializer Indicates the size of the BEEP memory to be used */
#define ADI_BEEP_MEMORY_SIZE (20u + ADI_SEM_SIZE)
#else
/*! @hideinitializer Indicates the size of the BEEP memory to be used */
#define ADI_BEEP_MEMORY_SIZE (12u + ADI_SEM_SIZE)
#endif
/*!
* \enum ADI_BEEP_RESULT
* Beeper API return codes
*/
typedef enum
{
ADI_BEEP_SUCCESS = 0, /*!< No Error, API suceeded */
ADI_BEEP_FAILURE, /*!< An unknown error was detected */
ADI_BEEP_ALREADY_INITIALIZED, /*!< BEEP is already initialized */
ADI_BEEP_BAD_DEV_HANDLE, /*!< Invalid device handle passed */
ADI_BEEP_BAD_DEV_ID, /*!< Asking to initialize an unknown device num */
ADI_BEEP_NOT_INITIALIZED, /*!< BEEP not yet initialized */
ADI_BEEP_PARAM_OUT_OF_RANGE, /*!< Parameter is out of range. */
ADI_BEEP_INVALID_COUNT, /*!< Invalid count for supplied beep sequence */
ADI_BEEP_NULL_PTR, /*!< Null pointer supplied. */
ADI_BEEP_SEMAPHORE_FAILED, /*!< BEEP semaphore failure. */
} ADI_BEEP_RESULT;
/*!
* \enum ADI_BEEP_DEV_ID
* @brief Beeper Device IDs.
* @details List of all Beeper Device IDs for the current part
*/
typedef enum
{
ADI_BEEP_DEVID_0 = 0, /*!< BEEP Timer Device 0 */
ADI_BEEP_MAX_DEVID /*!< max number of BEEP devices */
} ADI_BEEP_DEV_ID;
/*!
* \enum ADI_BEEP_INTERRUPT
* @brief Beeper Interrupt Bits.
* @details List of all Beeper interrupt (enables and status) bits.
*/
typedef enum
{
ADI_BEEP_INTERRUPT_SEQUENCE_END = BITM_BEEP_CFG_SEQATENDIRQ, /*!< Beeper sequence has finished */
ADI_BEEP_INTERRUPT_NOTE_END = BITM_BEEP_CFG_AENDIRQ, /*!< Beeper note has finished */
} ADI_BEEP_INTERRUPT;
#define LFCLK_FREQ 32768.0f /*!< Beeper main clock frequency. */
#define FREQUENCY_ENCODE(x) (uint8_t)(LFCLK_FREQ/(x) + 0.5f) /*!< Beeper tone frequency encoder macro */
/*!
* \enum ADI_BEEP_NOTE_FREQUENCY
* @brief Beeper tone frequency list.
* @details List of possible Beeper tone frequencies.
*/
typedef enum {
/* Constants are pre-computed note frequencies (Hz). */
/* See http://www.phy.mtu.edu/~suits/notefreqs.html. */
/* Encodings are clock divider values for that note. */
/* Flats are the same as the lower sharp, so only sharps are listed. */
/* Even though octaves are simple frequency doublings/halvings */
/* of adjuacient octaves, we pre-compute each constant (as opposed */
/* to halving/doubling the encodings between octaves) to */
/* minimize repeated doubling/halving errors across all octaves. */
/* !!!ALL ENCODINGS MUST BE IN THE RANGE 4-127!!! */
ADI_BEEP_FREQ_REST = (0), /*!< silence */
ADI_BEEP_FREQ_C4 = FREQUENCY_ENCODE(261.63f), /*!< Middle C (lowest representable frequency @ 32KHz) */
ADI_BEEP_FREQ_Cs4 = FREQUENCY_ENCODE(277.18f),
ADI_BEEP_FREQ_D4 = FREQUENCY_ENCODE(293.66f),
ADI_BEEP_FREQ_Ds4 = FREQUENCY_ENCODE(311.13f),
ADI_BEEP_FREQ_E4 = FREQUENCY_ENCODE(329.63f),
ADI_BEEP_FREQ_F4 = FREQUENCY_ENCODE(349.23f),
ADI_BEEP_FREQ_Fs4 = FREQUENCY_ENCODE(369.99f),
ADI_BEEP_FREQ_G4 = FREQUENCY_ENCODE(392.00f),
ADI_BEEP_FREQ_Gs4 = FREQUENCY_ENCODE(415.30f),
ADI_BEEP_FREQ_A4 = FREQUENCY_ENCODE(440.00f),
ADI_BEEP_FREQ_As4 = FREQUENCY_ENCODE(466.16f),
ADI_BEEP_FREQ_B4 = FREQUENCY_ENCODE(493.88f),
ADI_BEEP_FREQ_C5 = FREQUENCY_ENCODE(523.25f),
ADI_BEEP_FREQ_Cs5 = FREQUENCY_ENCODE(554.37f),
ADI_BEEP_FREQ_D5 = FREQUENCY_ENCODE(587.33f),
ADI_BEEP_FREQ_Ds5 = FREQUENCY_ENCODE(622.25f),
ADI_BEEP_FREQ_E5 = FREQUENCY_ENCODE(659.26f),
ADI_BEEP_FREQ_F5 = FREQUENCY_ENCODE(698.46f),
ADI_BEEP_FREQ_Fs5 = FREQUENCY_ENCODE(739.99f),
ADI_BEEP_FREQ_G5 = FREQUENCY_ENCODE(783.99f),
ADI_BEEP_FREQ_Gs5 = FREQUENCY_ENCODE(830.61f),
ADI_BEEP_FREQ_A5 = FREQUENCY_ENCODE(880.00f),
ADI_BEEP_FREQ_As5 = FREQUENCY_ENCODE(932.33f),
ADI_BEEP_FREQ_B5 = FREQUENCY_ENCODE(987.77f),
ADI_BEEP_FREQ_C6 = FREQUENCY_ENCODE(1046.50f),
ADI_BEEP_FREQ_Cs6 = FREQUENCY_ENCODE(1108.73f),
ADI_BEEP_FREQ_D6 = FREQUENCY_ENCODE(1174.66f),
ADI_BEEP_FREQ_Ds6 = FREQUENCY_ENCODE(1244.51f),
ADI_BEEP_FREQ_E6 = FREQUENCY_ENCODE(1318.51f),
ADI_BEEP_FREQ_F6 = FREQUENCY_ENCODE(1396.91f),
ADI_BEEP_FREQ_Fs6 = FREQUENCY_ENCODE(1479.98f),
ADI_BEEP_FREQ_G6 = FREQUENCY_ENCODE(1567.98f),
ADI_BEEP_FREQ_Gs6 = FREQUENCY_ENCODE(1661.22f),
ADI_BEEP_FREQ_A6 = FREQUENCY_ENCODE(1760.00f),
ADI_BEEP_FREQ_As6 = FREQUENCY_ENCODE(1864.66f),
ADI_BEEP_FREQ_B6 = FREQUENCY_ENCODE(1975.53f),
ADI_BEEP_FREQ_C7 = FREQUENCY_ENCODE(2093.00f),
ADI_BEEP_FREQ_Cs7 = FREQUENCY_ENCODE(2217.46f),
ADI_BEEP_FREQ_D7 = FREQUENCY_ENCODE(2349.32f),
ADI_BEEP_FREQ_Ds7 = FREQUENCY_ENCODE(2489.02f),
ADI_BEEP_FREQ_E7 = FREQUENCY_ENCODE(2637.02f),
ADI_BEEP_FREQ_F7 = FREQUENCY_ENCODE(2793.83f),
ADI_BEEP_FREQ_Fs7 = FREQUENCY_ENCODE(2959.96f),
ADI_BEEP_FREQ_G7 = FREQUENCY_ENCODE(3135.96f),
ADI_BEEP_FREQ_Gs7 = FREQUENCY_ENCODE(3322.44f),
ADI_BEEP_FREQ_A7 = FREQUENCY_ENCODE(3520.00f),
ADI_BEEP_FREQ_As7 = FREQUENCY_ENCODE(3729.31f),
ADI_BEEP_FREQ_B7 = FREQUENCY_ENCODE(3951.07f),
ADI_BEEP_FREQ_C8 = FREQUENCY_ENCODE(4186.01f),
ADI_BEEP_FREQ_Cs8 = FREQUENCY_ENCODE(4434.92f),
ADI_BEEP_FREQ_D8 = FREQUENCY_ENCODE(4698.64f),
ADI_BEEP_FREQ_Ds8 = FREQUENCY_ENCODE(4978.03f),
ADI_BEEP_FREQ_E8 = FREQUENCY_ENCODE(5274.04f),
ADI_BEEP_FREQ_F8 = FREQUENCY_ENCODE(5587.65f),
ADI_BEEP_FREQ_Fs8 = FREQUENCY_ENCODE(5919.91f),
ADI_BEEP_FREQ_G8 = FREQUENCY_ENCODE(6271.93f),
} ADI_BEEP_NOTE_FREQUENCY;
#define ADI_BEEP_DUR_ZERO (0) /*!< Beeper zero tone duration value */
#define ADI_BEEP_DUR_MIN (1) /*!< Beeper minimum tone duration value */
#define ADI_BEEP_DUR_MAX (254) /*!< Beeper maximum tone duration value */
#define ADI_BEEP_DUR_INFINITE (255) /*!< Beeper infinite tone duration value */
/*! A device handle used in all API functions to identify the BEEP device. */
typedef void * ADI_BEEP_HANDLE;
#define DURATION_ENCODE(x) (uint8_t)((float)ADI_BEEP_DUR_MAX/(float)(x) + 0.5f) /*!< Beeper tone duration encoder macro */
/*!
* \enum ADI_BEEP_NOTE_DURATION
* @brief Beeper tone duration list.
* @details List of possible Beeper tone durations.
*/
typedef enum {
ADI_BEEP_DUR_0 = ADI_BEEP_DUR_ZERO, /*!< stop */
ADI_BEEP_DUR_32_32 = DURATION_ENCODE(1), /*!< whole note (1.016 seconds) */
ADI_BEEP_DUR_16_32 = DURATION_ENCODE(2), /*!< half note */
ADI_BEEP_DUR_12_32 = DURATION_ENCODE(8/3), /*!< three eights note */
ADI_BEEP_DUR_8_32 = DURATION_ENCODE(4), /*!< one quarter note */
ADI_BEEP_DUR_6_32 = DURATION_ENCODE(16/3), /*!< three sixteenth note */
ADI_BEEP_DUR_4_32 = DURATION_ENCODE(8), /*!< one eighth note */
ADI_BEEP_DUR_2_32 = DURATION_ENCODE(16), /*!< one sixteenth note */
ADI_BEEP_DUR_1_32 = DURATION_ENCODE(32), /*!< one thirty-secondth note */
ADI_BEEP_DUR_N = ADI_BEEP_DUR_INFINITE, /*!< continuous play */
} ADI_BEEP_NOTE_DURATION;
/*!
* \struct ADI_BEEP_NOTE
* @brief Beeper note structure.
* @details Describes a note in terms of frequency and duration.
*/
typedef struct {
ADI_BEEP_NOTE_FREQUENCY frequency; /*!< Frequency of the note */
ADI_BEEP_NOTE_DURATION duration; /*!< Duration of the note */
} ADI_BEEP_NOTE;
/*================ E X T E R N A L S ==================*/
/*
* Beeper API
*/
ADI_BEEP_RESULT adi_beep_Open (ADI_BEEP_DEV_ID const DeviceNum,
void* const pMemory,
uint32_t const MemorySize,
ADI_BEEP_HANDLE* const phDevice);
ADI_BEEP_RESULT adi_beep_RegisterCallback (ADI_BEEP_HANDLE const hDevice,
ADI_CALLBACK pfCallback,
void* const pCBParam);
ADI_BEEP_RESULT adi_beep_PlayNote (ADI_BEEP_HANDLE const hDevice,
ADI_BEEP_NOTE note);
ADI_BEEP_RESULT adi_beep_PlayTwoTone (ADI_BEEP_HANDLE const hDevice,
ADI_BEEP_NOTE noteA,
ADI_BEEP_NOTE noteB,
uint8_t count);
ADI_BEEP_RESULT adi_beep_PlaySequence (ADI_BEEP_HANDLE const hDevice,
ADI_BEEP_NOTE aSequence[],
uint8_t count);
ADI_BEEP_RESULT adi_beep_Enable (ADI_BEEP_HANDLE const hDevice,
bool const bFlag);
ADI_BEEP_RESULT adi_beep_Wait (ADI_BEEP_HANDLE const hDevice);
ADI_BEEP_RESULT adi_beep_Close (ADI_BEEP_HANDLE const hDevice);
#ifdef __cplusplus
}
#endif
#endif /* ADI_BEEP_H */
/*@}*/

236
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/crc/adi_crc.h Executable file
View File

@ -0,0 +1,236 @@
/*! *****************************************************************************
* @file adi_crc.h
* @brief CRC (Cyclic Redundancy Check) Device driver global include file
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_CRC_H
#define ADI_CRC_H
/** @addtogroup CRC_Driver CRC Device Driver
* @{
*/
#include <adi_processor.h>
/*============= I N C L U D E S =============*/
#include <string.h>
/* Memory size check */
#include <assert.h>
/* DMA Manager includes */
#include <drivers/dma/adi_dma.h>
/* Include the config file for CRC */
#include <adi_crc_config.h>
#ifdef __cplusplus
extern "C" {
#endif
/*============== D E F I N E S ===============*/
#if (ADI_CRC_CFG_ENABLE_DMA_SUPPORT == 0)
/**
* The size of types may vary between building tools (int, char, enumerator, etc.).
* This impacts the memory size required by a CRC driver.
* Consequently, ADI_CRC_MEMORY_SIZE is environment dependent.
*/
#if defined(__ICCARM__)
/**
* The amount of application supplied memory required to operate a core driven CRC device
* using a CRC driver built in IAR environment.
*/
#define ADI_CRC_MEMORY_SIZE (32u)
#else
/**
* The amount of application supplied memory required to operate a core driven CRC device
* using a CRC driver built in a generic built environment.
* Note: Create a new macro definition for your targetted development environment
* if this generic value was not appropriate in your development environment.
*/
#define ADI_CRC_MEMORY_SIZE (32u)
#endif
#else /* ADI_CRC_CFG_ENABLE_DMA_SUPPORT */
/**
* The size of types may vary between building tools (int, char, enumerator, etc.).
* This impacts the memory size required by a CRC driver.
* Consequently, ADI_CRC_MEMORY_SIZE is environment dependent.
*/
#if defined(__ICCARM__)
/**
* The amount of application supplied memory required to operate a DMA driven CRC device
* using a CRC driver built in IAR environment.
*/
#define ADI_CRC_MEMORY_SIZE (32u)
#else
/**
* The amount of application supplied memory required to operate a DMA driven CRC device
* using a CRC driver built in a generic built environment.
* Note: Create a new macro definition for your targetted development environment
* if this generic value was not appropriate in your development environment.
*/
#define ADI_CRC_MEMORY_SIZE (32u)
#endif
/** Check that a DMA channel can be used with CRC */
#define ADI_CRC_VALID_DMA_CHANNEL(DMA_CHANNEL_ID) ((SIP0_CHANn<=(DMA_CHANNEL_ID)) && ((DMA_CHANNEL_ID)<=SIP7_CHANn))
/**
* CRC events used in CRC callback functions to report
* - the completion of a DMA driven CRC request
* - errors detected when executing a DMA driven CRC request
*/
typedef enum __ADI_CRC_EVENT
{
/*! DMA driven CRC peripheral has completed processing a request */
ADI_CRC_EVENT_BUFFER_PROCESSED = ADI_DMA_EVENT_BUFFER_PROCESSED,
/*! DMA driven CRC peripheral has encountered a problem when processing a request */
ADI_CRC_EVENT_ERROR
} ADI_CRC_EVENT;
#endif /* ADI_CRC_CFG_ENABLE_DMA_SUPPORT */
/**
* A device handle used in all API functions to identify a CRC device.
* This handle is obtained when opening a CRC driver using adi_crc_Open.
* It stops being valid after closing the CRC driver using adi_crc_Close.
*/
typedef struct __ADI_CRC_DEVICE* ADI_CRC_HANDLE;
/**
* CRC driver return codes
*/
typedef enum
{
ADI_CRC_SUCCESS = 0, /*!< 0x00 - Generic success */
ADI_CRC_FAILURE, /*!< 0x01 - Generic failure */
ADI_CRC_IN_USE, /*!< 0x02 - Supplied CRC device number is already open and in use */
ADI_CRC_INSUFFICIENT_MEMORY, /*!< 0x03 - Supplied memory is insufficient to operate the CRC device */
ADI_CRC_FN_NOT_SUPPORTED, /*!< 0x04 - Function not supported */
ADI_CRC_FN_NOT_PERMITTED, /*!< 0x05 - Function not permitted at current stage */
ADI_CRC_BAD_HANDLE, /*!< 0x06 - Bad CRC device handle (can be caused by a CRC device not opened)*/
ADI_CRC_BAD_DEVICE_NUMBER, /*!< 0x07 - There is no CRC device identified by this number */
ADI_CRC_INVALID_DMA_CHANNEL, /*!< 0x08 - Invalid DMA channel assigned to a CRC driver */
ADI_CRC_INVALID_PARAMETER, /*!< 0x09 - Invalid parameter used in a CRC function */
} ADI_CRC_RESULT;
/*======= P U B L I C P R O T O T Y P E S ========*/
/* (globally-scoped functions) */
/* Opens a CRC device instance */
ADI_CRC_RESULT adi_crc_Open(
uint32_t DeviceNum,
void *pMemory,
uint32_t MemorySize,
ADI_CRC_HANDLE *phDevice);
/* Closes a CRC device instance */
ADI_CRC_RESULT adi_crc_Close(
ADI_CRC_HANDLE const hDevice);
/* Registers or unregisters a callback, used by the CRC interrupt handler or with DMA driven operations, with the CRC device */
ADI_CRC_RESULT adi_crc_RegisterCallback(
ADI_CRC_HANDLE const hDevice,
ADI_CALLBACK pfCallback,
void *const pCBParam);
/* Sets the 32-bit polynomial for CRC operations */
ADI_CRC_RESULT adi_crc_SetPolynomialVal(
ADI_CRC_HANDLE const hDevice,
uint32_t PolynomialVal);
/* Submits data buffer for CRC operation */
ADI_CRC_RESULT adi_crc_Compute(
ADI_CRC_HANDLE const hDevice,
void *pCrcBuf,
uint32_t NumBytes,
uint32_t NumBits);
/* Gets the current CRC peripheral status */
ADI_CRC_RESULT adi_crc_IsCrcInProgress(
ADI_CRC_HANDLE const hDevice,
bool *pbCrcInProgress);
/* Gets the final CRC result computed for a data stream */
ADI_CRC_RESULT adi_crc_GetFinalCrcVal(
ADI_CRC_HANDLE const hDevice,
uint32_t *pFinalCrcVal);
/* Gets the current/intermediate CRC result computed for a data stream */
ADI_CRC_RESULT adi_crc_GetCurrentCrcVal(
ADI_CRC_HANDLE const hDevice,
uint32_t *pCurrentCrcVal);
ADI_CRC_RESULT adi_crc_SetBitMirroring(
ADI_CRC_HANDLE const hDevice,
const bool bEnable);
ADI_CRC_RESULT adi_crc_SetByteMirroring(
ADI_CRC_HANDLE const hDevice,
const bool bEnable);
ADI_CRC_RESULT adi_crc_EnableWordSwap(
ADI_CRC_HANDLE const hDevice,
const bool bEnable);
ADI_CRC_RESULT adi_crc_SetCrcSeedVal(
ADI_CRC_HANDLE const hDevice,
uint32_t CrcSeedVal);
ADI_CRC_RESULT adi_crc_SetLSBFirst(
ADI_CRC_HANDLE const hDevice,
const bool bEnable);
#ifdef __cplusplus
}
#endif
/*@}*/
#endif /* ADI_CRC_H */

235
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/crypto/adi_crypto.h Executable file
View File

@ -0,0 +1,235 @@
/*! *****************************************************************************
* @file adi_crypto.h
* @brief Main include file for CRYPTO Device driver definitions
-----------------------------------------------------------------------------
Copyright (c) 2010-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
/** @addtogroup Crypto_Driver Crypto Driver
* @{
*/
#ifndef ADI_CRYPTO_H
#define ADI_CRYPTO_H
/*! \cond PRIVATE */
#include <adi_processor.h>
#include <adi_callback.h>
#include <rtos_map/adi_rtos_map.h> /* for ADI_SEM_SIZE */
/*! \endcond */
#include <adi_crypto_config.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*!
* \enum ADI_CRYPTO_RESULT
* Crypto API return codes
*/
typedef enum
{
ADI_CRYPTO_SUCCESS = 0, /*!< No Error, API suceeded. */
ADI_CRYPTO_ERR_ALREADY_INITIALIZED, /*!< Crypto is already initialized. */
ADI_CRYPTO_ERR_BAD_BUFFER, /*!< Invalid buffer parameters. */
ADI_CRYPTO_ERR_BAD_CONFIG, /*!< Invalid device config parameters passed. */
ADI_CRYPTO_ERR_BAD_DEVICE_NUM, /*!< Invalid device instance number. */
ADI_CRYPTO_ERR_BAD_DEV_HANDLE, /*!< Invalid device handle passed. */
ADI_CRYPTO_ERR_COMPUTE_ACTIVE, /*!< Computation underway. */
ADI_CRYPTO_ERR_DMA_BUS_FAULT, /*!< Runtime DMA bus fault detected. */
ADI_CRYPTO_ERR_DMA_INVALID_DESCR, /*!< Runtime DMA invalid descriptor detected. */
ADI_CRYPTO_ERR_DMA_REGISTER, /*!< Error registering DMA error callback function. */
ADI_CRYPTO_ERR_DMA_UNKNOWN_ERROR, /*!< Unknown runtime DMA error detected. */
ADI_CRYPTO_ERR_INSUFFICIENT_MEM, /*!< Insufficient memory passed to the driver. */
ADI_CRYPTO_ERR_INVALID_PARAM, /*!< Invalid function parameter. */
ADI_CRYPTO_ERR_INVALID_STATE, /*!< Operation failed since the device is in an invalid state. */
ADI_CRYPTO_ERR_SEMAPHORE_FAILED, /*!< Failure in semaphore functions. */
} ADI_CRYPTO_RESULT;
/*!
* \enum ADI_CRYPTO_EVENT
* Crypto callback events
*/
typedef enum
{
/* successful buffer completion events */
ADI_CRYPTO_EVENT_STATUS_CBC_DONE, /*!< CBC operation is complete. */
ADI_CRYPTO_EVENT_STATUS_CCM_DONE, /*!< CCM operation is complete. */
ADI_CRYPTO_EVENT_STATUS_CMAC_DONE, /*!< CMAC operation is complete. */
ADI_CRYPTO_EVENT_STATUS_CTR_DONE, /*!< CTR operation is complete. */
ADI_CRYPTO_EVENT_STATUS_ECB_DONE, /*!< ECB operation is complete. */
ADI_CRYPTO_EVENT_STATUS_HMAC_DONE, /*!< HMAC operation is complete. */
ADI_CRYPTO_EVENT_STATUS_SHA_DONE, /*!< SHA operation is complete. */
/* other events */
ADI_CRYPTO_EVENT_DMA_BUS_ERROR, /*!< DMA bus error encountered. */
ADI_CRYPTO_EVENT_DMA_DESCRIPTOR_ERROR, /*!< DMA descriptor error encountered. */
ADI_CRYPTO_EVENT_DMA_UNKNOWN_ERROR, /*!< DMA unknown error encountered. */
ADI_CRYPTO_EVENT_STATUS_INPUT_OVERFLOW, /*!< Input overflow error encountered. */
ADI_CRYPTO_EVENT_STATUS_UNKNOWN, /*!< Unknown error encountered. */
} ADI_CRYPTO_EVENT;
/*! The amount of application supplied memory used by the CRYPTO driver to store internal state. */
#define ADI_CRYPTO_MEMORY_SIZE (88u + ADI_SEM_SIZE)
/*! A device handle used in all API functions to identify the flash device. */
typedef struct __ADI_CRYPTO_DEV_DATA_TYPE* ADI_CRYPTO_HANDLE;
/*! Number of bytes to allocate for SHA256 hash outputs */
#define ADI_CRYPTO_SHA_HASH_BYTES (256u/8u)
/*! Computation mode(Encryption/Decryption) for given buffers */
typedef enum
{
ADI_CRYPTO_DECODE = (0u << BITP_CRYPT_CFG_ENCR), /*!< Encoding mode is decryption. */
ADI_CRYPTO_ENCODE = (1u << BITP_CRYPT_CFG_ENCR), /*!< Encoding mode is encryption. */
} ADI_CRYPTO_CODING_MODE;
/*! Enum for the AES KEY Length */
typedef enum
{
ADI_CRYPTO_AES_KEY_LEN_128_BIT = (0u << BITP_CRYPT_CFG_AESKEYLEN), /*!< KEY length is 128 bits. */
ADI_CRYPTO_AES_KEY_LEN_256_BIT = (2u << BITP_CRYPT_CFG_AESKEYLEN), /*!< KEY length is 256 bits. */
} ADI_CRYPTO_AES_KEY_LEN;
/*! Enable byte swapping for KEY writes */
typedef enum
{
ADI_CRYPTO_KEY_LITTLE_ENDIAN = (0u << BITP_CRYPT_CFG_KEY_BYTESWAP), /*!< Do not apply KEY write byte swaps. */
ADI_CRYPTO_KEY_BIG_ENDIAN = (1u << BITP_CRYPT_CFG_KEY_BYTESWAP), /*!< Apply KEY write byte swaps. */
} ADI_CRYPTO_KEY_BYTE_SWAP;
/*! Byte-swap the SHA Input Data */
typedef enum
{
ADI_CRYPTO_SHA_LITTLE_ENDIAN = (0u << BITP_CRYPT_CFG_SHA_BYTESWAP), /*!< Do not apply SHA data write byte swaps. */
ADI_CRYPTO_SHA_BIG_ENDIAN = (1u << BITP_CRYPT_CFG_SHA_BYTESWAP), /*!< Apply SHA data write byte swaps. */
} ADI_CRYPTO_SHA_BYTE_SWAP;
/*! Byte-swap the AES Input Data */
typedef enum
{
ADI_CRYPTO_AES_LITTLE_ENDIAN = (0u << BITP_CRYPT_CFG_AES_BYTESWAP), /*!< Do not apply AES data write byte swaps. */
ADI_CRYPTO_AES_BIG_ENDIAN = (1u << BITP_CRYPT_CFG_AES_BYTESWAP), /*!< Apply AES data write byte swaps. */
} ADI_CRYPTO_AES_BYTE_SWAP;
/*!
* \enum ADI_CRYPTO_CIPHER_MODE
* Enum for the cipher modes.
*/
typedef enum {
ADI_CRYPTO_MODE_CBC = BITM_CRYPT_CFG_CBCEN, /*!< Select CBC cipher mode. */
ADI_CRYPTO_MODE_CCM = BITM_CRYPT_CFG_CCMEN, /*!< Select CCM cipher mode. */
ADI_CRYPTO_MODE_CMAC = BITM_CRYPT_CFG_CMACEN, /*!< Select CMAC cipher mode. */
ADI_CRYPTO_MODE_CTR = BITM_CRYPT_CFG_CTREN, /*!< Select CTR cipher mode. */
ADI_CRYPTO_MODE_ECB = BITM_CRYPT_CFG_ECBEN, /*!< Select ECB cipher mode. */
ADI_CRYPTO_MODE_HMAC = BITM_CRYPT_CFG_HMACEN, /*!< Select HMAC cipher mode. */
ADI_CRYPTO_MODE_SHA = BITM_CRYPT_CFG_SHA256EN, /*!< Select SHA cipher mode. */
} ADI_CRYPTO_CIPHER_MODE;
/*! superset user Crypto transaction structure (different elements used for different modes) */
typedef struct
{
ADI_CRYPTO_CIPHER_MODE eCipherMode; /*!< Cipher mode to use */
ADI_CRYPTO_CODING_MODE eCodingMode; /*!< Coding Mode (Encryption or Decryption) */
ADI_CRYPTO_KEY_BYTE_SWAP eKeyByteSwap; /*!< KEY endianness */
ADI_CRYPTO_SHA_BYTE_SWAP eShaByteSwap; /*!< SHA endianness */
ADI_CRYPTO_AES_BYTE_SWAP eAesByteSwap; /*!< AES endianness */
uint8_t *pKey; /*!< Pointer to the KEY data: pre-formatted as a byte array, according to eAesKeyLen. */
ADI_CRYPTO_AES_KEY_LEN eAesKeyLen; /*!< The length of the AES KEY */
uint32_t *pAuthData; /*!< CCM mode: pointer to user prefix buffer */
uint32_t numAuthBytes; /*!< Length of the prefix buffer in bytes (should be a multiple of 16 bytes) */
uint32_t *pInputData; /*!< Pointer to user input data buffer */
uint32_t numInputBytes; /*!< Length of the data buffer in bytes (should be a multiple of 16bytes) */
uint32_t *pOutputData; /*!< Pointer to user output buffer */
uint32_t numOutputBytes; /*!< Length of the output buffer in bytes (should be a multiple of 16bytes) */
uint8_t *pNonceIV; /*!< Pointer to user 16-byte array containing one of three values, depending on cipher mode:\n
- CTR mode = 108-bit NONCE\n
- CCM mode = 112-bit NONCE\n
- CBC mode = 128-bit IV (Initialization Vector)\n\n
NONCE and IV assume little endian format, for example: CTR NONCE packing is:\n
- NONCE[0] -> 7:0\n
- NONCE[1] -> 15:8\n
- ...\n
- NONCE[13] -> 103:96\n
- NONCE[14](Bits 3:0) -> 107:104\n
*/
uint32_t CounterInit; /*!< CTR/CCM mode: Counter Initialization Value (CTR=20-bit, CCM=16-bit) */
uint32_t numValidBytes; /*!< CCM mode: Number of valid bytes in the last (padding) block (1-16) */
uint32_t numShaBits; /*!< SHA mode: Number of bits in the SHA payload, which may be odd-sized */
} ADI_CRYPTO_TRANSACTION;
/*================ PUBLIC API ==================*/
ADI_CRYPTO_RESULT adi_crypto_Open (uint32_t const nDeviceNum, void * const pMemory, uint32_t const nMemorySize, ADI_CRYPTO_HANDLE * const phDevice);
ADI_CRYPTO_RESULT adi_crypto_Close (ADI_CRYPTO_HANDLE const hDevice);
ADI_CRYPTO_RESULT adi_crypto_RegisterCallback (ADI_CRYPTO_HANDLE const hDevice, ADI_CALLBACK const pfCallback, void * const pCBParam);
ADI_CRYPTO_RESULT adi_crypto_Enable (ADI_CRYPTO_HANDLE const hDevice, bool const bEnable);
ADI_CRYPTO_RESULT adi_crypto_SubmitBuffer (ADI_CRYPTO_HANDLE const hDevice, ADI_CRYPTO_TRANSACTION * const pBuffer);
ADI_CRYPTO_RESULT adi_crypto_GetBuffer (ADI_CRYPTO_HANDLE const hDevice, ADI_CRYPTO_TRANSACTION ** const ppBuffer);
ADI_CRYPTO_RESULT adi_crypto_IsBufferAvailable (ADI_CRYPTO_HANDLE const hDevice, bool * const pbAvailable);
#if (ADI_CRYPTO_ENABLE_DMA_SUPPORT == 1)
ADI_CRYPTO_RESULT adi_crypto_EnableDmaMode (ADI_CRYPTO_HANDLE const hDevice, bool const bEnable);
#endif
#ifdef __cplusplus
}
#endif
#endif /* include guard */
/*
** EOF
*/
/*@}*/

274
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/dma/adi_dma.h Executable file
View File

@ -0,0 +1,274 @@
/*!
*****************************************************************************
* @file: adi_dma.h
* @brief: DMA Device Definitions for ADuCxxx
*-----------------------------------------------------------------------------
*
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ADI_DMA_MODE_PING_PONG
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
/*! \addtogroup DMA_Driver DMA Driver
* @{
* @brief DMA Driver
* @details This driver is intended to be used only by the device drivers and not by the application.
* @note The device drivers must include drivers/dma/adi_dma.h to use this driver
*/
#ifndef ADI_DMA__H__
#define ADI_DMA__H__
#include <adi_callback.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*============= D E F I N E S =============*/
/*! Amount of memory(In bytes) required by the DMA manager for managing the operation
* This memory is completely owned by the driver till the end of the operation.
*/
/*============= D A T A T Y P E S =============*/
/*!
* Dma Data Increments
*/
typedef enum
{
ADI_DMA_INCR_1_BYTE = 0x00u, /*!< Byte increment */
ADI_DMA_INCR_2_BYTE = 0x01u, /*!< Half word increment */
ADI_DMA_INCR_4_BYTE = 0x02u, /*!< Word increment */
ADI_DMA_INCR_NONE = 0x03u, /*!< No increment */
ADI_DMA_DECR_1_BYTE = 0x10u, /*!< Byte decrement */
ADI_DMA_DECR_2_BYTE = 0x11u, /*!< Half word decrement */
ADI_DMA_DECR_4_BYTE = 0x12u /*!< Word decrement */
} ADI_DMA_INCR_TYPE;
/*!
* DMA Callback Events
*/
typedef enum
{
ADI_DMA_EVENT_BUFFER_PROCESSED, /*!< Buffer processed event */
ADI_DMA_EVENT_ERR_BUS, /*!< Bus Error Occurred Event */
ADI_DMA_EVENT_ERR_INVALID_DESCRIPTOR /*!< Invalid Descriptor Event */
} ADI_DMA_EVENT;
/*!
* Dma Data Widths
*/
typedef enum
{
ADI_DMA_WIDTH_1_BYTE = 0x0, /*!< 8-bit */
ADI_DMA_WIDTH_2_BYTE = 0x1, /*!< 16-bit */
ADI_DMA_WIDTH_4_BYTE = 0x2 /*!< 32-bit */
} ADI_DMA_WIDTH_TYPE;
/*!
* Dma Rearbitration Intervals (chunk size between bus arbitrations)
*/
typedef enum
{
ADI_DMA_RPOWER_1 = 0, /*!< Rearbitrate after 1 transfer */
ADI_DMA_RPOWER_2, /*!< Rearbitrate after 2 transfers */
ADI_DMA_RPOWER_4, /*!< Rearbitrate after 4 transfers */
ADI_DMA_RPOWER_8, /*!< Rearbitrate after 8 transfers */
ADI_DMA_RPOWER_16, /*!< Rearbitrate after 16 transfers */
ADI_DMA_RPOWER_32, /*!< Rearbitrate after 32 transfers */
ADI_DMA_RPOWER_64, /*!< Rearbitrate after 64 transfers */
ADI_DMA_RPOWER_128, /*!< Rearbitrate after 128 transfers */
ADI_DMA_RPOWER_256, /*!< Rearbitrate after 256 transfers */
ADI_DMA_RPOWER_512, /*!< Rearbitrate after 512 transfers */
ADI_DMA_RPOWER_1024 /*!< Rearbitrate after 1024 transfers */
} ADI_DMA_RPOWER;
/*!
* Dma Transfer Modes
*/
typedef enum
{
ADI_DMA_MODE_BASIC, /*!< Basic mode */
ADI_DMA_MODE_AUTO, /*!< Auto request mode */
ADI_DMA_MODE_PING_PONG, /*!< Ping pong mode */
ADI_DMA_MODE_MSG, /*!< Memory Scatter gather mode (not valid as no Memory DMA support) */
ADI_DMA_MODE_PSG /*!< Peripheral Scatter mode */
} ADI_DMA_MODE;
/*!
* Dma Channel Priority Settings (only HIGH or DEFAULT priority supported)
*/
typedef enum
{
ADI_DMA_PRIORITY_DEFAULT = 0, /*!< Use DEFAULT channel priority */
ADI_DMA_PRIORITY_HIGH /*!< Elevate channel to HIGH priority */
} ADI_DMA_PRIORITY;
/*!
* Result Event Type
*/
typedef enum {
ADI_DMA_SUCCESS, /*!< Successfully Completed */
ADI_DMA_ERR_NOT_INITIALIZED, /*!< DMA not initialized */
ADI_DMA_ERR_INVALID_PARAMETER, /*!< Input parameter to the function is invalid */
} ADI_DMA_RESULT;
/*! \cond PRIVATE*/
/*!
* \enum DMA_CHANn_TypeDef
* DMA Channel Assignments
*/
typedef enum
{
SPI2_TX_CHANn = 0, /*!< SPI2 Transmit DMA channel */
SPI2_RX_CHANn = 1, /*!< SPI2 Receive DMA channel */
SPORT0A_CHANn = 2, /*!< SPORT0-A DMA channel */
SPORT0B_CHANn = 3, /*!< SPORT0-B DMA channel */
SPI0_TX_CHANn = 4, /*!< SPI0 Transmit DMA channel */
SPI0_RX_CHANn = 5, /*!< SPI0 Receive DMA channel */
SPI1_TX_CHANn = 6, /*!< SPI1 Transmit DMA channel */
SPI1_RX_CHANn = 7, /*!< SPI1 Receive DMA channel */
UART0_TX_CHANn = 8, /*!< UART0 Transmit DMA channel */
UART0_RX_CHANn = 9, /*!< UART0 Receive DMA channel */
I2CS_TX_CHANn = 10, /*!< I2C Slave Transmit DMA channel */
I2CS_RX_CHANn = 11, /*!< I2C Slave Receive DMA channel */
I2CM_CHANn = 12, /*!< I2C Master DMA channel */
AES0_IN_CHANn = 13, /*!< AES0-IN DMA channel */
AES0_OUT_CHANn = 14, /*!< AES0-OUT DMA channel */
FLASH_CHANn = 15, /*!< FLASH DMA channel */
SIP0_CHANn = 16, /*!< SIP-0 DMA channel */
SIP1_CHANn = 17, /*!< SIP-1 DMA channel */
SIP2_CHANn = 18, /*!< SIP-2 DMA channel */
SIP3_CHANn = 19, /*!< SIP-3 DMA channel */
SIP4_CHANn = 20, /*!< SIP-4 DMA channel */
SIP5_CHANn = 21, /*!< SIP-5 DMA channel */
SIP6_CHANn = 22, /*!< SIP-6 DMA channel */
SIP7_CHANn = 23, /*!< SIP-7 DMA channel */
ADC0_CHANn = 24, /*!< ADC0 DMA channel */
UART1_TX_CHANn = 25, /*!< UART1 Transmit DMA channel */
UART1_RX_CHANn = 26, /*!< UART1 Receive DMA channel */
NUM_DMA_CHANNELSn = 27 /*!< Total Number of DMA channels */
} DMA_CHANn_TypeDef; /** typedef name for fixed DMA channel assignments */
/*! \endcond */
/*!
* \struct ADI_DCC_TypeDef
* DMA Channel Control MMR Access Template
*/
typedef struct
{
__IO uint32_t DMASRCEND; /*!< Source End Pointer */
__IO uint32_t DMADSTEND; /*!< Destination End Pointer */
__IO uint32_t DMACDC; /*!< Channel Data Configuration */
uint32_t RESERVED; /*!< Address gap filler */
} ADI_DCC_TypeDef;
/*! \cond PRIVATE */
/* Bit Position for DMA Descriptor Control */
#define DMA_BITP_CTL_DST_INC (30u)
#define DMA_BITP_CTL_SRC_INC (26u)
#define DMA_BITP_CTL_SRC_SIZE (24u)
#define DMA_BITP_CTL_R_POWER (14u)
#define DMA_BITP_CTL_N_MINUS_1 (4u)
#define DMA_BITP_CTL_CYCLE_CTL (0u)
/* Bit Mask for DMA Descriptor Control */
#define DMA_BITM_CTL_DST_INC ((0x00000003u) << DMA_BITP_CTL_DST_INC)
#define DMA_BITM_CTL_SRC_INC ((0x00000003u) << DMA_BITP_CTL_SRC_INC)
#define DMA_BITM_CTL_SRC_SIZE ((0x00000003u) << DMA_BITP_CTL_SRC_SIZE)
#define DMA_BITM_CTL_R_POWER ((0x0000000Fu) << DMA_BITP_CTL_R_POWER)
#define DMA_BITM_CTL_N_MINUS_1 ((0x000003FFu) << DMA_BITP_CTL_N_MINUS_1)
#define DMA_BITM_CTL_CYCLE_CTL ((0x00000007u) << DMA_BITP_CTL_CYCLE_CTL)
/* Enum for the DMA Descriptor Cycle Control */
#define DMA_ENUM_CTL_CYCLE_CTL_INVALID (0u)
#define DMA_ENUM_CTL_CYCLE_CTL_BASIC (1u)
#define DMA_ENUM_CTL_CYCLE_CTL_AUTO_REQ (2u)
#define DMA_ENUM_CTL_CYCLE_CTL_PING_PONG (3u)
#define DMA_ENUM_CTL_CYCLE_CTL_MSG_PRI (4u)
#define DMA_ENUM_CTL_CYCLE_CTL_MSG_ALT (5u)
#define DMA_ENUM_CTL_CYCLE_CTL_PSG_PRI (6u)
#define DMA_ENUM_CTL_CYCLE_CTL_PSG_ALT (7u)
#define DMA_BITM_INCR_TYPE_DECR (0x10u)
#define DMA_BITM_OCTL_SRC_DECR (0x01u)
#define DMA_BITM_OCTL_DST_DECR (0x02u)
#define DMA_BITM_OCTL_SRC_INCR (0x04u)
#define DMA_BITM_OCTL_DST_INCR (0x08u)
#define DMA_TRANSFER_LIMIT (1024u) /*!< Maximum number of transfers handled by the DMA in one request */
/* pointer to the primary CCD array */
extern ADI_DCC_TypeDef* const pPrimaryCCD;
/* pointer to the alternate CCD array */
extern ADI_DCC_TypeDef* const pAlternateCCD;
/*! \endcond */
/*========== DMA API DECLARATIONS ==========*/
extern void adi_dma_Init(void);
extern ADI_DMA_RESULT adi_dma_RegisterCallback (
DMA_CHANn_TypeDef const eChannelID,
ADI_CALLBACK const pfCallback,
void* const pCBParam
);
#ifdef __cplusplus
}
#endif
#endif /* include guard */
/*
** EOF
*/
/**@}*/

185
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/flash/adi_flash.h Executable file
View File

@ -0,0 +1,185 @@
/*!
*****************************************************************************
@file: adi_flash.h
@brief: Flash device driver definitions
@date: $Date: 2016-07-05 00:49:46 -0400 (Tue, 05 Jul 2016) $
-----------------------------------------------------------------------------
Copyright (c) 2012-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
/*! @addtogroup Flash_Driver Flash Driver
* @{
*/
#ifndef ADI_FLASH_H
#define ADI_FLASH_H
/*! \cond PRIVATE */
#include <adi_processor.h>
#include <adi_callback.h>
#include <rtos_map/adi_rtos_map.h> /* for ADI_SEM_SIZE */
/*! \endcond */
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*!
* \enum ADI_FEE_RESULT
* Flash Controller return codes.
*/
typedef enum {
ADI_FEE_SUCCESS = 0, /*!< The function completed successfully. */
ADI_FEE_ERR_ALIGNMENT, /*!< The flash write source data pointer is misaligned. */
ADI_FEE_ERR_ALREADY_INITIALIZED, /*!< The flash device driver is already initialized. */
ADI_FEE_ERR_BAD_DEVICE_NUM, /*!< Device number passed is invalid. */
ADI_FEE_ERR_BUFFER_ERR, /*!< An error occurred while processing a write buffer. */
ADI_FEE_ERR_DEVICE_BUSY, /*!< The device is busy. */
ADI_FEE_ERR_DMA_BUS_FAULT, /*!< Runtime DMA bus fault detected. */
ADI_FEE_ERR_DMA_INVALID_DESCR, /*!< Runtime DMA invalid descriptor detected. */
ADI_FEE_ERR_DMA_REGISTER, /*!< Error registering DMA error callback function. */
ADI_FEE_ERR_DMA_UNKNOWN_ERROR, /*!< Unknown runtime DMA error detected. */
ADI_FEE_ERR_HW_ERROR_DETECTED, /*!< An FEE hardware error occurred (pHwErrors param). */
ADI_FEE_ERR_INSUFFICIENT_MEM, /*!< The memory passed is undersized. */
ADI_FEE_ERR_INVALID_HANDLE, /*!< Device Handle is invalid. */
ADI_FEE_ERR_INVALID_PARAM, /*!< A function parameter is invalid. */
ADI_FEE_ERR_NO_DATA_TO_TRANSFER, /*!< No transfer data detected. */
ADI_FEE_ERR_TRANSFER_IN_PROGRESS, /*!< Operation already in progress. */
ADI_FEE_ERR_UNMATCHED_SUBMIT_QUERY, /*!< Unmatched read/write vs. submit/get API call. */
ADI_FEE_ERR_SEMAPHORE_FAILED, /*!< An semaphore operation failed. */
} ADI_FEE_RESULT;
/*! A device handle used in all API functions to identify the flash device. */
typedef struct __ADI_FEE_DEV_DATA_TYPE* ADI_FEE_HANDLE;
/*! Applications use the "ADI_FEE_MEMORY_SIZE" macro to allocate
required flash driver memory. This memory (and size) are passed
to the flash driver during the "adi_fee_Open()" driver initialization
call. This memory is used to store internal flash driver state.
*/
#define ADI_FEE_MEMORY_SIZE (44u + ADI_SEM_SIZE)
/*!
* \enum ADI_FEE_CALLBACK_EVENT
* Enum for the callback events.
*/
typedef enum {
ADI_FEE_CALLBACK_EVENT_BUFFER_PROCESSED, /*!< Buffer processed successfully event. */
ADI_FEE_CALLBACK_EVENT_DEVICE_ERROR, /*!< Device error(s) detected during command. */
} ADI_FEE_CALLBACK_EVENT;
/*!
* \enum ADI_FEE_ECC_EVENT_TYPE
* Enum for the Error-Correction-Code event type.
*/
typedef enum {
ADI_FEE_ECC_EVENT_TYPE_ERROR, /*!< ECC Error Event. */
ADI_FEE_ECC_EVENT_TYPE_CORRECT /*!< ECC correction event. */
} ADI_FEE_ECC_EVENT_TYPE;
/*!
* \enum ADI_FEE_ECC_RESPONSE
* Error-Correction-Code configuration codes.
*/
typedef enum {
ADI_FEE_ECC_RESPONSE_NONE = 0x0, /*!< No Response. */
ADI_FEE_ECC_RESPONSE_BUS_ERROR = 0x1, /*!< Generate a Bus Error. */
ADI_FEE_ECC_RESPONSE_IRQ = 0x2 /*!< Generate an IRQ. */
} ADI_FEE_ECC_RESPONSE;
/*!
* \struct ADI_FEE_TRANSACTION
* Flash write data transaction block.
*/
typedef struct {
uint32_t *pWriteAddr; /*!< Pointer to flash-space (destination) write location. */
uint32_t *pWriteData; /*!< Pointer to user-space (source) write Data. */
uint32_t nSize; /*!< Write data size (in bytes). */
bool bUseDma; /*!< DMA flag controlling use of DMA or not. */
} ADI_FEE_TRANSACTION;
/*================ E X T E R N A L S ==================*/
/* Flash Controller API */
ADI_FEE_RESULT adi_fee_Open (uint32_t const nDeviceNum, void* const pMemory, uint32_t const nMemorySize, ADI_FEE_HANDLE* const phDevice);
ADI_FEE_RESULT adi_fee_Close (ADI_FEE_HANDLE const hDevice);
ADI_FEE_RESULT adi_fee_RegisterCallback (ADI_FEE_HANDLE const hDevice, ADI_CALLBACK const pfCallback, void* const pCBParam);
ADI_FEE_RESULT adi_fee_PageErase (ADI_FEE_HANDLE const hDevice, uint32_t const nPageNumStart, uint32_t const nPageNumEnd, uint32_t* const pHwErrors);
ADI_FEE_RESULT adi_fee_MassErase (ADI_FEE_HANDLE const hDevice, uint32_t* const pHwErrors);
ADI_FEE_RESULT adi_fee_Write (ADI_FEE_HANDLE const hDevice, ADI_FEE_TRANSACTION* const pTransaction, uint32_t* const pHwErrors);
ADI_FEE_RESULT adi_fee_SubmitBuffer (ADI_FEE_HANDLE const hDevice, ADI_FEE_TRANSACTION* const pTransaction);
ADI_FEE_RESULT adi_fee_IsBufferAvailable (ADI_FEE_HANDLE const hDevice, bool* const pbCompletionState);
ADI_FEE_RESULT adi_fee_GetBuffer (ADI_FEE_HANDLE const hDevice, uint32_t* const pHwErrors);
ADI_FEE_RESULT adi_fee_GetPageNumber (ADI_FEE_HANDLE const hDevice, uint32_t const nAddress, uint32_t* const pnPageNum);
ADI_FEE_RESULT adi_fee_GetBlockNumber (ADI_FEE_HANDLE const hDevice, uint32_t const nAddress, uint32_t* const pnBlockNum);
ADI_FEE_RESULT adi_fee_VerifySignature (ADI_FEE_HANDLE const hDevice, uint32_t const nStartPage, uint32_t const nEndPage, uint32_t* const pSigResult, uint32_t* const pHwErrors);
ADI_FEE_RESULT adi_fee_WriteProtectBlock (ADI_FEE_HANDLE const hDevice, uint32_t const nBlockNum);
ADI_FEE_RESULT adi_fee_Sleep (ADI_FEE_HANDLE const hDevice, bool const bSleep);
ADI_FEE_RESULT adi_fee_Abort (ADI_FEE_HANDLE const hDevice);
ADI_FEE_RESULT adi_fee_GetAbortAddr (ADI_FEE_HANDLE const hDevice, uint32_t* const pnAddress);
ADI_FEE_RESULT adi_fee_ConfigECC (ADI_FEE_HANDLE const hDevice, uint32_t const nStartPage, bool const bInfoECCEnable);
ADI_FEE_RESULT adi_fee_EnableECC (ADI_FEE_HANDLE const hDevice, bool const bEnable);
ADI_FEE_RESULT adi_fee_ConfigECCEvents (ADI_FEE_HANDLE const hDevice, ADI_FEE_ECC_EVENT_TYPE const eEvent, ADI_FEE_ECC_RESPONSE const eResponse);
ADI_FEE_RESULT adi_fee_GetECCErrAddr (ADI_FEE_HANDLE const hDevice, uint32_t* const pnAddress);
ADI_FEE_RESULT adi_fee_GetECCCorrections (ADI_FEE_HANDLE const hDevice, uint32_t* const pnNumCorrections);
#ifdef __cplusplus
}
#endif
#endif /* include guard */
/*
** EOF
*/
/*@}*/

127
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/general/adi_data_transfer.h Executable file
View File

@ -0,0 +1,127 @@
/*! ****************************************************************************
* @file adi_data_transfer.h
* @brief General data transfer types for drivers
* @details General data transfer types for drivers
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef ADI_DATA_TRANSFER_H
#define ADI_DATA_TRANSFER_H
/*============= I N C L U D E S =============*/
#include <stdint.h> /* defines types such as uint32_t*/
#include <rtos_map/adi_rtos_map.h> /* needed for SEM_VAR_DECLR declaration */
/*! \cond PRIVATE */
/** @addtogroup Data_Transfer Common Data Transfer Structures
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*============== D E F I N E S ===============*/
#define ADI_DT_BUFNUM (2u) /*!< Number of buffers available for data transfers in each communication channel */
/*!
*******************************************************************************
* \struct ADI_DT_BUFF_INFO
* Structure for managing buffers submitted to drivers.
******************************************************************************/
struct _ADI_DT_BUFF_INFO;
/*!
*******************************************************************************
* Structure for managing buffers submitted to drivers.
******************************************************************************/
typedef struct _ADI_DT_BUFF_INFO
{
void * pStartAddress; /*!< Address of buffer passed down a driver. */
uint32_t nCount; /*!< Size of buffer in bytes. */
uint32_t nIndex; /*!< Position of first byte to be transmitted. */
bool bInUse; /*!< Buffer in use flag. */
bool bDMA; /*!< Transaction is using the DMA flag. */
struct _ADI_DT_BUFF_INFO * pNextBuffer; /*!< Pointer to the next buffer in the list. */
} ADI_DT_BUFF_INFO;
/*!
*******************************************************************************
* Enumeration of different data transfer modes supported by drivers.
******************************************************************************/
typedef enum _ADI_DT_MODE
{
ADI_DT_MODE_NONE, /*!< Mode of data transfer is not selected. */
ADI_DT_MODE_BLOCKING, /*!< Only calls to adi_xxx_Read or adi_xxx_Write are allowed for transferring data. */
ADI_DT_MODE_NONBLOCKING /*!< Only calls to adi_xxx_SubmitBuffer are allowed for transferring data. */
} ADI_DT_MODE;
typedef void * ADI_DEVICE_HANDLE; /*!< Generic device handle */
/*!
*******************************************************************************
* Structure for managing pool of buffers submitted to drivers.
******************************************************************************/
typedef struct
{
ADI_DT_BUFF_INFO BufInfo[ADI_DT_BUFNUM]; /*!< Ping Pong Buffers. */
ADI_DT_BUFF_INFO * pFreeBuffer; /*!< Pointer to free buffer. (Next buffer to submit). */
ADI_DT_BUFF_INFO * pFillBuffer; /*!< Pointer to the next buffer to be filled. (Needed for the case
where many buffers are "submitted" before a "get" is called.) */
ADI_DT_BUFF_INFO * pActiveBuffer; /*!< Pointer to active buffer. (Next buffer waiting for completion.)*/
ADI_DT_MODE eDataTranferMode; /*!< Data transfer mode (blocking or non-blockig). */
SEM_VAR_DECLR
} ADI_DT_CHANNEL;
/*============= P U B L I C F U N C T I O N S =============*/
#ifdef __cplusplus
}
#endif /* __cplusplus */
/*! \endcond */
#endif /* ADI_DATA_TRANSFER_H */
/*@}*/

98
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/general/adi_drivers_general.h Executable file
View File

@ -0,0 +1,98 @@
/*!
*****************************************************************************
* @file: adi_drivers_general.h
* @brief: Macros and types used in multiple drivers
*-----------------------------------------------------------------------------
*
Copyright (c) 2010-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
#ifndef ADI_DRIVERS_GENERAL__H
#define ADI_DRIVERS_GENERAL__H
/* Macros related to alignment in the different toolchains supported */
/*
* These macros are designed to be used as follows:
* ADI_ALIGNED_PRAGMA(<required_alignment>)
* <variable_declaration> ADI_ALIGNED_ATTRIBUTE(<required_alignment>)
*/
#if defined ( __ICCARM__ )
/*
* IAR MISRA C 2004 error suppressions.
*
*
* Pm120 (rule 19.10): In the definition of a function-like macro each parameter
* shall be enclosed in parenthesis.
* This is not possible in attributes and pragmas
* Pm154 (rule 19.13): The # and ## preprocessor operators shall not be used.
* We need to do this to abstract the macros for the
* different toolchains
*/
#pragma diag_suppress=Pm120,Pm154
#endif
#define PRAGMA(x) _Pragma(#x)
#define ATTRIBUTE(x) __attribute__((x))
#if defined (__GNUC__)
/* Gcc uses attributes */
#define ADI_ALIGNED_PRAGMA(num)
#define ADI_ALIGNED_ATTRIBUTE(num) ATTRIBUTE(aligned(num))
#define ADI_UNUSED_ATTRIBUTE ATTRIBUTE(unused)
#elif defined ( __ICCARM__ )
/* IAR uses a pragma */
#define ADI_ALIGNED_ATTRIBUTE(num)
#define ADI_ALIGNED_PRAGMA(num) PRAGMA(data_alignment=num)
#define ADI_UNUSED_ATTRIBUTE
#elif defined (__CC_ARM)
/* Keil uses a decorator which is placed in the same position as pragmas */
#define ADI_ALIGNED_ATTRIBUTE(num)
#define ADI_ALIGNED_PRAGMA(num) __align(##num)
#define ADI_UNUSED_ATTRIBUTE ATTRIBUTE(unused)
#else
#error "Toolchain not supported"
#endif
#if defined ( __ICCARM__ )
#pragma diag_default=Pm120,Pm154
#endif
#endif /* ADI_DRIVERS_GENERAL__H */

174
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/gpio/adi_gpio.h Executable file
View File

@ -0,0 +1,174 @@
/*
*****************************************************************************
@file: adi_gpio.h
@brief: GPIO definitions and API
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_GPIO_H
#define ADI_GPIO_H
#include <adi_processor.h>
#include <adi_callback.h>
#ifdef __ICCARM__
/* IAR MISRA C 2004 error suppressions.
*
* Pm008 (rule 2.4): sections of code should not be 'commented out'.
* Allow code example in doxygen comment.
* Pm011 (rule 6.3): The basic types of char, int, long, float cannot be used.
* bool is used in the APIs as it is not affending the rule. Disabling this as IAR treats it as an error.
*/
#pragma diag_suppress=Pm008,Pm011
#endif /* __ICCARM__ */
/*! \addtogroup GPIO_Driver GPIO Driver
* @{
*/
#ifdef __ICCARM__
#pragma diag_default=Pm008
#endif /* __ICCARM__ */
/* C++ linkage */
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*! Amount of memory(in bytes) required by the GPIO device driver for its operation.
* This memory is completely owned by the driver till the end of the operation.
*/
#define ADI_GPIO_MEMORY_SIZE (16u)
/* typedefs for 16-bit Ports */
typedef uint16_t ADI_GPIO_DATA; /*!< pin data reg type */
/*! GPIO API function return codes */
typedef enum
{
ADI_GPIO_SUCCESS = 0, /*!< No error detected. */
ADI_GPIO_FAILURE, /*!< The API call failed. */
ADI_GPIO_ALREADY_INITIALIZED, /*!< GPIO device has already been initialized. */
ADI_GPIO_NOT_INITIALIZED, /*!< GPIO device has not yet been initialized. */
ADI_GPIO_NULL_PARAMETER, /*!< The given pointer is pointing to NULL. */
ADI_GPIO_INVALID_MEMORY_SIZE, /*!< The given memory is not sufficient to operate the driver. */
ADI_GPIO_INVALID_PINS, /*!< Invalid pin combination. */
ADI_GPIO_INVALID_INTERRUPT, /*!< Invalid interrupt number. */
ADI_GPIO_INVALID_TRIGGER, /*!< Invalid trigger condition. */
} ADI_GPIO_RESULT;
/*! GPIO trigger condition enumerations */
typedef enum {
ADI_GPIO_IRQ_RISING_EDGE =(0x0), /*!< Trigger an interrupt on a rising edge. */
ADI_GPIO_IRQ_FALLING_EDGE =(0x1), /*!< Trigger an interrupt on a falling edge. */
ADI_GPIO_IRQ_EITHER_EDGE =(0x2), /*!< Trigger an interrupt on either edge. */
ADI_GPIO_IRQ_HIGH_LEVEL =(0x3), /*!< Trigger an interrupt on a high level. */
ADI_GPIO_IRQ_LOW_LEVEL =(0x4) /*!< Trigger an interrupt on a low level. */
} ADI_GPIO_IRQ_TRIGGER_CONDITION;
/*! GPIO IRQ enumeration */
typedef enum {
ADI_GPIO_INTA_IRQ = SYS_GPIO_INTA_IRQn, /*!< GPIO Group Interrupt A. */
ADI_GPIO_INTB_IRQ = SYS_GPIO_INTB_IRQn, /*!< GPIO Group Interrupt B. */
} ADI_GPIO_IRQ;
/*! GPIO port enumerations */
typedef enum {
ADI_GPIO_PORT0, /*!< Port 0 */
ADI_GPIO_PORT1, /*!< Port 1 */
ADI_GPIO_PORT2, /*!< Port 2 */
ADI_GPIO_PORT3, /*!< Port 3 */
ADI_GPIO_NUM_PORTS /*!< maximum number of ports */
} ADI_GPIO_PORT;
/* 16-bit port pin defs */
#define ADI_GPIO_PIN_0 ((ADI_GPIO_DATA)(0x0001)) /*!< Pin 0 */
#define ADI_GPIO_PIN_1 ((ADI_GPIO_DATA)(0x0002)) /*!< Pin 1 */
#define ADI_GPIO_PIN_2 ((ADI_GPIO_DATA)(0x0004)) /*!< Pin 2 */
#define ADI_GPIO_PIN_3 ((ADI_GPIO_DATA)(0x0008)) /*!< Pin 3 */
#define ADI_GPIO_PIN_4 ((ADI_GPIO_DATA)(0x0010)) /*!< Pin 4 */
#define ADI_GPIO_PIN_5 ((ADI_GPIO_DATA)(0x0020)) /*!< Pin 5 */
#define ADI_GPIO_PIN_6 ((ADI_GPIO_DATA)(0x0040)) /*!< Pin 6 */
#define ADI_GPIO_PIN_7 ((ADI_GPIO_DATA)(0x0080)) /*!< Pin 7 */
#define ADI_GPIO_PIN_8 ((ADI_GPIO_DATA)(0x0100)) /*!< Pin 8 */
#define ADI_GPIO_PIN_9 ((ADI_GPIO_DATA)(0x0200)) /*!< Pin 9 */
#define ADI_GPIO_PIN_10 ((ADI_GPIO_DATA)(0x0400)) /*!< Pin 10 */
#define ADI_GPIO_PIN_11 ((ADI_GPIO_DATA)(0x0800)) /*!< Pin 11 */
#define ADI_GPIO_PIN_12 ((ADI_GPIO_DATA)(0x1000)) /*!< Pin 12 */
#define ADI_GPIO_PIN_13 ((ADI_GPIO_DATA)(0x2000)) /*!< Pin 13 */
#define ADI_GPIO_PIN_14 ((ADI_GPIO_DATA)(0x4000)) /*!< Pin 14 */
#define ADI_GPIO_PIN_15 ((ADI_GPIO_DATA)(0x8000)) /*!< Pin 15 */
/* GPIO port pins availability mask */
#define ADI_GPIO_PORT0_PIN_AVL (0xFFFFu) /*!< Port 0 pin mask (16 pins)*/
#define ADI_GPIO_PORT1_PIN_AVL (0xFFFFu) /*!< Port 1 pin mask (16 pins)*/
#define ADI_GPIO_PORT2_PIN_AVL (0xFFFFu) /*!< Port 2 pin mask (16 pins)*/
#define ADI_GPIO_PORT3_PIN_AVL (0x000Fu) /*!< Port 2 pin mask (4 pins) */
/* GPIO API functions */
ADI_GPIO_RESULT adi_gpio_Init (void* const pMemory, uint32_t const MemorySize);
ADI_GPIO_RESULT adi_gpio_UnInit (void);
ADI_GPIO_RESULT adi_gpio_RegisterCallback (const ADI_GPIO_IRQ eIrq, ADI_CALLBACK const pfCallback, void *const pCBParam );
ADI_GPIO_RESULT adi_gpio_SetGroupInterruptPins (const ADI_GPIO_PORT Port, const ADI_GPIO_IRQ eIrq, const ADI_GPIO_DATA Pins);
ADI_GPIO_RESULT adi_gpio_SetGroupInterruptPolarity (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins);
ADI_GPIO_RESULT adi_gpio_OutputEnable (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins, const bool bFlag);
ADI_GPIO_RESULT adi_gpio_InputEnable (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins, const bool bFlag);
ADI_GPIO_RESULT adi_gpio_PullUpEnable (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins, const bool bFlag);
ADI_GPIO_RESULT adi_gpio_SetHigh (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins);
ADI_GPIO_RESULT adi_gpio_SetLow (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins);
ADI_GPIO_RESULT adi_gpio_Toggle (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins);
ADI_GPIO_RESULT adi_gpio_SetData (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins);
ADI_GPIO_RESULT adi_gpio_GetData (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins, uint16_t* const pValue);
#if defined (__ICCARM__)
#pragma diag_default=Pm011
#endif
#ifdef __cplusplus
}
#endif
/**@}*/
#endif /* ADI_GPIO_V1_H */

243
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/i2c/adi_i2c.h Executable file
View File

@ -0,0 +1,243 @@
/*!
*****************************************************************************
@file: adi_i2c.h
@brief: I2C device driver definitions
@details This is the primary header file for the I2C driver, which contains the
API declarations, data and constant definitions used in the APIs.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_I2C_H
#define ADI_I2C_H
/*! \cond PRIVATE */
#include <adi_processor.h>
#include <rtos_map/adi_rtos_map.h> /* for ADI_SEM_SIZE */
/*! \endcond */
/** @addtogroup I2C_Driver I2C Driver
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif
#if defined (__ICCARM__)
/*
* IAR MISRA C 2004 error suppressions.
*
* Pm011 (rule 6.3): Types which specify sign and size should be used
* We use bool which is accepted by MISRA but the toolchain does not accept it
*
*/
#pragma diag_suppress=Pm011
#endif
/*!
*****************************************************************************
* \enum ADI_I2C_RESULT
*
* I2C Device Error Codes. #ADI_I2C_SUCCESS is always zero
* The return value of all I2C APIs returning #ADI_I2C_RESULT
* should always be tested at the application level for success or failure.
* Specific I2C bus error conditions are returned as elements of
* #ADI_I2C_RESULT.
*
*****************************************************************************/
typedef enum
{
ADI_I2C_SUCCESS = 0, /*!< The API call succeeded. */
ADI_I2C_BAD_BITRATE, /*!< The bit rate is invalid. */
ADI_I2C_BAD_DEVICE_HANDLE, /*!< The device handle is invalid. */
ADI_I2C_BAD_DEVICE_NUMBER, /*!< The device number is invalid. */
ADI_I2C_BAD_SYS_CLOCK, /*!< Unable to obtain system clock rate. */
ADI_I2C_DEVICE_IN_USE, /*!< The device is in use. */
ADI_I2C_DEVICE_NOT_OPEN, /*!< The device is not open. */
ADI_I2C_FAILURE, /*!< Generic API failure code. */
ADI_I2C_HW_ERROR_DETECTED, /*!< An I2C hardware error occurred. See #ADI_I2C_HW_ERRORS. */
ADI_I2C_INSUFFICIENT_MEMORY, /*!< The application supplied memory size is insufficient. */
ADI_I2C_INVALID_PARAMETER, /*!< An invalid parameter is passed to the function. */
ADI_I2C_INVALID_SLAVE_ADDRESS, /*!< The application supplied slave address is too wide. */
ADI_I2C_INVALID_SUBMIT_API, /*!< Unmatched read/write vs. submit/get API call. */
ADI_I2C_SEMAPHORE_FAILED /*!< Semaphore operation failed. */
} ADI_I2C_RESULT;
/*!
*****************************************************************************
* \enum ADI_I2C_HW_ERRORS
*
* I2C Device Hardware Error Codes. Contains one or more hardware (I2C protocol)
* errors. Use this enum to decode hardware errors when the main #ADI_I2C_RESULT
* return result value is #ADI_I2C_HW_ERROR_DETECTED.
*
*****************************************************************************/
typedef enum
{
ADI_I2C_HW_ERROR_NONE = 0, /*!< No hardware error. */
ADI_I2C_HW_ERROR_NACK_ADDR = 0x0001, /*!< A no-acknowledgement occurred for the address. */
ADI_I2C_HW_ERROR_NACK_DATA = 0x0002, /*!< A no-acknowledgement occurred for the data. */
ADI_I2C_HW_ERROR_ARBITRATION_LOST = 0x0004, /*!< I2C bus arbitration was Lost. */
ADI_I2C_HW_ERROR_UNEXPECTED_ERROR = 0x0008, /*!< An unexpected error occurred. */
} ADI_I2C_HW_ERRORS;
/*! A device handle used in all API functions to identify the I2C device. */
typedef struct __ADI_I2C_DEV_DATA_TYPE* ADI_I2C_HANDLE;
/*! Use macro "ADI_I2C_MEMORY_SIZE" to know how much memory to
provide the i2c driver during the "adi_i2c_Open()" driver
initialization call. This memory is used to store internal
driver state data. Use map file to verify.
*/
#define ADI_I2C_MEMORY_SIZE (44u + ADI_SEM_SIZE)
/*!
* \struct ADI_I2C_TRANSACTION
*****************************************************************************
* I2C Device Command/Data Transaction Structure. This is the called-provided
* data structure used by the blocking #adi_i2c_ReadWrite() and non-blocking
* #adi_i2c_SubmitBuffer() calls to describe the caller's transaction parameters,
* consisting of prologue data and size (the addressing phase), transmit/receive
* data pointer and size (the data phase), and various transaction control parameters.
*
* Each transaction may optionally be prefaced with a prologue block, which may
* describe a read/write memory/register address, a slave-specific command, or
* some other slave-specific protocol that may precede the actual read/write
* data. Set the prologue size to zero if no prologue is desired.
*
* Each call to #adi_i2c_ReadWrite or #adi_i2c_SubmitBuffer() must populate the
* following fields of the ADI_I2C_TRANSACTION block:
*
* @par pPrologue
* Byte pointer to an application-supplied prologue byte array. If the value is
* zero, prologue data is ignored.
*
* @par nPrologueSize
* The number of prologue bytes to be transmitted ahead of the data phase. If the
* value is zero, prologue data is ignored.
*
* @par pData
* Byte pointer to the application-supplied data byte array. This buffer is
* either the source or destination address of the data being transmitted or
* received, respectively.
*
* @par nDataSize
* The number of data bytes to be transmitted or received during the data phase.
* If the value is zero, the data phase is ignored.
*
* @par bReadNotWrite
* Direction control for data phase. If "true", data phase is a read (from
* the slave), if "false", data phase is a write (to the slave). Pertains only
* to the data phase. Any prologue data (addressing/command phase) is always
* transmitted (written to the slave) prior to the data phase.
*
* @par bRepeatStart
* Controls suppression of a Stop Condition between the addressing phase and the
* data phase of an I2C transaction. After the prologue (if present), a
* unidirectional data stream (I2C is a half-duplex protocol) is either
* transmitted or received (depending on the transfer direction). Frequently, a
* Repeat-Start Condition (in reality, just the absence of a Stop Condition
* following the prologue/addressing phase) is required between the addressing
* phase (prologue) and the data phase of a transaction to meet slave device
* protocol requirements. The Repeat-Start requirement can be driven by the
* slave device communications protocol, or simply to just prevent any other
* I2C master from rearbitrating the bus between the prologue (addressing) and
* data phases of a so-called "COMBINED FORMAT" (write-followed-by-read).
* When bRepeatStart is set "true", the usual Stop Condition between the addressing
* phase and the data phase is suppressed and the I2C bus controller issues a
* second Start Condition (Repeat-Start) for the data phase. Without
* Repeat-Start (bRepeatStart "false"), the addressing phase ends with a normal
* Stop Condition ahead of the data phase. Repeat-Start conditions are used
* when "turning the bus around" as in writing a read address (for example),
* immediately followed by a data stream from that read address... without
* releasing bus arbitration.
*
*****************************************************************************/
typedef struct {
uint8_t *pPrologue; /*!< Prologue pointer. */
uint16_t nPrologueSize; /*!< Prologue byte count. */
uint8_t *pData; /*!< Data pointer. */
uint16_t nDataSize; /*!< Data byte count. */
bool bReadNotWrite; /*!< Read/write flag. */
bool bRepeatStart; /*!< Repeat start flag. */
} ADI_I2C_TRANSACTION;
/*! Maximum supported bitrate is "FAST" mode (400 kHz). */
#define ADI_I2C_MAX_RATE (400000u)
/***************************************************************
* Eliminable user API that may be optimized out by the linker *
***************************************************************/
ADI_I2C_RESULT adi_i2c_Open (uint32_t const DeviceNum, void* const pMemory, uint32_t const MemorySize, ADI_I2C_HANDLE* const phDevice);
ADI_I2C_RESULT adi_i2c_Close (ADI_I2C_HANDLE const hDevice);
/* blocking calls... */
ADI_I2C_RESULT adi_i2c_ReadWrite (ADI_I2C_HANDLE const hDevice, ADI_I2C_TRANSACTION* const pTransaction, uint32_t* const pHwErrors);
/* non-blocking calls... */
ADI_I2C_RESULT adi_i2c_SubmitBuffer (ADI_I2C_HANDLE const hDevice, ADI_I2C_TRANSACTION* const pTransaction);
ADI_I2C_RESULT adi_i2c_IsBufferAvailable (ADI_I2C_HANDLE const hDevice, bool* const pbCompletionState);
ADI_I2C_RESULT adi_i2c_GetBuffer (ADI_I2C_HANDLE const hDevice, uint32_t* const pHwErrors);
/* other (blocking) calls... */
ADI_I2C_RESULT adi_i2c_Reset (ADI_I2C_HANDLE const hDevice);
ADI_I2C_RESULT adi_i2c_SetBitRate (ADI_I2C_HANDLE const hDevice, uint32_t const requestedBitRate32);
ADI_I2C_RESULT adi_i2c_SetSlaveAddress (ADI_I2C_HANDLE const hDevice, uint16_t const SlaveAddress);
ADI_I2C_RESULT adi_i2c_IssueGeneralCall (ADI_I2C_HANDLE const hDevice, uint8_t* const pData, uint8_t const nDataSize, uint32_t* const pHwErrors);
#if defined (__ICCARM__)
#pragma diag_default=Pm011
#endif
#ifdef __cplusplus
}
#endif
/**@}*/
#endif /* ADI_I2C_H */

689
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/pwr/adi_pwr.h Executable file
View File

@ -0,0 +1,689 @@
/*
*****************************************************************************
* @file: adi_pwr.h
* @brief: System clock and power management driver.
*-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
/*! \addtogroup Power_Driver Power Driver
* @{
*/
#ifndef ADI_PWR_H
#define ADI_PWR_H
#include <adi_callback.h>
#include <adi_processor.h>
#ifdef __ICCARM__
/* IAR MISRA C 2004 error suppressions.
*
* Pm009 (rule 5.1): identifiers shall not rely on significance of more than 31 characters.
* IAR compiler supports longer identifiers.
* Pm011 (rule 6.3): The basic types of char, int, long, float cannot be used.
* bool is used in the APIs as it is not affending the rule. Disabling this as IAR treats it as an error.
*/
#pragma diag_suppress=Pm009,Pm011
#endif /* __ICCARM__ */
#ifdef __cplusplus
extern "C" {
#endif
/*! Enumeration of clock sources for various peripherals. */
typedef enum {
/*! Source for all peripherals SPI, SPORT, SIP, CRC, AES, SIP interface, I2C, UART, optionally for timers. */
ADI_CLOCK_PCLK,
/*! Source for Core,Bus etc. */
ADI_CLOCK_HCLK,
/*! Source for the ADC. */
ADI_CLOCK_ACLK
} ADI_CLOCK_ID;
/*! Enumeration of input clock sources */
typedef enum {
/*! Clock ID for 16 MHz or 26 MHz external crystal oscillator called HFXTAL. */
ADI_CLOCK_SOURCE_HFXTAL,
/*! Clock ID 32 kHz external crystal oscillator called LFXTAL. */
ADI_CLOCK_SOURCE_LFXTAL,
/*! Clock ID for 26 MHz internal oscillator called HFOSC. */
ADI_CLOCK_SOURCE_HFOSC,
/*! Clock ID 32 kHz a 32 kHz internal oscillator called LFXTAL. */
ADI_CLOCK_SOURCE_LFOSC,
/*! Clock ID for output clock for System PLL. */
ADI_CLOCK_SOURCE_SPLL,
/*! Clock ID for external clock from GPIO. */
ADI_CLOCK_SOURCE_GPIO
} ADI_CLOCK_SOURCE_ID;
/*!
* Enumeration of clock sources for each clock multiplexer.
* The processor has the following clock multiplexers.
* - SPLL Mux (System PLL).
* - Reference clock Mux.
* - Root Clock Mux.
*/
typedef enum {
/*! Input clock for system PLL mux is HFOSC. */
ADI_CLOCK_MUX_SPLL_HFOSC,
/*! Input clock for system PLL mux is HFXTAL. */
ADI_CLOCK_MUX_SPLL_HFXTAL,
/*! Input clock for system PLL mux is provided through GPIO. */
ADI_CLOCK_MUX_SPLL_GPIO,
/*! Input clock for low frequency clock mux is LFOSC. */
ADI_CLOCK_MUX_LFCLK_LFOSC,
/*! Input clock for low frequency clock mux is LFXTAL. */
ADI_CLOCK_MUX_LFCLK_LFXTAL,
/*! Input clock to the multiplexer which provides reference clock for Flash
and HPBUCK clock is HFOSC. */
ADI_CLOCK_MUX_REF_HFOSC_CLK,
/*! Reserved. */
ADI_CLOCK_MUX_REF_RESERVED,
/*! Input clock to the multiplexer which provides reference clock for Flash
and HPBUCK clock is 26 MHz HFXTAL. */
ADI_CLOCK_MUX_REF_HFXTAL_26MHZ_CLK,
/*! Input clock to the multiplexer which provides reference clock for Flash
and HPBUCK clock is 16 MHz HFXTAL. */
ADI_CLOCK_MUX_REF_HFXTAL_16MHZ_CLK,
/*! Input clock to root multiplexer is HFOSC. */
ADI_CLOCK_MUX_ROOT_HFOSC,
/*! Input clock to root multiplexer is HFXTAL. */
ADI_CLOCK_MUX_ROOT_HFXTAL,
/*! Input clock to root multiplexer is SPLL. */
ADI_CLOCK_MUX_ROOT_SPLL,
/*! Input clock to root multiplexer is from GPIO. */
ADI_CLOCK_MUX_ROOT_GPIO
} ADI_CLOCK_MUX_ID;
/*!
* Enumeration of clock source status.
*/
typedef enum {
/*! Specified clock source is disabled. */
ADI_CLOCK_SOURCE_DISABLED = 0,
/*! Specified clock source is not stable. */
ADI_CLOCK_SOURCE_ENABLED_NOT_STABLE,
/*! Specified clock source is enabled and stable. */
ADI_CLOCK_SOURCE_ENABLED_STABLE,
/*! Invalid clock ID. */
ADI_CLOCK_SOURCE_ID_NOT_VALID
} ADI_CLOCK_SOURCE_STATUS;
/*! Clock output options through GPIO pin.
The GPIO clock output pin can be driven through one of these clocks.
*/
typedef enum
{
/*! Root Clock (ROOT_CLK). */
ADI_CLOCK_OUTPUT_ROOT_CLK,
/*! Low Frequency Clock (LF_CLK). */
ADI_CLOCK_OUTPUT_LF_CLK,
/*! ADC Clock (ACLK). */
ADI_CLOCK_OUTPUT_ACLK,
/*! HCLK_BUS. */
ADI_CLOCK_OUTPUT_HCLK_BUS,
/*! HCLK_CORE. */
ADI_CLOCK_OUTPUT_HCLK_CORE,
/*! Peripheral Clock (PCLK). */
ADI_CLOCK_OUTPUT_PCLK,
/*! Reference Clock for Flash controller timer (RCLK). */
ADI_CLOCK_OUTPUT_RCLK,
/*! Mux of HFOSC, HFXTAL clock (RHP_CLK). */
ADI_CLOCK_OUTPUT_RHP_CLK,
/*! GP Timer 0 clock (GPT0_CLK). */
ADI_CLOCK_OUTPUT_GPT0_CLK,
/*! GP Timer 1 clock (GPT1_CLK). */
ADI_CLOCK_OUTPUT_GPT1_CLK,
/*! Peripherals operating at HCLK (HCLK_P). */
ADI_CLOCK_OUTPUT_HCLK_PERIPHERAL,
/*! PLL Clock out. */
ADI_CLOCK_OUTPUT_PLL_OUTPUT,
/*! RTC0 Clock. */
ADI_CLOCK_OUTPUT_RTC0_CLK,
/*! HP Buck Clock (HPBUCK_CLK). */
ADI_CLOCK_OUTPUT_HPBUCK_CLK,
/*! HP Buck Non overlap clock. */
ADI_CLOCK_OUTPUT_HPBUCK_NO_OVERLAP_CLK,
/*! RTC1 generated clock. */
ADI_CLOCK_OUTPUT_RTC1_CLK
}ADI_CLOCK_OUTPUT_ID;
/*! Enumeration of clock gates using which the clocks can be gated. */
typedef enum {
/*! Clock Gate for the GP Timer-0. */
ADI_CLOCK_GATE_GPT0_CLK = 1 << BITP_CLKG_CLK_CTL5_GPTCLK0OFF,
/*! Clock Gate for the GP Timer-1. */
ADI_CLOCK_GATE_GPT1_CLK = 1 << BITP_CLKG_CLK_CTL5_GPTCLK1OFF,
/*! Clock Gate for the GP Timer-2. */
ADI_CLOCK_GATE_GPT2_CLK = 1 << BITP_CLKG_CLK_CTL5_GPTCLK2OFF,
/*! Clock Gate for the I2C. */
ADI_CLOCK_GATE_I2C_CLK = 1 << BITP_CLKG_CLK_CTL5_UCLKI2COFF,
/*! Clock Gate for the GPIO. */
ADI_CLOCK_GATE_GPIO_CLK = 1 << BITP_CLKG_CLK_CTL5_GPIOCLKOFF,
/*! Clock Gate for the PCLK. */
ADI_CLOCK_GATE_PCLK = 1 << BITP_CLKG_CLK_CTL5_PERCLKOFF,
/*! Clock Gate for the RGB Timer. */
ADI_CLOCK_GATE_TMR_RGB_CLK = 1 << BITP_CLKG_CLK_CTL5_TMRRGBCLKOFF
} ADI_CLOCK_GATE;
/*!
* Enumeration of HF oscillator clock divide factor.
*/
typedef enum
{
/*! Divide by 1. */
ADI_PWR_HFOSC_DIV_BY_1,
/*! Divide by 2. */
ADI_PWR_HFOSC_DIV_BY_2,
/*! Divide by 4. */
ADI_PWR_HFOSC_DIV_BY_4,
/*! Divide by 8. */
ADI_PWR_HFOSC_DIV_BY_8,
/*! Divide by 16. */
ADI_PWR_HFOSC_DIV_BY_16,
/*! Divide by 32. */
ADI_PWR_HFOSC_DIV_BY_32
} ADI_PWR_HFOSC_DIV;
/*!
*****************************************************************************
* Power driver API return codes
*****************************************************************************/
typedef enum
{
/*! No error detected. */
ADI_PWR_SUCCESS = 0,
/*! Generic unknown error occurred. */
ADI_PWR_FAILURE,
/*! If the given pointer is pointing to NULL. */
ADI_PWR_NULL_POINTER,
/*! Requested divide value is out of range. */
ADI_PWR_INVALID_CLOCK_DIVIDER,
/*! Invalid ADI_CLOCK_ID specified. */
ADI_PWR_INVALID_CLOCK_ID,
/*! PDIV:HDIV ratio must be integral. */
ADI_PWR_INVALID_CLOCK_RATIO,
/*! Invalid low-power mode requested. */
ADI_PWR_INVALID_POWER_MODE,
/*! Invalid clock speed. */
ADI_PWR_INVALID_CLOCK_SPEED,
/*! Specified operation is not allowed. */
ADI_PWR_OPERATION_NOT_ALLOWED,
/*! Parameter is out of range. */
ADI_PWR_INVALID_PARAM,
/*! System not initialized, call the API SystemInit. */
ADI_PWR_SYSTEM_NOT_INITIALIZED
} ADI_PWR_RESULT;
/*!
* Enumeration of the power modes supported by the processor.
*/
typedef enum
{
/*! Core Sleep power-down mode. */
ADI_PWR_MODE_FLEXI = 0 << BITP_PMG_PWRMOD_MODE,
/*! Fully Active. (piggy-back on bitmode value "1", normally reserved) */
ADI_PWR_MODE_ACTIVE = 1 << BITP_PMG_PWRMOD_MODE,
/*! Full Hibernate power-down mode. */
ADI_PWR_MODE_HIBERNATE = 2 << BITP_PMG_PWRMOD_MODE,
/*! System Sleep power-down mode. */
ADI_PWR_MODE_SHUTDOWN = 3 << BITP_PMG_PWRMOD_MODE
} ADI_PWR_POWER_MODE;
/*!
* Enumeration of power management interrupts.
*/
typedef enum
{
/*! Interrupt when battery voltage drops below 1.8V.*/
ADI_PWR_LOW_BATTERY_VOLTAGE_IEN = 1 << BITP_PMG_IEN_VBAT,
/*! Interrupt when VREG under-voltage: below 1V. */
ADI_PWR_UNDER_VOLATAGE_IEN = 1 << BITP_PMG_IEN_VREGUNDR,
/*! Interrupt when VREG over-voltage: over- 1.32V. */
ADI_PWR_OVER_VOLATAGE_IEN = 1 << BITP_PMG_IEN_VREGOVR,
/*! Interrupt when battery voltage falls to the specified range.Please see #adi_pwr_SetVoltageRange.*/
ADI_PWR_BATTERY_VOLTAGE_RANGE_IEN = 1 << BITP_PMG_IEN_IENBAT
} ADI_PWR_PMG_IRQ;
/*!
* Enumeration of system clock module interrupts.
*/
typedef enum
{
/*! Interrupt for root clock monitor and Clock Fail. */
ADI_PWR_ROOT_CLOCK_MON_IEN = 1 << BITP_CLKG_OSC_CTL_ROOT_MON_EN,
/*! Interrupt for LFXTAL clock monitor and Clock Fail. */
ADI_PWR_LFXTAL_CLOCK_MON_IEN = 1 << BITP_CLKG_OSC_CTL_LFX_MON_EN,
/*! Interrupt when LFXTAL clock becomes stable/unstable. */
ADI_PWR_LFXTAL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL0_LFXTALIE,
/*! Interrupt when HFXTAL clock becomes stable/unstable. */
ADI_PWR_HFXTAL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL0_HFXTALIE,
/*! Interrupt when PLL-LOCK/PLL-UNLOCK. */
ADI_PWR_PLL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL3_SPLLIE
} ADI_PWR_CLOCK_IRQ;
/**
* Enumeration of the power driver events notified through the callback.
*/
typedef enum
{
/*! Event for indicating Over voltage VREG > 1.32v. */
ADI_PWR_EVENT_VREG_OVER_VOLTAGE,
/*! Event for indicating under voltage VREG < 1V. */
ADI_PWR_EVENT_VREG_UNDER_VOLTAGE,
/*! Event for indicating battery voltage below 1.8V. */
ADI_PWR_EVENT_BATTERY_VOLTAGE_LOW,
/*! Event for indicating battery voltage in specified range-1.VBAT range1 (> 2.75v). */
ADI_PWR_EVENT_BATTERY_VOLTAGE_RANGE_1,
/*! Event for indicating battery voltage in specified range-2.VBAT range2 (2.75v - 2.3v). */
ADI_PWR_EVENT_BATTERY_VOLTAGE_RANGE_2,
/*! Event for indicating battery voltage in specified range-3.VBAT range3 (2.3v - 1.6v). */
ADI_PWR_EVENT_BATTERY_VOLTAGE_RANGE_3,
/*! Event to indicate that LFXTAL failed and hardware automatically switched to LFOSC. */
ADI_PWR_EVENT_OSC_LFXTAL_AUTO_SWITCH,
/*! Event to indicate the LFXTAL clock is not stable. */
ADI_PWR_EVENT_OSC_LFXTAL_MON_FAIL,
/*! Event to indicate the Root clock is not stable. */
ADI_PWR_EVENT_OSC_ROOT_CLOCK_MON_FAIL,
/*! Event to indicate the Root clock failed and hardware automatically switched to HFOSC. */
ADI_PWR_EVENT_OSC_ROOT_CLOCK_FAIL_AUTO_SWITCH,
/*! Event to indicate HF crystal stable. */
ADI_PWR_EVENT_OSC_HFXTAL_CLOCK_OK,
/*! Event to indicate HF crystal is not stable. */
ADI_PWR_EVENT_OSC_HFXTAL_CLOCK_NO_OK,
/*! Event to indicate LF crystal is stable. */
ADI_PWR_EVENT_OSC_LFXTAL_CLOCK_OK,
/*! Event to indicate LF crystal is not stable. */
ADI_PWR_EVENT_OSC_LFXTAL_CLOCK_NO_OK,
/*! Event for indicating PLL is locked. */
ADI_PWR_EVENT_PLLC_LOCK,
/*! Event for indicating PLL is unlocked. */
ADI_PWR_EVENT_PLLC_UNLOCK
} ADI_PWR_EVENT;
/*!
* Enumeration of processor wake up status.
*/
typedef enum
{
/*! Interrupt from External Interrupt 0. */
ADI_PWR_INT_EXT0,
/*! Interrupt from External Interrupt 1. */
ADI_PWR_INT_EXT1,
/*! Interrupt from External Interrupt 2. */
ADI_PWR_INT_EXT2,
/*! Interrupt from RTC. */
ADI_PWR_INT_RTC
} ADI_PWR_WAKEUP_STATUS;
/*!
* Enumeration of the battery voltage ranges for voltage monitoring interrupt generation.
*/
typedef enum
{
/*! Voltage range is in safe region. */
ADI_PWR_BAT_VOLTAGE_RANGE_SAFE,
/*! Battery voltage is in the range of 2.2 to 2.75 V. */
ADI_PWR_VOLTAGE_RANGE_2_2_TO_2_75,
/*! Battery voltage is in the range of 1.6 to 2.2 V. */
ADI_PWR_VOLTAGE_RANGE_1_6_TO_2_2
} ADI_PWR_VOLTAGE_RANGE;
/*!
* Enumeration of LFXTAL Robust Mode Load select. The amount of loading tolerated when
* LFXTAL robust mode is selected, that is when LFXTAL robust mode is enabled.
*/
typedef enum
{
/*! No Trim, and big resistive loads not tolerated. */
ADI_PWR_LFXTAL_LOAD_NONE,
/*! 20 MOHM Load mode, greater than 20 MOHM load allowed. */
ADI_PWR_LFXTAL_LOAD_20MOHM,
/*! 10 MOHM Load mode, greater than 10 MOHM load allowed. */
ADI_PWR_LFXTAL_LOAD_10MOHM,
/*! 5 MOHM load resistance allowed on both IO pins, the user can scale the current
down if the load is expected to be smaller than 5 MOHM. */
ADI_PWR_LFXTAL_LOAD_5MOHM
}ADI_PWR_LFXTAL_LOAD;
/*!
* Enumeration of HP Buck load modes. The modes can be used to choose the loading capability
* of the HPBUCK. The low load mode and high load mode are based on the loading in the system.
*/
typedef enum
{
/*! HPBUCK Low load mode. This mode can be set if the maximum system clock(HCLK) frequency
is 26 MHz. */
ADI_PWR_HPBUCK_LD_MODE_LOW,
/*! HPBUCK High load mode. This mode can be set if the system clock(HCLK) frequency is greater
than 26 MHz. */
ADI_PWR_HPBUCK_LD_MODE_HIGH
}ADI_PWR_HPBUCK_LD_MODE;
/* Related clock APIs */
/*
* Initialize the dynamic power management service
*/
ADI_PWR_RESULT adi_pwr_Init(void);
/*
* =================================================================
* Clock Management related APIs
* =================================================================
*/
/*
* Update the internal clock variable based on current configuration
*/
ADI_PWR_RESULT adi_pwr_UpdateCoreClock(void);
/*
* Set the external clock frequency.
*/
ADI_PWR_RESULT adi_pwr_SetExtClkFreq(
const uint32_t ExtClkFreq
);
/*
* To Configure the root clock muxing
*/
ADI_PWR_RESULT adi_pwr_SetRootClockMux(
const ADI_CLOCK_MUX_ID eClockID
);
/*
* To Configure the root clock muxing
*/
ADI_PWR_RESULT adi_pwr_SetPLLClockMux(
const ADI_CLOCK_MUX_ID eClockID
);
/*
* To Configure the root clock muxing
*/
ADI_PWR_RESULT adi_pwr_SetLFClockMux(
const ADI_CLOCK_MUX_ID eClockID
);
/*
* To Enable/Disable the LFXTAL robust mode.
*/
ADI_PWR_RESULT adi_pwr_EnableLFXTALRobustMode(
const bool bEnable
);
/*
* To configure the LFXTAL robust mode load.
*/
ADI_PWR_RESULT adi_pwr_SetLFXTALRobustModeLoad(
const ADI_PWR_LFXTAL_LOAD eLoad
);
/*
* To Enable/Disable the LFXTAL Fail Auto switch.
*/
ADI_PWR_RESULT adi_pwr_EnableLFXTALFailAutoSwitch(
const bool bEnable
);
/*
* To enable/disable auto switching of root clock to HFOSC upon detection
* of Root clock failure.
*/
ADI_PWR_RESULT adi_pwr_EnableRootClockFailAutoSwitch(
const bool bEnable
);
/*
* To set the HF Oscillator divide factor
*/
ADI_PWR_RESULT adi_pwr_SetHFOscDivFactor(
const ADI_PWR_HFOSC_DIV eDivFactor
);
/*
* To set the HF oscillator automatic divide by 1 during wakeup from Flexi mode
*/
ADI_PWR_RESULT adi_pwr_EnableHFOscAutoDivBy1(
const bool bEnable
);
/*
* To Configure the reference clock muxing
*/
ADI_PWR_RESULT adi_pwr_SetRefClockMux(
const ADI_CLOCK_MUX_ID eClockID
);
/*
* Get external clock frequency.
*/
ADI_PWR_RESULT adi_pwr_GetExtClkFreq(
uint32_t *pExtClock
);
/*
* Get current clock frequency. This API can be used to know PCLK, HCLK.
*/
ADI_PWR_RESULT adi_pwr_GetClockFrequency(
const ADI_CLOCK_ID eClockId,
uint32_t *pClock
);
/*
* To enable/disable the specific clock.
*/
ADI_PWR_RESULT adi_pwr_EnableClock(
const ADI_CLOCK_GATE eClockGate,
const bool bEnable
);
/*
* To enable/disable the specific clock source.
*/
ADI_PWR_RESULT adi_pwr_EnableClockSource(
const ADI_CLOCK_SOURCE_ID eClockSource,
const bool bEnable
);
/*
* To set the specific clock divider.
*/
ADI_PWR_RESULT adi_pwr_SetClockDivider(
const ADI_CLOCK_ID eClockId,
const uint16_t nDiv
);
/*
* To Get the clock status.
*/
ADI_PWR_RESULT adi_pwr_GetClockStatus(
const ADI_CLOCK_SOURCE_ID eClockSource,
ADI_CLOCK_SOURCE_STATUS *peStatus
);
/*
* To configure the PLL to generate the SPLL
*/
ADI_PWR_RESULT adi_pwr_SetPll(
uint8_t nDivFactor,
const uint8_t nMulFactor,
const bool bDiv2,
const bool bMul2
);
/* To enable the interrupt for clock monitoring LFXTAL/HFXTAL/PLL.*/
ADI_PWR_RESULT adi_pwr_EnableClockInterrupt(
const ADI_PWR_CLOCK_IRQ eIrq,
const bool bEnable
);
/* Enabling the LFXTAL bypass mode */
ADI_PWR_RESULT adi_pwr_EnableLFXTALBypass(
const bool bEnable
);
/* Set the clock output through the GPIO */
ADI_PWR_RESULT adi_pwr_SetGPIOClockOutput(
const ADI_CLOCK_OUTPUT_ID eClockOutput
);
/*
* =================================================================
* Power Management related APIs
* =================================================================
*/
/* To enable the interrupt for voltage monitoring.*/
ADI_PWR_RESULT adi_pwr_EnablePMGInterrupt(
const ADI_PWR_PMG_IRQ eIrq,
const bool bEnable
);
/*
* To know which is interrupt caused the processor to wake up from SHUTDOWN mode.
*/
ADI_PWR_RESULT adi_pwr_GetWakeUpStatus(
ADI_PWR_WAKEUP_STATUS *peStatus
);
/*
* To select the voltage range of the battery for monitoring.
*/
ADI_PWR_RESULT adi_pwr_SetVoltageRange(
const ADI_PWR_VOLTAGE_RANGE eRange
);
/*
* For entering the low power mode.
*/
ADI_PWR_RESULT adi_pwr_EnterLowPowerMode(
const ADI_PWR_POWER_MODE PowerMode,
uint32_t volatile * pnInterruptOccurred,
const uint8_t PriorityMask
);
/*
* For exiting the low power mode.
*/
ADI_PWR_RESULT adi_pwr_ExitLowPowerMode(
uint32_t volatile * pnInterruptOccurred
);
/* To enable the HPBUCK */
ADI_PWR_RESULT adi_pwr_EnableHPBuck(
const bool bEnable
);
/* To enable the HPBUCK Low Power mode */
ADI_PWR_RESULT adi_pwr_EnableHPBuckLowPowerMode(
const bool bEnable
);
/* To enable the HPBUCK Load mode */
ADI_PWR_RESULT adi_pwr_SetHPBuckLoadMode(
const ADI_PWR_HPBUCK_LD_MODE eLoadMode
);
/*
* For registering the call back function .
*/
ADI_PWR_RESULT adi_pwr_RegisterCallback(
const ADI_CALLBACK pfCallback,
void *pcbParam
);
#ifdef __cplusplus
}
#endif
#endif /* ADI_PWR_H */
/*@}*/
/*
** EOF
*/

204
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/rng/adi_rng.h Executable file
View File

@ -0,0 +1,204 @@
/*!
*****************************************************************************
@file adi_rng.h
@brief Random Number Generator Driver
-----------------------------------------------------------------------------
Copyright (c) 2012-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
/*! \addtogroup RNG_Driver RNG Driver
* Random Number Generator Driver
* @{
*/
#ifndef ADI_RNG_H
#define ADI_RNG_H
#include <adi_processor.h>
#include <adi_callback.h>
#ifndef __ADUCM4x50__
#error "Unsupported processor"
#endif
#include <adi_rng_config.h>
#ifdef __ICCARM__
/* IAR MISRA C 2004 error suppressions.
*
* Pm011 (rule 6.3): The basic types of char, int, long, float cannot be used.
* bool is used in the APIs as it is not affending the rule. Disabling this as IAR treats it as an error.
*/
#pragma diag_suppress=Pm011
#endif /* __ICCARM__ */
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*!
* \enum ADI_RNG_RESULT
* Random Number Generator API return codes
*/
typedef enum
{
ADI_RNG_SUCCESS = 0, /*!< No Error, API suceeded */
ADI_RNG_UNKNOWN_ERROR, /*!< Unknown error detected */
ADI_RNG_ALREADY_INITIALIZED, /*!< RNG is already initialized */
ADI_RNG_INVALID_PARAM, /*!< Invalid function parameter */
ADI_RNG_BAD_DEV_HANDLE, /*!< Invalid device handle passed */
ADI_RNG_BAD_DEVICE_NUM, /*!< Invalid device instance */
ADI_RNG_NOT_INITIALIZED, /*!< RNG not yet initialized */
ADI_RNG_INVALID_STATE /*!< Device is in an invalid state */
} ADI_RNG_RESULT;
/*!
* \enum ADI_RNG_EVENT
* Random Number Generator callback events
*/
typedef enum
{
ADI_RNG_EVENT_READY, /*!< Random number ready event */
ADI_RNG_EVENT_STUCK /*!< The ring oscillator got stuck event */
} ADI_RNG_EVENT;
/*! The amount of application supplied memory required by the RNG driver */
#define ADI_RNG_MEMORY_SIZE (12u)
/*! RNG Device handle typedef */
typedef void* ADI_RNG_HANDLE;
/*================ E X T E R N A L S ==================*/
/*
* RNG API
*/
/* Open a random number generator device */
extern ADI_RNG_RESULT adi_rng_Open(
uint32_t const nDeviceNum,
void* const pMemory,
uint32_t const MemorySize,
ADI_RNG_HANDLE* const phDevice
);
/* Close the RNG Device */
extern ADI_RNG_RESULT adi_rng_Close(ADI_RNG_HANDLE hDevice);
/* Enable/Disable the device */
extern ADI_RNG_RESULT adi_rng_Enable (
ADI_RNG_HANDLE const hDevice,
bool const bFlag
);
/* Enable/Disable buffering */
extern ADI_RNG_RESULT adi_rng_EnableBuffering (
ADI_RNG_HANDLE const hDevice,
bool const bFlag
);
/* Set the sample length */
extern ADI_RNG_RESULT adi_rng_SetSampleLen (
ADI_RNG_HANDLE const hDevice,
uint16_t const nLenPrescaler,
uint16_t const nLenReload
);
/* Get whether the random number is ready */
extern ADI_RNG_RESULT adi_rng_GetRdyStatus (
ADI_RNG_HANDLE const hDevice,
bool* const pbFlag
);
/* Get whether the ring oscillator output is stuck or not */
extern ADI_RNG_RESULT adi_rng_GetStuckStatus (
ADI_RNG_HANDLE const hDevice,
bool* const pbFlag
);
/* Get the random number */
extern ADI_RNG_RESULT adi_rng_GetRngData (
ADI_RNG_HANDLE const hDevice,
uint32_t* const pRegData
);
/* Get the oscillator count */
extern ADI_RNG_RESULT adi_rng_GetOscCount (
ADI_RNG_HANDLE const hDevice,
uint32_t* const pOscCount
);
/* Get the oscillator count difference value */
extern ADI_RNG_RESULT adi_rng_GetOscDiff (
ADI_RNG_HANDLE const hDevice,
uint32_t const nIndex,
uint8_t* const pOscDiff
);
/* Register a callback */
extern ADI_RNG_RESULT adi_rng_RegisterCallback (
ADI_RNG_HANDLE hDevice,
ADI_CALLBACK cbFunc,
void *pCBParam
);
/* Retrieve the current RNG sample length prescale and reload value configured in the device. */
extern ADI_RNG_RESULT adi_rng_GetSampleLen (
ADI_RNG_HANDLE const hDevice,
uint16_t* const pLenPrescaler,
uint16_t* const pLenReload
);
#ifdef __cplusplus
}
#endif
#ifdef __ICCARM__
#pragma diag_default=Pm011
#endif /* __ICCARM__ */
#endif /* include guard */
/*
** EOF
*/
/*@}*/
/*@}*/

521
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/rtc/adi_rtc.h Executable file
View File

@ -0,0 +1,521 @@
/*!
*****************************************************************************
@file adi_rtc.h
@brief Primary include file for Real Time Clock Services.
@version $Revision: 29004 $
@date $Date: 2014-12-06 10:37:26 -0500 (Sat, 06 Dec 2014) $
-----------------------------------------------------------------------------
Copyright (c) 2010-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_RTC_H__
#define ADI_RTC_H__
#include "adi_processor.h"
#include <stdint.h>
#include <adi_callback.h>
#include <adi_rtc_config.h>
/*! \addtogroup RTC_Driver RTC Driver
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*! Amount of memory(In bytes) required by the RTC device driver for managing the operation.
* This memory is completely owned by the driver till the end of the operation.
*/
#define ADI_RTC_MEMORY_SIZE (24u)
/*! Emergency flush command to gatweay register */
#define ADI_RTC_GATEWAY_FLUSH 0xa2c5
/*! A device handle used in all API functions to identify the RTC device. */
typedef void* ADI_RTC_HANDLE;
/*! Interrupt bit position-1*/
#define ADI_RTC_INTERRUPT_OFFSET 16
/*! Interrupt bit position-2*/
#define ADI_RTC_INTERRUPT_OFFSET_IO_CAPTURE 21
/*!
* RTC API return codes
*/
typedef enum
{
/*! No Error, API succeeded */
ADI_RTC_SUCCESS,
/*! Generic failure */
ADI_RTC_FAILURE,
/*! RTC is in failsafe mode and not reliable */
ADI_RTC_CLOCK_FAILSAFE,
/*! RTC is already initialized */
ADI_RTC_IN_USE,
/*! Invalid device handle passed */
ADI_RTC_INVALID_HANDLE,
/*! Asking to initialize an unknown instance */
ADI_RTC_INVALID_INSTANCE,
/*! Parameter is out of range */
ADI_RTC_INVALID_OPTION,
/*! Specified operation not allowed */
ADI_RTC_OPERATION_NOT_ALLOWED,
/*! One of the parameters is invalid */
ADI_RTC_INVALID_PARAM,
/*! Input/SensorStrobe channel is invalid for the specified operation */
ADI_RTC_INVALID_CHANNEL
} ADI_RTC_RESULT;
/*!
* RTC Interrupt Enable Bits.
*/
typedef uint32_t ADI_RTC_INT_TYPE;
#define ADI_RTC_ALARM_INT 0x00000001u /*!< Alarm interrupt enable bit */
#define ADI_RTC_MOD60ALM_INT 0x00000002u /*!< modulo 60 Alarm interrupt enable */
#define ADI_RTC_ISO_DONE_INT 0x00000004u /*!< Power isolation done interrupt enable */
#define ADI_RTC_WRITE_PENDERR_INT 0x00000008u /*!< Write pend error interrupt enable */
#define ADI_RTC_WRITE_SYNC_INT 0x00000010u /*!< Write sync interrupt enable */
#define ADI_RTC_WRITE_PEND_INT 0x00000020u /*!< Write pend interrupt enable */
#define ADI_RTC_COUNT_INT 0x00000040u /*!< RTC count interrupt source enable */
#define ADI_RTC_PSI_INT 0x00000080u /*!< Precaled Module 1 interrupt */
#define ADI_RTC_TRIM_INT 0x00000100u /*!< Enable for the RTC trim interrupt source */
#define ADI_RTC_COUNT_ROLLOVER_INT 0x00000200u /*!< Enable for the RTC count roll-over interrupt source */
#define ADI_RTC_MOD60_ROLLOVER_INT 0x00000400u /*!< Enable for the RTC modulo-60 count roll-over interrupt source */
#define ADI_RTC_SENSOR_STROBE_CH1_INT 0x00000800u /*!< Enable interrupt for sensor strobe channel -1*/
#define ADI_RTC_SENSOR_STROBE_CH2_INT 0x00001000u /*!< Enable interrupt for sensor strobe channel -2*/
#define ADI_RTC_SENSOR_STROBE_CH3_INT 0x00002000u /*!< Enable interrupt for sensor strobe channel -3*/
#define ADI_RTC_SENSOR_STROBE_CH4_INT 0x00004000u /*!< Enable interrupt for sensor strobe channel -4*/
#define ADI_RTC_INPUT_CAPTURE_CH0_INT 0x00008000u /*!< Enable interrupt for input capture channel -0*/
#define ADI_RTC_INPUT_CAPTURE_CH2_INT 0x00010000u /*!< Enable interrupt for input capture channel -2*/
#define ADI_RTC_INPUT_CAPTURE_CH3_INT 0x00020000u /*!< Enable interrupt for input capture channel -3*/
#define ADI_RTC_INPUT_CAPTURE_CH4_INT 0x00040000u /*!< Enable interrupt for input capture channel -4*/
#define ADI_RTC_LFXTL_FAILURE_INT 0x00080000u /*!< Interrupt for LFXTL failure. LFXTL failure interrupt is mapped to RTC1 interrupt.*/
#define ADI_RTC_RTCSS4_FE_INT 0x00100000u /*!< Enable interrupt for Sensor Strobe channel 3*/
#define ADI_RTC_RTCSS3_FE_INT 0x00200000u /*!< Enable interrupt for Sensor Strobe channel 3*/
#define ADI_RTC_RTCSS2_FE_INT 0x00400000u /*!< Enable interrupt for Sensor Strobe channel 2*/
#define ADI_RTC_RTCSS1_FE_INT 0x00800000u /*!< Enable interrupt for Sensor Strobe channel 2*/
#define ADI_RTC_RTCSS4MSKEN 0x01000000u /*!< Enable interrupt for Sensor Strobe channel 4 Mask */
#define ADI_RTC_RTCSS3MSKEN 0x02000000u /*!< Enable interrupt for Sensor Strobe channel 3 Mask */
#define ADI_RTC_RTCSS2MSKEN 0x04000000u /*!< Enable interrupt for Sensor Strobe channel 2 Mask */
#define ADI_RTC_RTCSS1MSKEN 0x08000000u /*!< Enable interrupt for Sensor Strobe channel 1 Mask */
#define ADI_RTC_CR5OCS_SS3SMPMTCHIRQEN 0x10000000u /*!< Sample activity Interrupt enable for RTC Sensor Strobe Channel 3 */
#define ADI_RTC_CR5OCS_SS2SMPMTCHIRQEN 0x20000000u /*!< Sample activity Interrupt enable for RTC Sensor Strobe Channel 2 */
#define ADI_RTC_CR5OCS_SS1SMPMTCHIRQEN 0x40000000u /*!< Sample activity Interrupt enable for RTC Sensor Strobe Channel 1. */
#define ADI_RTC_NUM_INTERRUPTS 31 /*!< Number of RTC interrupts. */
/*!
* RTC Posted Write Status Bits.
*/
typedef enum
{
/*! Posted write control register-0 status bit */
ADI_RTC_WRITE_STATUS_CONTROL0 = 1 << BITP_RTC_SR0_WSYNCCR0,
/*! Posted write status0 register status bit */
ADI_RTC_WRITE_STATUS_STATUS0 = 1 << BITP_RTC_SR0_WSYNCSR0,
/*! Posted write count0 register status bit */
ADI_RTC_WRITE_STATUS_COUNT0 = 1 << BITP_RTC_SR0_WSYNCCNT0,
/*! Posted write count1 register status bit */
ADI_RTC_WRITE_STATUS_COUNT1 = 1 << BITP_RTC_SR0_WSYNCCNT1,
/*! Posted write alarm0 register status bit */
ADI_RTC_WRITE_STATUS_ALARM0 = 1 << BITP_RTC_SR0_WSYNCALM0,
/*! Posted write alarm1 register status bit */
ADI_RTC_WRITE_STATUS_ALARM1 = 1 << BITP_RTC_SR0_WSYNCALM1,
/*! Posted write trim register status bit */
ADI_RTC_WRITE_STATUS_TRIM = 1 << BITP_RTC_SR0_WSYNCTRM
} ADI_RTC_WRITE_STATUS;
/*!
* RTC Trim intervals.
*/
typedef enum
{
/*! Trim interval is 2^2 seconds */
ADI_RTC_TRIM_INTERVAL_2 = (2 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^3 seconds */
ADI_RTC_TRIM_INTERVAL_3 = (3 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^4 seconds */
ADI_RTC_TRIM_INTERVAL_4 = (4 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^5 seconds */
ADI_RTC_TRIM_INTERVAL_5 = (5 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^6 seconds */
ADI_RTC_TRIM_INTERVAL_6 = (6 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^7 seconds */
ADI_RTC_TRIM_INTERVAL_7 = (7 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^8 seconds */
ADI_RTC_TRIM_INTERVAL_8 = (8 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^9 seconds */
ADI_RTC_TRIM_INTERVAL_9 = (9 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^10 seconds */
ADI_RTC_TRIM_INTERVAL_10 = (10 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^11 seconds */
ADI_RTC_TRIM_INTERVAL_11 = (11 << BITP_RTC_TRM_IVL2EXPMIN | 0x1 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^12 seconds */
ADI_RTC_TRIM_INTERVAL_12 = (12 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^13 seconds */
ADI_RTC_TRIM_INTERVAL_13 = (13 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^14 seconds */
ADI_RTC_TRIM_INTERVAL_14 = (14 << BITP_RTC_TRM_IVL2EXPMIN | 0x0 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^15 seconds */
ADI_RTC_TRIM_INTERVAL_15 = (14 << BITP_RTC_TRM_IVL2EXPMIN | 0x1 << BITP_RTC_TRM_IVL),
/*! Trim interval is 2^16 seconds */
ADI_RTC_TRIM_INTERVAL_16 = (14 << BITP_RTC_TRM_IVL2EXPMIN | 0x2 << BITP_RTC_TRM_IVL ),
/*! Trim interval is 2^17 seconds */
ADI_RTC_TRIM_INTERVAL_17 = (14 << BITP_RTC_TRM_IVL2EXPMIN | 0x3 << BITP_RTC_TRM_IVL)
} ADI_RTC_TRIM_INTERVAL;
/*!
* RTC input capture channels.
*/
typedef enum
{
/*! Input capture channel-0 */
ADI_RTC_INPUT_CHANNEL_0 = 1 << BITP_RTC_CR2IC_IC0EN,
/*! Input capture channel-2 */
ADI_RTC_INPUT_CHANNEL_2 = 1 << BITP_RTC_CR2IC_IC2EN,
/*! Input capture channel-3 */
ADI_RTC_INPUT_CHANNEL_3 = 1 << BITP_RTC_CR2IC_IC3EN,
/*! Input capture channel-4 */
ADI_RTC_INPUT_CHANNEL_4 = 1 << BITP_RTC_CR2IC_IC4EN
}ADI_RTC_INPUT_CHANNEL;
/*!
* RTC Sensor Strobe channels.
*/
typedef enum
{
/*! Sensor Strobe channel-1 */
ADI_RTC_SS_CHANNEL_1 = 1 << BITP_RTC_CR3SS_SS1EN,
/*! Sensor Strobe channel-2 */
ADI_RTC_SS_CHANNEL_2 = 1 << BITP_RTC_CR3SS_SS2EN,
/*! Sensor Strobe channel-3 */
ADI_RTC_SS_CHANNEL_3 = 1 << BITP_RTC_CR3SS_SS3EN,
/*! Sensor Strobe channel-4 */
ADI_RTC_SS_CHANNEL_4 = 1 << BITP_RTC_CR3SS_SS4EN,
}ADI_RTC_SS_CHANNEL;
/*!
* RTC Trim polarity.
*/
typedef enum
{
/*! Trim value is added every trim interval */
ADI_RTC_TRIM_ADD = (1 << BITP_RTC_TRM_ADD),
/*! Trim value is subtracted every trim interval */
ADI_RTC_TRIM_SUB = (0 << BITP_RTC_TRM_ADD),
} ADI_RTC_TRIM_POLARITY;
/*!
* RTC Trim values.
*/
typedef enum
{
/*! Trim value is +/- 0 */
ADI_RTC_TRIM_0 = (0 << BITP_RTC_TRM_VALUE),
/*! Trim value is +/- 1 */
ADI_RTC_TRIM_1 = (1 << BITP_RTC_TRM_VALUE),
/*! Trim value is +/- 2 */
ADI_RTC_TRIM_2 = (2 << BITP_RTC_TRM_VALUE),
/*! Trim value is +/- 3 */
ADI_RTC_TRIM_3 = (3 << BITP_RTC_TRM_VALUE),
/*! Trim value is +/- 4 */
ADI_RTC_TRIM_4 = (4 << BITP_RTC_TRM_VALUE),
/*! Trim value is +/- 5 */
ADI_RTC_TRIM_5 = (5 << BITP_RTC_TRM_VALUE),
/*! Trim value is +/- 6 */
ADI_RTC_TRIM_6 = (6 << BITP_RTC_TRM_VALUE),
/*! Trim value is +/- 7 */
ADI_RTC_TRIM_7 = (7 << BITP_RTC_TRM_VALUE)
} ADI_RTC_TRIM_VALUE;
/*!
* RTC control register set.
*/
typedef enum
{
/*! Specify the RTC-Control register-0 */
ADI_RTC_CONTROL_REGISTER_0,
/*! Specify the RTC-Control register-1 */
ADI_RTC_CONTROL_REGISTER_1
} ADI_RTC_CONTROL_REGISTER;
/*================ E X T E R N A L S ==================*/
/*
*/
/*************************************/
/* RTC API */
/*************************************/
ADI_RTC_RESULT adi_rtc_Open(
uint32_t DeviceNumber,
void *pDeviceMemory,
uint32_t MemorySize,
ADI_RTC_HANDLE *phDevice
);
ADI_RTC_RESULT adi_rtc_Close(
ADI_RTC_HANDLE const hDevice
);
/*************************************/
/* Enable APIs for RTC Device */
/*************************************/
ADI_RTC_RESULT adi_rtc_EnableAlarm(
ADI_RTC_HANDLE const hDevice,
bool bEnable
);
ADI_RTC_RESULT adi_rtc_EnableMod60Alarm(
ADI_RTC_HANDLE const hDevice,
bool bEnable
);
ADI_RTC_RESULT adi_rtc_Enable(
ADI_RTC_HANDLE const hDevice,
bool bEnable
);
ADI_RTC_RESULT adi_rtc_EnableInterrupts(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_INT_TYPE Interrupts,
bool bEnable
);
ADI_RTC_RESULT adi_rtc_EnableTrim(
ADI_RTC_HANDLE const hDevice,
bool bEnable
);
ADI_RTC_RESULT adi_rtc_EnableAutoReload(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_SS_CHANNEL eSSChannel,
bool bEnable);
ADI_RTC_RESULT adi_rtc_EnableSensorStrobeOutput (
ADI_RTC_HANDLE const hDevice,
ADI_RTC_SS_CHANNEL eSSChannel,
bool bEnable);
ADI_RTC_RESULT adi_rtc_EnableInputCapture (
ADI_RTC_HANDLE const hDevice,
ADI_RTC_INPUT_CHANNEL eInpChannel,
bool bEnable);
ADI_RTC_RESULT adi_rtc_EnableSensorStrobeChannelMask(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_SS_CHANNEL eSSChannel,
bool bEnable);
ADI_RTC_RESULT adi_rtc_EnableOverwriteSnapshot (
ADI_RTC_HANDLE const hDevice,
bool bEnable);
/*************************************/
/* Set APIs for RTC Device */
/*************************************/
ADI_RTC_RESULT adi_rtc_SetMod60AlarmPeriod(
ADI_RTC_HANDLE const hDevice,
uint8_t nPeriod
);
ADI_RTC_RESULT adi_rtc_SetAlarm(
ADI_RTC_HANDLE const hDevice,
uint32_t nAlarm
);
ADI_RTC_RESULT adi_rtc_SetAlarmEx(
ADI_RTC_HANDLE const hDevice,
float fAlarm
);
ADI_RTC_RESULT adi_rtc_SetControlRegister(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_CONTROL_REGISTER eRegister,
uint32_t Control
);
ADI_RTC_RESULT adi_rtc_SetCount(
ADI_RTC_HANDLE const hDevice,
uint32_t nCount
);
ADI_RTC_RESULT adi_rtc_SetGateway(
ADI_RTC_HANDLE const hDevice,
uint16_t Command
);
ADI_RTC_RESULT adi_rtc_SetPreScale(
ADI_RTC_HANDLE const hDevice,
uint8_t nPreScale
);
ADI_RTC_RESULT adi_rtc_SetTrim(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_TRIM_INTERVAL eInterval,
ADI_RTC_TRIM_VALUE eTrimValue,
ADI_RTC_TRIM_POLARITY eOperation
);
ADI_RTC_RESULT adi_rtc_SetSensorStrobeChannelMask(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_SS_CHANNEL eSSChannel,
uint8_t nMask);
ADI_RTC_RESULT adi_rtc_SetAutoReloadValue(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_SS_CHANNEL eSSChannel,
uint16_t nValue);
ADI_RTC_RESULT adi_rtc_SetInputCapturePolarity (
ADI_RTC_HANDLE const hDevice,
ADI_RTC_INPUT_CHANNEL eInpChannel,
bool bEnable);
ADI_RTC_RESULT adi_rtc_SetSensorStrobeValue(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_SS_CHANNEL eSSChannel,
uint16_t nValue);
/*************************************/
/* Get APIs for RTC Device */
/*************************************/
ADI_RTC_RESULT adi_rtc_GetAlarm (
ADI_RTC_HANDLE hDevice,
uint32_t *pAlarm
);
ADI_RTC_RESULT adi_rtc_GetAlarmEx (
ADI_RTC_HANDLE hDevice,
float *pAlarm);
ADI_RTC_RESULT adi_rtc_GetControl (
ADI_RTC_HANDLE hDevice,
ADI_RTC_CONTROL_REGISTER eRegister ,
uint32_t *pControl);
ADI_RTC_RESULT adi_rtc_GetTrim(
ADI_RTC_HANDLE hDevice,
ADI_RTC_TRIM_VALUE *peTrim
);
ADI_RTC_RESULT adi_rtc_GetCount(
ADI_RTC_HANDLE const hDevice,
uint32_t *pCount
);
ADI_RTC_RESULT adi_rtc_GetCountEx(
ADI_RTC_HANDLE const hDevice,
float *pfCount
);
ADI_RTC_RESULT adi_rtc_GetSnapShot(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_INPUT_CHANNEL eChannel,
uint32_t *pValue,
uint16_t *pFraction);
ADI_RTC_RESULT adi_rtc_GetInputCaptureValue(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_INPUT_CHANNEL eChannel,
uint16_t *pValue);
ADI_RTC_RESULT adi_rtc_GetWritePendStatus(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_WRITE_STATUS *pPendBits
);
ADI_RTC_RESULT adi_rtc_GetWriteSyncStatus(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_WRITE_STATUS *pSyncBits
);
ADI_RTC_RESULT adi_rtc_GetSensorStrobeValue(
ADI_RTC_HANDLE const hDevice,
ADI_RTC_SS_CHANNEL eSSChannel,
uint16_t *pValue);
ADI_RTC_RESULT adi_rtc_GetCountRegs(
ADI_RTC_HANDLE const hDevice,
uint32_t *pnCount,
uint32_t *pfCount);
/************************************************/
/* RTC APIs for managing interrupt/sync */
/***********************************************/
ADI_RTC_RESULT adi_rtc_SynchronizeAllWrites(
ADI_RTC_HANDLE const hDevice
);
ADI_RTC_RESULT adi_rtc_RegisterCallback(
ADI_RTC_HANDLE const hDevice,
ADI_CALLBACK const pfCallback,
void *const pCBparam
);
#ifdef __cplusplus
}
#endif
/**@}*/
#endif /* ADI_RTC_H__ */

386
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/spi/adi_spi.h Executable file
View File

@ -0,0 +1,386 @@
/*! *****************************************************************************
* @file adi_spi.h
* @brief Main include file for SPI Device driver definitions
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.ADI_SEM_SIZE
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_SPI_H__
#define ADI_SPI_H__
#include <adi_processor.h>
#include <rtos_map/adi_rtos_map.h>
#include <adi_spi_config.h>
/** @addtogroup SPI_Driver SPI Driver
* @{
*/
#include <adi_spi_config.h>
#include <adi_callback.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*! Amount of memory(In bytes) required by the SPI device driver for managing the operation
* of a SPI controller. The memory is passed to the driver when the driver is opened.
* The memory is completely owned by the driver till the the driver is closed.
*
*/
#define ADI_SPI_MEMORY_SIZE (40u + ADI_SEM_SIZE)
/*!
*****************************************************************************
* \enum ADI_SPI_RESULT
*
* SPI Device Error Codes. #ADI_SPI_SUCCESS is always zero
* The return value of all SPI APIs returning #ADI_SPI_RESULT
* should always be tested at the application level for success or failure.
*
*****************************************************************************/
typedef enum
{
/*! Generic success. */
ADI_SPI_SUCCESS,
/*! Generic Failure. */
ADI_SPI_FAILURE,
/*! SPI device is already initialized. */
ADI_SPI_IN_USE,
/*! Invalid device handle. */
ADI_SPI_INVALID_HANDLE,
/*! Invalid device ID. */
ADI_SPI_INVALID_DEVICE_NUM,
/*! DMA configuration failure. */
ADI_SPI_DMA_ERROR ,
/*! NULL data pointer not allowed. */
ADI_SPI_INVALID_POINTER,
/*! Parameter is out of range. */
ADI_SPI_INVALID_PARAM,
/*! Unsupported mode of operation. */
ADI_SPI_UNSUPPORTED_MODE,
/*! Semaphore in error . */
ADI_SPI_SEMAPHORE_FAILED,
/*! Invalid operation */
ADI_SPI_INVALID_OPERATION,
/*! Buffer Not submitted */
ADI_SPI_BUFFER_NOT_SUBMITTED,
/*! Could not obtain the system clock */
ADI_SPI_BAD_SYS_CLOCK,
/*! Blocking PEND failed */
ADI_SPI_PEND_FAILED,
/*! DMA callback register failed */
ADI_SPI_DMA_REG_FAILED,
/*! Hardware error occurred */
ADI_SPI_HW_ERROR_OCCURRED
} ADI_SPI_RESULT;
/*!
*****************************************************************************
* \enum ADI_SPI_HW_ERRORS
*
* Enumeration of events notified in the application provided callback.
* More than one event can be recorded at a time so the enumerator symbols
* have to be assigned values of 2^N
*****************************************************************************/
typedef enum
{
/*!< The given buffer is processed. Application can use this event to submit
the next buffer to be transmitted. */
ADI_SPI_HW_ERROR_NONE = 0u,
/*! Tx-underflow interrupt enable */
ADI_SPI_HW_ERROR_TX_UNDERFLOW = 1u,
/*! Rx-overflow interrupt enable */
ADI_SPI_HW_ERROR_RX_OVERFLOW = 2u,
/*! Rx DMA channel bus fault detected */
ADI_SPI_HW_ERROR_RX_CHAN_DMA_BUS_FAULT = 4u,
/*! Tx DMA channel bus fault detected */
ADI_SPI_HW_ERROR_TX_CHAN_DMA_BUS_FAULT = 8u,
/*! Rx DMA channel bus fault detected */
ADI_SPI_HW_ERROR_RX_CHAN_DMA_INVALID_DESCR = 16u,
/*! Tx DMA channel bus fault detected */
ADI_SPI_HW_ERROR_TX_CHAN_DMA_INVALID_DESCR = 32u,
/*! Rx DMA channel unkown error detected */
ADI_SPI_HW_ERROR_RX_CHAN_DMA_UNKNOWN_ERROR = 64u,
/*! Tx DMA channel unkown error detected */
ADI_SPI_HW_ERROR_TX_CHAN_DMA_UNKNOWN_ERROR = 128u
} ADI_SPI_HW_ERRORS;
/*!
*****************************************************************************
* \enum ADI_SPI_CHIP_SELECT
*
* SPI Device Chip Select Enumeration. Allows designation of an external
* SPI slave device chip select pin to be driven by the SPI controller.
* Multiple external slave SPI devices may be present on a shared SPI bus,
* and the chip select pin allows each of them to be assigned dedicated selects.
* Use the #adi_spi_SetChipSelect() API to configure the active chip select.
* Note that SPI0 is an internal channel dedicated to the UHF controller and
* hence, has a dedicated SPI0 chip select pin that is not available externally.
*
*****************************************************************************/
typedef enum
{
/*! No Slave Chip Select for SPI. */
ADI_SPI_CS_NONE = 0,
/*! CS0 Slave Chip Select for SPI. */
ADI_SPI_CS0 = 1,
/*! CS1 Slave Chip Select for SPI. */
ADI_SPI_CS1 = 2,
/*! CS2 Slave Chip Select for SPI. */
ADI_SPI_CS2 = 4,
/*! CS3 Slave Chip Select for SPI. */
ADI_SPI_CS3 = 8
} ADI_SPI_CHIP_SELECT;
/*! SPI Device instance private data handle typedef. */
typedef struct __ADI_SPI_DEV_DATA_TYPE* ADI_SPI_HANDLE;
/*! SPI Device instance private data handle typedef. 'const' version */
typedef const struct __ADI_SPI_DEV_DATA_TYPE* ADI_SPI_CONST_HANDLE;
/*!
* \struct ADI_SPI_TRANSCEIVER
*****************************************************************************
* SPI Device Command/Data Transceiver Structure. Data structure used by
* the #adi_spi_MasterReadWrite(),#adi_spi_MasterSubmitBuffer()
* API to convey all parameters, consisting of
* prologue, transmit and receive data and size, and buffer increment flags.
* DMA and Half-Duplex operation are also specified in this structure as T/F.
*
* Each call to #adi_spi_MasterReadWrite or #adi_spi_MasterSubmitBuffer() must populate the following fields of the
* ADI_SPI_TRANSCEIVER block:
*
* @par TransmitterBytes
* The number of bytes to be transmitted. If the value is zero, data will not be transmitted from the
* buffer pointed by pTransmitter.
*
* @par ReceiverBytes
* The number of bytes to be received. If the value is zero, data will not be stored in the
* buffer pointed by pReceiver.
*
* @par pTransmitter
* Pointer to the application-defined transmit data buffer. This is the data sent out
* over the SPI transmit wire (MOSI for Master-mode, MISO for Slave-mode) during the SPI transaction.
* For SPI DMA mode (which is 16-bit based), the transmit buffer must be 16-bit aligned.
*
* @par pReceiver
* Pointer to the application-defined receive data buffer. This is where the receive data
* will be stored from the SPI receive wire (MISO for Master-mode, MOSI for Slave-mode)
* during the SPI transaction.
* For SPI DMA mode (which is 16-bit based), the receive buffer must be 16-bit aligned.
*
* @par bTxIncrement
* Increment to be done for the transmit buffer after every transaction . The transmit data buffer
* pointer is advanced as each byte is sent. If it is set to zero, the transmit data pointer is stationary.
* A stationary buffer pointer is useful for sending the same data to an external device or if
* the source data is from a fixed memory address.
*
* @par bRxIncrement
* Increment to be done for the receive buffer. The transmit data buffer
* pointer is advanced as each byte is sent. If it is value is set to zero, the receive
* data pointer is stationary. A stationary buffer pointer is useful for monitoring commands
* from an external device or if the receive data is going to a fixed memory address.
*
* @par bDMA
* Indicate whether the transaction is to use DMA (true) or not (false). If using DMA SPI
* transactions are limited to 2048 bytes. If more than 2048 bytes are needed then the application
* must use multiple transactions (DMA ping pong mode is not supported in the driver).
* For SPI DMA mode (which is 16-bit based), TransmitterBytes/ReceiverBytes is rounded up to an
* even number by the SPI driver before submitting to DMA.
* Please align the buffer to 16 bit word boundary since the data transfer is 16bit.
*
*
* @par bRD_CTL
* Indicate whether the transaction should enable RD_CTL (true) or not (false).
* RD_CTL effectively provides half-duplex operation as outlined in the HRM.
*****************************************************************************/
typedef struct
{
/*! Pointer to transmit data. */
uint8_t* pTransmitter;
/*! Pointer to receive data. */
uint8_t* pReceiver;
/*! Data size for TX(bytes). */
uint16_t TransmitterBytes;
/*! Data size for RX(bytes). */
uint16_t ReceiverBytes;
/*! Transmit pointer increment flag. */
uint8_t nTxIncrement;
/*! Receive pointer increment flag. */
uint8_t nRxIncrement;
/*! DMA mode operation */
bool bDMA;
/*! RD_CTL, half-duplex, operation */
bool bRD_CTL;
} ADI_SPI_TRANSCEIVER;
/******************************************************************************
* SPI Device External API function prototypes
*****************************************************************************/
/* Device Initialization and Uninitialization Interfaces */
ADI_SPI_RESULT adi_spi_Open(
uint32_t nDeviceNum,
void *pDevMemory,
uint32_t nMemorySize,
ADI_SPI_HANDLE* const phDevice
);
ADI_SPI_RESULT adi_spi_Close(
ADI_SPI_HANDLE const hDevice
);
/******************************************************************
* Eliminatable functions that may be optimized out by the linker *
*****************************************************************/
ADI_SPI_RESULT adi_spi_MasterReadWrite(
ADI_SPI_HANDLE const hDevice,
const ADI_SPI_TRANSCEIVER* const pXfr
);
ADI_SPI_RESULT adi_spi_SetMasterMode(
ADI_SPI_CONST_HANDLE const hDevice,
const bool bFlag
);
/* Slave Mode APIs */
ADI_SPI_RESULT adi_spi_SlaveReadWrite(
ADI_SPI_HANDLE const hDevice,
const ADI_SPI_TRANSCEIVER* const pXfr
);
/* Command/Data transceiver API */
ADI_SPI_RESULT adi_spi_MasterSubmitBuffer(
ADI_SPI_HANDLE const hDevice,
const ADI_SPI_TRANSCEIVER* const pXfr
);
ADI_SPI_RESULT adi_spi_SlaveSubmitBuffer(
ADI_SPI_HANDLE const hDevice,
const ADI_SPI_TRANSCEIVER*
const pXfr
);
ADI_SPI_RESULT adi_spi_RegisterCallback (
ADI_SPI_HANDLE const hDevice,
ADI_CALLBACK const pfCallback,
void *const pCBParam
);
/* Turn a non-blocking call into a blocking call. Wait for the transaction to complete */
ADI_SPI_RESULT adi_spi_GetBuffer(
ADI_SPI_HANDLE const hDevice,
uint32_t * const pHWErrors
);
/* Query function for the data transfer completion */
ADI_SPI_RESULT adi_spi_isBufferAvailable(
ADI_SPI_CONST_HANDLE const hDevice,
bool* const bComplete
);
ADI_SPI_RESULT adi_spi_SetContinuousMode(
ADI_SPI_CONST_HANDLE const hDevice,
const bool bFlag
);
ADI_SPI_RESULT adi_spi_SetLoopback(
ADI_SPI_CONST_HANDLE const hDevice,
const bool bFlag
);
ADI_SPI_RESULT adi_spi_SetIrqmode (
ADI_SPI_CONST_HANDLE const hDevice,
const uint8_t nMode);
ADI_SPI_RESULT adi_spi_SetReceiveOverflow(
ADI_SPI_CONST_HANDLE const hDevice,
const bool bFlag
);
ADI_SPI_RESULT adi_spi_SetTransmitUnderflow(
ADI_SPI_CONST_HANDLE const hDevice,
const bool bFlag
);
/* Mode Configuration Interface */
ADI_SPI_RESULT adi_spi_SetBitrate(
ADI_SPI_CONST_HANDLE const hDevice,
const uint32_t Hertz
);
ADI_SPI_RESULT adi_spi_SetChipSelect(
ADI_SPI_HANDLE const hDevice,
const ADI_SPI_CHIP_SELECT eChipSelect
);
ADI_SPI_RESULT adi_spi_GetBitrate(
ADI_SPI_CONST_HANDLE const hDevice,
uint32_t* const pnBitrate
);
#ifdef __cplusplus
}
#endif
/**@}*/
#endif /* ADI_SPI_H__ */

236
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/sport/adi_sport.h Executable file
View File

@ -0,0 +1,236 @@
/*! ****************************************************************************
* @file adi_sport.h
* @brief SPORT (Serial Port) Device driver definitions
* @details Header File for the SPORT driver API functions and definitions
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef ADI_SPORT_H
#define ADI_SPORT_H
/*============= I N C L U D E S =============*/
#include <adi_processor.h>
#include <rtos_map/adi_rtos_map.h>
#include <drivers/dma/adi_dma.h>
#include <adi_callback.h>
/** @addtogroup SPORT_Driver SPORT Driver
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*============== D E F I N E S ===============*/
/**
* Amount of memory (bytes) required by the SPORT device driver for managing
* the operation in interrupt mode. This memory is completely owned by the
* driver till the end of the operation.
*/
#define ADI_SPORT_MEMORY_SIZE (76u + ADI_SEM_SIZE)
typedef void* ADI_SPORT_HANDLE; /*!< Handle to the SPORT Device */
/**
* Enumeration of different channels of the SPORT
*/
typedef enum
{
ADI_HALF_SPORT_A = 0, /*!< First half SPORT */
ADI_HALF_SPORT_B = 1 /*!< Second half SPORT */
} ADI_SPORT_CHANNEL;
/**
* Enumeration for the direction of operation.
*/
typedef enum
{
ADI_SPORT_DIR_RX, /*!< Sport in Rx mode */
ADI_SPORT_DIR_TX /*!< Sport in Tx mode */
} ADI_SPORT_DIRECTION;
/**
* Enumeration for enabling packing.
*/
typedef enum
{
ADI_SPORT_NO_PACKING = 0, /*!< No Packing */
ADI_SPORT_8BIT_PACKING = ENUM_SPORT_CTL_A_CTL_PACK_8BIT, /*!< 8-bit packing */
ADI_SPORT_16BIT_PACKING = ENUM_SPORT_CTL_A_CTL_PACK_16BIT /*!< 16-Bit packing */
} ADI_SPORT_PACKING_MODE;
/**
* Enumeration for Hardware Error encountered by the SPORT device.
*/
typedef enum
{
ADI_SPORT_HW_NO_ERR = 0x00, /*!< No Hardware error */
ADI_SPORT_HW_ERR_RX_OVERFLOW = 0x02, /*!< Data overflow for Rx (same value as Tx underflow) */
ADI_SPORT_HW_ERR_TX_UNDERFLOW = 0x02, /*!< Data underflow for Tx (same value as Rx overflow) */
ADI_SPORT_HW_ERR_FS = 0x04, /*!< Frame sync error */
ADI_SPORT_HW_ERR_SYSDATAERR = 0x10, /*!< System Data Error */
ADI_SPORT_EVENT_RX_BUFFER_PROCESSED = 0x20, /*!< Processed the submitted RX buffer */
ADI_SPORT_EVENT_TX_BUFFER_PROCESSED = 0x40, /*!< Processed the submitted TX buffer */
ADI_SPORT_DMA_ERR_BUS = 0x100, /*!< SPORT DMA bus error detected */
ADI_SPORT_DMA_ERR_INVALID_DESCRIPTOR = 0x200 /*!< SPORT DMA invalid descriptor error detected */
}ADI_SPORT_EVENT;
/**
* Enumeration for result code returned from the SPORT device driver functions.
*/
typedef enum
{
ADI_SPORT_SUCCESS, /*!< Success */
ADI_SPORT_FAILED, /*!< Generic Failure to indicate a call to SPORT driver function returned unsuccessful */
ADI_SPORT_INVALID_DEVICE_NUM , /*!< Invalid device number */
ADI_SPORT_INVALID_NULL_POINTER, /*!< Specified pointer is invalid */
ADI_SPORT_INVALID_HANDLE, /*!< The given handle is invalid */
ADI_SPORT_INVALID_PARAMETER, /*!< Specified parameter is not valid */
ADI_SPORT_DMA_REGISTER_FAILED, /*!< Registering DMA error handler failed */
ADI_SPORT_DEVICE_IN_USE, /*!< The specified SPORT channel is already open and in use */
ADI_SPORT_INVALID_CONFIGURATION, /*!< The SPORT configuration is invalid */
ADI_SPORT_BUFFERS_NOT_SUBMITTED, /*!< Buffer submission failed */
ADI_SPORT_INVALID_WORD_LENGTH, /*!< Invalid word size */
ADI_SPORT_OPERATION_NOT_ALLOWED, /*!< Specified operation is not allowed when SPORT is transmitting/receiving data */
ADI_SPORT_HW_ERROR /*!< SPORT hardware or DMA reports an error */
} ADI_SPORT_RESULT;
/*============= P U B L I C F U N C T I O N S =============*/
/* Opens a SPORT device */
ADI_SPORT_RESULT adi_sport_Open(
const uint32_t nDevNum,
const ADI_SPORT_CHANNEL eChannel,
const ADI_SPORT_DIRECTION eDirection,
void *pMemory,
const uint32_t nMemSize,
ADI_SPORT_HANDLE * const phDevice
);
/* Closes a SPORT device */
ADI_SPORT_RESULT adi_sport_Close(
ADI_SPORT_HANDLE const hDevice
);
/* Submits a buffer to the driver */
ADI_SPORT_RESULT adi_sport_SubmitBuffer(
ADI_SPORT_HANDLE const hDevice,
void * const pBuffer,
uint32_t const nNumBytes,
bool const bDMA
);
/* Get the processed buffer from the driver */
ADI_SPORT_RESULT adi_sport_GetBuffer(
ADI_SPORT_HANDLE const hDevice,
void ** const ppBuffer,
uint32_t * pHwError
);
/* Peek function to know whether an processed buffer is avilable */
ADI_SPORT_RESULT adi_sport_IsBufferAvailable(
ADI_SPORT_HANDLE const hDevice,
bool * const pbAvailable
);
/* To register the callback function */
ADI_SPORT_RESULT adi_sport_RegisterCallback(
ADI_SPORT_HANDLE const hDevice,
const ADI_CALLBACK pfCallback,
void * const pCBparam
);
/* Configure the data */
ADI_SPORT_RESULT adi_sport_ConfigData(
ADI_SPORT_HANDLE const hDevice,
const uint8_t nWordLength,
const ADI_SPORT_PACKING_MODE ePackMode,
const bool bLSBFirst
);
/* Configure the clock */
ADI_SPORT_RESULT adi_sport_ConfigClock(
ADI_SPORT_HANDLE const hDevice,
const uint16_t nClockRatio,
const bool bUseIntlClock,
const bool bRisingEdge,
const bool bGatedClk
);
/* Configure the frame sync */
ADI_SPORT_RESULT adi_sport_ConfigFrameSync(
ADI_SPORT_HANDLE const hDevice,
const uint16_t nFsDivisor,
const bool bFSRequired,
const bool bInternalFS,
const bool bDataFS,
const bool bActiveLowFS,
const bool bLateFS,
const bool bFSErrorOperation
);
/* To mux the half-SPORT; this makes the device to use FS and Clock from other half-SPORT */
ADI_SPORT_RESULT adi_sport_MultiplexSportSignal(
ADI_SPORT_HANDLE const hDevice,
const bool bUseOtherFS,
const bool bUseOtherClk
);
/* To configure the SPORT in timer mode */
ADI_SPORT_RESULT adi_sport_ConfigTimerMode(
ADI_SPORT_HANDLE const hDevice,
const uint8_t nFSDuration,
const uint8_t nWidth,
const bool bActiveLow
);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ADI_SPORT_H */
/*@}*/

253
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/tmr/adi_tmr.h Executable file
View File

@ -0,0 +1,253 @@
/*! *****************************************************************************
* @file adi_tmr.h
* @brief GP and RGB timer device driver public header file
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_TMR_H
#define ADI_TMR_H
#include <stdint.h>
#include <stdbool.h>
#include <adi_callback.h>
/** @addtogroup TMR_Driver Timer Driver
* @{
*/
/*!
*****************************************************************************
* \enum ADI_TMR_RESULT
* Enumeration for result code returned from the timer device driver functions.
* The return value of all timer APIs returning #ADI_TMR_RESULT should always
* be tested at the application level for success or failure.
*****************************************************************************/
typedef enum {
/*! Successful operation */
ADI_TMR_SUCCESS,
/*! Bad device number supplied by user */
ADI_TMR_BAD_DEVICE_NUM,
/*! Bad PWM output number supplied by user to #adi_tmr_ConfigPwm */
ADI_TMR_BAD_PWM_NUM,
/*! Bad event number supplied by user to #adi_tmr_ConfigEvent */
ADI_TMR_BAD_EVENT_ID,
/*! Bad timer configuration, reloading and free running are mutually exclusive options */
ADI_TMR_BAD_RELOAD_CONFIGURATION,
/*! Setup or enable function called while the timer is running */
ADI_TMR_OPERATION_NOT_ALLOWED,
/*! Timeout while waiting for busy bit to clear before writing control register */
ADI_TMR_DEVICE_BUSY,
/*! User attempts to reload the timer when reloading has not been enabled */
ADI_TMR_RELOAD_DISABLED,
/*! User attempts to read the current or captured count with a NULL pointer */
ADI_TMR_NULL_POINTER
} ADI_TMR_RESULT;
/*!
*****************************************************************************
* \enum ADI_TMR_DEVICE
* Enumeration for the hardware peripheral being used during the API call
*****************************************************************************/
typedef enum {
/*! General purpose timer 0 */
ADI_TMR_DEVICE_GP0 = 0u,
/*! General purpose timer 1 */
ADI_TMR_DEVICE_GP1 = 1u,
/*! General purpose timer 2 */
ADI_TMR_DEVICE_GP2 = 2u,
/*! RGB timer */
ADI_TMR_DEVICE_RGB = 3u,
/*! Total number of devices (private) */
ADI_TMR_DEVICE_NUM = 4u,
} ADI_TMR_DEVICE;
/*!
*****************************************************************************
* \enum ADI_TMR_EVENT
* Enumeration of events notified in the application provided callback.
*****************************************************************************/
typedef enum {
/*! Timeout event occurred */
ADI_TMR_EVENT_TIMEOUT = 0x01,
/*! Event capture event occurred */
ADI_TMR_EVENT_CAPTURE = 0x02,
} ADI_TMR_EVENT;
/*!
*****************************************************************************
* \enum ADI_TMR_PRESCALER
* Prescale options when configuring the timer
*****************************************************************************/
typedef enum {
/*! Count every 1 source clock periods */
ADI_TMR_PRESCALER_1 = 0u,
/*! Count every 16 source clock periods */
ADI_TMR_PRESCALER_16 = 1u,
/*! Count every 64 source clock periods */
ADI_TMR_PRESCALER_64 = 2u,
/*! Count every 256 source clock periods */
ADI_TMR_PRESCALER_256 = 3u,
} ADI_TMR_PRESCALER;
/*!
*****************************************************************************
* \enum ADI_TMR_CLOCK_SOURCE
* Source clock options when configuring the timer
*****************************************************************************/
typedef enum {
/*! Use periphreal clock (PCLK) */
ADI_TMR_CLOCK_PCLK = 0u,
/*! Use internal high frequency clock (HFOSC) */
ADI_TMR_CLOCK_HFOSC = 1u,
/*! Use internal low frequency clock (LFOSC) */
ADI_TMR_CLOCK_LFOSC = 2u,
/*! Use external low frequency clock (LFXTAL) */
ADI_TMR_CLOCK_LFXTAL = 3u,
} ADI_TMR_CLOCK_SOURCE;
/*!
*****************************************************************************
* \enum ADI_TMR_PWM_OUTPUT
* RGB PWM outputs, used to specify which PWM output to configure. For the GP
* timers only #ADI_TMR_PWM_OUTPUT_0 is allowed. The RGB timer has all three
* outputs.
*****************************************************************************/
typedef enum {
/*! PWM output 0 */
ADI_TMR_PWM_OUTPUT_0 = 0u,
/*! PWM output 1 */
ADI_TMR_PWM_OUTPUT_1 = 1u,
/*! PWM output 2 */
ADI_TMR_PWM_OUTPUT_2 = 2u,
/*! Total number of outputs (private) */
ADI_TMR_PWM_OUTPUT_NUM = 3u,
} ADI_TMR_PWM_OUTPUT;
/*!
*****************************************************************************
* \struct ADI_TMR_CONFIG
* Configuration structure to fill and pass to #adi_tmr_ConfigTimer when
* configuring the GP or RGB timer
*****************************************************************************/
typedef struct {
/*! True to count up, false to count down */
bool bCountingUp;
/*! True for periodic (specific load value), false for free running (0xFFFF) */
bool bPeriodic;
/*! Prescaler */
ADI_TMR_PRESCALER ePrescaler;
/*! Clock source */
ADI_TMR_CLOCK_SOURCE eClockSource;
/*! Load value (only relent in periodic mode) */
uint16_t nLoad;
/*! Asynchronous load value (only relevant in periodic mode, and when PCLK is used) */
uint16_t nAsyncLoad;
/*! True to enable reloading, false to disable it (only relevant in periodic mode) */
bool bReloading;
/*! True to enable sync bypass, false to disable it */
bool bSyncBypass;
} ADI_TMR_CONFIG;
/*!
*****************************************************************************
* \struct ADI_TMR_EVENT_CONFIG
* Configuration structure to fill and pass to #adi_tmr_ConfigEvent when
* configuring event capture
*****************************************************************************/
typedef struct {
/*! True to enable event capture, false to disable it */
bool bEnable;
/*! True to reset the counter and prescaler when the selected event occurs, false to let it continue */
bool bPrescaleReset;
/*! Event identifier, see hardware reference manual for details */
uint8_t nEventID;
} ADI_TMR_EVENT_CONFIG;
/*!
*****************************************************************************
* \struct ADI_TMR_PWM_CONFIG
* Configuration structure to fill and pass to #adi_tmr_ConfigPwm when
* configuring pulse width modulation output
*****************************************************************************/
typedef struct {
/*! PWM output */
ADI_TMR_PWM_OUTPUT eOutput;
/*! True if match mode (configurable duty cycle), false if toggle mode (50% duty cycle) */
bool bMatch;
/*! True for PWM idle high, false for PWM idle low */
bool bIdleHigh;
/*! Match value, only applicable if in match mode */
uint16_t nMatchValue;
} ADI_TMR_PWM_CONFIG;
/******************************************************************************
* PUBLIC API
* 1.) Eliminate functions that may be optimized out by the linker
* 2.) Ordered by designed function call sequence
*****************************************************************************/
/* Initialize timer driver */
ADI_TMR_RESULT adi_tmr_Init (ADI_TMR_DEVICE const eDevice, ADI_CALLBACK const pfCallback, void * const pCBParam, bool bEnableInt);
/* Configuration interface functions */
ADI_TMR_RESULT adi_tmr_ConfigTimer (ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG timerConfig);
ADI_TMR_RESULT adi_tmr_ConfigEvent (ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_CONFIG eventConfig);
ADI_TMR_RESULT adi_tmr_ConfigPwm (ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFIG pwmConfig );
/* Timer start and stop */
ADI_TMR_RESULT adi_tmr_Enable (ADI_TMR_DEVICE const eDevice, bool bEnable);
/* Read functions */
ADI_TMR_RESULT adi_tmr_GetCurrentCount (ADI_TMR_DEVICE const eDevice, uint16_t *pCount);
ADI_TMR_RESULT adi_tmr_GetCaptureCount (ADI_TMR_DEVICE const eDevice, uint16_t *pCount);
/* Reload function */
ADI_TMR_RESULT adi_tmr_Reload (ADI_TMR_DEVICE const eDevice);
/*! @} */
#endif /* ADI_TMR_H */

498
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/uart/adi_uart.h Executable file
View File

@ -0,0 +1,498 @@
/*! *****************************************************************************
* @file adi_uart.h
* @brief UART device driver global include file.
* @details This a global file which includes a specific file based on the processor family.
* This included file will be containing UART device driver functions.
-----------------------------------------------------------------------------
Copyright (c) 2010-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_UART_H
#define ADI_UART_H
/** @addtogroup UART_Driver UART Driver
* @{
*/
/*! \cond PRIVATE */
/*============= I N C L U D E S =============*/
#include <stdint.h>
#include <stddef.h>
#include <string.h>
#include <assert.h>
#include <adi_processor.h>
#include <adi_uart_config.h>
#include <rtos_map/adi_rtos_map.h>
#include <drivers/dma/adi_dma.h>
#include <drivers/pwr/adi_pwr.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*! \endcond */
/*! Amount of memory(bytes) required by the UART device driver for operating unidirectionally(Either RX or TX).
* This memory is completely owned by the driver until the end of the operation.
*/
#define ADI_UART_UNIDIR_MEMORY_SIZE (48u + (60u + ADI_SEM_SIZE))
/*! Amount of memory(bytes) required by the UART device driver for operating bidirectionally(Both RX and TX).
* This memory is completely owned by the driver until the end of the operation.
*/
#define ADI_UART_BIDIR_MEMORY_SIZE (48u + (60u + ADI_SEM_SIZE)*2u)
/*!
* Handle for managing the UART device typedef.
*/
typedef struct _ADI_UART_DEVICE* ADI_UART_HANDLE;
/*!
* Handle for managing the UART device typedef 'const' version.
*/
typedef const struct _ADI_UART_DEVICE* ADI_UART_CONST_HANDLE;
/*!
*****************************************************************************
* \enum ADI_UART_DIRECTION
* Enumeration for the UART direction.
*****************************************************************************/
typedef enum
{
ADI_UART_DIR_TRANSMIT, /*!< UART is only transmitting. */
ADI_UART_DIR_RECEIVE, /*!< UART is only receiving. */
ADI_UART_DIR_BIDIRECTION /*!< UART in bidirectional. */
} ADI_UART_DIRECTION;
/*!
*****************************************************************************
* \enum ADI_UART_EVENT
* Enumeration of events notified in the application provided callback.
*****************************************************************************/
typedef enum
{
ADI_UART_EVENT_RX_BUFFER_PROCESSED, /*!< Rx buffer is processed. */
ADI_UART_EVENT_TX_BUFFER_PROCESSED, /*!< Tx buffer is processed. */
ADI_UART_EVENT_NO_RX_BUFFER_EVENT, /*!< No Rx buffer but data is in FIFO. */
ADI_UART_EVENT_AUTOBAUD_COMPLETE, /*!< Autobaud is complete. */
ADI_UART_EVENT_HW_ERROR_DETECTED, /*!< Hardware error detected. */
ADI_UART_EVENT_AUTOBAUD_ERROR_DETECTED /*!< Autobaud error detected. */
}ADI_UART_EVENT;
/*!
*****************************************************************************
* \enum ADI_UART_RESULT
* Enumeration for result code returned from the UART device driver functions.
* The return value of all UART APIs returning #ADI_UART_RESULT
* should always be tested at the application level for success or failure.
*****************************************************************************/
typedef enum
{
ADI_UART_SUCCESS, /*!< Generic success. */
ADI_UART_FAILED, /*!< Generic failure. */
ADI_UART_SEMAPHORE_FAILED, /*!< Semaphore error. */
ADI_UART_INVALID_HANDLE, /*!< Invalid device handle. */
ADI_UART_DEVICE_IN_USE, /*!< UART device in use. */
ADI_UART_INVALID_DEVICE_NUM, /*!< Invalid device number. */
ADI_UART_INVALID_POINTER, /*!< NULL data pointer is not allowed. */
ADI_UART_INSUFFICIENT_MEMORY, /*!< Insufficent memory. */
ADI_UART_INVALID_DIR, /*!< Invalid UART direction. */
ADI_UART_OPERATION_NOT_ALLOWED, /*!< Invalid operation. */
ADI_UART_INVALID_PARAMETER, /*!< Invalid parameter. */
ADI_UART_BUFFER_NOT_SUBMITTED, /*!< Buffer not submitted. */
ADI_UART_INVALID_DATA_TRANSFER_MODE, /*!< Invalid transfer mode.
Adi_uart_Read()/adi_uart_Write() is used in nonblocking mode
or adi_uart_SubmitRxBuffer()/adi_uart_SubmitTxBuffer()
is used in blocking mode. */
ADI_UART_HW_ERROR_DETECTED, /*!< Hardware error detected. */
ADI_UART_AUTOBAUD_ERROR_DETECTED, /*!< Autobaud error detected. */
ADI_UART_ERR_DMA_REGISTER, /*!< Error while registering the DMA callback. */
ADI_UART_INVALID_DATA_SIZE /*!< Invalid transfer size. Must be less than 1025 bytes */
} ADI_UART_RESULT;
/*!
*****************************************************************************
* \enum ADI_UART_HW_ERRORS
* Enumeration for UART hardware errors. If hardware error(s) occur in
* either callback or interrupt mode, they are mapped to #ADI_UART_HW_ERRORS.
* Interpretation of the break condition is application specific.
*****************************************************************************/
typedef enum
{
ADI_UART_NO_HW_ERROR = 0x00, /*!< No hardware error. */
ADI_UART_HW_ERR_FRAMING = 0x10, /*!< Rx framing error. */
ADI_UART_HW_ERR_PARITY = 0x20, /*!< Rx parity error. */
ADI_UART_HW_ERR_OVERRUN = 0x40, /*!< Receive overrun. */
ADI_UART_BREAK_INTERRUPT = 0x80, /*!< Break condition. */
ADI_UART_HW_ERR_RX_CHAN_DMA_BUS_FAULT = 0x100, /*!< Rx DMA channel bus fault detected. */
ADI_UART_HW_ERR_TX_CHAN_DMA_BUS_FAULT = 0x200, /*!< Tx DMA channel bus fault detected. */
ADI_UART_HW_ERR_RX_CHAN_DMA_INVALID_DESCR = 0x400, /*!< Rx DMA channel invalid descriptor detected. */
ADI_UART_HW_ERR_TX_CHAN_DMA_INVALID_DESCR = 0x800, /*!< Tx DMA channel invalid descriptor detected. */
ADI_UART_HW_ERR_RX_CHAN_DMA_UNKNOWN_ERROR = 0x1000, /*!< Rx DMA channel unknown error detected. */
ADI_UART_HW_ERR_TX_CHAN_DMA_UNKNOWN_ERROR = 0x2000, /*!< Tx DMA channel unknown error detected. */
}ADI_UART_HW_ERRORS;
/*!
*****************************************************************************
* \enum ADI_UART_AUTOBAUD_ERRORS
* Enumeration for UART autobaud errors. If autobaud related error(s) occur
* they are mapped to #ADI_UART_AUTOBAUD_ERRORS.
*****************************************************************************/
typedef enum
{
ADI_UART_AUTOBAUD_NO_ERROR = 0x000, /*!< No autobaud error. */
ADI_UART_AUTOBAUD_TIMEOUT_NO_START_EDGE = 0x100, /*!< Timeout due to no valid start edge found during autobaud. */
ADI_UART_AUTOBAUD_TIMEOUT_LONGBREAK = 0x200, /*!< Timeout due to break condition detected during autobaud. */
ADI_UART_AUTOBAUD_TIMEOUT_NO_END_EDGE = 0x400 /*!< Timeout due to no valid end edge found during autobaud. */
}ADI_UART_AUTOBAUD_ERRORS;
/*!
*****************************************************************************
* \enum ADI_UART_TRIG_LEVEL
* Enumeration for the FIFO trigger level.
*****************************************************************************/
typedef enum
{
ADI_UART_RX_FIFO_TRIG_LEVEL_1BYTE = 0 << BITP_UART_FCR_RFTRIG, /*!< 1-byte to trigger RX interrupt. */
ADI_UART_RX_FIFO_TRIG_LEVEL_4BYTE = 1 << BITP_UART_FCR_RFTRIG, /*!< 4-byte to trigger RX interrupt. */
ADI_UART_RX_FIFO_TRIG_LEVEL_8BYTE = 2 << BITP_UART_FCR_RFTRIG, /*!< 8-byte to trigger RX interrupt. */
ADI_UART_RX_FIFO_TRIG_LEVEL_14BYTE = 3 << BITP_UART_FCR_RFTRIG /*!< 14-byte to trigger RX interrupt. */
}ADI_UART_TRIG_LEVEL;
/*!
*****************************************************************************
* \enum ADI_UART_WORDLEN
* Enumeration for data width.
*****************************************************************************/
typedef enum
{
ADI_UART_WORDLEN_5BITS, /*!< 5 bits wide. */
ADI_UART_WORDLEN_6BITS, /*!< 6 bits wide. */
ADI_UART_WORDLEN_7BITS, /*!< 7 bits wide. */
ADI_UART_WORDLEN_8BITS /*!< 8 bits wide. */
} ADI_UART_WORDLEN;
/*!
*****************************************************************************
* \enum ADI_UART_PARITY
* Enumeration for parity check.
*****************************************************************************/
typedef enum
{
ADI_UART_NO_PARITY = 0x0, /*!< No parity. */
ADI_UART_ODD_PARITY = 0x8, /*!< Odd parity. */
ADI_UART_EVEN_PARITY = 0x18, /*!< Even Parity. */
ADI_UART_ODD_PARITY_STICKY = 0x28, /*!< Sticky odd parity. */
ADI_UART_EVEN_PARITY_STICKY = 0x38 /*!< Sticky even parity. */
} ADI_UART_PARITY;
/*!
*****************************************************************************
* \enum ADI_UART_STOPBITS
* Enumeration for the number of stop bits.
*****************************************************************************/
typedef enum
{
ADI_UART_ONE_STOPBIT = 0x00, /*! One stop bit regardless of the word length */
ADI_UART_ONE_AND_HALF_TWO_STOPBITS = 0x04 /*! Number of stop bits based on word length. 1.5 stop bits
for word length of 5 bits and 2 for rest( 6,7,8 bit word length) */
} ADI_UART_STOPBITS;
/*!
*****************************************************************************
* \enum ADI_UART_TRANSFER_MODE
* Enumeration for data transfer mode.
*****************************************************************************/
typedef enum
{
ADI_UART_DATA_TRANSFER_MODE_NONE, /*! Mode of data transfer is not selected. */
ADI_UART_DATA_TRANSFER_MODE_BLOCKING, /*! Blocking mode. Only calls to adi_uart_Read or adi_uart_write
are allowed for sending or receiving data. */
ADI_UART_DATA_TRANSFER_MODE_NONBLOCKING /*! Non-Blocking mode. Only calls to adi_uart_SubmitRxBuffer or
adi_uart_SubmitTxBuffer are allowed for sending or receiving data. */
} ADI_UART_TRANSFER_MODE;
/******************************************************************************
* UART Device external API function prototypes
*****************************************************************************/
/*
* Device initialization and uninitialization interfaces.
*/
ADI_UART_RESULT adi_uart_Open(
uint32_t const nDeviceNum,
ADI_UART_DIRECTION const eDirection,
void *pMemory,
uint32_t const nMemSize,
ADI_UART_HANDLE *const phDevice
);
ADI_UART_RESULT adi_uart_Close(
ADI_UART_HANDLE const hDevice
);
/******************************************************************************
* Eliminatable functions that may be optimized out by the linker
*****************************************************************************/
/*
* Non-blocking mode functions.
*/
ADI_UART_RESULT adi_uart_SubmitTxBuffer(
ADI_UART_HANDLE const hDevice,
void *const pBuffer,
uint32_t const nBufSize,
bool const bDMA
);
ADI_UART_RESULT adi_uart_SubmitRxBuffer(
ADI_UART_HANDLE const hDevice,
void *const pBuffer,
uint32_t const nBufSize,
bool const bDMA
);
ADI_UART_RESULT adi_uart_GetTxBuffer(
ADI_UART_HANDLE const hDevice,
void **const ppBuffer,
uint32_t *pHwError
);
ADI_UART_RESULT adi_uart_GetRxBuffer(
ADI_UART_HANDLE const hDevice,
void **const ppBuffer,
uint32_t *pHwError
);
ADI_UART_RESULT adi_uart_IsTxBufferAvailable(
ADI_UART_HANDLE const hDevice,
bool *const pbAvailable
);
ADI_UART_RESULT adi_uart_IsRxBufferAvailable(
ADI_UART_HANDLE const hDevice,
bool *const pbAvailable
);
/*
* Blocking mode functions.
*/
ADI_UART_RESULT adi_uart_Write(
ADI_UART_HANDLE const hDevice,
void *const pBuffer,
uint32_t const nBufSize,
bool const bDMA,
uint32_t *pHwError
);
ADI_UART_RESULT adi_uart_Read(
ADI_UART_HANDLE const hDevice,
void *const pBuffer,
uint32_t const nBufSize,
bool const bDMA,
uint32_t *pHwError
);
/*
* Configuration interface functions.
*/
ADI_UART_RESULT adi_uart_EnableLoopBack(
ADI_UART_HANDLE const hDevice,
bool const bEnable
);
ADI_UART_RESULT adi_uart_EnableAutobaud(
ADI_UART_HANDLE const hDevice,
bool const bEnable,
bool const bAutobaudCallbackMode
);
ADI_UART_RESULT adi_uart_SetRxFifoTriggerLevel(
ADI_UART_CONST_HANDLE const hDevice,
ADI_UART_TRIG_LEVEL const eTriglevel
);
ADI_UART_RESULT adi_uart_EnableFifo(
ADI_UART_HANDLE const hDevice,
bool const bEnable
);
ADI_UART_RESULT adi_uart_GetBaudRate(
ADI_UART_HANDLE const hDevice,
uint32_t *pnBaudRate,
uint32_t *pAutobaudError
);
ADI_UART_RESULT adi_uart_ForceTxBreak(
ADI_UART_HANDLE const hDevice,
bool const bEnable
);
ADI_UART_RESULT adi_uart_SetConfiguration(
ADI_UART_HANDLE const hDevice,
ADI_UART_PARITY const eParity,
ADI_UART_STOPBITS const eStopBits,
ADI_UART_WORDLEN const eWordLength
);
ADI_UART_RESULT adi_uart_ConfigBaudRate(
ADI_UART_HANDLE const hDevice,
uint16_t const nDivC,
uint8_t const nDivM,
uint16_t const nDivN,
uint8_t const nOSR
);
/*
* Channel data control functions.
*/
ADI_UART_RESULT adi_uart_FlushTxFifo(
ADI_UART_CONST_HANDLE const hDevice
);
ADI_UART_RESULT adi_uart_FlushRxFifo(
ADI_UART_CONST_HANDLE const hDevice
);
ADI_UART_RESULT adi_uart_FlushRxChannel(
ADI_UART_CONST_HANDLE const hDevice
);
ADI_UART_RESULT adi_uart_FlushTxChannel(
ADI_UART_CONST_HANDLE const hDevice
);
ADI_UART_RESULT adi_uart_IsTxComplete(
ADI_UART_HANDLE const hDevice,
bool *const pbComplete
);
/*
* Callback functions.
*/
ADI_UART_RESULT adi_uart_RegisterCallback(
ADI_UART_HANDLE const hDevice,
const ADI_CALLBACK pfCallback,
void *const pCBParam
);
#ifdef __cplusplus
}
#endif /* __cplusplus */
/*@}*/
#endif /* ADI_UART_H */

77
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/wdt/adi_wdt.h Executable file
View File

@ -0,0 +1,77 @@
/*! *****************************************************************************
* @file adi_wdt.h
* @brief WDT device driver public header
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_WDT_H
#define ADI_WDT_H
#include <adi_callback.h>
/** @addtogroup WDT_Driver WDT Driver
* @{
*/
/*! \enum ADI_WDT_RESULT Watchdog Device Error Codes. */
typedef enum
{
/*! Generic success. */
ADI_WDT_SUCCESS,
/*! Timer is locked. */
ADI_WDT_FAILURE_LOCKED
} ADI_WDT_RESULT;
/******************************************************************************
* PUBLIC API
* 1.) Eliminatable functions that may be optimized out by the linker
* 2.) Ordered by designed function call sequence
*****************************************************************************/
ADI_WDT_RESULT adi_wdt_Enable (bool const bEnable, ADI_CALLBACK const pfCallback);
void adi_wdt_Kick (void);
void adi_wdt_GetCount(uint16_t * const pCurCount);
/*! @} */
#endif /* ADI_WDT_H */

120
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/xint/adi_xint.h Executable file
View File

@ -0,0 +1,120 @@
/*
*****************************************************************************
@file: adi_xint.h
@brief: External interrupt driver definitions and API
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_XINT_H
#define ADI_XINT_H
/*! \addtogroup XINT_Driver External Interrupt Driver
* @{
*/
#ifdef __ICCARM__
#pragma diag_default=Pm008
#endif /* __ICCARM__ */
#include <adi_callback.h>
#include <adi_processor.h>
#if !defined(__ADUCM4x50__)
#error "Unknown processor family"
#endif
/* C++ linkage */
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/*! Amount of memory(in bytes) required by the External Interrupt device driver for its operation.
* This memory is completely owned by the driver till the end of the operation.
*/
#define ADI_XINT_MEMORY_SIZE (48u)
/*! External Interrupt Driver API function return codes */
typedef enum
{
ADI_XINT_SUCCESS = 0, /*!< API successfully returned. */
ADI_XINT_FAILURE, /*!< The API call failed. */
ADI_XINT_ALREADY_INITIALIZED, /*!< External interrupt driver has already been initialized. */
ADI_XINT_NOT_INITIALIZED, /*!< External interrupt driver has not yet been initialized. */
ADI_XINT_NULL_PARAMETER, /*!< The given pointer is pointing to NULL. */
ADI_XINT_INVALID_MEMORY_SIZE, /*!< The given memory is not sufficient to operate the driver. */
ADI_XINT_INVALID_INTERRUPT /*!< Invalid interrupt number. */
} ADI_XINT_RESULT;
/*! External interrupt trigger condition enumerations */
typedef enum {
ADI_XINT_IRQ_RISING_EDGE = 0x0, /*!< Trigger an interrupt when a rising edge is detected. */
ADI_XINT_IRQ_FALLING_EDGE = 0x1, /*!< Trigger an interrupt when on a falling edge is detected. */
ADI_XINT_IRQ_EITHER_EDGE = 0x2, /*!< Trigger an interrupt on either falling or rising edge is detected. */
ADI_XINT_IRQ_HIGH_LEVEL = 0x3, /*!< Trigger an interrupt on a logic level high is detected. */
ADI_XINT_IRQ_LOW_LEVEL = 0x4 /*!< Trigger an interrupt on a logic level low is detected. */
} ADI_XINT_IRQ_MODE;
/*! External interrupts. */
typedef enum {
ADI_XINT_EVENT_INT0 = 0x0, /*!< Event for external interrupt-0 */
ADI_XINT_EVENT_INT1 = 0x1, /*!< Event for external interrupt-1 */
ADI_XINT_EVENT_INT2 = 0x2, /*!< Event for external interrupt-2 */
ADI_XINT_EVENT_INT3 = 0x3, /*!< Event for external interrupt-3 */
ADI_XINT_EVENT_RESERVED = 0x4, /*!< Event is reserved. */
ADI_XINT_EVENT_UART_RX = 0x5, /*!< Event for UART Rx activity */
ADI_XINT_EVENT_MAX = 0x6 /*!< Number of external interrupt events */
} ADI_XINT_EVENT;
/* External Interrupt API functions */
ADI_XINT_RESULT adi_xint_Init (void* const pMemory, uint32_t const MemorySize);
ADI_XINT_RESULT adi_xint_UnInit (void);
ADI_XINT_RESULT adi_xint_EnableIRQ (const ADI_XINT_EVENT eEvent, const ADI_XINT_IRQ_MODE eMode);
ADI_XINT_RESULT adi_xint_DisableIRQ (const ADI_XINT_EVENT eEvent);
ADI_XINT_RESULT adi_xint_RegisterCallback (const ADI_XINT_EVENT eEvent, ADI_CALLBACK const pfCallback, void *const pCBParam );
#ifdef __cplusplus
}
#endif
/**@}*/
#endif /* ADI_XINT_H */

1812
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/flash/adi_flash.c Executable file
View File

File diff suppressed because it is too large Load Diff

116
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/flash/adi_flash_data.c Executable file
View File

@ -0,0 +1,116 @@
/*
*****************************************************************************
* @file: adi_flash_data.c
* @brief: Data declaration for Flash Device Driver
* @date: $Date$
*****************************************************************************
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be consciously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_FEE_DATA_C
#define ADI_FEE_DATA_C
/*! \cond PRIVATE */
#include "adi_flash_def.h"
#include "adi_flash_config.h"
/* Stores the information about the specific device */
static ADI_FEE_DEVICE_INFO fee_device_info [ADI_FEE_NUM_INSTANCES] =
{
/* only one flash instance at this time */
{ pADI_FLCC0, /* Flash controller pointer */
FLCC_EVT_IRQn, /* Flash PIO interrupt number */
DMA0_CH15_DONE_IRQn, /* Flash DMA interrupt number */
FLASH_CHANn, /* Flash DMA channel (15) number */
NULL, /* Flash static config info */
NULL /* Flash driver handle */
},
};
/* build Flash Application configuration array */
static ADI_FEE_CONFIG gConfigInfo[ADI_FEE_NUM_INSTANCES] =
{
/* the one-and-only (so far) instance data for FEE0... */
{
/* ECC interrupt enable settings (IEN register) */
( (ADI_FEE_CFG_ECC_ERROR_RESPONSE << BITP_FLCC_IEN_ECC_ERROR)
| (ADI_FEE_CFG_ECC_CORRECTION_RESPONSE << BITP_FLCC_IEN_ECC_CORRECT)
),
/* timing parameter settings (TIME_PARAM0 register) */
( (ADI_FEE_CFG_PARAM0_TNVH1 << BITP_FLCC_TIME_PARAM0_TNVH1)
| (ADI_FEE_CFG_PARAM0_TERASE << BITP_FLCC_TIME_PARAM0_TERASE)
| (ADI_FEE_CFG_PARAM0_TRCV << BITP_FLCC_TIME_PARAM0_TRCV)
| (ADI_FEE_CFG_PARAM0_TNVH << BITP_FLCC_TIME_PARAM0_TNVH)
| (ADI_FEE_CFG_PARAM0_TPROG << BITP_FLCC_TIME_PARAM0_TPROG)
| (ADI_FEE_CFG_PARAM0_TPGS << BITP_FLCC_TIME_PARAM0_TPGS)
| (ADI_FEE_CFG_PARAM0_TNVS << BITP_FLCC_TIME_PARAM0_TNVS)
| (ADI_FEE_CFG_PARAM0_CLKDIV << BITP_FLCC_TIME_PARAM0_DIVREFCLK)
),
/* more timing parameter settings (TIME_PARAM1 register) */
( (ADI_FEE_CFG_PARAM1_WAITESTATES << BITP_FLCC_TIME_PARAM1_WAITSTATES)
| (ADI_FEE_CFG_PARAM1_TWK << BITP_FLCC_TIME_PARAM1_TWK)
),
/* system interrupt abort enables (ABORT_EN_XX registers) */
(ADI_FEE_CFG_ABORT_EN_LO),
(ADI_FEE_CFG_ABORT_EN_HI),
/* ECC configuration register settings (ECC_CFG register) */
(((ADI_FEE_CFG_ECC_START_PAGE << FEE_PAGE_SHIFT) & BITM_FLCC_ECC_CFG_PTR)
#if (ADI_FEE_CFG_ENABLE_ECC_FOR_INFO_SPACE == 1u)
| (BITM_FLCC_ECC_CFG_INFOEN)
#endif
#if (ADI_FEE_CFG_ENABLE_ECC == 1u)
| (BITM_FLCC_ECC_CFG_EN)
#endif
)
} /* end device 0 settings */
};
/*! \endcond */
#endif /* ADI_FEE_DATA_C */

181
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/flash/adi_flash_def.h Executable file
View File

@ -0,0 +1,181 @@
/*!
*****************************************************************************
@file: adi_flash_def.h
@brief: Internal Flash device driver definitions and macros
@date: $Date: 2014-11-28 01:48:03 -0500 (Fri, 28 Nov 2014) $
-----------------------------------------------------------------------------
Copyright (c) 2012-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_FLASH_DEF_H
#define ADI_FLASH_DEF_H
/*! \cond PRIVATE */
#include <drivers/dma/adi_dma.h>
#include <config/adi_flash_config.h>
#include <drivers/flash/adi_flash.h>
/* fixed number of flash controllers */
#define ADI_FEE_NUM_INSTANCES (1u)
/* STATUS register error mask */
#define ADI_FEE_STATUS_ERROR_MASK ( BITM_FLCC_STAT_ACCESS_MODE \
| BITM_FLCC_STAT_CACHESRAMPERR \
| BITM_FLCC_STAT_ECCDCODE \
| BITM_FLCC_STAT_ECCINFOSIGN \
| BITM_FLCC_STAT_SIGNERR \
| BITM_FLCC_STAT_OVERLAP \
| BITM_FLCC_STAT_ECCRDERR \
| BITM_FLCC_STAT_ECCERRCMD \
| BITM_FLCC_STAT_SLEEPING \
| BITM_FLCC_STAT_CMDFAIL)
#if defined(__ECC__)
#define ALIGN
#define ALIGN4 _Pragma("align(4)")
#elif defined(__ICCARM__)
#define ALIGN _Pragma("pack()")
#define ALIGN4 _Pragma("pack(4)")
#elif defined (__GNUC__)
#define ALIGN _Pragma("pack()")
#define ALIGN4 _Pragma("pack(4)")
#endif
/* Flash Size and Page/Block macros:
512kB total user space, broken up as
256-pages, 2kB/page
32-blocks, 16kB/block
8 pages/block
*/
#define FEE_FLASH_SIZE (0x80000u) /* 512kB total */
#define FEE_PAGE_SHIFT (11u) /* 2kB page size */
#define FEE_BLOCK_SHIFT (14u) /* 16kB block size */
#define FEE_MAX_NUM_PAGES (FEE_FLASH_SIZE >> FEE_PAGE_SHIFT) /* max number of pages (256) */
#define FEE_MAX_NUM_BLOCKS (FEE_FLASH_SIZE >> FEE_BLOCK_SHIFT) /* max number of blocks (32) */
#if (ADI_FEE_CFG_ECC_START_PAGE >= FEE_MAX_NUM_PAGES)
#error "ADI_FEE_CFG_ECC_START_PAGE range is invalid"
#endif
/* INTERNAL DRIVER STATIC FUNCTION PROTOTYPES */
/* Send a command to the flash controller, but does no pend on it... */
static ADI_FEE_RESULT SendCommand (ADI_FEE_HANDLE const hDevice, uint32_t const cmd);
/* generic transfer initiator... dispatches to InitiatePioTransfer() or InitiateDmaTransfer() */
static ADI_FEE_RESULT InitiateTransfer (ADI_FEE_HANDLE const hDevice);
/* PIO initiator */
static ADI_FEE_RESULT InitiatePioTransfer (ADI_FEE_HANDLE const hDevice);
/* DMA initiator */
static ADI_FEE_RESULT InitiateDmaTransfer (ADI_FEE_HANDLE const hDevice);
/* interrupt handlers */
void Flash0_Int_Handler(void);
void DMA_FLASH0_Int_Handler (void);
/* INTERNAL DRIVER DATATYPES */
/*
*****************************************************************************
* FEE Configuration structure.
*****************************************************************************/
typedef struct __ADI_FEE_CONFIG {
uint32_t eccIrqEnables; /* ECC interrupt enables. */
uint32_t param0; /* TIME_PARAM0 register. */
uint32_t param1; /* TIME_PARAM1 register. */
uint32_t abortEnableLo; /* Lower interrupt abort enables (IRQs 0-31). */
uint32_t abortEnableHi; /* Upper interrupt abort enables (IRQs 32-63.) */
uint32_t eccConfig; /* ECC_CFG register. */
} ADI_FEE_CONFIG;
/* Flash physical device instance data */
typedef struct __ADI_FEE_DEVICE_INFO {
ADI_FLCC_TypeDef *pDev; /* Pointer to the physical controller. */
IRQn_Type pioIrqNum; /* The flash controller PIO interrupt number. */
IRQn_Type dmaIrqNum; /* The flash controller DMA interrupt number. */
DMA_CHANn_TypeDef dmaChanNum; /* The flash controller DMA channel number. */
ADI_FEE_CONFIG *pConfig; /* Pointer to user config info. */
ADI_FEE_HANDLE hDevice; /* Pointer the device memory (supplied by the application). */
} ADI_FEE_DEVICE_INFO;
/* Flash driver instance data structure */
typedef struct __ADI_FEE_DEV_DATA_TYPE {
/* make sure to synchronize ANY size changes with ADI_FLASH_MEMORY_SIZE macro in adi_flash.h */
/* NOTE: "volatile" storage class on all interrupt-modified valuables */
/* device attributes */
ADI_FLCC_TypeDef *pDev; /* Pointer top physical flash controller. */
ADI_FEE_DEVICE_INFO *pDevInfo; /* Pointer to hardware device attributes. */
/* callback info */
ADI_CALLBACK pfCallback; /* Registered callback function address. */
void *pCBParam; /* Registered callback user parameter. */
/* internal driver state variables */
bool bUseDma; /* DMA control flag (from user). */
bool bSubmitCalled; /* Flag to identify if a buffer was "submitted". */
volatile uint32_t FlashStatusCopy; /* Clop of latest flash status register. */
volatile uint32_t feeError; /* Flash error collector. */
volatile ADI_FEE_RESULT dmaError; /* DMA error collector. */
volatile bool bTransferInProgress; /* Flag indicating if a transfer is in progress. */
/* data info */
volatile uint32_t *pNextWriteAddress; /* Pointer to next write data in flash space. */
volatile uint32_t *pNextReadAddress; /* Pointer to next read data in user buffer. */
volatile uint32_t nRemainingBytes; /* Number of remaining bytes still to transfer. */
SEM_VAR_DECLR /* Blocking object: "Semaphore" for rtos, "bLowPowerExitFlag" for non-rtos. */
} ADI_FEE_DEV_DATA_TYPE;
/*! \endcond */
#endif /* ADI_FLASH_DEF_H */

975
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/gpio/adi_gpio.c Executable file
View File

@ -0,0 +1,975 @@
/*
*****************************************************************************
@file: adi_gpio.c
@brief: GPIO device driver implementation.
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*****************************************************************************/
#include <stddef.h>
#include <string.h>
#include <assert.h>
#include <drivers/gpio/adi_gpio.h>
#include <rtos_map/adi_rtos_map.h>
#include "adi_gpio_def.h"
#ifdef __ICCARM__
/*
* IAR MISRA C 2004 error suppressions.
*
* Pm123 (rule 8.5): there shall be no definition of objects or functions in a header file
* This isn't a header as such.
*
* Pm073 (rule 14.7): a function should have a single point of exit
* Pm143 (rule 14.7): a function should have a single point of exit at the end of the function
* Multiple returns are used for error handling.
*
* Pm140 (rule 11.3): a cast should not be performed between a pointer type and an integral type
* The rule makes an exception for memory-mapped register accesses.
*/
#pragma diag_suppress=Pm123,Pm073,Pm143,Pm140
#endif /* __ICCARM__ */
/* Debug function declarations */
#ifdef ADI_DEBUG
static bool ArePinsValid (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins); /*!< tests for pins validity */
#endif /* ADI_DEBUG */
static void CommonInterruptHandler (const ADI_GPIO_IRQ_INDEX index, const IRQn_Type eIrq);
void GPIO_A_Int_Handler(void);
void GPIO_B_Int_Handler(void);
/*========== D A T A ==========*/
static ADI_GPIO_DRIVER adi_gpio_Device =
{
{
pADI_GPIO0, /* port 0 base address */
pADI_GPIO1, /* port 1 base address */
pADI_GPIO2, /* port 2 base address */
pADI_GPIO3, /* port 3 base address */
},
NULL
};
/*! \endcond */
/*! \addtogroup GPIO_Driver GPIO Driver
* @{
@brief GPIO port and pin identifiers
@note The application must include drivers/gpio/adi_gpio.h to use this driver
@details The documented macros can be passed to the following functions:
- adi_gpio_OutputEnable()
- adi_gpio_PullUpEnable()
- adi_gpio_SetHigh()
- adi_gpio_SetLow()
- adi_gpio_Toggle()
- adi_gpio_SetData()
- adi_gpio_GetData()
To control a single GPIO, these macros can be passed to the functions one
at a time. For example, to set the GPIO on port 2, pin 4 to a logical high
level, the following is used:
<pre>
adi_gpio_SetHigh(ADI_GPIO_PORT2, ADI_GPIO_PIN_4)
</pre>
Multiple GPIOs, so long as they reside on the same port, can be controlled
simultaneously. These macros can be OR-ed together and passed to the
functions. For example, to set the GPIOs on port 2, pins 3, 4 and 7 to
a logical low level, the following is used:
<pre>
adi_gpio_SetLow(ADI_GPIO_PORT2, ADI_GPIO_PIN_3 | ADI_GPIO_PIN_4 | ADI_GPIO_PIN_7)
</pre>
For the sensing, or adi_gpio_Getxxx, functions, the passed pValue parameter is written with
a packed value containing the status of the requested GPIO pins on the given port.
If information is required for a single pin, return value can be directly used
For example to see if pin 4 on port 2 has the pull up enabled, the following is used:
adi_gpio_GetData(ADI_GPIO_PORT2, ADI_GPIO_PIN_4, &pValue)
pValue will contain the required information.
If information is required for multiple pins, following method is required:
<pre>
adi_gpio_GetData(ADI_GPIO_PORT2, (ADI_GPIO_PIN_3 | ADI_GPIO_PIN_4 | ADI_GPIO_PIN_7), &pValue)
</pre>
To test if pin 4 on port 2 has pull up enabled, the following is used:
<pre>
if (pValue & ADI_GPIO_PIN_4) {
the pull up is enabled for pin 4 on port 2
} else {
the pull up is disabled for pin 4 on port 2
}
</pre>
*/
/*!
@brief Initializes the GPIO functions.
@details This function initializes the GPIO driver. This function should be called before calling any of the GPIO
driver APIs.
@param[in] pMemory Pointer to the memory required for the driver to operate.
The size of the memory should be at least #ADI_GPIO_MEMORY_SIZE bytes.
@param[in] MemorySize Size of the memory (in bytes) passed in pMemory parameter.
@return Status
- ADI_GPIO_SUCCESS If successfully initialized the GPIO driver.
- ADI_GPIO_NULL_PARAMETER [D] If the given pointer to the driver memory is pointing to NULL.
- ADI_GPIO_INVALID_MEMORY_SIZE [D] If the given memory size is not sufficient to operate the driver.
@note This function clears memory reserved for managing the callback function when it is called
for the first time. It is expected from user to call "adi_gpio_UnInit" function when the GPIO service is no longer required.
@sa adi_gpio_UnInit
*/
ADI_GPIO_RESULT adi_gpio_Init(
void* const pMemory,
uint32_t const MemorySize
)
{
#ifdef ADI_DEBUG
/* Verify the given memory pointer */
if(NULL == pMemory)
{
return ADI_GPIO_NULL_PARAMETER;
}
/* Check if the memory size is sufficient to operate the driver */
if(MemorySize < ADI_GPIO_MEMORY_SIZE)
{
return ADI_GPIO_INVALID_MEMORY_SIZE;
}
assert(ADI_GPIO_MEMORY_SIZE == sizeof(ADI_GPIO_DEV_DATA));
#endif
/* Only initialize on 1st init call, i.e., preserve callbacks on multiple inits */
if (NULL == adi_gpio_Device.pData)
{
uint32_t i;
adi_gpio_Device.pData = (ADI_GPIO_DEV_DATA*)pMemory;
/* Initialize the callback table */
for (i = 0u; i < ADI_GPIO_NUM_INTERRUPTS; i++)
{
adi_gpio_Device.pData->CallbackTable[i].pfCallback = NULL;
adi_gpio_Device.pData->CallbackTable[i].pCBParam = NULL;
}
/* Enable the group interrupts */
NVIC_EnableIRQ(SYS_GPIO_INTA_IRQn);
NVIC_EnableIRQ(SYS_GPIO_INTB_IRQn);
}
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Un-initialize the GPIO driver.
@details Terminates the GPIO functions, leaving everything unchanged.
@return Status
- #ADI_GPIO_SUCCESS if successfully uninitialized
- #ADI_GPIO_NOT_INITIALIZED [D] if not yet initialized
@sa adi_gpio_Init
*/
ADI_GPIO_RESULT adi_gpio_UnInit(void)
{
#ifdef ADI_DEBUG
/* IF (not initialized) */
if (NULL == adi_gpio_Device.pData)
{
/* return error if not initialized */
return (ADI_GPIO_NOT_INITIALIZED);
}
#endif
/* Clear the data pointer */
adi_gpio_Device.pData = NULL;
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Group the pins for the given group interrupt.
@details Group the given pins for the Group A/B interrupt.
Applications can register/unregister a callback using the #adi_gpio_RegisterCallback API
to get a notification when the group interrupt occurs.
@param[in] Port GPIO port number to be operated on.
@param[in] eIrq Interrupt (Group A/B) to which the pin(s) are to be grouped.
@param[in] Pins The GPIO pins which needs to be grouped.
Pin bits that are set enable the interrupt for the group A/B.
Pin bits that are clear disable the interrupt for the group A/B.
@return Status
- #ADI_GPIO_SUCCESS If successfully grouped the given pins.
- #ADI_GPIO_NOT_INITIALIZED [D] If GPIO driver is not yet initialized.
- #ADI_GPIO_INVALID_PINS [D] The given pins are invalid.
@sa adi_gpio_RegisterCallback
@sa adi_gpio_SetGroupInterruptPolarity
*/
ADI_GPIO_RESULT adi_gpio_SetGroupInterruptPins(const ADI_GPIO_PORT Port, const ADI_GPIO_IRQ eIrq, const ADI_GPIO_DATA Pins)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
ADI_INT_STATUS_ALLOC();
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData)
{
return (ADI_GPIO_NOT_INITIALIZED);
}
/* validate the pins */
if (!ArePinsValid(Port, Pins))
{
return (ADI_GPIO_INVALID_PINS);
}
#endif
pPort = adi_gpio_Device.pReg[Port];
ADI_ENTER_CRITICAL_REGION();
switch (eIrq)
{
case SYS_GPIO_INTA_IRQn:
pPort->IENA = Pins;
break;
case SYS_GPIO_INTB_IRQn:
pPort->IENB = Pins;
break;
default:
break; /* This shall never reach */
}
ADI_EXIT_CRITICAL_REGION();
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Set the interrupt polarity for the given pins.
@details Sets the interrupt polarity for the given pins for the given port.
When the corresponding bit is set an interrupt is generated when the pin transitions from low-to-high. When the corresponding bit is cleared an interrupt is generated when the pin transitions from high-to-low.
@param[in] Port GPIO port number to be operated on.
@param[in] Pins Pins whose polarity to be set.
@return Status
- #ADI_GPIO_SUCCESS If successfully set the polarity.
- #ADI_GPIO_NOT_INITIALIZED [D] If not yet initialized.
- #ADI_GPIO_INVALID_PINS [D] If the given pins are invalid.
@sa adi_gpio_RegisterCallback
@sa adi_gpio_SetGroupInterruptPins
*/
ADI_GPIO_RESULT adi_gpio_SetGroupInterruptPolarity(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData)
{
return (ADI_GPIO_NOT_INITIALIZED);
}
/* validate the pins */
if (!ArePinsValid(Port, Pins))
{
return (ADI_GPIO_INVALID_PINS);
}
#endif
pPort = adi_gpio_Device.pReg[Port];
pPort->POL = Pins;
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Enables/Disables the Output Drivers for GPIO Pin(s)
@details Enables/disables the output drivers for the given GPIO pin(s) on
the given port.
@param[in] Port The GPIO port to be configured.
@param[in] Pins One or more GPIO pins to be configured. GPIO
pins can be passed one at a time or in combination. To
configure a single GPIO pin, a single GPIO value is
passed for this parameter. For example, #ADI_GPIO_PIN_4.
Alternatively, multiple GPIO pins can be configured
simultaneously by OR-ing together GPIO pin values and
passing the resulting value for this parameter. For
example, #ADI_GPIO_PIN_0 | #ADI_GPIO_PIN_5 | #ADI_GPIO_PIN_6.
@param[in] bFlag Boolean value describing the action to be taken
- true enables the output driver
- false disables the output driver
@return Status
- #ADI_GPIO_SUCCESS If successfully configured
- #ADI_GPIO_NOT_INITIALIZED [D] If GPIO driver not yet initialized.
- #ADI_GPIO_INVALID_PINS [D] If the given pins are invalid.
*/
ADI_GPIO_RESULT adi_gpio_OutputEnable(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins, const bool bFlag)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
ADI_INT_STATUS_ALLOC();
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData)
{
return (ADI_GPIO_NOT_INITIALIZED);
}
/* validate the pins */
if (!ArePinsValid(Port, Pins))
{
return (ADI_GPIO_INVALID_PINS);
}
#endif
pPort = adi_gpio_Device.pReg[Port];
ADI_ENTER_CRITICAL_REGION();
if (bFlag)
{
/* enable output */
pPort->OEN |= Pins;
} else
{
/* disable output */
pPort->OEN &= (uint16_t)~Pins;
}
ADI_EXIT_CRITICAL_REGION();
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Enables/Disables the Input Drivers for GPIO Pin(s)
@details Enables/disables the input drivers for the given GPIO pin(s) on
the given port.
@param[in] Port The GPIO port to be configured.
@param[in] Pins One or more GPIO pins to be configured. GPIO
pins can be passed one at a time or in combination. To
configure a single GPIO pin, a single GPIO value is
passed for this parameter. For example, #ADI_GPIO_PIN_4.
Alternatively, multiple GPIO pins can be configured
simultaneously by OR-ing together GPIO pin values and
passing the resulting value for this parameter. For
example, #ADI_GPIO_PIN_0 | #ADI_GPIO_PIN_5 | #ADI_GPIO_PIN_6.
@param[in] bFlag Boolean value describing the action to be taken
- true enables the input driver
- false disables the input driver
@return Status
- #ADI_GPIO_SUCCESS If successfully configured.
- #ADI_GPIO_NOT_INITIALIZED [D] If GPIO driver not yet initialized.
- #ADI_GPIO_INVALID_PINS [D] If the given pins are invalid.
*/
ADI_GPIO_RESULT adi_gpio_InputEnable(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins, const bool bFlag)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
ADI_INT_STATUS_ALLOC();
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData) {
return (ADI_GPIO_NOT_INITIALIZED);
}
/* validate the pins */
if (!ArePinsValid(Port, Pins)) {
return (ADI_GPIO_INVALID_PINS);
}
#endif
pPort = adi_gpio_Device.pReg[Port];
ADI_ENTER_CRITICAL_REGION();
if (bFlag)
{
/* enable input */
pPort->IEN |= Pins;
} else
{
/* disable input */
pPort->IEN &= (uint16_t)~Pins;
}
ADI_EXIT_CRITICAL_REGION();
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Enables/Disables the Pull-Up for GPIO Pin(s)
@details Enables/disables the internal pull-up for the given GPIO pin(s) on
the given port. API simply enables/disables whatever the hard-wired
pulls (up/down) are.
@param[in] Port The GPIO port to be configured.
@param[in] Pins One or more GPIO pins to be configured. GPIO
pins can be passed one at a time or in combination. To
configure a single GPIO pin, a single GPIO value is
passed for this parameter. For example, #ADI_GPIO_PIN_4.
Alternatively, multiple GPIO pins can be configured
simultaneously by OR-ing together GPIO pin values and
passing the resulting value for this parameter. For
example, #ADI_GPIO_PIN_0 | #ADI_GPIO_PIN_5 | #ADI_GPIO_PIN_6.
@param[in] bFlag Boolean value describing the action to be taken
- true enables the pull-up
- false disables the pull-up
@return Status
- #ADI_GPIO_SUCCESS If successfully configured.
- #ADI_GPIO_NOT_INITIALIZED [D] If GPIO driver not yet initialized.
- #ADI_GPIO_INVALID_PINS [D] If the given pins are invalid.
*/
ADI_GPIO_RESULT adi_gpio_PullUpEnable(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins, const bool bFlag)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
ADI_INT_STATUS_ALLOC();
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData)
{
return (ADI_GPIO_NOT_INITIALIZED);
}
/* validate the pins */
if (!ArePinsValid(Port, Pins))
{
return (ADI_GPIO_INVALID_PINS);
}
#endif
pPort = adi_gpio_Device.pReg[Port];
ADI_ENTER_CRITICAL_REGION();
if (bFlag)
{
pPort->PE |= Pins;
} else
{
pPort->PE &= (uint16_t)(~Pins);
}
ADI_EXIT_CRITICAL_REGION();
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Sets the Given GPIO pin(s) to a Logical High Level
@details Sets the given GPIO pin(s) on the given port to a logical high
level.
@param[in] Port GPIO port whose pins need to be set to logical high level.
@param[in] Pins One or more GPIO pins to be set to logical high. GPIO
pins can be passed one at a time or in combination. To
configure a single GPIO pin, a single GPIO value is
passed for this parameter. For example, #ADI_GPIO_PIN_4.
Alternatively, multiple GPIO pins can be configured
simultaneously by OR-ing together GPIO pin values and
passing the resulting value for this parameter. For
example, #ADI_GPIO_PIN_0 | #ADI_GPIO_PIN_5 | #ADI_GPIO_PIN_6.
@return Status
- #ADI_GPIO_SUCCESS If successfully configured.
- #ADI_GPIO_NOT_INITIALIZED [D] If GPIO driver not yet initialized.
- #ADI_GPIO_INVALID_PINS [D] If the given pins are invalid.
@sa adi_gpio_SetLow, adi_gpio_Toggle, adi_gpio_SetData, adi_gpio_GetData
*/
ADI_GPIO_RESULT adi_gpio_SetHigh(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData)
{
return (ADI_GPIO_NOT_INITIALIZED);
}
/* validate the pins */
if (!ArePinsValid(Port, Pins))
{
return (ADI_GPIO_INVALID_PINS);
}
#endif
pPort = adi_gpio_Device.pReg[Port];
/* set the given GPIOs high */
pPort->SET = Pins;
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Sets the Given GPIO pin(s) to a Logical Low Level
@details Sets the given GPIO pin(s) on the given port to a logical low
level.
@param[in] Port The GPIO port whose pins need to be set to logical low level.
@param[in] Pins One or more GPIO pins to be whose logic level to be set. GPIO
pins can be passed one at a time or in combination. To
configure a single GPIO pin, a single GPIO value is
passed for this parameter. For example, #ADI_GPIO_PIN_4.
Alternatively, multiple GPIO pins can be configured
simultaneously by OR-ing together GPIO pin values and
passing the resulting value for this parameter. For
example, #ADI_GPIO_PIN_0 | #ADI_GPIO_PIN_5 | #ADI_GPIO_PIN_6.
@return Status
- #ADI_GPIO_SUCCESS If successfully configured.
- #ADI_GPIO_NOT_INITIALIZED [D] If GPIO driver not yet initialized.
- #ADI_GPIO_INVALID_PINS [D] If the given pins are invalid.
@sa adi_gpio_SetHigh, adi_gpio_Toggle, adi_gpio_SetData, adi_gpio_GetData
*/
ADI_GPIO_RESULT adi_gpio_SetLow(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData)
{
return (ADI_GPIO_NOT_INITIALIZED);
}
/* validate the pins */
if (!ArePinsValid(Port, Pins))
{
return (ADI_GPIO_INVALID_PINS);
}
#endif
pPort = adi_gpio_Device.pReg[Port];
/* set the given GPIOs low */
pPort->CLR = Pins;
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Toggles the Logical Level of the Given GPIO pin(s)
@details Toggles the logical level of the given GPIO pin(s) on the given port.
If a given GPIO pin is at a logical low level, this function will
change the level to a logical high value. If a given GPIO pin is
at a logical high level, this function will change the level to a
logical low value.
@param[in] Port The GPIO port whose pins to be toggled.
@param[in] Pins The GPIO pins whose logic level to be toggled. GPIO
pins can be passed one at a time or in combination. To
configure a single GPIO pin, a single GPIO value is
passed for this parameter. For example, #ADI_GPIO_PIN_4.
Alternatively, multiple GPIO pins can be configured
simultaneously by OR-ing together GPIO pin values and
passing the resulting value for this parameter. For
example, #ADI_GPIO_PIN_0 | #ADI_GPIO_PIN_5 | #ADI_GPIO_PIN_6.
@return Status
- #ADI_GPIO_SUCCESS If successfully configured.
- #ADI_GPIO_NOT_INITIALIZED [D] If GPIO driver not yet initialized.
- #ADI_GPIO_INVALID_PINS [D] If the given pins are invalid.
@sa adi_gpio_SetHigh, adi_gpio_SetLow, adi_gpio_SetData, adi_gpio_GetData
*/
ADI_GPIO_RESULT adi_gpio_Toggle(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData)
{
return (ADI_GPIO_NOT_INITIALIZED);
}
/* validate the pins */
if (!ArePinsValid(Port, Pins))
{
return (ADI_GPIO_INVALID_PINS);
}
#endif
pPort = adi_gpio_Device.pReg[Port];
/* toggle the given GPIOs */
pPort->TGL = Pins;
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Sets the logic level of all GPIO pins on the given port to
a given logic level.
@details Sets the logic level of all the GPIO pins on the given port to the
given value.
@param[in] Port The GPIO port whose pins logic level to be set.
@param[in] Pins The GPIO pins whose logic level to be set high. All other
GPIO pins on the port will be set to a logical low level.
For example, to set pins 0 and 1 to a logical high level and
all other pins to a logical low level, this parameter should
be passed as #ADI_GPIO_PIN_0 | #ADI_GPIO_PIN_1.
@return Status
- #ADI_GPIO_SUCCESS If successfully set the given data.
- #ADI_GPIO_NOT_INITIALIZED [D] If GPIO driver not yet initialized.
- #ADI_GPIO_INVALID_PINS [D] If the given pins are invalid.
@sa adi_gpio_SetHigh, adi_gpio_SetLow, adi_gpio_Toggle, adi_gpio_GetData
*/
ADI_GPIO_RESULT adi_gpio_SetData(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData)
{
return (ADI_GPIO_NOT_INITIALIZED);
}
/* validate the pins */
if (!ArePinsValid(Port, Pins))
{
return (ADI_GPIO_INVALID_PINS);
}
#endif
pPort = adi_gpio_Device.pReg[Port];
/* set the GPIOs as directed */
pPort->OUT = Pins;
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Gets/Senses the input level of all GPIO Pins on the given port.
@details Gets the level of all GPIO input pins on the given port.
@param[in] Port The GPIO port whose input level to be sensed.
@param[in] Pins The GPIO pins to be sensed. To sense a single GPIO pin, a single
GPIO value is passed for this parameter. For example, #ADI_GPIO_PIN_4.
Alternatively, multiple GPIO pins can be configured
simultaneously by OR-ing together GPIO pin values and
passing the resulting value for this parameter. For
example, #ADI_GPIO_PIN_0 | #ADI_GPIO_PIN_5 | #ADI_GPIO_PIN_6.
@param[out] pValue The passed pValue parameter is written with a packed value containing
the status of all the requested GPIO pins on the given port.
To get the status of a single GPIO pin, return value can be directly used.
For example to see if pin 4 on port 2 is a logical high level, the following is used:
<pre>
adi_gpio_GetData(#ADI_GPIO_PORT2, #ADI_GPIO_PIN_4, &pValue)
</pre>
pValue will contain the required information.
If information is required for multiple pins, following method is required:
<pre>
adi_gpio_GetData(#ADI_GPIO_PORT2, (#ADI_GPIO_PIN_3 | #ADI_GPIO_PIN_4 | #ADI_GPIO_PIN_7), &pValue)
</pre>
To test if pin 4 on port 2 is a logical high level, the following is used:
<pre>
if (pValue & ADI_GPIO_PIN_4) {
pin 4 on port 2 is a logical high value
} else {
pin 4 on port 2 is a logical low value
}
</pre>
@return Status
- #ADI_GPIO_SUCCESS If successfully sensed the input pins.
- #ADI_GPIO_NOT_INITIALIZED [D] If GPIO driver not yet initialized.
- #ADI_GPIO_INVALID_PINS [D] If the given pins are invalid.
@sa adi_gpio_SetHigh, adi_gpio_SetLow, adi_gpio_Toggle, adi_gpio_SetData
*/
ADI_GPIO_RESULT adi_gpio_GetData (const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins, uint16_t* const pValue)
{
ADI_GPIO_TypeDef *pPort; /* pointer to port registers */
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData)
{
return (ADI_GPIO_NOT_INITIALIZED);
}
/* validate the pins */
if (!ArePinsValid(Port, Pins))
{
return (ADI_GPIO_INVALID_PINS);
}
#endif
pPort = adi_gpio_Device.pReg[Port];
/* return the status of the GPIOs */
*pValue = (pPort->IN) & Pins;
return (ADI_GPIO_SUCCESS);
}
/*!
@brief Register or unregister an application callback function for group (A/B) interrupts.
@details Applications may register a callback function that will be called when a
GPIO group (A/B) interrupt occurs.
The driver dispatches calls to registered callback functions when the
properly configured pin(s) latches an external interrupt input on the GPIO
pin(s). The callback is dispatched with the following parameters, respectively:
- application-provided callback parameter (\a pCBParam),
- The GPIO Port,
- The GPIO Pins.
@param[in] eIrq The interrupt for which the callback is being registered.
@param[in] pfCallback Pointer to the callback function. This can be passed as NULL to
unregister the callback.
@param[in] pCBParam Callback parameter which will be passed back to the application
when the callback is called..
@return Status
- #ADI_GPIO_SUCCESS if successfully registered the callback.
- #ADI_GPIO_NOT_INITIALIZED [D] if not yet initialized
- #ADI_GPIO_INVALID_INTERRUPT [D] if interrupt ID is invalid
@sa adi_gpio_SetGroupInterruptPolarity
*/
ADI_GPIO_RESULT adi_gpio_RegisterCallback (const ADI_GPIO_IRQ eIrq, ADI_CALLBACK const pfCallback, void *const pCBParam )
{
uint16_t index = 0u;
ADI_INT_STATUS_ALLOC();
#ifdef ADI_DEBUG
/* make sure we're initialized */
if (NULL == adi_gpio_Device.pData)
{
return (ADI_GPIO_NOT_INITIALIZED);
}
#endif
index = (uint16_t)eIrq - (uint16_t)SYS_GPIO_INTA_IRQn + ADI_GPIO_IRQ_GROUPA_INDEX;
ADI_ENTER_CRITICAL_REGION();
adi_gpio_Device.pData->CallbackTable[index].pfCallback = pfCallback;
adi_gpio_Device.pData->CallbackTable[index].pCBParam = pCBParam;
ADI_EXIT_CRITICAL_REGION();
/* return the status */
return (ADI_GPIO_SUCCESS);
}
/*@}*/
/*! \cond PRIVATE */
/* All of the following is excluded from the doxygen output... */
/* Common group (A/B) interrupt handler */
static void CommonInterruptHandler(const ADI_GPIO_IRQ_INDEX index, const IRQn_Type eIrq)
{
ADI_GPIO_PORT Port;
ADI_GPIO_TypeDef *pPort;
ADI_GPIO_DATA Pins;
ADI_GPIO_DATA nIntEnabledPins;
ADI_GPIO_CALLBACK_INFO *pCallbackInfo = &adi_gpio_Device.pData->CallbackTable[index];
/* Loop over all the ports. */
for(Port=ADI_GPIO_PORT0; Port<ADI_GPIO_NUM_PORTS; Port++)
{
pPort = adi_gpio_Device.pReg[Port];
/* Is the interrupt is for GROUP A */
if(SYS_GPIO_INTA_IRQn == eIrq)
{
nIntEnabledPins = pPort->IENA;
}
else /* Is the interrupt is for GROUP B */
{
nIntEnabledPins = pPort->IENB;
}
/* Clear only required interrupts */
Pins = ((pPort->INT) & nIntEnabledPins);
pPort->INT = Pins;
/* params list is: application-registered cbParam, Port number, and interrupt status */
if((pCallbackInfo->pfCallback != NULL) && (Pins != 0u))
{
pCallbackInfo->pfCallback (pCallbackInfo->pCBParam, (uint32_t)Port, &Pins);
}
}
}
/* Interrupt A handler */
void GPIO_A_Int_Handler(void)
{
ISR_PROLOG()
CommonInterruptHandler(ADI_GPIO_IRQ_GROUPA_INDEX, SYS_GPIO_INTA_IRQn);
ISR_EPILOG()
}
/* Interrupt B handler */
void GPIO_B_Int_Handler (void)
{
ISR_PROLOG()
CommonInterruptHandler(ADI_GPIO_IRQ_GROUPB_INDEX, SYS_GPIO_INTB_IRQn);
ISR_EPILOG()
}
#ifdef ADI_DEBUG
/*!
@brief Tests a Pins Parameter for Validity
@details A debug function that checks a Pins parameter for validity
@param[in] Pins Logical OR-ing of one or more ADI_GPIO_PIN_x values
@return Status
- true the Pins value contains valid data
- false the Pins value contains invalid data
*/
static bool ArePinsValid(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins)
{
uint32_t PinValid = 0u;
/* test for a valid pin */
switch (Port)
{
case ADI_GPIO_PORT0:
PinValid = ~ADI_GPIO_PORT0_PIN_AVL & Pins;
break;
case ADI_GPIO_PORT1:
PinValid = ~ADI_GPIO_PORT1_PIN_AVL & Pins;
break;
case ADI_GPIO_PORT2:
PinValid = ~ADI_GPIO_PORT2_PIN_AVL & Pins;
break;
case ADI_GPIO_PORT3:
PinValid = ~ADI_GPIO_PORT3_PIN_AVL & Pins;
break;
default:
break;
}
if (PinValid == 0u)
{
return true;
}
else
{
return false;
}
}
#endif /* ADI_DEBUG */
/*! \endcond */
/*
** EOF
*/

94
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/gpio/adi_gpio_def.h Executable file
View File

@ -0,0 +1,94 @@
/*!
*****************************************************************************
* @file: adi_gpio_def.h
* @brief: GPIO Device Driver definition
*****************************************************************************
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_GPIO_DEF_H
#define ADI_GPIO_DEF_H
/*! \cond PRIVATE */
/*! local enum for callback table indexing */
typedef enum
{
/* Group interrupts */
ADI_GPIO_IRQ_GROUPA_INDEX = (0x0), /*!< GroupA interrupt index. */
ADI_GPIO_IRQ_GROUPB_INDEX = (0x1), /*!< GroupB interrupt index. */
ADI_GPIO_NUM_INTERRUPTS = (0x2), /*!< Number of GPIO interrupts */
} ADI_GPIO_IRQ_INDEX;
/*! Structure to hold callback function and parameter */
typedef struct _ADI_GPIO_CALLBACK_INFO
{
ADI_CALLBACK pfCallback; /*!< Callback function pointer */
void *pCBParam; /*!< Callback parameter */
} ADI_GPIO_CALLBACK_INFO;
/*! Structure to hold callback function and parameter */
typedef struct _ADI_GPIO_DEV_DATA
{
ADI_GPIO_CALLBACK_INFO CallbackTable[ADI_GPIO_NUM_INTERRUPTS]; /*!< Callback Info for External interrupts */
} ADI_GPIO_DEV_DATA;
/*! \struct ADI_GPIO_DEVICE
GPIO instance data
This structure contains the "state" information for the
instance of the device. For GPIO there is only one
of these objects.
*/
typedef struct _ADI_GPIO_DRIVER_STRUCT
{
ADI_GPIO_TypeDef *pReg[ADI_GPIO_NUM_PORTS]; /*!< GPIO Ports Register base */
ADI_GPIO_DEV_DATA *pData; /*!< Pointer to device data */
} ADI_GPIO_DRIVER_STRUCT;
/* alias for the actual device structure */
typedef ADI_GPIO_DRIVER_STRUCT ADI_GPIO_DRIVER;
/*! \endcond */
#endif /* ADI_GPIO_DEF_H */

1169
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/i2c/adi_i2c.c Executable file
View File

File diff suppressed because it is too large Load Diff

120
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/i2c/adi_i2c_data.c Executable file
View File

@ -0,0 +1,120 @@
/*
*****************************************************************************
* @file: adi_i2c_data.c
* @brief: Data declaration for I2C Device Driver
*****************************************************************************
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be coni2ccuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_I2C_DATA_C
#define ADI_I2C_DATA_C
/*! \cond PRIVATE */
#include "adi_i2c_def.h"
#include "adi_i2c_config.h"
/* Stores the information about the specific device */
static ADI_I2C_DEVICE_INFO i2c_device_info [ADI_I2C_NUM_INSTANCES] =
{
/* fixed instance data for the singular I2C0 controller */
{
I2C_MST_EVT_IRQn, /* pio interrupt number */
(ADI_I2C_TypeDef *)pADI_I2C0, /* i2c controller pointer */
NULL, /* pointer to user config data */
NULL /* i2c device handle (user mem) */
},
/* no other i2c instances at this time */
};
/* build I2C Application configuration array */
static ADI_I2C_CONFIG gConfigInfo[ADI_I2C_NUM_INSTANCES] =
{
/* the one-and-only (so far) instance data for I2C, I2C0... */
{
/**** I2C_MCTL Master Control register *** */
(
/* note: Master IENMTX and IENMRX (transmit and receive interrupts) are managed dynamically */
( ADI_I2C_CFG_MCTL_MXMITDEC << BITP_I2C_MCTL_MXMITDEC ) |
( ADI_I2C_CFG_MCTL_IENCMP << BITP_I2C_MCTL_IENCMP ) |
( ADI_I2C_CFG_MCTL_IENACK << BITP_I2C_MCTL_IENACK ) |
( ADI_I2C_CFG_MCTL_IENALOST << BITP_I2C_MCTL_IENALOST ) |
( ADI_I2C_CFG_MCTL_STRETCHSCL << BITP_I2C_MCTL_STRETCHSCL ) |
( ADI_I2C_CFG_MCTL_LOOPBACK << BITP_I2C_MCTL_LOOPBACK ) |
( ADI_I2C_CFG_MCTL_COMPLETE << BITP_I2C_MCTL_COMPLETE ) |
( ADI_I2C_CFG_MCTL_MASEN << BITP_I2C_MCTL_MASEN )
),
/**** I2C_DIV Clock Divider register *** */
(
( ADI_I2C_CFG_DIV_HIGH << BITP_I2C_DIV_HIGH ) |
( ADI_I2C_CFG_DIV_LOW << BITP_I2C_DIV_LOW )
),
/**** I2C_SHCTL Shared Control register *** */
(
( ADI_I2C_CFG_SHCTL_RST << BITP_I2C_TCTL_FILTEROFF )
),
/**** I2C_TCTL Timing control register *** */
(
( ADI_I2C_CFG_TCTL_FILTEROFF << BITP_I2C_SHCTL_RST ) |
( ADI_I2C_CFG_TCTL_THDATIN << BITP_I2C_TCTL_THDATIN )
),
/**** I2C_ASTRETCH Master Clock Stretch register *** */
(
( ADI_I2C_CFG_ASTRETCH_MST << BITP_I2C_ASTRETCH_SCL_MST )
),
/**** Target Slave configuration value (not a register) *** */
(
( ADI_I2C_CFG_SLAVE_ADDRESS )
),
}
};
/*! \endcond */
#endif /* ADI_I2C_DATA_C */

129
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/i2c/adi_i2c_def.h Executable file
View File

@ -0,0 +1,129 @@
/*!
*****************************************************************************
@file: adi_i2c_def.h
@brief: Internal I2C device driver definitions and macros
-----------------------------------------------------------------------------
Copyright (c) 2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_I2C_DEF_H
#define ADI_I2C_DEF_H
/*! \cond PRIVATE */
#include <drivers/i2c/adi_i2c.h>
#define ADI_I2C_NUM_INSTANCES (1u)
#define ADI_I2C_STATUS_ERROR_MASK ( (1u << BITP_I2C_MSTAT_NACKADDR) \
| (1u << BITP_I2C_MSTAT_NACKDATA) \
| (1u << BITP_I2C_MSTAT_ALOST) )
/* Internal Actions */
static void submitTransaction (ADI_I2C_HANDLE const hDevice, ADI_I2C_TRANSACTION* const pTransaction);
static void commenceTransmit (ADI_I2C_HANDLE const hDevice);
static void commenceReceive (ADI_I2C_HANDLE const hDevice);
static ADI_I2C_RESULT i2cReset (ADI_I2C_HANDLE const hDevice);
/* interrupt event handlers */
static void transmitHandler (ADI_I2C_HANDLE const hDevice);
static void receiveHandler (ADI_I2C_HANDLE const hDevice);
static void completeHandler (ADI_I2C_HANDLE const hDevice);
static void errorHandler (ADI_I2C_HANDLE const hDevice);
/*
*****************************************************************************
* I2C Configuration structure.
*****************************************************************************/
typedef struct __ADI_I2C_CONFIG {
uint16_t MasterControlRegister; /* I2C_MCTL register configuration. */
uint16_t ClockDividerRegister; /* I2C_DIV register. */
uint16_t SharedControlRegister; /* I2C_DIV register. */
uint16_t TimingControlRegister; /* I2C_TCTL register. */
uint16_t ClockStretchRegister; /* I2C_ASTRETCH register. */
uint16_t TargetSlaveAddress; /* slave address value (not a register). */
} ADI_I2C_CONFIG;
/* I2C physical device instance data */
typedef struct __ADI_I2C_DEVICE_INFO {
IRQn_Type pioIRQn; /* PIO interrupt number */
ADI_I2C_TypeDef *pDev; /* pointer to i2c controller */
ADI_I2C_CONFIG *pConfig; /* pointer to user config info */
ADI_I2C_HANDLE hDevice; /* I2C handle or NULL if uninitialized */
} ADI_I2C_DEVICE_INFO;
/* I2C driver instance data structure */
typedef struct __ADI_I2C_DEV_DATA_TYPE {
/* make sure to synchronize ANY size changes with ADI_I2C_MEMORY_SIZE macro in adi_i2c.h */
/* device attributes */
ADI_I2C_TypeDef *pDev;
ADI_I2C_DEVICE_INFO *pDevInfo;
/* driver state */
uint16_t hwStatus;
bool bRepeatStart;
uint16_t i2cDeviceAddress;
uint16_t i2cEncodedDeviceAddress; /* encoded as 7-bit device address + r/w LSB */
bool bSubmitCalled;
/* prologue data */
volatile uint8_t *pNextPrologueByte;
volatile uint16_t remainingPrologueCount;
/* write data */
volatile uint8_t *pNextWriteByte;
volatile uint16_t remainingWriteCount;
/* read data */
volatile uint8_t *pNextReadByte;
volatile uint16_t remainingReadCount;
ADI_I2C_RESULT result; /* collector for return status */
ADI_I2C_HW_ERRORS hwErrors; /* collector for error status */
SEM_VAR_DECLR /* blocking object: "Semaphore" for rtos, "nLowPowerExitFlag" for non-rtos */
} ADI_I2C_DEV_DATA_TYPE;
/*! \endcond */
#endif /* end of ifndef ADI_I2C_DEF_H */

1904
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/pwr/adi_pwr.c Executable file
View File

File diff suppressed because it is too large Load Diff

172
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/pwr/adi_pwr_def.h Executable file
View File

@ -0,0 +1,172 @@
/*
*****************************************************************************
* @file: adi_pwr_def.h
* @brief: Definitions for the system clock and power management.
*-----------------------------------------------------------------------------
*
* Copyright (c) 2016 Analog Devices, Inc.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* - Modified versions of the software must be conspicuously marked as such.
* - This software is licensed solely and exclusively for use with processors
* manufactured by or for Analog Devices, Inc.
* - This software may not be combined or merged with other code in any manner
* that would cause the software to become subject to terms and conditions
* which differ from those listed here.
* - Neither the name of Analog Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* - The use of this software may or may not infringe the patent rights of one
* or more patent holders. This license does not release you from the
* requirement that you obtain separate licenses from these patent holders
* to use this software.
*
* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
* TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
* PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
#ifndef ADI_PWR_DEF_H
#define ADI_PWR_DEF_H
/*Power control register access key */
#define ADI_PMG_KEY (0x4859u)
/*Osc control register access key */
#define ADI_OSC_KEY (0xCB14u)
/*HCLK/PCLK minimum Divider value */
#define CLOCK_MIN_DIV_VALUE (0x1u)
/*HCLK/PCLK maximum Divider value */
#define CLOCK_MAX_DIV_VALUE (32u)
/*ADC Clock minimum Divider value */
#define ACLK_MIN_DIV_VALUE (0x1u)
/*ADC Clock maximum Divider value */
#define ACLK_MAX_DIV_VALUE (511u)
/* Minimum divider for PLL */
#define MINIMUM_PLL_DIVIDER (0x02u)
/* Minimum multiplier for PLL */
#define MINIMUM_PLL_MULTIPLIER (0x08u)
/* Maximum external clock */
#define MAXIMUM_EXT_CLOCK (26000000u)
/* Default osc control register value */
#define OSCCTRL_CONFIG_VALUE \
( (uint32_t) ADI_PWR_LF_CLOCK_MUX << BITP_CLKG_OSC_CTL_LFCLK_MUX | \
(uint32_t) ADI_PWR_HFOSC_CLOCK_ENABLE << BITP_CLKG_OSC_CTL_HFOSC_EN | \
(uint32_t) ADI_PWR_LFXTAL_CLOCK_ENABLE << BITP_CLKG_OSC_CTL_LFX_EN | \
(uint32_t) ADI_PWR_HFXTAL_CLOCK_ENABLE << BITP_CLKG_OSC_CTL_HFX_EN | \
(uint32_t) ADI_PWR_LFXTAL_CLOCK_MON_ENABLE << BITP_CLKG_OSC_CTL_LFX_MON_EN | \
(uint32_t) ADI_PWR_LFXTAL_FAIL_AUTO_SWITCH_ENABLE << BITP_CLKG_OSC_CTL_LFX_AUTSW_EN | \
(uint32_t) ADI_PWR_LFXTAL_ROBUST_MODE_ENABLE << BITP_CLKG_OSC_CTL_LFX_ROBUST_EN | \
(uint32_t) ADI_PWR_LFXTAL_ROBUST_LOAD_SELECT << BITP_CLKG_OSC_CTL_LFX_ROBUST_LD | \
(uint32_t) ADI_PWR_ROOT_CLOCK_MON_INT_ENABLE << BITP_CLKG_OSC_CTL_ROOT_MON_EN | \
(uint32_t) ADI_PWR_ROOT_CLOCK_FAIL_AUTOSWITCH_ENABLE << BITP_CLKG_OSC_CTL_ROOT_AUTSW_EN )
/* Default clock control register-0 value */
#define CLOCK_CTL0_CONFIG_VALUE \
( (uint32_t) ADI_PWR_INPUT_TO_ROOT_CLOCK_MUX << BITP_CLKG_CLK_CTL0_CLKMUX | \
(uint32_t) ADI_PWR_GPIO_CLOCK_OUT_SELECT << BITP_CLKG_CLK_CTL0_CLKOUT | \
(uint32_t) ADI_PWR_INPUT_TO_RCLK_MUX << BITP_CLKG_CLK_CTL0_RCLKMUX | \
(uint32_t) ADI_PWR_INPUT_TO_SPLL_MUX << BITP_CLKG_CLK_CTL0_PLL_IPSEL | \
(uint32_t) ADI_PWR_LFXTAL_CLOCK_INTERRUPT_ENABLE << BITP_CLKG_CLK_CTL0_LFXTALIE | \
(uint32_t) ADI_PWR_HFXTAL_CLOCK_INTERRUPT_ENABLE << BITP_CLKG_CLK_CTL0_HFXTALIE )
/* Default clock control register-1 value */
#define CLOCK_CTL1_CONFIG_VALUE \
( (uint32_t) ADI_PWR_HCLK_DIVIDE_COUNT << BITP_CLKG_CLK_CTL1_HCLKDIVCNT | \
(uint32_t) ADI_PWR_PCLK_DIVIDE_COUNT << BITP_CLKG_CLK_CTL1_PCLKDIVCNT | \
(uint32_t) ADI_PWR_ACLK_DIVIDE_COUNT << BITP_CLKG_CLK_CTL1_ACLKDIVCNT )
/* Default clock control register-2 value */
#define CLOCK_CTL2_CONFIG_VALUE \
( (uint32_t) ADI_PWR_HFOSC_AUTO_DIV_BY_1 << BITP_CLKG_CLK_CTL2_HFOSCAUTODIV_EN | \
(uint32_t) ADI_PWR_HFOSC_DIVIDE_SELECT << BITP_CLKG_CLK_CTL2_HFOSCDIVCLKSEL )
/* Default clock control register-3 value */
#define CLOCK_CTL3_CONFIG_VALUE \
( (uint32_t) ADI_PWR_SPLL_MUL_FACTOR << BITP_CLKG_CLK_CTL3_SPLLNSEL | \
(uint32_t) ADI_PWR_SPLL_ENABLE_DIV2 << BITP_CLKG_CLK_CTL3_SPLLDIV2 | \
(uint32_t) ADI_PWR_SPLL_ENABLE << BITP_CLKG_CLK_CTL3_SPLLEN | \
(uint32_t) ADI_PWR_SPLL_INTERRUPT_ENABLE << BITP_CLKG_CLK_CTL3_SPLLIE | \
(uint32_t) ADI_PWR_SPLL_DIV_FACTOR << BITP_CLKG_CLK_CTL3_SPLLMSEL | \
(uint32_t) ADI_PWR_SPLL_ENABLE_MUL2 << BITP_CLKG_CLK_CTL3_SPLLMUL2 )
/* Default clock control register-5 value */
#define CLOCK_CTL5_CONFIG_VALUE \
( (uint32_t) ADI_PWR_GPT0_CLOCK_ENABLE << BITP_CLKG_CLK_CTL5_GPTCLK0OFF | \
(uint32_t) ADI_PWR_GPT1_CLOCK_ENABLE << BITP_CLKG_CLK_CTL5_GPTCLK1OFF | \
(uint32_t) ADI_PWR_GPT2_CLOCK_ENABLE << BITP_CLKG_CLK_CTL5_GPTCLK2OFF | \
(uint32_t) ADI_PWR_I2C_CLOCK_ENABLE << BITP_CLKG_CLK_CTL5_UCLKI2COFF | \
(uint32_t) ADI_PWR_GPIO_CLOCK_ENABLE << BITP_CLKG_CLK_CTL5_GPIOCLKOFF | \
(uint32_t) ADI_PWR_PCLK_ENABLE << BITP_CLKG_CLK_CTL5_PERCLKOFF | \
(uint32_t) ADI_PWR_TIMER_RGB_ENABLE << BITP_CLKG_CLK_CTL5_TMRRGBCLKOFF )
/* Default configuration for Power supply monitor Interrupt Enable Register */
#define PWM_INTERRUPT_CONFIG \
( (uint32_t) ADI_PWR_ENABLE_VBAT_INTERRUPT << BITP_PMG_IEN_VBAT | \
(uint32_t) ADI_PWR_ENABLE_VREG_UNDER_VOLTAGE_INTERRUPT << BITP_PMG_IEN_VREGUNDR | \
(uint32_t) ADI_PWR_ENABLE_VREG_OVER_VOLTAGE_INTERRUPT << BITP_PMG_IEN_VREGOVR | \
(uint32_t) ADI_PWR_ENABLE_BATTERY_VOLTAGE_RANGE_INTERRUPT << BITP_PMG_IEN_IENBAT | \
(uint32_t) ADI_PWR_BATTERY_VOLTAGE_RANGE_FOR_INTERRUPT << BITP_PMG_IEN_RANGEBAT )
/* Default configuration for Power Mode Register */
#define PWM_PWRMOD_CONFIG \
( (uint32_t) ADI_PWR_ENABLE_BATTERY_VOLTAGE_MONITORING << BITP_PMG_PWRMOD_MONVBATN )
/* Default configuration for HP Buck Control register */
#define PWM_HPBUCK_CONTROL \
( (uint32_t) ADI_PWR_HP_BUCK_ENABLE << BITP_PMG_CTL1_HPBUCKEN | \
(uint32_t) ADI_PWR_HP_BUCK_LOAD_MODE << BITP_PMG_CTL1_HPBUCK_LD_MODE | \
(uint32_t) ADI_PWR_HP_BUCK_LOW_POWER_MODE << BITP_PMG_CTL1_HPBUCK_LOWPWR_MODE )
/*Selecting HFOSC as input for generating root clock*/
#define HFMUX_INTERNAL_OSC_VAL (0u << BITP_CLKG_CLK_CTL0_CLKMUX)
/*Selecting HFXTAL as input for generating root clock*/
#define HFMUX_EXTERNAL_XTAL_VAL (1u << BITP_CLKG_CLK_CTL0_CLKMUX)
/*Selecting SPLL as input for generating root clock*/
#define HFMUX_SYSTEM_SPLL_VAL (2u << BITP_CLKG_CLK_CTL0_CLKMUX)
/*Selecting GPIO as input for generating root clock*/
#define HFMUX_GPIO_VAL (3u << BITP_CLKG_CLK_CTL0_CLKMUX)
/* Interrupt handler for the battery voltage interrupt */
void Battery_Voltage_Int_Handler(void);
/* Interrupt handler for the VREG under/over voltage interrupt */
void Vreg_over_Int_Handler(void);
/* Interrupt handler for PLL interrupts. */
void PLL_Int_Handler(void);
/*Interrupt handler for oscillator interrupts.*/
void Crystal_osc_Int_Handler(void);
#endif /* ADI_PWR_DEF_H */
/*
** EOF
*/

27
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/retarget_uart_config.h Executable file
View File

@ -0,0 +1,27 @@
/*
** I/O redirection support over UART, via SSL/DD.
** Copyright (C) 2017 Analog Devices, Inc. All Rights Reserved.
**
** This file is intended for use with the ARM:Compiler:IO:*:User
** components, which set up redirection of stdout and stderr.
*/
#ifndef RETARGET_UART_CONFIG_H
#define RETARGET_UART_CONFIG_H
// --- <<< Use Configuration Wizard in Context Menu >>> ---
// <h>UART Configuration for STDOUT and STDERR
// <q>Configure Pinmuxing for UART.
// <i>Enable pinmux configuration for UART on first output.
#define ADI_UART_SETUP_PINMUX 1
// <q>Raise Breakpoint on exit()
// <i>Cause a breakpoint event in exit() rather than looping forever.
#define ADI_UART_EXIT_BREAKPOINT 1
// </h>
#endif /* RETARGET_UART_CONFIG_H */

796
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/rng/adi_rng.c Executable file
View File

@ -0,0 +1,796 @@
/*!
*****************************************************************************
* @file: adi_rng.c
* @brief: Random Number Generator Driver
*----------------------------------------------------------------------------
*
Copyright (c) 2012-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
/*! \addtogroup RNG_Driver RNG Driver
* Random Number Generator Driver
* @{
*/
/*! \cond PRIVATE */
#include <stdlib.h> /* for 'NULL' definition */
#include <assert.h>
#include <adi_processor.h>
#include <drivers/rng/adi_rng.h>
#include "adi_rng_def.h"
#include <rtos_map/adi_rtos_map.h>
#ifdef __ICCARM__
/*
* IAR MISRA C 2004 error suppressions.
*
* Pm011 (rule 6.3): Types which specify sign and size should be used
* We use bool which is accepted by MISRA but the toolchain does not accept it
*
* Pm073 (rule 14.7): a function should have a single point of exit
* Pm143 (rule 14.7): a function should have a single point of exit at the end of the function
* Multiple returns are used for error handling.
*
* Pm050 (rule 14.2): a null statement shall only occur on a line by itself
* Needed for null expansion of ISR_PROLOG in no-OS case and others.
* Pm140 (rule 11.3): a cast should not be performed between a pointer type and an integral type
* The rule makes an exception for memory-mapped register accesses.
*/
#pragma diag_suppress=Pm011,Pm073,Pm143,Pm050
#endif /* __ICCARM__ */
#ifdef __ADUCM4x50__
#define NUM_RNG_DEVICES (1u)
#else
#error "Unsupported processor"
#endif
/*============== D A T A ===============*/
/**
* Information for managing all the RNG devices available
*/
#ifdef __ICCARM__
#pragma diag_suppress=Pm140
#endif
static ADI_RNG_DEV_TYPE gRNG_Device[NUM_RNG_DEVICES] =
{
{(ADI_RNG_TypeDef*)pADI_RNG0,NULL} /* RNG0 */
};
#ifdef __ICCARM__
#pragma diag_default=Pm140
#endif
/* Forward prototypes */
void RNG_Int_Handler(void);
/** Check the validity of a handle for debug mode */
#ifdef ADI_DEBUG
#define ADI_RNG_INVALID_HANDLE(h) (&gRNG_Device[0] != (h))
#endif
/*! \endcond */
/*!
@brief Opena a Random Number Generator Device
@param[in] nDeviceNum Device number to be opened.
@param[in] pMemory Pointer to the memory to be used by the driver.
Size of the memory should be at least #ADI_RNG_MEMORY_SIZE bytes.
@param[in] MemorySize Size of the memory passed in pMemory parameter.
@param[out] phDevice Pointer to a location in the calling function memory space to which
the device handle will be written upon successful driver initialization.
@return Status
- #ADI_RNG_SUCCESS RNG device driver opened successfully.
- #ADI_RNG_INVALID_PARAM [D] The memory passed to the API is either NULL or its size is not sufficient.
- #ADI_RNG_ALREADY_INITIALIZED [D] The RNG is already initialized.
- #ADI_RNG_BAD_DEVICE_NUM [D] The device number is invalid.
Initialize and allocate a RNG device for other use. The core NVIC RNG interrupt is enabled. This API
must preceed all other RNG API calls and the handle returned must be passed to all other RNG API calls.
@note The contents of \a ppDevice will be set to NULL upon failure.\n\n
@note The RNG device driver will clear all pending interrupts and disable all RNG
interrupts during RNG device initialization.
@sa adi_rng_Close().
*/
ADI_RNG_RESULT adi_rng_Open(
uint32_t const nDeviceNum,
void* const pMemory,
uint32_t const MemorySize,
ADI_RNG_HANDLE* const phDevice
)
{
ADI_RNG_DEV_TYPE *pDevice;
/* store a bad handle in case of failure */
*phDevice = (ADI_RNG_HANDLE) NULL;
#ifdef ADI_DEBUG
if (nDeviceNum >= NUM_RNG_DEVICES)
{
return ADI_RNG_BAD_DEVICE_NUM;
}
if ((NULL == pMemory) || ( MemorySize < (uint32_t) ADI_RNG_MEMORY_SIZE))
{
return ADI_RNG_INVALID_PARAM;
}
assert (ADI_RNG_MEMORY_SIZE == sizeof(ADI_RNG_DEV_DATA_TYPE));
#endif
/* local pointer to instance data */
pDevice = &gRNG_Device[nDeviceNum];
#ifdef ADI_DEBUG
if (NULL != pDevice->pData)
{
return ADI_RNG_ALREADY_INITIALIZED;
}
#endif
/* Set the internal device data */
pDevice->pData = pMemory;
/* initialize internal device data */
pDevice->pData->IRQn = RNG0_EVT_IRQn;
pDevice->pData->CBFunc = NULL;
/* clear any pending interrupts. Both bits are write 1 to clear */
pDevice->pRNG->STAT = BITM_RNG_STAT_RNRDY | BITM_RNG_STAT_STUCK;
/* Set the RNG register based on static configuration */
pDevice->pRNG->CTL = (uint16_t)RNG0_CFG_ONLY_8_BIT << BITP_RNG_CTL_SINGLE;
pDevice->pRNG->LEN = (RNG0_CFG_LENGTH_RELOAD << BITP_RNG_LEN_RELOAD)
| (RNG0_CFG_LENGTH_PRESCALER << BITP_RNG_LEN_PRESCALE);
/* The interrupt handler only gets used in the case of callback mode so its
* enabling only happens in the adi_rng_RegisterCallBack API.
*/
NVIC_ClearPendingIRQ(pDevice->pData->IRQn);
/* store handle at application handle pointer */
*phDevice = pDevice;
return ADI_RNG_SUCCESS;
}
/*!
* @brief Uninitializes and deallocates the RNG device.
*
* @param[in] hDevice Device handle obtained from adi_rng_Open().
*
* @return Status
* - #ADI_RNG_SUCCESS Call completed successfully.
* - #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
*
* Uninitialize and release an allocated RNG device for other use. The core NVIC RNG interrupt is disabled.
*
* @sa adi_rng_Open().
*/
ADI_RNG_RESULT adi_rng_Close(ADI_RNG_HANDLE hDevice)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)){
return ADI_RNG_BAD_DEV_HANDLE;
}
if (NULL == pDevice->pData) {
return ADI_RNG_NOT_INITIALIZED;
}
#endif
/* uninitialize */
NVIC_DisableIRQ(pDevice->pData->IRQn);
pDevice->pData = NULL;
return ADI_RNG_SUCCESS;
}
/*!
* @brief Enables/Disables the RNG device.
*
* @param[in] hDevice Device handle obtained from adi_rng_Open().
* @param[in] bFlag Flag to specify whether to enable or disable RNG device.
*
* @return Status
* - #ADI_RNG_SUCCESS Call completed successfully.
* - #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
*
* @sa adi_rng_Open().
* @sa adi_rng_RegisterCallback().
*/
ADI_RNG_RESULT adi_rng_Enable (ADI_RNG_HANDLE const hDevice, bool const bFlag)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
ADI_INT_STATUS_ALLOC();
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)) {
return ADI_RNG_BAD_DEV_HANDLE;
}
if (NULL == pDevice->pData) {
return ADI_RNG_NOT_INITIALIZED;
}
#endif
ADI_ENTER_CRITICAL_REGION();
if (true == bFlag) {
pDevice->pRNG->CTL |= BITM_RNG_CTL_EN;
} else {
pDevice->pRNG->CTL &= (uint16_t)~(BITM_RNG_CTL_EN);
}
ADI_EXIT_CRITICAL_REGION();
return ADI_RNG_SUCCESS;
}
/*!
* @brief Enables/Disables Buffering for RNG.
*
* @param[in] hDevice Device handle obtained from adi_rng_Open().
* @param[in] bFlag Flag to specify whether to enable or disable buffering for RNG device.
* When buffering is enabled, adi_rng_GetRngData returns 32-bit values.
* When buffering is disabled the API returns 8-bit values.
*
* @return Status
* - #ADI_RNG_SUCCESS Call completed successfully.
* - #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
*
* @sa adi_rng_Open().
* @sa adi_rng_RegisterCallback().
* @sa adi_rng_GetRngData().
*/
ADI_RNG_RESULT adi_rng_EnableBuffering (ADI_RNG_HANDLE const hDevice, bool const bFlag)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
ADI_INT_STATUS_ALLOC();
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)) {
return ADI_RNG_BAD_DEV_HANDLE;
}
if (NULL == pDevice->pData) {
return ADI_RNG_NOT_INITIALIZED;
}
#endif
ADI_ENTER_CRITICAL_REGION();
if (true == bFlag) {
pDevice->pRNG->CTL &= (uint16_t)~(BITM_RNG_CTL_SINGLE);
} else {
pDevice->pRNG->CTL |= BITM_RNG_CTL_SINGLE;
}
ADI_EXIT_CRITICAL_REGION();
return ADI_RNG_SUCCESS;
}
/*!
* @brief Sets the reload and prescale value for the sample counter.
* The Sample Length will be nLenReload*2^nLenPrescaler.
*
* @param[in] hDevice Device handle obtained from adi_rng_Open().
* @param[in] nLenPrescaler Prescaler value for the sample counter (0-10).
* @param[in] nLenReload Reload value for the sample counter (0-4095)
*
* @return Status
* - #ADI_RNG_SUCCESS Call completed successfully.
* - #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
*
* @sa adi_rng_Open().
* @sa adi_rng_RegisterCallback().
*/
ADI_RNG_RESULT adi_rng_SetSampleLen (
ADI_RNG_HANDLE const hDevice,
uint16_t const nLenPrescaler,
uint16_t const nLenReload
)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
ADI_INT_STATUS_ALLOC();
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)){
return ADI_RNG_BAD_DEV_HANDLE;
}
if (NULL == pDevice->pData) {
return ADI_RNG_NOT_INITIALIZED;
}
if ( (nLenPrescaler > 10u)
|| ((0u == nLenPrescaler) && (0u == nLenReload))
|| (nLenReload > 4095u)) {
return ADI_RNG_INVALID_PARAM;
}
#endif
ADI_ENTER_CRITICAL_REGION();
/* Set the sample reload and prescaler value */
pDevice->pRNG->LEN = (uint16_t)((uint16_t)(nLenReload << BITP_RNG_LEN_RELOAD) & BITM_RNG_LEN_RELOAD)
| (uint16_t)((uint16_t)(nLenPrescaler << BITP_RNG_LEN_PRESCALE) & BITM_RNG_LEN_PRESCALE);
ADI_EXIT_CRITICAL_REGION();
return ADI_RNG_SUCCESS;
}
/*!
* @brief Retrieves the current state of RNG data/CRC accumulator register.
*
* @param[in] hDevice Device handle obtained from adi_rng_Open().
* @param[out] pbFlag Pointer to an application-defined boolean variable into which to write the result:
* - true = RNG data is ready to be read.
* - false = RNG data is not ready.
*
* @return Status
* - #ADI_RNG_SUCCESS Call completed successfully.
* - #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
- #ADI_RNG_INVALID_PARAM [D] Argument is incorrect.
*
* Retrieve the current state of RNG data/CRC accumulator register. The register holds the final entropy value
* accumulated by RNG and it should to read only when the data is ready.
*
* @sa adi_rng_Open().
* @sa adi_rng_GetRngData().
* @sa adi_rng_RegisterCallback().
*/
ADI_RNG_RESULT adi_rng_GetRdyStatus (ADI_RNG_HANDLE const hDevice, bool* const pbFlag)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)){
return ADI_RNG_BAD_DEV_HANDLE;
}
if (NULL == pDevice->pData) {
return ADI_RNG_NOT_INITIALIZED;
}
if (NULL == pbFlag) {
return ADI_RNG_INVALID_PARAM;
}
#endif
/* Get the RNG Ready status bit */
if ((pDevice->pRNG->STAT & BITM_RNG_STAT_RNRDY) != 0u)
{
*pbFlag = true;
}
else
{
*pbFlag = false;
}
return ADI_RNG_SUCCESS;
}
/*!
* @brief Retrieve whether the RNG oscillator output is stuck at a constant value
*
* @param[in] hDevice Device handle obtained from adi_rng_Open().
* @param[out] pbFlag Pointer to an application-defined boolean variable into which to write the result:
* - true = RNG oscillator is stuck at a constant value.
* - false = RNG oscillator is not stuck at a constant value.
*
* @return Status
* - #ADI_RNG_SUCCESS Call completed successfully.
* - #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
- #ADI_RNG_INVALID_PARAM [D] Argument is incorrect.
*
* @sa adi_rng_Open().
* @sa adi_rng_GetRngData().
* @sa adi_rng_RegisterCallback().
*/
ADI_RNG_RESULT adi_rng_GetStuckStatus (
ADI_RNG_HANDLE const hDevice,
bool* const pbFlag
)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)){
return ADI_RNG_BAD_DEV_HANDLE;
}
if (pDevice->pData == NULL) {
return ADI_RNG_NOT_INITIALIZED;
}
if (NULL == pbFlag) {
return ADI_RNG_INVALID_PARAM;
}
#endif
/* Get the stuck status bit */
if ((pDevice->pRNG->STAT & BITM_RNG_STAT_STUCK) != 0u)
{
*pbFlag = true;
}
else
{
*pbFlag = false;
}
return ADI_RNG_SUCCESS;
}
/*!
* @brief Retrieve the current value of the RNG data register.
*
* @param[in] hDevice Device handle obtained from adi_rng_Open().
* @param[in] pRegData Pointer to an application-defined variable into which to write the result.
* Only lower 8-bit is valid if buffering is not enabled
*
* @return Status
* - #ADI_RNG_SUCCESS Call completed successfully.
* - #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
* - #ADI_RNG_INVALID_PARAM [D] pRegData is a NULL pointer.
* - #ADI_RNG_INVALID_STATE[D] Random number ready status is not set
*
* Retrieve the current value of RNG data register. If the buffering is enabled all 32-bit of value written to
* pRegData is valid else only the lower 8-bit is valid.
*
* @sa adi_rng_Open().
* @sa adi_rng_GetRdyStatus().
* @sa adi_rng_RegisterCallback().
*/
ADI_RNG_RESULT adi_rng_GetRngData (ADI_RNG_HANDLE const hDevice, uint32_t* const pRegData)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)){
return ADI_RNG_BAD_DEV_HANDLE;
}
if (NULL == pDevice->pData) {
return ADI_RNG_NOT_INITIALIZED;
}
if (NULL == pRegData) {
return ADI_RNG_INVALID_PARAM;
}
if ((pDevice->pRNG->STAT & BITM_RNG_STAT_RNRDY) == 0u) {
return ADI_RNG_INVALID_STATE;
}
#endif
/* Get the RNG CRC accumulator value */
*pRegData = pDevice->pRNG->DATA;
return ADI_RNG_SUCCESS;
}
/*!
* @brief Retrieve the current RNG Oscillator count.
*
* @param[in] hDevice Device handle obtained from adi_rng_Open().
* @param[in] pOscCount Pointer to an application-defined variable into which to write the result.
*
* @return Status
* - #ADI_RNG_SUCCESS Call completed successfully.
* - #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
* - #ADI_RNG_INVALID_STATE[D] Random number ready status is not set
- #ADI_RNG_INVALID_PARAM [D] Argument is incorrect.
*
* @sa adi_rng_Open().
* @sa adi_rng_RegisterCallback().
*/
ADI_RNG_RESULT adi_rng_GetOscCount (ADI_RNG_HANDLE const hDevice, uint32_t* const pOscCount)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)){
return ADI_RNG_BAD_DEV_HANDLE;
}
if (NULL == pDevice->pData) {
return ADI_RNG_NOT_INITIALIZED;
}
if (NULL == pOscCount) {
return (ADI_RNG_INVALID_PARAM);
}
if ((pDevice->pRNG->STAT & BITM_RNG_STAT_RNRDY) == 0u) {
return ADI_RNG_INVALID_STATE;
}
#endif
/* Get the oscillator count high count */
*pOscCount = pDevice->pRNG->OSCCNT;
return ADI_RNG_SUCCESS;
}
/*!
* @brief Retrieve the current RNG Oscillator difference value for the given index.
*
* @param[in] hDevice Device handle obtained from adi_rng_Open().
* @param[in] nIndex Index of the difference register.
* @param[out] pOscDiff Pointer to an application-defined variable into which to
* write the oscillator difference value for the given index.
*
* @return Status
* - #ADI_RNG_SUCCESS Call completed successfully.
* - #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
* - #ADI_RNG_INVALID_STATE[D] Random number ready status is not set
- #ADI_RNG_INVALID_PARAM [D] Argument is incorrect.
*
* @sa adi_rng_Open().
* @sa adi_Rng_RegisterCallback().
*/
ADI_RNG_RESULT adi_rng_GetOscDiff (
ADI_RNG_HANDLE const hDevice,
uint32_t const nIndex,
uint8_t* const pOscDiff
)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)){
return ADI_RNG_BAD_DEV_HANDLE;
}
if (NULL == pDevice->pData) {
return ADI_RNG_NOT_INITIALIZED;
}
if ((NULL == pOscDiff) || (nIndex > 3u)) {
return( ADI_RNG_INVALID_PARAM );
}
if ((pDevice->pRNG->STAT & BITM_RNG_STAT_RNRDY) == 0u) {
return ADI_RNG_INVALID_STATE;
}
#endif
/* Get the Osc Difference Register */
*pOscDiff = (uint8_t)pDevice->pRNG->OSCDIFF[nIndex];
return ADI_RNG_SUCCESS;
}
/*!
* @brief Retrieve the current RNG sample length prescale and reload value configured in the device.
*
* @param[in] hDevice Device handle obtained from adi_rng_Open().
* @param[out] pLenPrescaler Pointer to an application-defined variable into which the prescaler value is written.
* @param[out] pLenReload Pointer to an application-defined variable into which the reload value for the sample counter is written.
*
* @return Status
* - #ADI_RNG_SUCCESS Call completed successfully.
* - #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
* - #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
- #ADI_RNG_INVALID_PARAM [D] Argument is incorrect.
*
*
* @sa adi_rng_Open().
* @sa adi_rng_RegisterCallback().
*/
ADI_RNG_RESULT adi_rng_GetSampleLen (
ADI_RNG_HANDLE const hDevice,
uint16_t* const pLenPrescaler,
uint16_t* const pLenReload
)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)){
return ADI_RNG_BAD_DEV_HANDLE;
}
if (NULL == pDevice->pData) {
return ADI_RNG_NOT_INITIALIZED;
}
if ((NULL == pLenPrescaler) || (NULL == pLenReload)) {
return ADI_RNG_INVALID_PARAM;
}
#endif
*pLenPrescaler = (pDevice->pRNG->LEN & BITM_RNG_LEN_PRESCALE) >> BITP_RNG_LEN_PRESCALE;
*pLenReload = (pDevice->pRNG->LEN & BITM_RNG_LEN_RELOAD) >> BITP_RNG_LEN_RELOAD;
return ADI_RNG_SUCCESS;
}
/*************************************************************************************************
**************************************************************************************************
***************************************** CALLBACKS ******************************************
***************************************** AND ******************************************
***************************************** INTERRUPT ******************************************
**************************************************************************************************
*************************************************************************************************/
/*!
@brief RNG Application callback registration API.
@param[in] hDevice Device handle obtained from #adi_rng_Open().
@param[in] cbFunc Application callback address; the function to call on the interrupt.
@param[in] pCBParam Application handle to be passed in the call back.
@return Status
- #ADI_RNG_SUCCESS The callback is successfully registered.
- #ADI_RNG_BAD_DEV_HANDLE [D] Invalid device handle parameter.
- #ADI_RNG_NOT_INITIALIZED [D] Device has not been initialized for use, see #adi_rng_Open().
Registers an application-defined callback \a cbFunc function address of type ADI_CALLBACK with the RNG device driver.
Callbacks are made in response to received RNG interrupts.
The callback to the application is made in context of the originating interrupt (i.e., the RNG driver's
RNG interrupt handler that is registered in the system's interrupt vector table). Extended processing
during the callback (an extension of the RNG's interrupt handler) is discouraged so as to avoid lower-priority
interrupt blocking. Also, any register read-modify-write operations should be protected using the
ADI_ENTER_CRITICAL_REGION()/ADI_EXIT_CRITICAL_REGION() pair to prevent higher-priority interrupts from modifying
said register during the read-modify-write operation.
@note CALLBACKS: RNG interrupt callbacks are \b disabled by default during RNG device driver
initialization (#adi_rng_Open()). The application uses the #adi_rng_RegisterCallback()
API to request an application-defined callback from the RNG device driver. The RNG device
driver clears the interrupt when the callback exits.
The application callback should <b>avoid extended processing</b>
during callbacks as the callback is executing context of the initiating interrupt and will
block lower-priority interrupts. If extended application-level interrupt processing is
required, the application should schedule it for the main application loop and exit the
callback as soon as possible.\n
@sa adi_rng_Open().
*/
ADI_RNG_RESULT adi_rng_RegisterCallback (
ADI_RNG_HANDLE hDevice,
ADI_CALLBACK cbFunc,
void *pCBParam)
{
ADI_RNG_DEV_TYPE *pDevice = (ADI_RNG_DEV_TYPE*)hDevice;
#ifdef ADI_DEBUG
if (ADI_RNG_INVALID_HANDLE(pDevice)){
return ADI_RNG_BAD_DEV_HANDLE;
}
if (NULL == pDevice->pData) {
return ADI_RNG_NOT_INITIALIZED;
}
#endif
/* save the callback info */
pDevice->pData->CBFunc = cbFunc;
pDevice->pData->pCBParam = pCBParam;
if (NULL != cbFunc) {
/* enable RNG interrupts in NVIC */
NVIC_EnableIRQ(pDevice->pData->IRQn);
} else {
NVIC_DisableIRQ(pDevice->pData->IRQn);
}
return ADI_RNG_SUCCESS;
}
/*! \cond PRIVATE */
/* RNG driver interrupt handler. Overrides weak default handler in startup file */
void RNG_Int_Handler(void)
{
ISR_PROLOG();
ADI_RNG_DEV_TYPE *pDevice = &gRNG_Device[0];
register uint16_t candidate;
/* if we have an initialized driver... */
if (NULL != pDevice->pData)
{
/* if we have a registered callback */
if (NULL != pDevice->pData->CBFunc)
{
ADI_INT_STATUS_ALLOC();
ADI_ENTER_CRITICAL_REGION();
/* read status register without other interrupts in between */
candidate = pDevice->pRNG->STAT;
ADI_EXIT_CRITICAL_REGION();
/* Only have bits in stat that are necessary */
candidate = candidate & (BITM_RNG_STAT_STUCK | BITM_RNG_STAT_RNRDY);
while (0u != candidate) {
uint32_t nEvent;
if (0u != (candidate & BITM_RNG_STAT_RNRDY)) {
nEvent = ADI_RNG_EVENT_READY;
candidate &= (uint16_t)~BITM_RNG_STAT_RNRDY;
} else if (0u != (candidate & BITM_RNG_STAT_STUCK)) {
nEvent = ADI_RNG_EVENT_STUCK;
candidate &= (uint16_t)~BITM_RNG_STAT_STUCK;
} else {
break;
}
pDevice->pData->CBFunc (
pDevice->pData->pCBParam,
nEvent,
NULL
);
}
pDevice->pRNG->STAT = BITM_RNG_STAT_RNRDY | BITM_RNG_STAT_STUCK;
}
}
ISR_EPILOG();
}
/*! \endcond */
/*
** EOF
*/
/*@}*/

69
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/rng/adi_rng_def.h Executable file
View File

@ -0,0 +1,69 @@
/*!
*****************************************************************************
* @file: adi_rng_def.h
* @brief: Random Number Generator Driver private data structures
*----------------------------------------------------------------------------
*
Copyright (c) 2012-2016 Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
- Modified versions of the software must be conspicuously marked as such.
- This software is licensed solely and exclusively for use with processors
manufactured by or for Analog Devices, Inc.
- This software may not be combined or merged with other code in any manner
that would cause the software to become subject to terms and conditions
which differ from those listed here.
- Neither the name of Analog Devices, Inc. nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- The use of this software may or may not infringe the patent rights of one
or more patent holders. This license does not release you from the
requirement that you obtain separate licenses from these patent holders
to use this software.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-
INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF
CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef ADI_RNG_DEF_H
#define ADI_RNG_DEF_H
/*! \cond PRIVATE */
/*! RNG device internal instance data structure */
typedef struct __ADI_RNG_DEV_DATA_TYPE
{
IRQn_Type IRQn; /*!< RNG interrupt number */
ADI_CALLBACK CBFunc; /*!< Callback function */
void *pCBParam; /*!< Callback parameter */
} ADI_RNG_DEV_DATA_TYPE;
/*! RNG device internal data structure */
typedef struct __ADI_RNG_DEV_TYPE
{
volatile ADI_RNG_TypeDef *pRNG; /*!< MMR address for this RNG */
ADI_RNG_DEV_DATA_TYPE *pData; /*!< Pointer to instance data */
} ADI_RNG_DEV_TYPE;
/*! \endcond */
#endif /* ADI_RNG_DEF_H */

Some files were not shown because too many files have changed in this diff Show More