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pull/4825/head
Steven Cooreman 2017-11-11 19:38:54 +01:00
parent 2f02a23ac0
commit 1dc3941a5f
5 changed files with 66 additions and 45 deletions
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31
features/mbedtls/targets/TARGET_Silicon_Labs/crypto_ecp.c
View File

@ -69,13 +69,13 @@
#define ECC_BIGINT_SIZE_IN_BITS (256)
#define ECC_BIGINT_SIZE_IN_BYTES (ECC_BIGINT_SIZE_IN_BITS/8)
#define ECC_BIGINT_SIZE_IN_32BIT_WORDS (ECC_BIGINT_SIZE_IN_BYTES/sizeof(uint32_t))
#define EC_BIGINT_COPY(X, Y) memcpy(X, Y, sizeof(ecc_bigint_t));
#define EC_BIGINT_COPY(X, Y) memcpy((X), (Y), sizeof(ecc_bigint_t));
typedef uint32_t ecc_bigint_t[ECC_BIGINT_SIZE_IN_32BIT_WORDS];
#define SLCL_ECP_CHK(f) do { if( ( ret = f ) != 0 ) goto cleanup; } while( 0 )
#define SLCL_ECP_CHK(f) do { if( ( ret = (f) ) != 0 ) goto cleanup; } while( 0 )
#if defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT) || defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT)
#define MPI_TO_BIGINT(bigint, mpi) mpitobigint(bigint, mpi);
#define MPI_TO_BIGINT(bigint, mpi) mpitobigint((bigint), (mpi));
/***************************************************************************//**
* @brief
@ -85,14 +85,17 @@ __STATIC_INLINE void mpitobigint( ecc_bigint_t bigint, const mbedtls_mpi* mpi )
{
uint32_t* bi = bigint;
if ( mpi->n < 8 )
if ( mpi->n < ECC_BIGINT_SIZE_IN_32BIT_WORDS )
{
memcpy(bigint, mpi->p, mpi->n * sizeof(uint32_t));
memset(&bi[mpi->n], 0, sizeof(ecc_bigint_t) - mpi->n * sizeof(uint32_t));
memset(&bi[mpi->n],
0,
ECC_BIGINT_SIZE_IN_BYTES - ( mpi->n * sizeof(uint32_t) ) );
}
else
{
memcpy(bigint, mpi->p, 8 * sizeof(uint32_t));
/* mpi has more room than bigint, so only store up to sizeof(bigint) */
memcpy(bigint, mpi->p, ECC_BIGINT_SIZE_IN_BYTES);
}
}
@ -137,11 +140,11 @@ __STATIC_INLINE bool crypto_ddata0_is_zero(CRYPTO_TypeDef* crypto,
*
* @return N/A
******************************************************************************/
static void mbedtls_mpi_div_mod(CRYPTO_TypeDef *crypto,
ecc_bigint_t X,
ecc_bigint_t Y,
ecc_bigint_t N,
ecc_bigint_t R)
static void crypto_mpi_div_mod(CRYPTO_TypeDef *crypto,
ecc_bigint_t X,
ecc_bigint_t Y,
ecc_bigint_t N,
ecc_bigint_t R)
{
uint32_t D[9];
uint32_t status_reg;
@ -381,7 +384,7 @@ static void mbedtls_mpi_div_mod(CRYPTO_TypeDef *crypto,
CORE_EXIT_CRITICAL();
}
return;
} /* mbedtls_mpi_div_mod */
} /* crypto_mpi_div_mod */
#endif /* MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT || MBEDTLS_ECP_NORMALIZE_JAC_ALT */
/***************************************************************************//**
@ -1509,7 +1512,7 @@ int mbedtls_internal_ecp_normalize_jac_many( const mbedtls_ecp_group *grp,
/*
* u = 1 / (Z_0 * ... * Z_n) mod P
*/
mbedtls_mpi_div_mod(crypto, one, cc[t_len-1], modulus, uu);
crypto_mpi_div_mod(crypto, one, cc[t_len-1], modulus, uu);
for( i = t_len - 1; ; i-- )
{
@ -1638,7 +1641,7 @@ int mbedtls_internal_ecp_normalize_jac( const mbedtls_ecp_group *grp,
MPI_TO_BIGINT( Z, &pt->Z );
MPI_TO_BIGINT( modulus, &grp->P );
mbedtls_mpi_div_mod(crypto, one, Z, modulus, Z_inv);
crypto_mpi_div_mod(crypto, one, Z, modulus, Z_inv);
/*

25
features/mbedtls/targets/TARGET_Silicon_Labs/crypto_management.c
View File

@ -22,6 +22,13 @@
#include "em_bus.h"
#if defined( CRYPTO_PRESENT )
/* Conversion macro for compatibility with the 5.3.x release of the Gecko SDK */
#if defined( MBEDTLS_CRYPTO_DEVICE_PREEMPTION )
#warning "MBEDTLS_CRYPTO_DEVICE_PREEMPTION is deprecated, please define " \
"CRYPTO_DEVICE_PREEMPTION instead."
#endif
#if defined( MBEDTLS_THREADING_C )
#include "mbedtls/threading.h"
static mbedtls_threading_mutex_t crypto_locks[CRYPTO_COUNT];
@ -29,7 +36,7 @@ static volatile bool crypto_locks_initialized = false;
static unsigned int acquire_count = 0U;
#endif /* MBEDTLS_THREADING_C */
#if defined( MBEDTLS_CRYPTO_DEVICE_PREEMPTION )
#if defined( CRYPTO_DEVICE_PREEMPTION )
/** Preemptable context of CRYPTO hardware module. */
typedef struct
{
@ -52,7 +59,7 @@ typedef struct
static crypto_context_t preemption_context;
static bool is_preempted = false;
static CORE_DECLARE_IRQ_STATE;
#endif /* MBEDTLS_CRYPTO_DEVICE_PREEMPTION */
#endif /* CRYPTO_DEVICE_PREEMPTION */
typedef enum
{
@ -106,9 +113,9 @@ static inline int crypto_management_index_by_device( CRYPTO_TypeDef *device )
}
/* Use bitband for clock enable/disable operations, such that they are atomic */
#define CRYPTO_CLOCK_ENABLE(clk) BUS_RegBitWrite(&(CMU->HFBUSCLKEN0), clk, 1)
#define CRYPTO_CLOCK_DISABLE(clk) BUS_RegBitWrite(&(CMU->HFBUSCLKEN0), clk, 0)
#define CRYPTO_CLOCK_ENABLED(clk) BUS_RegBitRead(&(CMU->HFBUSCLKEN0), clk)
#define CRYPTO_CLOCK_ENABLE(clk) BUS_RegBitWrite(&(CMU->HFBUSCLKEN0), (clk), 1)
#define CRYPTO_CLOCK_DISABLE(clk) BUS_RegBitWrite(&(CMU->HFBUSCLKEN0), (clk), 0)
#define CRYPTO_CLOCK_ENABLED(clk) BUS_RegBitRead(&(CMU->HFBUSCLKEN0), (clk))
/* Get ownership of an available crypto device */
CRYPTO_TypeDef *crypto_management_acquire( void )
@ -130,6 +137,9 @@ CRYPTO_TypeDef *crypto_management_acquire( void )
CORE_EXIT_CRITICAL();
}
/* Wrapping this in SL_THREADING_ALT pending non-blocking mutex in official
* threading API. */
#if defined( SL_THREADING_ALT )
/* Try to take an available crypto instance */
unsigned int devno = 0;
for ( ; devno < CRYPTO_COUNT; devno++ ) {
@ -138,6 +148,7 @@ CRYPTO_TypeDef *crypto_management_acquire( void )
break;
}
}
#endif // SL_THREADING_ALT
/* If no device immediately available, do naieve round-robin */
if ( device == NULL ) {
@ -213,7 +224,7 @@ void crypto_management_release( CRYPTO_TypeDef *device )
/* Acquire a device with preemption. NOT thread-safe! */
CRYPTO_TypeDef *crypto_management_acquire_preemption( uint32_t regmask )
{
#if defined( MBEDTLS_CRYPTO_DEVICE_PREEMPTION )
#if defined( CRYPTO_DEVICE_PREEMPTION )
CRYPTO_TypeDef *device = NULL;
/* Turn off interrupts */
CORE_ENTER_CRITICAL();
@ -309,7 +320,7 @@ void crypto_management_release_preemption( CRYPTO_TypeDef *device )
if ( crypto_management_index_by_device( device ) < 0 ) {
return;
}
#if defined( MBEDTLS_CRYPTO_DEVICE_PREEMPTION )
#if defined( CRYPTO_DEVICE_PREEMPTION )
if ( is_preempted ) {
/* If we preempted something, put their context back */

6
features/mbedtls/targets/TARGET_Silicon_Labs/crypto_management.h
View File

@ -17,8 +17,8 @@
* limitations under the License.
*/
#ifndef MBEDTLS_CRYPTO_MANAGEMENT_H
#define MBEDTLS_CRYPTO_MANAGEMENT_H
#ifndef CRYPTO_MANAGEMENT_H
#define CRYPTO_MANAGEMENT_H
/***************************************************************************//**
* \addtogroup sl_crypto
@ -125,4 +125,4 @@ void crypto_management_release_preemption( CRYPTO_TypeDef *device );
/** \} (end addtogroup sl_crypto_management) */
/** \} (end addtogroup sl_crypto) */
#endif /* MBEDTLS_CRYPTO_MANAGEMENT_H */
#endif /* CRYPTO_MANAGEMENT_H */

26
features/mbedtls/targets/TARGET_Silicon_Labs/crypto_sha.c
View File

@ -51,6 +51,8 @@
#include "em_assert.h"
#include <string.h>
#define CRYPTO_SHA_BLOCK_SIZE (64)
#if defined(MBEDTLS_SHA1_C)
static const uint32_t init_state_sha1[8] =
{
@ -173,10 +175,10 @@ static void crypto_sha_update_state( uint32_t state[8],
/* Load the data block(s) */
for ( size_t i = 0; i < blocks; i++ ) {
if ((uint32_t)(&data[i*64]) & 0x3)
if ((uint32_t)(&data[i*CRYPTO_SHA_BLOCK_SIZE]) & 0x3)
{
uint32_t temp[16];
memcpy(temp, &data[i*64], 64);
uint32_t temp[CRYPTO_SHA_BLOCK_SIZE/sizeof(uint32_t)];
memcpy(temp, &data[i*CRYPTO_SHA_BLOCK_SIZE], CRYPTO_SHA_BLOCK_SIZE);
CORE_ENTER_CRITICAL();
CRYPTO_QDataWrite(&crypto->QDATA1BIG, temp);
CORE_EXIT_CRITICAL();
@ -184,7 +186,8 @@ static void crypto_sha_update_state( uint32_t state[8],
else
{
CORE_ENTER_CRITICAL();
CRYPTO_QDataWrite(&crypto->QDATA1BIG, (uint32_t*) &data[i*64]);
CRYPTO_QDataWrite(&crypto->QDATA1BIG,
(uint32_t*) &data[i*CRYPTO_SHA_BLOCK_SIZE]);
CORE_EXIT_CRITICAL();
}
@ -238,14 +241,15 @@ void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 )
if ( is224 != 0 ) {
ctx->is224 = true;
memcpy(ctx->state, init_state_sha224, 32);
memcpy(ctx->state, init_state_sha224, sizeof(ctx->state));
} else {
ctx->is224 = false;
memcpy(ctx->state, init_state_sha256, 32);
memcpy(ctx->state, init_state_sha256, sizeof(ctx->state));
}
}
void mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char data[64] )
void mbedtls_sha256_process( mbedtls_sha256_context *ctx,
const unsigned char data[64] )
{
crypto_sha_update_state( ctx->state, data, 1, CRYPTO_SHA2 );
}
@ -253,8 +257,9 @@ void mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char da
/*
* SHA-256 process buffer
*/
void mbedtls_sha256_update( mbedtls_sha256_context *ctx, const unsigned char *input,
size_t ilen )
void mbedtls_sha256_update( mbedtls_sha256_context *ctx,
const unsigned char *input,
size_t ilen )
{
size_t fill;
uint32_t left;
@ -296,7 +301,8 @@ void mbedtls_sha256_update( mbedtls_sha256_context *ctx, const unsigned char *in
/*
* SHA-256 final digest
*/
void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, unsigned char output[32] )
void mbedtls_sha256_finish( mbedtls_sha256_context *ctx,
unsigned char output[32] )
{
uint32_t last, padn;
uint32_t high, low;

23
targets/targets.json
View File

@ -2314,13 +2314,14 @@
"EFM32": {
"inherits": ["Target"],
"extra_labels": ["Silicon_Labs", "EFM32"],
"macros": ["MBEDTLS_CONFIG_HW_SUPPORT"],
"public": false
},
"EFM32GG990F1024": {
"inherits": ["EFM32"],
"extra_labels_add": ["EFM32GG", "1024K", "SL_AES"],
"core": "Cortex-M3",
"macros": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4", "MBEDTLS_CONFIG_HW_SUPPORT"],
"macros_add": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"release_versions": ["2", "5"],
"device_name": "EFM32GG990F1024",
@ -2374,7 +2375,7 @@
"inherits": ["EFM32"],
"extra_labels_add": ["EFM32LG", "256K", "SL_AES"],
"core": "Cortex-M3",
"macros": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4", "MBEDTLS_CONFIG_HW_SUPPORT"],
"macros_add": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"release_versions": ["2", "5"],
"device_name": "EFM32LG990F256",
@ -2428,7 +2429,7 @@
"inherits": ["EFM32"],
"extra_labels_add": ["EFM32WG", "256K", "SL_AES"],
"core": "Cortex-M4F",
"macros": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4", "MBEDTLS_CONFIG_HW_SUPPORT"],
"macros_add": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"release_versions": ["2", "5"],
"device_name": "EFM32WG990F256",
@ -2483,7 +2484,7 @@
"extra_labels_add": ["EFM32ZG", "32K", "SL_AES"],
"core": "Cortex-M0+",
"default_toolchain": "uARM",
"macros": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0", "MBEDTLS_CONFIG_HW_SUPPORT"],
"macros_add": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
"supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
"default_lib": "small",
"release_versions": ["2"],
@ -2537,7 +2538,7 @@
"extra_labels_add": ["EFM32HG", "64K", "SL_AES"],
"core": "Cortex-M0+",
"default_toolchain": "uARM",
"macros": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0", "MBEDTLS_CONFIG_HW_SUPPORT"],
"macros_add": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
"supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
"default_lib": "small",
"release_versions": ["2"],
@ -2590,7 +2591,7 @@
"inherits": ["EFM32"],
"extra_labels_add": ["EFM32PG", "256K", "SL_CRYPTO"],
"core": "Cortex-M4F",
"macros": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4", "MBEDTLS_CONFIG_HW_SUPPORT"],
"macros_add": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"release_versions": ["2", "5"],
"device_name": "EFM32PG1B100F256GM32",
@ -2643,7 +2644,7 @@
"inherits": ["EFM32"],
"extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL", "SL_CRYPTO"],
"core": "Cortex-M4F",
"macros": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4", "MBEDTLS_CONFIG_HW_SUPPORT"],
"macros_add": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"release_versions": ["2", "5"],
"device_name": "EFR32MG1P132F256GM48",
@ -2654,7 +2655,7 @@
"inherits": ["EFM32"],
"extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL", "SL_CRYPTO"],
"core": "Cortex-M4F",
"macros": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4", "MBEDTLS_CONFIG_HW_SUPPORT"],
"macros_add": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"release_versions": ["2", "5"],
"public": false,
@ -2744,7 +2745,7 @@
"inherits": ["EFM32"],
"extra_labels_add": ["EFM32PG12", "1024K", "SL_CRYPTO"],
"core": "Cortex-M4F",
"macros": ["EFM32PG12B500F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4", "MBEDTLS_CONFIG_HW_SUPPORT"],
"macros_add": ["EFM32PG12B500F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"release_versions": ["2", "5"],
"public": false,
@ -2794,9 +2795,9 @@
},
"EFR32MG12P332F1024GL125": {
"inherits": ["EFM32"],
"extra_labels_add": ["EFR32MG12", "1024K", "SL_RAIL", "SL_CRYPTO", "MBEDTLS_CONFIG_HW_SUPPORT"],
"extra_labels_add": ["EFR32MG12", "1024K", "SL_RAIL", "SL_CRYPTO"],
"core": "Cortex-M4F",
"macros": ["EFR32MG12P332F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
"macros_add": ["EFR32MG12P332F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
"release_versions": ["2", "5"],
"public": false,