mirror of https://github.com/ARMmbed/mbed-os.git
LPCXpresso LPC1769 board ported
The blinky example compiles and runs. The board has a different eth phy component than mbed LPC1768. It requires a driver.pull/5025/head
Piotr Grygorczuk
parent
e4d0e12773
commit
9c77957798
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@ -0,0 +1,136 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PINNAMES_H
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#define MBED_PINNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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PIN_INPUT,
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PIN_OUTPUT
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} PinDirection;
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#define PORT_SHIFT 5
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typedef enum {
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// LPC Pin Names
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P0_0 = LPC_GPIO0_BASE,
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P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7, P0_8, P0_9, P0_10, P0_11, P0_12, P0_13, P0_14, P0_15, P0_16, P0_17, P0_18, P0_19, P0_20, P0_21, P0_22, P0_23, P0_24, P0_25, P0_26, P0_27, P0_28, P0_29, P0_30, P0_31,
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P1_0, P1_1, P1_2, P1_3, P1_4, P1_5, P1_6, P1_7, P1_8, P1_9, P1_10, P1_11, P1_12, P1_13, P1_14, P1_15, P1_16, P1_17, P1_18, P1_19, P1_20, P1_21, P1_22, P1_23, P1_24, P1_25, P1_26, P1_27, P1_28, P1_29, P1_30, P1_31,
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P2_0, P2_1, P2_2, P2_3, P2_4, P2_5, P2_6, P2_7, P2_8, P2_9, P2_10, P2_11, P2_12, P2_13, P2_14, P2_15, P2_16, P2_17, P2_18, P2_19, P2_20, P2_21, P2_22, P2_23, P2_24, P2_25, P2_26, P2_27, P2_28, P2_29, P2_30, P2_31,
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P3_0, P3_1, P3_2, P3_3, P3_4, P3_5, P3_6, P3_7, P3_8, P3_9, P3_10, P3_11, P3_12, P3_13, P3_14, P3_15, P3_16, P3_17, P3_18, P3_19, P3_20, P3_21, P3_22, P3_23, P3_24, P3_25, P3_26, P3_27, P3_28, P3_29, P3_30, P3_31,
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P4_0, P4_1, P4_2, P4_3, P4_4, P4_5, P4_6, P4_7, P4_8, P4_9, P4_10, P4_11, P4_12, P4_13, P4_14, P4_15, P4_16, P4_17, P4_18, P4_19, P4_20, P4_21, P4_22, P4_23, P4_24, P4_25, P4_26, P4_27, P4_28, P4_29, P4_30, P4_31,
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// mbed DIP Pin Names
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p5 = P0_9,
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p6 = P0_8,
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p7 = P0_7,
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p8 = P0_6,
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p9 = P0_0,
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p10 = P0_1,
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p11 = P0_18,
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p12 = P0_17,
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p13 = P0_15,
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p14 = P0_16,
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p15 = P0_23,
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p16 = P0_24,
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p17 = P0_25,
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p18 = P0_26,
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p19 = P1_30,
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p20 = P1_31,
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p21 = P0_2,
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p22 = P0_3,
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p23 = P0_21,
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p24 = P0_22,
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p25 = P0_27,
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p26 = P0_28,
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p27 = P2_13,
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p38 = P0_4,
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p39 = P0_5,
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p40 = P0_10,
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p41 = P0_11,
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p42 = P2_0,
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p43 = P2_1,
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p44 = P2_2,
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p45 = P2_3,
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p46 = P2_4,
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p47 = P2_5,
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p48 = P2_6,
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p49 = P2_7,
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p50 = P2_8,
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p51 = P2_10,
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p52 = P2_11,
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p53 = P2_12,
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// Other mbed Pin Names
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LED1 = P0_22,
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LED2 = P0_22,
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LED3 = P0_22,
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LED4 = P0_22,
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USBTX = p21,
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USBRX = p22,
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A0 = P0_23,
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A1 = P0_24,
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A2 = P0_25,
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A3 = P0_26,
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A4 = P1_30,
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A5 = P1_31,
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// Not connected
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NC = (int)0xFFFFFFFF,
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I2C_SCL0 = NC,
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I2C_SDA0 = NC,
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I2C_SCL1 = p10,
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I2C_SDA1 = p9,
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I2C_SCL2 = p41, // pin used by application board
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I2C_SDA2 = p40, // pin used by application board
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I2C_SCL = I2C_SCL2,
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I2C_SDA = I2C_SDA2,
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} PinName;
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typedef enum {
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PullUp = 0,
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PullDown = 3,
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PullNone = 2,
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Repeater = 1,
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OpenDrain = 4,
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PullDefault = PullDown
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} PinMode;
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// version of PINCON_TypeDef using register arrays
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typedef struct {
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__IO uint32_t PINSEL[11];
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uint32_t RESERVED0[5];
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__IO uint32_t PINMODE[10];
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__IO uint32_t PINMODE_OD[5];
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} PINCONARRAY_TypeDef;
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#define PINCONARRAY ((PINCONARRAY_TypeDef *)LPC_PINCON_BASE)
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -0,0 +1,70 @@
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// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
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// Check the 'features' section of the target description in 'targets.json' for more details.
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_DEVICE_H
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#define MBED_DEVICE_H
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#define DEVICE_ID_LENGTH 32
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#define DEVICE_MAC_OFFSET 20
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// #define DEVICE_PORTIN 1
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// #define DEVICE_PORTOUT 1
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// #define DEVICE_PORTINOUT 1
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// #define DEVICE_INTERRUPTIN 0
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// #define DEVICE_ANALOGIN 0
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// #define DEVICE_ANALOGOUT 0
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// #define DEVICE_SERIAL 1
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// #define DEVICE_I2C 0
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// #define DEVICE_I2CSLAVE 0
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// #define DEVICE_SPI 0
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// #define DEVICE_SPISLAVE 0
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// #define DEVICE_CAN 0
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// #define DEVICE_RTC 0
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// #define DEVICE_ETHERNET 0
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// #define DEVICE_PWMOUT 0
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// #define DEVICE_SEMIHOST 0
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// #define DEVICE_LOCALFILESYSTEM 0
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// #define DEVICE_SLEEP 1
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// #ifdef DEVICE_DEBUG_AWARENESS
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// #undef DEVICE_DEBUG_AWARENESS
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// #define DEVICE_DEBUG_AWARENESS 0
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// #endif
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// #define DEVICE_STDIO_MESSAGES 0
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// #define DEVICE_ERROR_PATTERN 0
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#include "objects.h"
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#endif
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@ -0,0 +1,8 @@
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// List of reserved pins for MBED LPC1768
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#ifndef RESERVED_PINS_H
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#define RESERVED_PINS_H
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#define TARGET_RESERVED_PINS {}
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#endif
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/* Linker script for mbed LPC1769 */
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/* Linker script to configure memory regions. */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x00002000, LENGTH = 504K
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RAM (rwx) : ORIGIN = 0x100000C8, LENGTH = (32K - 0xC8 - 32) /* topmost 32 bytes used by IAP functions */
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USB_RAM(rwx) : ORIGIN = 0x2007C000, LENGTH = 16K
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ETH_RAM(rwx) : ORIGIN = 0x20080000, LENGTH = 16K
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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*/
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text :
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{
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KEEP(*(.isr_vector))
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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__etext = .;
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.data : AT (__etext)
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{
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__data_start__ = .;
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Image$$RW_IRAM1$$Base = .;
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*(vtable)
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*(.data*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE (__fini_array_end = .);
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM
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.bss :
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{
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__bss_start__ = .;
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*(.bss*)
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*(COMMON)
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__bss_end__ = .;
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Image$$RW_IRAM1$$ZI$$Limit = . ;
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} > RAM
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.heap :
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{
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__end__ = .;
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end = __end__;
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*(.heap*)
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__HeapLimit = .;
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} > RAM
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/* .stack_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later */
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.stack_dummy :
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{
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*(.stack)
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} > RAM
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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__StackLimit = __StackTop - SIZEOF(.stack_dummy);
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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/* Code can explicitly ask for data to be
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placed in these higher RAM banks where
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they will be left uninitialized.
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*/
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.AHBSRAM0 (NOLOAD):
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{
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Image$$RW_IRAM2$$Base = . ;
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*(AHBSRAM0)
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Image$$RW_IRAM2$$ZI$$Limit = .;
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} > USB_RAM
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.AHBSRAM1 (NOLOAD):
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{
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Image$$RW_IRAM3$$Base = . ;
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*(AHBSRAM1)
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Image$$RW_IRAM3$$ZI$$Limit = .;
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} > ETH_RAM
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}
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@ -50,7 +50,7 @@
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#define INITIAL_SP (0x02009000UL)
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#endif
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#elif defined(TARGET_LPC1768)
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#elif defined(TARGET_LPC1768) || defined(TARGET_LPC1769)
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#ifndef INITIAL_SP
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#define INITIAL_SP (0x10008000UL)
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@ -243,6 +243,16 @@
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"features": ["LWIP"],
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"device_name": "LPC1768"
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},
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"LPC1769": {
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"inherits": ["LPCTarget"],
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"core": "Cortex-M3",
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"extra_labels": ["NXP", "LPC176X", "XPRESSO_LPC1769"],
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"supported_toolchains": ["GCC_ARM", "IAR"],
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"detect_code": ["1010"],
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"device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
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"release_versions": ["5"],
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"device_name": "LPC1769"
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},
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"ARCH_PRO": {
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"supported_form_factors": ["ARDUINO"],
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"core": "Cortex-M3",
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