Merge pull request #6468 from codeauroraforum/Fix_DeepSleep_Implementation

Fix deep sleep implementation
pull/6538/merge
Cruz Monrreal 2018-04-17 10:53:27 -05:00 committed by GitHub
commit 7489401044
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
21 changed files with 9084 additions and 4119 deletions

View File

@ -467,6 +467,8 @@
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_DATA_PATH_WIDTH (4)
/* @brief P-Flash block swap feature. */
#define FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP (0)
/* @brief P-Flash protection region count. */
#define FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT (32)
/* @brief Has FlexNVM memory. */
#define FSL_FEATURE_FLASH_HAS_FLEX_NVM (0)
/* @brief FlexNVM start address. (Valid only if FlexNVM is available.) */

View File

@ -665,6 +665,8 @@
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_DATA_PATH_WIDTH (4)
/* @brief P-Flash block swap feature. */
#define FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP (0)
/* @brief P-Flash protection region count. */
#define FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT (32)
/* @brief Has FlexNVM memory. */
#define FSL_FEATURE_FLASH_HAS_FLEX_NVM (0)
/* @brief FlexNVM start address. (Valid only if FlexNVM is available.) */

View File

@ -472,6 +472,8 @@
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_DATA_PATH_WIDTH (8)
/* @brief P-Flash block swap feature. */
#define FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP (0)
/* @brief P-Flash protection region count. */
#define FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT (32)
/* @brief Has FlexNVM memory. */
#define FSL_FEATURE_FLASH_HAS_FLEX_NVM (0)
/* @brief FlexNVM start address. (Valid only if FlexNVM is available.) */

View File

@ -434,6 +434,8 @@
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_DATA_PATH_WIDTH (8)
/* @brief P-Flash block swap feature. */
#define FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP (1)
/* @brief P-Flash protection region count. */
#define FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT (32)
/* @brief Has FlexNVM memory. */
#define FSL_FEATURE_FLASH_HAS_FLEX_NVM (0)
/* @brief FlexNVM start address. (Valid only if FlexNVM is available.) */

View File

@ -477,6 +477,8 @@
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_DATA_PATH_WIDTH (8)
/* @brief P-Flash block swap feature. */
#define FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP (0)
/* @brief P-Flash protection region count. */
#define FSL_FEATURE_FLASH_PFLASH_PROTECTION_REGION_COUNT (32)
/* @brief Has FlexNVM memory. */
#define FSL_FEATURE_FLASH_HAS_FLEX_NVM (0)
/* @brief FlexNVM start address. (Valid only if FlexNVM is available.) */

View File

@ -25,27 +25,60 @@ void hal_sleep(void)
SMC_SetPowerModeWait(SMC);
}
static void PreEnterStopModes(void)
{
flash_prefetch_speculation_status_t speculationStatus =
{
kFLASH_prefetchSpeculationOptionDisable, /* Disable instruction speculation.*/
kFLASH_prefetchSpeculationOptionDisable, /* Disable data speculation.*/
};
__ISB();
/*
* Before enter stop modes, the flash cache prefetch should be disabled.
* Otherwise the prefetch might be interrupted by stop, then the data and
* and instruction from flash are wrong.
*/
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
}
static void PostExitStopModes(void)
{
flash_prefetch_speculation_status_t speculationStatus =
{
kFLASH_prefetchSpeculationOptionEnable, /* Enable instruction speculation.*/
kFLASH_prefetchSpeculationOptionEnable, /* Enable data speculation.*/
};
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
__ISB();
}
void hal_deepsleep(void)
{
#if (defined(FSL_FEATURE_SOC_MCG_COUNT) && FSL_FEATURE_SOC_MCG_COUNT)
#if defined(kMCG_ModePEE)
#if (defined(FSL_FEATURE_MCG_HAS_PLL) && FSL_FEATURE_MCG_HAS_PLL)
mcg_mode_t mode = CLOCK_GetMode();
#endif
#endif
#endif // FSL_FEATURE_MCG_HAS_PLL
#endif // FSL_FEATURE_SOC_MCG_COUNT
SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
PreEnterStopModes();
SMC_SetPowerModeVlps(SMC);
PostExitStopModes();
#if (defined(FSL_FEATURE_SOC_MCG_COUNT) && FSL_FEATURE_SOC_MCG_COUNT)
#if (defined(FSL_FEATURE_MCG_HAS_PLL) && FSL_FEATURE_MCG_HAS_PLL)
/*
* If enter stop modes when MCG in PEE mode, then after wakeup, the MCG is in PBE mode,
* need to enter PEE mode manually.
*/
#if defined(kMCG_ModePEE)
if (mode == kMCG_ModePEE) {
BOARD_BootClockRUN();
}
#endif
#endif
#endif // FSL_FEATURE_MCG_HAS_PLL
#endif // FSL_FEATURE_SOC_MCG_COUNT
}

View File

@ -26,8 +26,8 @@ void hal_sleep(void)
void hal_deepsleep(void)
{
LPC_CLOCK_INTERNAL_IRC();
LPC_CLOCK_INTERNAL_IRC;
/* Enter Deep Sleep mode */
POWER_EnterDeepSleep(APP_EXCLUDE_FROM_DEEPSLEEP);
LPC_CLOCK_RUN();
LPC_CLOCK_RUN;
}

View File

@ -25,8 +25,9 @@
SYSCON_PDRUNCFG_PDEN_SRAM0_MASK | SYSCON_PDRUNCFG_PDEN_SRAM1_2_3_MASK)
/* Defines used by the sleep code */
#define LPC_CLOCK_INTERNAL_IRC BOARD_BootClockFRO12M
#define LPC_CLOCK_RUN BOARD_BootClockFROHF48M
#define LPC_CLOCK_INTERNAL_IRC BOARD_BootClockFRO12M()
#define LPC_CLOCK_RUN ((SYSCON->DEVICE_ID0 == 0xFFF54628) ? \
BOARD_BootClockPLL220M() : BOARD_BootClockFROHF48M())
#define DEVICE_ID_LENGTH 24

View File

@ -25,8 +25,9 @@
SYSCON_PDRUNCFG_PDEN_SRAM0_MASK | SYSCON_PDRUNCFG_PDEN_SRAM1_2_3_MASK)
/* Defines used by the sleep code */
#define LPC_CLOCK_INTERNAL_IRC BOARD_BootClockFRO12M
#define LPC_CLOCK_RUN BOARD_BootClockFROHF48M
#define LPC_CLOCK_INTERNAL_IRC BOARD_BootClockFRO12M()
#define LPC_CLOCK_RUN ((SYSCON->DEVICE_ID0 == 0xFFF54628) ? \
BOARD_BootClockPLL220M() : BOARD_BootClockFROHF48M())
#define DEVICE_ID_LENGTH 24