mirror of https://github.com/ARMmbed/mbed-os.git
Change the way of enter/exit of critical section of code
I changed disable_irq() / enable_irq() to core_util_critical_section_enter() / core_util_critical_section_exit() by utilizing "mbed_critical" function in the below drivers. - serial_api.c - us_ticker.cpull/5628/head
parent
904fdaea7a
commit
f526f19661
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@ -26,6 +26,7 @@
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#include "scif_iodefine.h"
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#include "cpg_iodefine.h"
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#include "mbed_critical.h"
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/******************************************************************************
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* INITIALIZATION
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@ -510,7 +511,7 @@ static void uart_rx_irq(IRQn_Type irq_num, uint32_t index) {
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static void uart_err_irq(IRQn_Type irq_num, uint32_t index) {
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serial_t *obj = uart_data[index].receiving_obj;
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int was_masked, err_read;
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int err_read;
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if (obj) {
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serial_irq_err_set(obj, 0);
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@ -525,11 +526,7 @@ static void uart_err_irq(IRQn_Type irq_num, uint32_t index) {
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}
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serial_rx_abort_asynch(obj);
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#if defined ( __ICCARM__ )
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was_masked = __disable_irq_iar();
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#else
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was_masked = __disable_irq();
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#endif /* __ICCARM__ */
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core_util_critical_section_enter();
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if (obj->serial.uart->SCFSR & 0x93) {
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err_read = obj->serial.uart->SCFSR;
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obj->serial.uart->SCFSR = (err_read & ~0x93);
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@ -537,9 +534,7 @@ static void uart_err_irq(IRQn_Type irq_num, uint32_t index) {
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if (obj->serial.uart->SCLSR & 1) {
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obj->serial.uart->SCLSR = 0;
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}
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if (!was_masked) {
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__enable_irq();
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}
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core_util_critical_section_exit();
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}
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}
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@ -679,21 +674,14 @@ static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
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int serial_getc(serial_t *obj) {
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uint16_t err_read;
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int data;
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int was_masked;
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#if defined ( __ICCARM__ )
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was_masked = __disable_irq_iar();
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#else
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was_masked = __disable_irq();
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#endif /* __ICCARM__ */
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core_util_critical_section_enter();
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if (obj->serial.uart->SCFSR & 0x93) {
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err_read = obj->serial.uart->SCFSR;
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obj->serial.uart->SCFSR = (err_read & ~0x93);
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}
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obj->serial.uart->SCSCR |= 0x0040; // Set RIE
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if (!was_masked) {
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__enable_irq();
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}
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core_util_critical_section_exit();
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if (obj->serial.uart->SCLSR & 0x0001) {
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obj->serial.uart->SCLSR = 0u; // ORER clear
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@ -702,16 +690,10 @@ int serial_getc(serial_t *obj) {
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while (!serial_readable(obj));
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data = obj->serial.uart->SCFRDR & 0xff;
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#if defined ( __ICCARM__ )
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was_masked = __disable_irq_iar();
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#else
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was_masked = __disable_irq();
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#endif /* __ICCARM__ */
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core_util_critical_section_enter();
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err_read = obj->serial.uart->SCFSR;
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obj->serial.uart->SCFSR = (err_read & 0xfffD); // Clear RDF
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if (!was_masked) {
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__enable_irq();
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}
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core_util_critical_section_exit();
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if (err_read & 0x80) {
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data = -1; //err
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@ -727,20 +709,13 @@ void serial_putc(serial_t *obj, int c) {
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static void serial_put_done(serial_t *obj)
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{
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int was_masked;
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volatile uint16_t dummy_read;
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#if defined ( __ICCARM__ )
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was_masked = __disable_irq_iar();
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#else
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was_masked = __disable_irq();
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#endif /* __ICCARM__ */
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core_util_critical_section_enter();
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dummy_read = obj->serial.uart->SCFSR;
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obj->serial.uart->SCFSR = (dummy_read & 0xff9f); // Clear TEND/TDFE
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obj->serial.uart->SCSCR |= 0x0080; // Set TIE
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if (!was_masked) {
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__enable_irq();
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}
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core_util_critical_section_exit();
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}
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int serial_readable(serial_t *obj) {
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@ -752,20 +727,13 @@ int serial_writable(serial_t *obj) {
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}
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void serial_clear(serial_t *obj) {
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int was_masked;
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#if defined ( __ICCARM__ )
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was_masked = __disable_irq_iar();
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#else
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was_masked = __disable_irq();
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#endif /* __ICCARM__ */
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core_util_critical_section_enter();
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obj->serial.uart->SCFCR |= 0x06; // TFRST = 1, RFRST = 1
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obj->serial.uart->SCFCR &= ~0x06; // TFRST = 0, RFRST = 0
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obj->serial.uart->SCFSR &= ~0x0093u; // ER, BRK, RDF, DR = 0
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if (!was_masked) {
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__enable_irq();
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}
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core_util_critical_section_exit();
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}
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void serial_pinout_tx(PinName tx) {
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@ -773,62 +741,35 @@ void serial_pinout_tx(PinName tx) {
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}
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void serial_break_set(serial_t *obj) {
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int was_masked;
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#if defined ( __ICCARM__ )
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was_masked = __disable_irq_iar();
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#else
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was_masked = __disable_irq();
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#endif /* __ICCARM__ */
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core_util_critical_section_enter();
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// TxD Output(L)
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obj->serial.uart->SCSPTR &= ~0x0001u; // SPB2DT = 0
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obj->serial.uart->SCSCR &= ~0x0020u; // TE = 0 (Output disable)
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if (!was_masked) {
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__enable_irq();
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}
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core_util_critical_section_exit();
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}
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void serial_break_clear(serial_t *obj) {
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int was_masked;
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#if defined ( __ICCARM__ )
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was_masked = __disable_irq_iar();
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#else
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was_masked = __disable_irq();
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#endif /* __ICCARM__ */
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core_util_critical_section_enter();
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obj->serial.uart->SCSCR |= 0x0020u; // TE = 1 (Output enable)
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obj->serial.uart->SCSPTR |= 0x0001u; // SPB2DT = 1
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if (!was_masked) {
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__enable_irq();
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}
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core_util_critical_section_exit();
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}
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void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
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// determine the UART to use
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int was_masked;
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serial_flow_irq_set(obj, 0);
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if (type == FlowControlRTSCTS) {
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#if defined ( __ICCARM__ )
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was_masked = __disable_irq_iar();
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#else
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was_masked = __disable_irq();
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#endif /* __ICCARM__ */
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core_util_critical_section_enter();
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obj->serial.uart->SCFCR = 0x0008u; // CTS/RTS enable
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if (!was_masked) {
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__enable_irq();
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}
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core_util_critical_section_exit();
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pinmap_pinout(rxflow, PinMap_UART_RTS);
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pinmap_pinout(txflow, PinMap_UART_CTS);
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} else {
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#if defined ( __ICCARM__ )
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was_masked = __disable_irq_iar();
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#else
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was_masked = __disable_irq();
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#endif /* __ICCARM__ */
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core_util_critical_section_enter();
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obj->serial.uart->SCFCR = 0x0000u; // CTS/RTS diable
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if (!was_masked) {
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__enable_irq();
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}
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core_util_critical_section_exit();
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}
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}
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@ -21,6 +21,7 @@
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#include "RZ_A1_Init.h"
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#include "MBRZA1H.h"
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#include "vfp_neon_push_pop.h"
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#include "mbed_critical.h"
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#define US_TICKER_TIMER_IRQn (OSTMI1TINT_IRQn)
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#define CPG_STBCR5_BIT_MSTP50 (0x01u) /* OSTM1 */
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@ -93,21 +94,13 @@ static void us_ticker_read_last(void) {
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}
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uint32_t us_ticker_read() {
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int check_irq_masked;
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#if defined ( __ICCARM__)
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check_irq_masked = __disable_irq_iar();
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#else
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check_irq_masked = __disable_irq();
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#endif /* __ICCARM__ */
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core_util_critical_section_enter();
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__vfp_neon_push();
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us_ticker_read_last();
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__vfp_neon_pop();
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if (!check_irq_masked) {
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__enable_irq();
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}
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core_util_critical_section_exit();
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/* clock to us */
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return (uint32_t)ticker_us_last64;
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