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Code Issues Projects Releases Wiki Activity

rename MURATA type ABZ & WISE_1510 to their expected name

pull/6027/head
Wilfried Chauveau 2018-02-06 20:18:43 +00:00
parent 8ae80892b7
commit 6c9fcf3dd8
12 changed files with 16 additions and 16 deletions
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0
features/mbedtls/targets/TARGET_STM/TARGET_STM32L4/TARGET_WISE_1510/mbedtls_device.h → features/mbedtls/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTB_ADV_WISE_1510/mbedtls_device.h
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0
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/TARGET_CMWX1ZZABZ_078/PeripheralNames.h → targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/TARGET_MTB_MURATA_ABZ/PeripheralNames.h
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0
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/TARGET_CMWX1ZZABZ_078/PeripheralPins.c → targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/TARGET_MTB_MURATA_ABZ/PeripheralPins.c
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0
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/TARGET_CMWX1ZZABZ_078/PinNames.h → targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/TARGET_MTB_MURATA_ABZ/PinNames.h
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0
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/TARGET_CMWX1ZZABZ_078/system_clock.c → targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/TARGET_MTB_MURATA_ABZ/system_clock.c
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0
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TARGET_WISE_1510/PeripheralNames.h → targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TARGET_MTB_ADV_WISE_1510/PeripheralNames.h
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0
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TARGET_WISE_1510/PeripheralPins.c → targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TARGET_MTB_ADV_WISE_1510/PeripheralPins.c
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0
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TARGET_WISE_1510/PinNames.h → targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TARGET_MTB_ADV_WISE_1510/PinNames.h
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0
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TARGET_WISE_1510/system_clock.c → targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TARGET_MTB_ADV_WISE_1510/system_clock.c
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4
targets/targets.json
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@ -1515,7 +1515,7 @@
"device_name": "STM32L433RC",
"bootloader_supported": true
},
"WISE_1510": {
"MTB_ADV_WISE_1510": {
"inherits": ["FAMILY_STM32"],
"supported_form_factors": ["ARDUINO"],
"core": "Cortex-M4F",
@ -1762,7 +1762,7 @@
"release_versions": ["2", "5"],
"device_name": "STM32L072CZ"
},
"CMWX1ZZABZ_078": {
"MTB_MURATA_ABZ": {
"inherits": ["FAMILY_STM32"],
"core": "Cortex-M0+",
"extra_labels_add": ["STM32L0", "STM32L0x2xZ", "STM32L082CZ", "STM32L082xx"],

14
tools/build_travis.py
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@ -54,7 +54,7 @@ build_list = [
{ "target": "NUCLEO_F412ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] },
{ "target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] },
{ "target": "NUCLEO_L432KC", "toolchains": "GCC_ARM", "libs": ["dsp"] },
{ "target": "WISE_1510", "toolchains": "GCC_ARM", "libs": ["dsp"] },
{ "target": "MTB_ADV_WISE_1510", "toolchains": "GCC_ARM", "libs": ["dsp"] },
{ "target": "NUCLEO_L476RG", "toolchains": "GCC_ARM", "libs": ["dsp"] },
{ "target": "NUCLEO_L011K4", "toolchains": "GCC_ARM", "libs": ["dsp"] },
{ "target": "NUCLEO_L031K6", "toolchains": "GCC_ARM", "libs": ["dsp"] },
@ -91,7 +91,7 @@ build_list = [
{ "target": "DISCO_L072CZ_LRWAN1", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] },
# module manufacturer : muRata
{ "target": "CMWX1ZZABZ_078", "toolchains": "GCC_ARM", "libs": [] },
{ "target": "MTB_MURATA_ABZ", "toolchains": "GCC_ARM", "libs": [] },
),
},
@ -155,7 +155,7 @@ build_list = [
)
},
{
{
"ATMEL":
(
{ "target": "SAMR21G18A", "toolchains": "GCC_ARM", "libs": ["dsp"] },
@ -166,7 +166,7 @@ build_list = [
},
{
{
"NUVOTON":
(
{ "target": "NUMAKER_PFM_NUC472", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] },
@ -235,7 +235,7 @@ linking_list = [
{"target": "NUCLEO_F401RE",
"toolchains": "GCC_ARM",
"tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
"usb" : ["USB_1", "USB_2" ,"USB_3"],
"usb" : ["USB_1", "USB_2" ,"USB_3"],
}
},
{"target": "NUCLEO_F411RE",
@ -323,7 +323,7 @@ linking_list = [
"tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
}
},
{"target": "CMWX1ZZABZ_078",
{"target": "MTB_MURATA_ABZ",
"toolchains": "GCC_ARM",
"tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
}
@ -353,7 +353,7 @@ linking_list = [
)
},
{
"RENESAS":
"RENESAS":
(
{
"target": "RZ_A1H",

14
tools/export/sw4stm32/__init__.py
View File

@ -100,10 +100,10 @@ class Sw4STM32(GNUARMEclipse):
'name': 'DISCO-L072CZ-LRWAN1',
'mcuId': 'STM32L072CZTx'
},
'CMWX1ZZABZ_078':
'MTB_MURATA_ABZ':
{
'name': 'CMWX1ZZABZ-078',
'mcuId': 'CMWX1ZZABZ_078'
'name': 'MTB-MURATA-ABZ',
'mcuId': 'STM32L0x2xZ'
},
'DISCO_L475VG_IOT01A':
{
@ -255,10 +255,10 @@ class Sw4STM32(GNUARMEclipse):
'name': 'NUCLEO-L432KC',
'mcuId': 'STM32L432KCUx'
},
'WISE_1510':
'MTB_ADV_WISE_1510':
{
'name': 'WISE-1510',
'mcuId': 'STM32L433RCx'
'name': 'MTB-ADV-WISE-1510',
'mcuId': 'STM32L443xC'
},
'NUCLEO_L476RG':
{
@ -274,7 +274,7 @@ class Sw4STM32(GNUARMEclipse):
{
'name': 'NUCLEO-L496ZG',
'mcuId': 'STM32L496ZGTx'
},
},
'NUCLEO_L496ZG_P':
{
'name': 'NUCLEO-L496ZG',