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4001 Commits (5c2cf077801d202a00925967e684e4c9dbe02584)

Author SHA1 Message Date
Russ Butler e2d003a420 Fix memory allocation on STM32L4 devices 
Depending on initial size allocated on STM32L4 devices with
TWO_RAM_REGIONS  set a crash may occur. This is because there is a
mismatch between the size newlib is expecting and the size actually
returned by _sbrk. This is because the STM32L4 implementation of _sbrk
is performing alignment internally.

This patch fixes this problem by removing the code in __wrap__sbrk
which performs the alignment.
 2018-08-31 18:31:52 -05:00
Cruz Monrreal 00b7700be2
Merge pull request #7875 from c1728p9/feature_CMSIS_5_0b521765 
Update CMSIS to 5.4.0
 2018-08-31 11:31:37 -05:00
Cesar f91bba9803 Updated pinmap to fix CAN and enable UART hardware flow control 2018-08-31 17:17:29 +02:00
Cesar c10907288d Corrected device_has_add flags for bluepill_f103c8 target 2018-08-31 17:17:29 +02:00
Jammu Kekkonen 1a9999708e Fix memory reservation for Softdevice in NRF52_DK 2018-08-31 14:13:55 +03:00
Maciej Bocianski 3a64383de5 fix qspi address sending for nrf52 
fix address sending in qspi_command_transfer
now address is send MSB first
 2018-08-31 10:48:37 +02:00
Ammad Rehmat b934632653 Access Point API 2018-08-31 11:33:30 +05:00
ccli8 55328ebdd5 [Nuvoton] Fix pin mode mapping between input pull mode/direction and I/O mode 
1. Modify PinMode enum to fully support GPIO I/O modes.
2. Translate input pull mode/direction to I/O mode, where H/W doesn't support
   separate configuration for input pull mode/direction.
3. Allow for configuring I/O mode in addition to input pull mode.
 2018-08-31 10:06:30 +08:00
Cruz Monrreal 06a98e7dcf
Merge pull request #7778 from SeppoTakalo/provide_default_mesh 
Fix MeshInterface::get_default_instance()
 2018-08-30 16:11:00 -05:00
Wajahat Abbas a93ff7c931 Added PC2 pin to ADC pin map 2018-08-30 15:19:50 +05:00
Seppo Takalo 4989650854 Don't provide default interface on NCS36510, won't fit testcases on IAR 2018-08-30 11:04:25 +03:00
Martin Kojtal 56117a86c8
Merge pull request #7871 from juhoeskeli/NUCLEO_F207ZG_LINKER_MCC 
Updated linker files (GCC_ARM, ARM, IAR) for NUCLEO_F207ZG and enabled bootloader functionality
 2018-08-30 09:49:17 +02:00
justinkim 251ab0173d Stack size change to 1K in IAR Linker Script. 2018-08-30 08:41:12 +09:00
Yossi Levy ed8e170d15 Moving SD, SPIF and FLASHIAP into mbedos and refactoring features storage directory structure. 2018-08-29 12:01:11 +03:00
justinkim 3f4d30de56 Fix Bug : IAR heap memory problem 2018-08-29 14:20:30 +09:00
Edmund Hsu b57f90241e Apply consistent system return code to adi_system_EnableRetention() 2018-08-29 13:42:16 +10:00
Edmund Hsu ae492d9c4a Add consistent ADuCM3029 System return codes and remove duplicate codes 2018-08-29 13:38:30 +10:00
Martin Kojtal 16d23702bf
Merge pull request #7873 from 0xc0170/fix_realtek_ipv6 
realtek: fix #7829 - remove dhcps files
 2018-08-28 14:37:46 +02:00
Seppo Takalo 9836b9bd6a Provide default mesh driver on NCS36510 2018-08-28 11:02:58 +03:00
Juho Eskeli d5b374b327 Correct comment about stack size in IAR linker file 2018-08-28 08:44:08 +03:00
Juho Eskeli 5cc06238ea Enable bootloader for NUCLEO_F207ZG 2018-08-28 08:44:08 +03:00
Juho Eskeli 22137b45dd Update NUCLEO_F207ZG linker files 2018-08-28 08:44:08 +03:00
Mahesh Mahadevan 2bc140e978 MIMXRT1050_EVK: Update SPI HAL driver 
Use a different SDK API to write to the SPI Bus

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-27 14:20:49 -05:00
Cruz Monrreal 91354184dc
Merge pull request #7825 from SiliconLabs/siliconlabs-qspi 
Silicon Labs QSPI HAL implementation
 2018-08-27 13:51:38 -05:00
alrodlim 90689c3191 fixed pin names of I2C pins 2018-08-27 07:29:07 -05:00
Martin Kojtal a24cecfc94
Merge pull request #7805 from jamesbeyond/fm_test 
Skip Greentea tests for Mbed OS code coverage on Fast Models
 2018-08-27 10:39:43 +02:00
Martin Kojtal ce28c91405
Merge pull request #7534 from bentcooke/mote_L152_en_os5 
enable MOTE_L152 for OS5
 2018-08-27 10:27:36 +02:00
Steven Cooreman 55c6dade3d Apply changes corresponding to #7817 
QSPI standard pin names were changed after the QSPI feature PR.
 2018-08-27 10:10:18 +02:00
Steven e0d033bdd1 Allow unaligned input/output for QSPI 
The code is written such that access to the data input/output happens word-by-word, and that means unaligned access is fine (though with a performance loss) on Cortex-M3/M4 devices.
 2018-08-27 10:03:08 +02:00
Steven 845a5beb30 Initial commit of Silicon Labs QSPI HAL implementation 
* For EFM32GG11, since that is the only Silicon Labs target with QSPI per today
* Verified working using the on-board flash and tests-mbed_hal-qspi
 2018-08-27 10:03:08 +02:00
Russ Butler 22ebf69dea Revert "EFM32: Use SECURE_ACCESS to access the ROM table" 
This reverts commit 1b0922e97b.
 2018-08-25 20:40:35 -05:00
Russ Butler 4ff5ea40dd Revert uVisor changes for K64F 
Revert the changes made in the commit:
1c2a7d8842
Added the commit: Access MCG and SIM through secure access
 2018-08-25 20:40:31 -05:00
Cruz Monrreal 2f8e679183
Merge pull request #7592 from orenc17/remove_uvisor 
Remove uVisor from mbed-os
 2018-08-25 19:52:24 -05:00
Cruz Monrreal 7531b31c01
Merge pull request #7751 from mikaleppanen/realtek_emac_interf 
Realtek RTL8195A wifi interface to inherit EMAC interface
 2018-08-24 19:30:39 -05:00
Martin Kojtal 31a6fb49bd
Merge pull request #7817 from maciejbocianski/qspi_pinnames 
standardise QSPI pin names
 2018-08-24 21:12:25 +02:00
Martin Kojtal 2d330533a4
Merge pull request #7652 from andrewleech/nrf5x_config_lfclk 
NRF5x: Fix config of LFCLK source / settings.
 2018-08-24 13:05:24 +02:00
Maciej Bocianski 5195c820e6 standardise QSPI pin names 2018-08-24 12:09:51 +02:00
Martin Kojtal 812c6d5c88
Merge pull request #7783 from maciejbocianski/feature-qspi_merging 
merge QSPI feature branch
 2018-08-24 10:50:18 +02:00
Martin Kojtal ab029b5f65 realtek: fix #7829 - remove dhcps files 2018-08-23 16:48:00 +01:00
Cruz Monrreal cb8d09a88a
Merge pull request #7843 from codeauroraforum/MXRT_Fix_I2C_Byte_Transfer 
MIMXRT1050: Fix I2C Byte transfer functions
 2018-08-23 10:05:08 -05:00
Fred.Li 84eda278a5 Fix link issue for mbed-cloud-client-example with ARM toolchain. 2018-08-23 17:25:07 +08:00
ben 32647e6888 enable MOTE_L152 for OS5 2018-08-22 11:49:25 -05:00
Ashok Rao 19a571c911 Removing default flow control for BL652 2018-08-22 16:50:22 +01:00
Oren Cohen 787317b7eb Remove uVisor from mbed-os 2018-08-22 16:36:59 +03:00
Maciej Bocianski 3bf9df7b56 target DISCO_F413ZH: add QSPI flash pin names 2018-08-22 15:02:13 +02:00
adustm 6095ccf1b4 Add reset internal state before call to HAL_QspiInit function 2018-08-22 15:02:11 +02:00
adustm 7dda4e4fc6 Implement qspi_free function 2018-08-22 15:02:10 +02:00
adustm 5c26e15cd3 Fix support of max flash size 2018-08-22 15:02:09 +02:00
jeromecoutant 43258a8ff4 STM32 : add all QSPI pins in available targets 2018-08-22 15:02:08 +02:00
Maciej Bocianski 1534426b7e nrf52x: fix QSPI enable flag 
QSPI feature was mistakenly moved form target nrf52840 to nrf52832
while rebasing. This change fixes it
 2018-08-22 15:02:07 +02:00
Maciej Bocianski 8b36d6b39a NRF5: fix qspi R/W opcodes mapping 2018-08-22 15:02:05 +02:00
Maciej Bocianski c2cc559aa7 NRF5: fix qspi custom command sending 2018-08-22 15:02:05 +02:00
Maciej Bocianski 67798d6eb2 STM: add qspi pin names for DISCO_L475VG_IOT01A 2018-08-22 15:02:04 +02:00
Maciej Bocianski 42935bbdc0 STM qspi: temporary fix for qspi_free return value 2018-08-22 15:02:03 +02:00
Maciej Bocianski 1f4cc95f25 fix qspi command transfer for NORDIC 
Add address unpacking support.
Only used in erase commands
 2018-08-22 15:02:03 +02:00
adustm 2f06423a89 Add support for QSPI on DISCO_L476VG 2018-08-22 15:02:01 +02:00
adustm c00e49fcf2 Enable QSPI for DISCO_F746NG 2018-08-22 15:01:54 +02:00
adustm 293d1bda42 Add MBED_WEAK for pins 2018-08-22 15:00:22 +02:00
adustm 9b4b28fc3f Support maximum flash size : 4Gbytes 2018-08-22 15:00:22 +02:00
adustm 50b8225948 Enable QSPI feature for DISCO_F413ZH platform 2018-08-22 15:00:21 +02:00
adustm c57a47e4b5 Change default FlashSize to 64Mbit = 8Mbytes = 0x800000 2018-08-22 15:00:20 +02:00
adustm 8e08740237 Fix Instruction with no data command 
Adding QSPI_DATA_NONE activates the transfer
of the command inside HAL_QSPI_COMMAND function
 2018-08-22 15:00:19 +02:00
adustm 05899e9c70 Fix Address.Size and AlternateByes.Size by shifting them 
The ST HAL code is waiting for the correctly shifted vlue
(for a direct write into the HW register)
 2018-08-22 15:00:18 +02:00
Martin Kojtal d282c81e86 QSPI: add STM32L4 support 
Disco IoT board support for QSPI. As it does not have dual flash support in QSPI,
we need to fix qspi hal implementation.
 2018-08-22 15:00:17 +02:00
Martin Kojtal ae7bb17eaf QSPI: add flash pins for nrf52480_dk board 2018-08-22 15:00:16 +02:00
Martin Kojtal 0f7fd757a4 QSPI: add flash pins for F469 disco board 2018-08-22 15:00:16 +02:00
Martin Kojtal c778c90184 QSPI STM32: fix default fifo and cycle 
As example for DISCO F469NI defines them
 2018-08-22 15:00:15 +02:00
Martin Kojtal 8783956a77 QSPI STM32: fix prepare comman - alt/address 2018-08-22 15:00:14 +02:00
Martin Kojtal fff20729be QSPI STM32: fix command transfer 
use write/read from STM32 driver
 2018-08-22 15:00:14 +02:00
Martin Kojtal 5038b38622 QSPI STM32: fix pin merging 
hw name as input
 2018-08-22 15:00:13 +02:00
Martin Kojtal 16ca742d87 QSPI STM32: fix disabled format phase 2018-08-22 15:00:12 +02:00
Martin Kojtal 2766672f64 QSPI STM32: add QSPI_x support to pinnames 2018-08-22 15:00:12 +02:00
Martin Kojtal 660d250e0d QSPI STM32: init returns error if failed to init 2018-08-22 15:00:11 +02:00
Martin Kojtal 551f044e77 QSPI STM32: add qspi_command_transfer implementation 2018-08-22 15:00:11 +02:00
Martin Kojtal 6e5b889e52 QSPI STM32: remove polling from write/read 
This will be part of custom instruction transfer, the flow will be:

1. write data
2. wait for transfer to complete (poll status register from the memory device)
 2018-08-22 15:00:10 +02:00
Martin Kojtal 8da072d8af QSPI STM32: set default command values to none 2018-08-22 15:00:10 +02:00
Martin Kojtal 11ae100d80 QSPI STM32: fix return value in frequency 2018-08-22 15:00:09 +02:00
Martin Kojtal 5e75b39b78 QSPI STM32: fix ssel af selection 2018-08-22 15:00:09 +02:00
Martin Kojtal 7da0ac2516 QSPI: add STM32 implementation 2018-08-22 15:00:08 +02:00
Senthil Ramakrishnan cb4308ad64 Remove changes to Nordic SDK and modify HAL to track qspi init 2018-08-22 15:00:03 +02:00
Senthil Ramakrishnan 10a6fd6549 Add support for 1_1_2 and 1_2_2 modes in HAL 2018-08-22 15:00:01 +02:00
Senthil Ramakrishnan 16d121c5d2 Review fixes and doxygen changes 2018-08-22 15:00:00 +02:00
Senthil Ramakrishnan 009cc8b474 Enabling QSPI headers in Nordic HAL implementation and fix for UART STDIO definitions 2018-08-22 14:59:59 +02:00
Senthil Ramakrishnan 2df58e2d25 Modify QSPI HAL API to include an API for command-transfer operations 2018-08-22 14:59:59 +02:00
Martin Kojtal d1b51b6328 QSPI: initial HAL nrf52840 version 
This commit adds QSPI HAL implementation for nrf52840 MCU targets
 2018-08-22 14:59:58 +02:00
Martin Kojtal d28d13cc9b
Merge pull request #7790 from jeromecoutant/PR_LPTICKER_RTC 
STM32 LPTICKER : RTC wake up timer is reset before setting a new one
 2018-08-22 14:04:58 +02:00
Andrew Leech 629357270e NRF5x: Fix config of LFCLK source / settings. 2018-08-22 13:55:28 +10:00
Mahesh Mahadevan f71004cf89 MIMXRT1050: Fix I2C Byte transfer functions 
1. Added a flag to issue START command
2. Do not send START command inside i2c_start function as
   the LPI2C hardware will issue a STOP on reception
   of a NACK
3. Remove the i2c_address global variable, this is not
   required

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-21 10:25:00 -05:00
Cruz Monrreal 17a525c487
Merge pull request #7619 from u-blox/cellular_ublox_udp_tcp_imp 
UBLOX cellular api's for UDP and TCP
 2018-08-21 10:12:47 -05:00
Cruz Monrreal 4b5c6c8953
Merge pull request #7823 from codeauroraforum/MIMXRT1050_Fix_I2C 
MIMXRT1050_EVK: Update the I2C driver
 2018-08-21 09:54:36 -05:00
Cruz Monrreal a8f390ebec
Merge pull request #7798 from simosillankorva/NUCLEO_F303RE_bootloader_support 
Add bootloader support for target NUCLEO_F303RE
 2018-08-21 09:50:26 -05:00
Cruz Monrreal c167275c6d
Merge pull request #7775 from jeromecoutant/PR_ASSERT 
STM32 wrong MBED_ASSERT use
 2018-08-21 09:44:23 -05:00
Cruz Monrreal c10ad7f544
Merge pull request #7212 from davidsaada/david_flashiap_test_small_flash 
FlashIAP & NVStore tests: Skip test if overwriting code in flash
 2018-08-21 09:41:51 -05:00
Oren Cohen 795248bcaf Restore lp_ticker_free to previous implementation when running with uvisor 
This is a temporary patch until uvisor is removed
 2018-08-20 13:20:45 +03:00
Mahesh Mahadevan 64e5eb01d2 MIMXRT1050_EVK: Update the I2C driver 
1. Remove the repeated_start flag and code as this is not needed
   for the LPI2C module
2. Enable the SION bit on the I2C pins
3. Enable 22K Pullup option of the I2C pins
4. Update the 0 byte write implementation to ensure the START
   command gets flushed out of the FIFO

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-17 15:03:35 -05:00
Qinghao Shi 485fe79a71 add __ARM_FM macro in targets.json 2018-08-17 18:01:21 +01:00
Qinghao Shi f612ea0b47 replace hard-coded vector size with macro in linker scripts 2018-08-17 17:59:17 +01:00
Cruz Monrreal f15dbf2c3d
Merge pull request #7706 from jamesbeyond/fm_mem 
Refactoring memory regions definitions for Fast Models MPS2 targets
 2018-08-17 11:10:36 -05:00
Cruz Monrreal 8e25d2d905
Merge pull request #7669 from SigmaDeltaTechnologiesInc/master 
SDT64, 8195, 32620, 32625, 51822, 52832B added to targets
 2018-08-17 11:10:12 -05:00
David Saada 62a70f461b Fix TMPM64B IAR linker file 
Remove unnecessary manual inclusion of tmpm64b_fc object file in linker script
 2018-08-16 21:59:44 +03:00
Simo Sillankorva c6acfd389b Change NUCLEO_F303RE IAR Linker script heap size 
* Change the heap size value to be the stated 1/4 of the RAM.
 2018-08-16 01:58:43 -07:00
Jiwon Yune 515e35efe9 fixed errors related to MAX32625_NO_BOOT 2018-08-16 13:53:47 +09:00
Jiwon Yune f50e7e9620 SDT8195B removed 2018-08-16 11:05:19 +09:00
Cruz Monrreal 134ff0a3a9
Merge pull request #7777 from jeromecoutant/PR_SUNDAY 
STM32F1 RTC : wrong Sunday value
 2018-08-15 16:15:48 -05:00
Cruz Monrreal c4e814d9cc
Merge pull request #7716 from MateuszMaz/#issue5119_pwm_fix 
Fix issue #5119, changed pwmout_api.
 2018-08-15 16:12:41 -05:00
Cruz Monrreal b01d0abf4c
Merge pull request #7693 from kapi90/cm3ds_gpio_api_fix 
Fix for CM3DS GPIO api
 2018-08-15 15:53:42 -05:00
Cruz Monrreal b4e88392dd
Merge pull request #7645 from naveenkaje/fix_nrf 
nrf_drv_twi: remove redundant nrf_drv_disable call in nrf_drv_twi_uninit
 2018-08-15 15:51:21 -05:00
Simo Sillankorva 83608d59ac Add bootloader support for target NUCLEO_F303RE 2018-08-15 07:30:05 -07:00
jeromecoutant c8d628baf6 STM32 : update LPTICKER_DELAY_TICKS value 
- decreased to 1 for low freq targets
- removed for high freq targets
- not changed for targets with LPTIM
 2018-08-14 16:54:39 +02:00
jeromecoutant a0fa0b6a5a STM32 RTC : remove compilation warning with unused variable 2018-08-14 14:00:25 +02:00
jeromecoutant 7b77e50082 STM32 LPTICKER : RTC wake up timer is reset before settign a new one 2018-08-14 13:59:48 +02:00
jeromecoutant b5c258e398 STM32L4 : code cleanup in MSI SetSysClock 2018-08-14 09:20:52 +02:00
MateuszM 2aa67b8c16 Fix for issue #7707 PwmOut inverted 
since obj->sequence = &obj->pulse
and most significant bit of sequence denotes the polarity, we should set it.
 2018-08-13 17:39:27 +02:00
MateuszM e1d50193b0 Fix for issue #7743 NRF52 Cannot initialize PWM 
Deleted lines that caused the problem. Note that, in nrf_drv_pwm_init there are lines that check if pwm instance is already running, so we don't even need to check it in nordic_pwm_init. 
nrf_drv_uninit should be used in nordic_pwm_restart.
 2018-08-13 17:29:49 +02:00
jeromecoutant e455d74f3d STM32 : Sunday value is different for STM32F1 2018-08-13 17:04:56 +02:00
Cruz Monrreal 0e68570d49
Merge pull request #7686 from KariHaapalehto/1530_led 
Correct MTB_ADV_WISE_1530 led configuration
 2018-08-13 09:18:27 -05:00
jeromecoutant 063cad5992 STM32L4 assert in SetSysClock replaced 2018-08-13 16:01:49 +02:00
jeromecoutant ac06d5574b STM32L1 assert in SetSysClock replaced 2018-08-13 15:56:20 +02:00
jeromecoutant 220d033468 STM32L0 assert in SetSysClock replaced 2018-08-13 15:55:51 +02:00
jeromecoutant 749343f695 STM32F7 assert in SetSysClock replaced 2018-08-13 15:55:17 +02:00
jeromecoutant b47c1ef6c4 STM32F4 assert in SetSysClock replaced 2018-08-13 15:54:51 +02:00
jeromecoutant 974141ce48 STM32F3 assert in SetSysClock replaced 2018-08-13 15:51:35 +02:00
jeromecoutant bf7dc5f8b8 STM32F2 assert in SetSysClock replaced 2018-08-13 15:48:26 +02:00
jeromecoutant dc02be705a STM32F1 assert in SetSysClock replaced 2018-08-13 15:04:02 +02:00
jeromecoutant 76356039d9 STM32F0 assert in SetSysClock replaced 2018-08-13 14:53:33 +02:00
Markus Siglreithmaier 97fef1160c STM32L4: Fix sleep implementation 
Correctly detect and handle the low power run mode when entering and exiting sleep mode.

The generic `hal_sleep` implementation tries to exit LPR mode always, resulting in a spin-loop during a critical section (disabled IRQ).
The new approach returns from LPR to Run mode if enabled (LPR bit set), enters sleep, and resets to the original state on wakeup (WFI).
 2018-08-13 09:21:31 +02:00
Mika Leppänen 4385361d38 Changed Realtek RTL8195A wifi interface to inherit EMAC interface 
This allows connection status callback build into EMAC interface class
to work with Realtek RTL8195A wifi.
 2018-08-10 10:07:16 +03:00
Cruz Monrreal 54f40a0f4f
Merge pull request #7523 from maximmbed/max32625pico-bl-updates 
Add bootloader configuration parameters for MAX32625PICO
 2018-08-09 19:06:30 -05:00
Cruz Monrreal 7bcbb78661
Merge pull request #7729 from davidsaada/david_fix_arm_linker_script_renesas_realtek 
Rename text region in ARM linker file for Renesas & Realtek boards
 2018-08-09 15:57:29 -05:00
Cruz Monrreal c52d49c67b
Merge pull request #7731 from mirelachirica/wise_1570_clock_source_back_to_HSE_XTAL 
Cellular: WISE_1570's system clock back to HSE_XTAL
 2018-08-09 10:18:53 -05:00
Cruz Monrreal e85acac175
Merge pull request #7717 from LMESTM/fix_checkfifo 
STM32: check for UART ongoing transfers before entering deepsleep
 2018-08-09 10:17:00 -05:00
MateuszM b5eb59091a fix formatting 2018-08-08 16:53:21 +02:00
Mirela Chirica 2d53282c38 Cellular: WISE_1570's system clock back to HSE_XTAL 2018-08-08 16:24:33 +03:00
Cruz Monrreal d360da9d1d
Merge pull request #7419 from codeauroraforum/Add_MXRT_Sleep_Support 
MIMXRT1050EVK: Fix Sleep support
 2018-08-08 07:36:24 -05:00
David Saada 84412d6493 Rename text region in ARM linker file for Renesas & Realtek boards 2018-08-08 14:56:58 +03:00
Cruz Monrreal 0eb7e7dd89
Merge pull request #7703 from li-ho/adi_tmr_api 
Resolve us_ticker.c api discrepancy between EV_COG_AD4050LZ and EV_COG_AD3029LZ
 2018-08-07 09:16:55 -05:00
Cruz Monrreal 54bc12f91c
Merge pull request #7643 from bcostm/fix_uart_remove_force_reset 
STM32: remove uart force_reset at init
 2018-08-07 09:14:20 -05:00
Laurent Meunier e12d98e1c0 Use HAL coding style for function naming 2018-08-07 13:42:46 +02:00
Laurent Meunier 402f3f1c3f STM32: check for UART ongoing transfers before entering deepsleep 
As suggested by Russ Butler in mbed-os issue #7328, and until there is an
implementation of mbed-os issue #4408, we are implementing a workaround
at HAL level to check if there is any ongoing serial transfer (which happens
if HW FIFO is not yet empty).

In case a transfer is ongoing, we're not entering deep sleep and
return immediately.
 2018-08-07 11:30:53 +02:00
MateuszM b5d23c3f26 Fix issue #5119, changed pwmout_api. 
The period of pwm we could get was limited to 69.9 ms, because prescaler value was set once only during initialization. base->mod is a 16 bit register, to get longer period we have to slow down the clk.
 2018-08-07 09:36:32 +02:00
Mahesh Mahadevan 9cf2b76db9 MXRT1050_EVK: Enable Sleep function and add SKIP_SYSCLK_INIT macro 
SKIP_SYSCLK_INIT prevents reinitializing the SYS_CLK PLL used by SDRAM.
This PLL is setup during bootup by the ROM code.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-06 11:55:33 -05:00
Mahesh Mahadevan 74c96b6359 MXRT1050_EVK: Sleep: add pre/post processing steps 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-06 11:55:32 -05:00
Mahesh Mahadevan e18e0f12f4 MXRT1050_EVK: Ensure certain low power function are linked to internal memory 
Low power functions related to powering off FLEXSPI and SDRAM needs
to be copied to internal memory

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-06 11:55:13 -05:00
Mahesh Mahadevan a1d8298057 MIMXRT1050_EVK: Add Low Power Manager files 
This is needed to support different Low-Power modes available
in MXRT1050

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-06 10:36:16 -05:00
Jiwon Yune 04fc7aa36f Generic pin names added 2018-08-06 14:50:19 +01:00
Edmund Hsu 10af90ac0a Resolve adi_tmr_ConfigTimer api conflict in us_ticker.c for both EV_COG_AD4050LZ and EV_COG_AD3029LZ 2018-08-06 16:41:55 +10:00
Edmund Hsu da6c6bdc49 Resolve adi_tmr_ConfigTimer discrepancy between __ADuCM4050__ and __ADuCM3029__ 2018-08-06 16:36:36 +10:00
Edmund Hsu 6a7bfeba6d Disable unused Configuration data from compiler warning 
Add __ADuCM3029__ constants
 2018-08-06 16:32:18 +10:00
Edmund Hsu 20de3366ae Add C++ linkage for adi_tmr.h 2018-08-06 16:25:32 +10:00
Edmund Hsu 9579440ce7 Add __ADUCM4050__ and __ADUCM3029__ to include MCU specific configurations 2018-08-06 16:23:25 +10:00
Qinghao Shi f2aae22f92 Refactoring memory regions definitions for MPS2_M0 targets 
* align MPS2_M0 FVP target with other MPS2 targets
* moved memory_zones.h
* chnage the flash_api.c where referencing the old memory_zones
* modify mbed_rtx.h to use the memory_zones definations as INITIAL_SP
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
 2018-08-06 01:48:53 +01:00
Qinghao Shi 6f92504467 Refactoring memory regions definitions for MPS2_M0P targets 
* added memory_zones.h
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
 2018-08-06 01:43:45 +01:00
Qinghao Shi 8fc384296e Refactoring memory regions definitions for MPS2_M7 targets 
* added memory_zones.h
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
 2018-08-06 01:42:33 +01:00
Qinghao Shi 7159329efc Refactoring memory regions definitions for MPS2_M4 targets 
* added memory_zones.h
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
 2018-08-06 01:42:15 +01:00
Qinghao Shi a9f44812ca Refactoring memory regions definitions for MPS2_M3 targets 
* added memory_zones.h
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
 2018-08-06 01:41:35 +01:00
Bence Kaposzta f335fc10a6 Fix for CM3DS GPIO api 2018-08-03 15:10:49 +02:00
Kari Haapalehto 96457ab1e0 mbed-os-example_blinky didn't work with wise-1530, so MTB_ADV_WISE_1530 
led configuration have been updated.
Also minor update to MTB_MXCHIP_EMW3166 led configuration, led3 is now
defined but not connected.
 2018-08-03 10:29:13 +03:00
Cruz Monrreal ae40a09036
Merge pull request #7508 from mprse/ticker_free 
Ticker free() - requirements, pseudo code, tests, implementation
 2018-08-02 23:05:14 -05:00
Cruz Monrreal 1023280bd9
Merge pull request #7676 from OpenNuvoton/nuvoton_organize_file_struct 
Nuvoton: Organize file structure
 2018-08-02 10:13:36 -05:00
Jiwon Yune 0046800c09 SDT64B in targets.json simplified 2018-08-02 22:34:14 +09:00
Przemyslaw Stekiel ace821017f Add implementation of ticker_free() function to CI boards. 
This PR provides implementation of ticker_free() function for the following boards:
ARCH_PRO
EV_COG_AD3029LZ
EV_COG_AD4050LZ
K22F
K64F
K82F
KW24D
KW41Z
LPC546XX
NRF51_DK
NRF52_DK
NUCLEO_F207ZG
NUCLEO_F401RE
NUCLEO_F429ZI
NUCLEO_F746ZG
REALTEK_RTL8195AM
 2018-08-02 09:48:10 +02:00
TomoYamanaka 04fcd33f15 Renesas : Improve Flash iap 
I modified the _page_program() because when the request of the size exceeding the maximum size(256 byte) per one writing of Flash recieved, it was not able to loop the writing with sifting the address every 256 byte.

Also I modified the return value of flash_get_page_size() because I found that the minimum size per one writing of Flash is 1 byte by reviewing Flash spec.
"FLASH_PAGE_SIZE" macro's value is remain 256, it doesn't be used at flash_get_page_size(), used at _page_program() for refferencing of the maximum page size.
 2018-08-02 13:48:56 +09:00
Cruz Monrreal f9862b84e5
Merge pull request #7668 from bcostm/fix_cleanup_f7_hal_inittick 
STM32F7: remove HAL_InitTick() declaration in us_ticker_data.h files
 2018-08-01 21:42:22 -05:00
Martin Kojtal b74a1ddf0d
Merge pull request #7552 from TomoYamanaka/feature-lp-ticker 
Renesas: Add LPTICKER
 2018-08-01 15:01:30 +02:00
Martin Kojtal 9df48f561b
Merge pull request #7606 from bcostm/PULL_REQUEST_CUBE_UPDATE_F1_V1.6.1 
STM32F1: update to CubeF1 V1.6.1
 2018-08-01 15:00:21 +02:00
Martin Kojtal 2ec99158ef
Merge pull request #7642 from ashok-rao/SPI_CS_fix 
Changing default SPI CS pin to SD card on MTB
 2018-08-01 14:57:26 +02:00
Martin Kojtal c6aeaf0e52
Merge pull request #7658 from KariHaapalehto/update_wiced 
Add default interface for wiced WiFi.
 2018-08-01 14:55:53 +02:00
ccli8 6909159420 [Nuvoton] Organize file structure 
This re-organization is to avoid duplicates regarding targets of the same MCU series.
 2018-08-01 18:00:16 +08:00
Jiwon Yune 209a9dcc94 SDT52832B added 2018-08-01 18:21:45 +09:00
Jiwon Yune 784d17f68b SDT51822B added 2018-08-01 18:20:22 +09:00
Jiwon Yune 0634be8b5f SDT32625B added 2018-08-01 18:18:31 +09:00
Jiwon Yune df3afa7b57 SDT32620B added 2018-08-01 18:17:16 +09:00
Jiwon Yune 4a06f59de0 SDT8195B added 2018-08-01 18:15:46 +09:00
Jiwon Yune e5877910d2 SDT64B added 2018-08-01 18:13:33 +09:00
bcostm 2c96c5d270 STM32F7: remove HAL_InitTick() declaration in us_ticker_data.h files 2018-08-01 09:56:39 +02:00
Cruz Monrreal 63f62165d8
Merge pull request #7565 from OpenNuvoton/nuc472_emac_rst 
Nuvoton: Fix NUC472 SD-Host HW IP reset definition
 2018-07-31 11:44:01 -05:00
Cruz Monrreal 642fb9cc2c
Merge pull request #7622 from nismad01/myfix 
MPS2 platform: Enable interrupt on rx for UART
 2018-07-31 11:39:50 -05:00
Cruz Monrreal d65abb662f
Merge pull request #7289 from mikaleppanen/odin_iar_heap_inc 
On STM32F439xI IAR linker file decreased stack size and increased heap
 2018-07-31 11:36:52 -05:00
Cruz Monrreal cf84b05473
Merge pull request #6985 from OpenNuvoton/nuvoton_fix_rtosless_heap 
Fix heap base/limit error with ARM_LIB_STACK/ARM_LIB_HEAP in RTOS-less
 2018-07-31 11:36:42 -05:00
Kari Haapalehto 83c8571e68 WiFiInterface::get_target_default_instance() added to TARGET_WICED. 2018-07-31 15:54:20 +03:00
TomoYamanaka 87496df078 Add the clear process of "inited" flag in lp_ticker_free() 
I added "lp_ticker_inited = 0" in lp_ticker_free() of lp_ticker.c, so
re-initialization will work.
 2018-07-31 19:22:04 +09:00
TomoYamanaka 52cbc33d44 Implementation of LPTICKER feature for Renesas mbed boards 
Although other venders implement this feature by using RTC, in my H/W(RZ_A1), I cannot use RTC because it does not satisfy the spec of LP Ticker (ms order and low frequency between 8 KHz and 64 KHz).
Therefore I implemented this feature by creating 1024 division by MTU2(Multi function Timer pulse Unit 2) in order to satisfy this spec.
As a result of investigating, the most unaffected channel among MTU2 placed on GR-PEACH and GR-LYCHEE was channel 3, so I use channel 3 for this feature.

- mbed_drv_cfg.h
  I added a macro of MTU2 channel to this file for commonalizing code for GR-PEACH and GR-LYCHEE, and referenced it's macro at us_ticker.c.
- targets.json
  I added a macro for enabling LP Ticker.
- mtu2.c mtu2.h
  I defined fuction of MTU2's clock supply and stop.
  Because MTU2 is utilized by pwm driver too, those function were referenced at lp_ticker driver and pwm driver.

- lp_ticker.c lp_ticker_init()
  In order to satisfy the LP Ticker spec, I implemented by creating 1024 division by MTU2.
  When an interrupt is required, it will be set with ticker_set_interrupt().

- lp_ticker.c lp_ticker_free()
  This function stops the counting and powerdown the lp_ticker.

- lp_ticker.c lp_read()
  This function returns the timer counter of MTU2.

- lp_ticker.c lp_ticker_set_interrupt()
  In order to satisfy specifications, I implemented lp_ticker_set_interrupt() function.

- lp_ticker.c lp_ticker_fire_interrupt()
  In order to satisfy spec, I implemented lp_ticker_fire_interrupt() function.
  Also I added GIC_EnableIRQ for allowing the interrupt at end of function.

- lp_ticker.c lp_ticker_get_info()
  To satisfy the spec, I implemented lp_ticker_get_info() function. The value of freq includes rounding off.
 2018-07-31 19:22:03 +09:00
mudassar-ublox ffb4f926e9 Artistic style applied and updated power function 2018-07-30 19:41:02 +05:00
Naveen Kaje db91e7ed02 nrf_drv_twi: remove redundant nrf_drv_disable call in nrf_drv_twi_uninit 
i2c_api implementation for NRF52 does a disable() followed by uninit().
The uniinit() implementation in NRF drivers layer makes another call to
disable. This throws off the state of the I2C instance leading to an
assert. Since the disable is only invoked from the I2C API layer for
Nordic, remove this redundant call.

Signed-off-by: Naveen Kaje <Naveen.Kaje@arm.com>
 2018-07-30 09:18:43 -05:00
bcostm 9598dd9f12 STM32: remove uart force_reset at init 2018-07-30 14:52:31 +02:00
Ashok Rao 8c07fcd09f Changing default SPI CS pin to SD card on MTB 2018-07-30 12:23:37 +01:00
Nis Madsen 5567ac3be6 MPS2 platform: Enable interrupt on rx for UART 2018-07-27 14:11:27 +02:00
mudassar-ublox a8abeccdac UBLOX cellular api's for UDP and TCP 2018-07-26 19:20:38 +05:00
bcostm b47e599281 F1 ST CUBE V1.6.1: add I2C patches 2018-07-26 15:44:31 +02:00
ccli8 313f322cf7 [Nuvoton] Replace __wrap__sbrk with overriding _sbrk 
With _sbrk being weak, we can override it directly rather than #if to support heap with
two-region model.
 2018-07-26 15:47:25 +08:00
bcostm 8ce35ba845 F1 ST CUBE V1.6.1 
- stm32f1xx hal V1.1.2
 2018-07-25 14:20:11 +02:00
Martin Kojtal 7adfcbef71
Merge pull request #7551 from M-ichae-l/realtek-rtl8195am-remove-DEVICE_EMAC 
realtek rtl8195am remove DEVICE_EMAC
 2018-07-25 14:18:57 +02:00
ccli8 caf06e83c1 [Nuvoton] Fix __user_setup_stackheap and ARM_LIB_STACK/ARM_LIB_HEAP cannot co-exist in RTOS-less build 2018-07-25 17:19:09 +08:00
Przemyslaw Stekiel c0ee843d63 Add lp/us ticker_free() functions stub. 
This patch adds only empty stubs of `us_ticker_free()` and `lp_ticker_free()` for all boards where these functions are not implemented.
 2018-07-25 08:58:38 +02:00
ccli8 d6ae30a728 [Nuvoton] Merge multiple ARM/ARMC6 sys.cpp into one 2018-07-25 10:04:31 +08:00
Cruz Monrreal e4108b5842
Merge pull request #7554 from jamesbeyond/fm_flash 
Enable HAL Flash API on Fast Models MPS2 targets
 2018-07-24 11:47:00 -05:00
Cruz Monrreal 5d5ca62a5e
Merge pull request #7553 from bcostm/fix_L496_sct 
STM32L496: fix RAM size in ARM scatter file
 2018-07-23 10:14:05 -05:00
Cruz Monrreal 0c2ffe5e58
Merge pull request #7519 from Wiznet/master 
Wiznet: fix us_ticker & gpio bug
 2018-07-23 10:13:10 -05:00
Cruz Monrreal 21dbbc5e8b
Merge pull request #7510 from mattbrown015/fix_stm32_gpio_irq_deepsleep 
STM32: Improve GPIO IRQ edge detection when waking from deepsleep
 2018-07-23 10:12:49 -05:00
Cruz Monrreal 057138c2a0
Merge pull request #7536 from ganesh-ramachandran/master 
Add Support for Toshiba TMPM3H6
 2018-07-20 12:38:25 -05:00
Cruz Monrreal bb7b97cadc
Merge pull request #7491 from evva-sfw/feature/EFM32_make_PeripheralPins_overridable 
EFM32: fix weak PeripheralPins configuration
 2018-07-20 08:01:39 -05:00
cyliangtw 240619745d Fixed NUC472 SD & EMAC IP reset define 2018-07-20 18:23:41 +08:00
Cruz Monrreal 541fc1f28b
Merge pull request #7539 from jeromecoutant/PR_LL_API 
STM32F2/F4/F7 : LL API is now available for IRQ
 2018-07-19 20:43:28 -05:00
Cruz Monrreal 218811024f
Merge pull request #7479 from SiliconLabs/feature/crc 
Silicon Labs: Add support for hardware CRC
 2018-07-19 13:06:42 -05:00
Qinghao Shi f207944341 enable HAL FLASH API on Fast Models MPS2 targets 2018-07-19 14:41:21 +01:00
bcostm bf8587ed50 STM32L496: fix RAM size in ARM scatter file 2018-07-19 14:02:05 +02:00
Ganesh Ramachandran 8673286100 Resolved conflict in targets/targets.json 2018-07-19 16:32:51 +05:30
Ganesh Ramachandran bfcfe9cc4b Added Support for Toshiba TMPM3H6 2018-07-19 16:31:11 +05:30
zzw b6a67c103b realtek rtl8195am remove DEVICE_EMAC 
1, remove DEVICE_EMAC for wifi feature
 2018-07-19 18:07:18 +08:00
Cruz Monrreal dd6482b955
Merge pull request #7504 from TacoGrandeTX/feature_itm_fix 
Feature itm fix
 2018-07-18 09:01:13 -05:00
Cruz Monrreal db9a0e8b72
Merge pull request #7533 from marcuschangarm/fix-nrf52832-iar 
Fix linker script for NRF52832/IAR
 2018-07-18 08:56:44 -05:00
Cruz Monrreal e9e1ff997d
Merge pull request #7302 from OpenNuvoton/nuvoton_m2351_v1.1 
Support Nuvoton's NUMAKER_PFM_M2351 target
 2018-07-18 08:49:55 -05:00
jeromecoutant 59fd0c0cce STM32F2/F4/F7 : LL API is now available 2018-07-18 15:17:46 +02:00
Marcus Chang 9a073c0ae4 Fix linker script for NRF52832/IAR 
IAR linker script was using memory settings from the NRF52840 and
not the NRF52832.
 2018-07-17 12:43:23 -07:00
PHST 804edd578e Place "MBED_WEAK" for IAR-Toolchain before the type. 2018-07-17 08:12:41 +02:00
Keyur Hariya ed94e6aa35 Add bootloader configuration parameters for MAX32625PICO and rework targets.json 2018-07-16 18:26:51 -05:00
PHST de266d827e Added missing include. 2018-07-16 19:28:54 +02:00
PHST 1658349965 Replace __attribute__((weak)) with MBED_WEAK 2018-07-16 15:38:25 +02:00
PHST a8dcf52971 Make PeripheralPins.c configuration tables weakly defined to be overridable for target EFM32GG11. 2018-07-16 12:35:44 +02:00
PHST 95d78df962 EFM32 Make PeripheralPins.c configuration tables weakly defined to be overridable. 
See issue "https://github.com/ARMmbed/mbed-os/issues/7424#issuecomment-404233377"
 2018-07-16 11:48:53 +02:00
Steven Cooreman 86491627bf Add implementation for CRC API 2018-07-16 11:08:45 +02:00
justinkim 8b5485664d fix timer Interrupt callback function bug 2018-07-16 14:44:15 +09:00
justinkim 65601525d6 add Systick configuration function in Init function 2018-07-16 14:43:45 +09:00
justinkim 3b412128af fix GPIO bug & typo 
initialization bug
 2018-07-16 14:42:48 +09:00
justinkim 6e86402d8a add GPIO Pad Type Define & fix typo 2018-07-16 14:41:19 +09:00
Deepika 455f1fd440 [M2351] Support only ARMC6 toolchain 
Support for GCC_ARM/IAR toolchains are TODO.
 2018-07-16 10:15:36 +08:00
Cruz Monrreal 38744b9e68
Merge pull request #7498 from bcostm/fix_hsi_lse_lpuart 
STM32: enable HSI/LSE clocks for LPUART
 2018-07-14 13:33:35 -05:00
Cruz Monrreal 671b3c875e
Merge pull request #7507 from jeromecoutant/PR_LPTIM 
STM32 LPTICKER with LPTIM minor update
 2018-07-14 06:29:36 -05:00
Cruz Monrreal 602b0cea09
Merge pull request #7079 from SiliconLabs/feature/EFM32GG11-OS5.9 
Add support for EFM32GG11
 2018-07-13 17:33:34 -05:00
Cruz Monrreal cc8651e45c
Merge pull request #7505 from naveenkaje/pushbranch 
Fix linker script for NRF52840/ARM
 2018-07-13 13:30:25 -05:00
Cruz Monrreal 531ee3c5d4
Merge pull request #7461 from 0xc0170/fix_raytac_removal 
Raytac: target removal
 2018-07-13 11:46:58 -05:00
Deepika 2bbe043793 [M2351] Adding missing ENDP for ARM 2018-07-13 10:56:45 -05:00
mattbrown015 7ef70223fb Improve GPIO IRQ edge detection when waking from deepsleep 2018-07-13 16:02:31 +01:00
Cruz Monrreal 1145d6bb3c
Merge pull request #7489 from mirelachirica/wise_1570_hsi_source_clock 
Cellular: HSI set to be source clock for WISE_1570
 2018-07-13 09:12:22 -05:00
jeromecoutant 8a0b83233a STM32 LPTICKER with LPTIM minor update 
Code cleaning (L0 Cube update, comment precision)
 2018-07-13 10:03:31 +02:00
Naveen Kaje ed251020b6 NRF52832 linker script: formatting fix 2018-07-12 15:19:13 -05:00
Naveen Kaje 192eb28814 Fix linker script for NRF52840/ARM 2018-07-12 15:19:13 -05:00
RFulchiero 0198481f8f Improved formatting for preprocessor conditionals. 2018-07-12 13:30:36 -05:00
Marcus Chang 10b90edea3 Fix ITM on NRF52 series 
The ITM must be initialized before the SoftDevice, but due to the
lazy initialization in C++ on (at least) GCC the ITM init call
might happen too late.

This commit moves the initialization code into the NRF52 system
startup file.
 2018-07-12 13:29:24 -05:00
Cruz Monrreal f4c936f455
Merge pull request #7486 from marcuschangarm/fix-nrf52-iar 
Fix linker script for NRF52840/IAR
 2018-07-12 10:09:12 -05:00
Cruz Monrreal 6300d8b5e4
Merge pull request #7487 from marcuschangarm/fix-nrf52-serial 
Allow STDIO pins to be NC in NRF52 series
 2018-07-12 10:05:08 -05:00
bcostm 665de33cc6 stm32 lpuart: enable lse and hsi if not done 2018-07-12 15:58:02 +02:00
ccli8 e61c5146c6 [M2351] Fix binary-compatible across compilers in secure functions 
1. Rename m2351_stddriver_sup.h/c to stddriver_secure.h/.c for naming consistency
2. Add hal_secure.h to include hal-exported secure functions
3. Change return/argument type in secure functions:
   (1) Change int to int32_t
   (2) Change PinName to int32_t
   (3) Change time_t to int64_t
4. Update secure lib/bin accordingly
 2018-07-12 18:01:41 +08:00
ccli8 6bf8e191af [M2351] Support configurable for partitioning flash/SRAM 2018-07-12 18:01:39 +08:00
ccli8 778aa1e766 [M2351] Place default secure binary/library 2018-07-12 18:01:38 +08:00
ccli8 31bf7bf342 [M2351] Fix include file name error on case-sensitive system 2018-07-12 18:01:36 +08:00
ccli8 d350f45b4b [M2351] Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-07-12 18:01:35 +08:00
ccli8 688029a511 [M2351] Remove special handling for dummy interrupt in lp_ticker 
It is because dummy interrupt is very rare or pending time caused by it
is very short.
 2018-07-12 18:01:34 +08:00
ccli8 124b4ad557 [M2351] Remove NUMAKER_PFM_M2351_S/_NS targets 2018-07-12 18:01:33 +08:00
ccli8 c382e9642e [M2351] Upgrade chip version to B from A 
There is a reset halt issue with PLL in A version.
To switch back to A version for some reason, define NU_CHIP_MAJOR to 1.
 2018-07-12 17:52:10 +08:00
ccli8 c725f188ec [M2351] Change pinout to meet NuMaker-PFM-M2351 V1.1 2018-07-12 17:52:09 +08:00
ccli8 93ee13adbe [M2351] Change secure flash/SRAM to 256KB/32KB as default 
This is to compilant with CMSIS pack.
 2018-07-12 17:52:08 +08:00
ccli8 c3c661da8d [M2351] Change secure/non-secure stack/heap size 
1. Change RTOS-less main stack/RTOS ISR stack size to 2KiB
2. Change secure/non-secure heap size to 16KiB/32KiB for IAR
 2018-07-12 17:52:07 +08:00
ccli8 04f723755b [M2351] Meet new RTC HAL spec (Mbed OS 5.9) 
1. Power down RTC access from CPU domain in rtc_free. After rtc_free, RTC gets
   inaccessible from CPU domain but keeps counting.
2. Fix RTC cannot cross reset cycle.
 2018-07-12 17:52:06 +08:00
ccli8 6729b65236 [M2351] Meet new lp_ticker HAL spec (Mbed OS 5.9) 
1. Add LPTICKER in device_has option of targets.json file.
2. Disable interrupt in lp_ticker_init
3. Add lp_ticker_free
4. Enable interrupt in lp_ticker_set_interrupt/lp_ticker_fire_interrupt
5. Disable interupt in ISR
 2018-07-12 17:52:05 +08:00
ccli8 9cbc8b21ee [M2351] Meet new us_ticker HAL spec (Mbed OS 5.9) 
1. Add USTICKER in device_has option of targets.json file.
2. Disable interrupt in us_ticker_init
3. Add us_ticker_free
4. Enable interrupt in us_ticker_set_interrupt/us_ticker_fire_interrupt
5. Disable interrupt in ISR
 2018-07-12 17:52:03 +08:00
ccli8 de83cb2892 [M2351] Add secure gateway functions SYS_LockReg_S/SYS_UnlockReg_S 2018-07-12 17:52:02 +08:00
ccli8 990665512d [M2351] Add SD pinmap 2018-07-12 17:52:01 +08:00
ccli8 1b9fa07b6f [M2351] Default MBED_TZ_DEFAULT_ACCESS to 1 to control secure SYS/CLK regions from non-secure threads 
To initialize/uninitialize H/W module, we need to control secure SYS/CLK regions through secure functions.
For a new thread to call these secure functions, we need to allocate secure context for it.
 2018-07-12 17:52:00 +08:00
ccli8 89d32227a0 [M2351] Replace __attribute__((cmse_nonsecure_entry)) with compiler agnostic __NONSECURE_ENTRY 2018-07-12 17:51:59 +08:00
ccli8 767e74b1db [M2351] Support TrustZone and bootloader for IAR 2018-07-12 17:51:58 +08:00
ccli8 8f1623f717 [M2351] Add consistency check for CRYPTO/CRPT's secure attribute and TRNG/Mbed TLS H/W 2018-07-12 17:51:55 +08:00
ccli8 2854b57091 [M2351] Remove dead code with '#if 0' in SPI 2018-07-12 17:51:54 +08:00
ccli8 d3c64785c7 [M2351] Add GPIO debounce configuration in targets.json 2018-07-12 17:51:53 +08:00
ccli8 13e1209c83 [M2351] Support PWM out 2018-07-12 17:51:52 +08:00
ccli8 d05ef693ac [M2351] Support analog-in 2018-07-12 17:51:51 +08:00
ccli8 1da430f1e9 [M2351] Support TRNG 
To change TRNG security state, we need to:
1. Change CRPT/CRYPTO bit in NVIC/SCU in partition_M2351.h
2. Add/remove TRNG in device_has list in targets.json to match partition_M2351.h
 2018-07-12 17:51:50 +08:00
ccli8 dd7fd76758 [M2351] Centralize size configuration for secure flash, secure SRAM, NSC, and bootloader 2018-07-12 17:51:48 +08:00
ccli8 ca63abae73 [M2351] Change NSC location 
NSC location has the following requirements:
1. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.
2. Greentea flash IAP uses last 4 sectors for its test. Avoid this range.
3. Greentea NVSTORE uses last 2 sectors or 4KB x 2 for its test. Avoid this range.
 2018-07-12 17:51:48 +08:00
ccli8 42aa7fe0c5 [M2351] Upgrade partition format 
Following BSP, this upgrade makes partitioning flash/SRAM clear.
flash_api.c relies on flash partition, so it is updated accordingly.
 2018-07-12 17:51:47 +08:00
ccli8 805049d80f [M2351] Fix page size in flash IAP 
In Mbed OS, page size is program unit, which is different than FMC definition.
After fixing page size, we can pass NVSTORE test (mbed-os-features-nvstore-tests-nvstore-functionality).
 2018-07-12 17:51:45 +08:00
ccli8 711cb64e95 [M2351] Support flash IAP 2018-07-12 17:51:44 +08:00
ccli8 fa0124ed8d [M2351] Add missing delay in lp_ticker 2018-07-12 17:51:43 +08:00
ccli8 06cb070442 [M2351] Trim HIRC48 to 48M against LXT 2018-07-12 17:51:42 +08:00
ccli8 649389a962 [M2351] Support I2C 2018-07-12 17:51:41 +08:00
ccli8 3ca24b62ff [M2351] Support SPI 2018-07-12 17:51:40 +08:00
ccli8 dcfe1d4283 [M2351] Refine UART code 
1. Replace SYS_ResetModule/CLK_SetModuleClock/CLK_EnableModuleClock/CLK_DisableModuleClock with TrustZone-aware versions.
2. Configure all UART to secure
3. Support asynchronous transfer
4. Remove sleep management code, which has been replaced with Sleep Manager.
 2018-07-12 17:51:38 +08:00
ccli8 ebf53b9f64 [M2351] Support PDMA 2018-07-12 17:51:38 +08:00
cyliangtw 999dd332e6 [M2351] Rework us_ticker and lp_ticker 
The rework includes the following:
1. Remove ticker overflow handling because upper layer (mbed_ticker_api.c) has done with it.
   This makes us_ticker/lp_ticker implementation more succinct and avoids potential error.
2. Refine timer register access with low-power clock source
 2018-07-12 17:51:37 +08:00
ccli8 236bf657b6 [M2351] Remove peripheral sleep management from hal_sleep/hal_deepsleep 
The upper layer has introduced Sleep Manager to handle the task.
 2018-07-12 17:51:36 +08:00
ccli8 6bfc90dc73 [M2351] Rework RTC 
The rework includes the following:
1. Support year range beyond H/W RTC 2000~2099.
2. Refine RTC register access with low-power clock source
 2018-07-12 17:51:34 +08:00
ccli8 f16b971482 [M2351] Fix GPIO to be TrustZone-aware 
1. Revise NU_PORT_BASE to be TrustZone-aware
2. Add TrustZone-aware NU_GET_GPIO_PIN_DATA/NU_SET_GPIO_PIN_DATA to replace GPIO_PIN_DATA
3. Revise pin_function to be TrustZone-aware
 2018-07-12 17:51:33 +08:00
ccli8 2aa2b7eb00 [M2351] Fix SystemCoreClockUpdate isn't called in non-secure domain 2018-07-12 17:51:32 +08:00
ccli8 0cb7633356 [M2351] Fix HCLK clock source 
There is a reset halt issue with PLL in A version.
Work around it by using HIRC48 instead of PLL as HCLK clock source.
 2018-07-12 17:51:31 +08:00
ccli8 135f1279ca [M2351] Add secure BSP driver function 
SYS_ResetModule_S
CLK_SetModuleClock_S
CLK_EnableModuleClock_S
CLK_DisableModuleClock_S
 2018-07-12 17:51:30 +08:00
ccli8 d84a90e29d [M2351] Unify secure/non-secure peripheral base based on partition file 2018-07-12 17:51:29 +08:00
ccli8 77e45d414b [M2351] Configure most modules to non-secure 
All modules are configured to non-secure except:
1. TIMER0/1 hard-wired to secure and TIMER2/3 reserved for non-secure.
2. PDMA0 hard-wired to secure and PDMA1 reserved for non-secure.
3. RTC configured to secure and shared to non-secure through NSC.
4. CRYPTO configured to secure and shared to non-secure through NSC.
 2018-07-12 17:51:28 +08:00
ccli8 2da6bf6301 [M2351] Fix STDIO UART 2018-07-12 17:51:27 +08:00
ccli8 a3846932a6 [M2351] Fix target configuration 
1. NUMAKER_PFM_M2351 defaults to non-secure
2. Add NUMAKER_PFM_M2351_S/NUMAKER_PFM_M2351_NS which are for secure/non-secure build respectively.
3. Change output format to Intel HEX
4. Fix device name to M2351KIAAEES from M2351K1AAEES
5. Add detect_code
 2018-07-12 17:51:25 +08:00
cyliangtw 0c3f0f7cb7 [M2351] To fulfill _rtc_localtime one more argument 2018-07-12 17:51:24 +08:00
deepikabhavnani 21de229047 [M2351] Disabled fault handler support 2018-07-12 17:51:23 +08:00
cyliangtw 2b44eeaef5 [M2351] Add gpio_is_connected 2018-07-12 17:51:22 +08:00
cyliangtw ef7f04808d [M2351] Set secure SRAM size as 24KB in SAU & SCU 2018-07-12 17:51:21 +08:00
cyliangtw d99fbcb166 [M2351] Set 48KB SRAM and UART0 as non-secure 2018-07-12 17:51:20 +08:00
cyliangtw 12a7830c9a [M2351] Resolve reset halt issue in MP chip A version 2018-07-12 17:51:19 +08:00
cyliangtw 6163628b1e [M2351] Sync IRQ arrangement to fulfill MP version 2018-07-12 17:51:18 +08:00
cyliangtw 331945fa08 [M2351] Remove redundant GetPC 2018-07-12 17:51:17 +08:00
cyliangtw 90fcc04596 [M2351] Migrate for MP chip version, build sucessfully 2018-07-12 17:51:16 +08:00
Deepika 94d95d34a4 [M2351] Support TrustZone in port_read/port_write 2018-07-12 17:51:14 +08:00
Deepika aec7c5441c [M2351] Add non-secure reset handler address 2018-07-12 17:51:13 +08:00
deepikabhavnani eebc6e38cb [M2351] Corrected Vector table address in scatter file 2018-07-12 17:51:12 +08:00
cyliangtw 46f948aa6f [M2351] Link register base with partition file & correct heap size in linker file 2018-07-12 17:51:11 +08:00
cyliangtw 5985dcd268 [M2351] Support secure loader invoke non-secure Mbed OS 2018-07-12 17:51:10 +08:00
deepikabhavnani 2f01120d93 [M2351] Corrected preprocess define usage in toolchain specific linker files 2018-07-12 17:51:09 +08:00
cyliangtw 18ca9b5e6c [M2351] Fix GCC linker file 'cannot move location counter backwards' issue 2018-07-12 17:51:08 +08:00
cyliangtw ba9e5fdc29 [M2351] IAR linker file support both of secure & non-secure domain 2018-07-12 17:51:07 +08:00
cyliangtw f06644a920 [M2351] Linker files support both of secure & non-secure domain 2018-07-12 17:51:06 +08:00
cyliangtw a2aac528f4 [M2351] Update GCC linker for NSC Veneer 2018-07-12 17:51:05 +08:00
Deepika f7ea847dfe [M2351] ARMC6 compiler related changes 2018-07-12 17:51:04 +08:00
Deepika 1117e84d9e [M2351] Removed device name, till device patch is added to IAR/Keil 2018-07-12 17:51:03 +08:00
Deepika d46220c7e0 [M2351] Set SAU Region present flag for M2351 device and include security header file. 
As per SAU documents, SAU is always present if the security extension is
available. The functionality differs if the SAU contains SAU regions.
If SAU regions are available it is configured with the macro __SAUREGION_PRESENT
 2018-07-12 17:51:02 +08:00
Deepika 11792f60fa [M2351] Added xx_ticker_fire_interrupt function for M2351 device 2018-07-12 17:51:01 +08:00
Deepika ffcc438b5a [M2351] Use Cortex M23 specific header files and interrupts 
1. Update use of correct header files
2. Added missing entry of M2351 device in IAR defines.
3. Removed support of ARM toolchain in targets.json
 2018-07-12 17:51:00 +08:00
cyliangtw e67ed3f86e [M2351] Revise nu_bitutil.h for M23 2018-07-12 17:50:59 +08:00
cyliangtw 6b85478730 [M2351] Modify Nuvoton common files to avoid conflicting with master 2018-07-12 17:50:58 +08:00
cyliangtw 98c8427a90 [M2351] Add partition header file for CMSE feature 2018-07-12 17:50:57 +08:00
cyliangtw 368f8eef93 [M2351] Remove mbed_sdk_init_forced 
1. mbed_sdk_init is called before C++ global obj constructor in OS 5
2. Refine startup file with GCC_ARM toolchain related to this modification.
 2018-07-12 17:50:56 +08:00
cyliangtw 06910bdea5 [M2351] remove progen, not used any more 2018-07-12 17:50:55 +08:00
cyliangtw c5494eb751 [M2351] Support __vector_table instead of __vector_handlers in IAR 2018-07-12 17:50:54 +08:00
cyliangtw 1f27546480 [M2351] Support GCC & IAR toolchain 2018-07-12 17:50:53 +08:00
cyliangtw dcdd9fb56e [M2351] Sync SDH_CardDetection type to avoid GCC compiler error 2018-07-12 17:50:52 +08:00
cyliangtw 205f8dbab2 [M2351] Add one new target M2351, regard as M0+ with some V8M CPU control at first 2018-07-12 17:50:51 +08:00
Mirela Chirica 72aabc9db4 Cellular: HSI set to be source clock for WISE_1570 2018-07-12 10:12:15 +03:00
Cruz Monrreal e1df16e843
Merge pull request #7365 from jeromecoutant/PR_RTC_SHADOW 
STM32 RTC : bypass shadow registers
 2018-07-11 21:29:02 -05:00
Cruz Monrreal 19c6f3b316
Merge pull request #7290 from bcostm/refactor_us_ticker 
STM32: Refactor us_ticker files
 2018-07-11 21:28:32 -05:00
Marcus Chang fd088d2c4e Allow STDIO pins to be NC in NRF52 series 
Prevent ASSERT from triggering when one of the STDIO pins is not
connected.
 2018-07-11 17:19:18 -07:00
Marcus Chang 6f0bb757f4 Fix linker script for NRF52840/IAR 
Add missing noinit section.
 2018-07-11 15:48:51 -07:00
Cruz Monrreal c669655d86
Merge pull request #7042 from shuoo/feature-cm3ds-flash 
Flash API: Enable Flash api on CM3DS
 2018-07-11 09:28:17 -05:00
Cruz Monrreal 38c5e9c669
Merge pull request #7453 from marcuschangarm/fix-nrf52-swi 
Fix SWI conflict in SoftDevice for NRF52 series
 2018-07-11 08:12:30 -05:00
bcostm 0b133be504 stm32 ticker: change th eplace where timer init in done, fix overflow issue with 16-bit timer 
- Move back the 16/32bit timer initialization in HAL_InitTick() and not in us_ticker_init()
- Use ticker_read_us() and us_ticker_read() in HAL_GetTick() to fix potential overflow issue with the 16bit timer

==> These corrections allow timer, rtc, sleep, tick tests to PASS
 2018-07-11 14:45:48 +02:00
bcostm fc50e28ae6 stm32 ticker: corrections in order to pass tests 2018-07-11 14:44:23 +02:00
bcostm 7097e07b62 stm32 ticker: typo corrections 2018-07-11 14:43:36 +02:00
bcostm d8e839a789 stm32 ticker: change license 2018-07-11 14:43:16 +02:00
bcostm 32031cbab3 stm32 ticker: rename hal_tick.h in us_ticker_data.h 2018-07-11 14:42:44 +02:00
Cruz Monrreal dc946b3c34
Merge pull request #7446 from kivaisan/disable_lse_MTB_USI_WM_BN_BM_22 
Disable LSE for MTB_USI_WM_BN_BM_22
 2018-07-11 07:39:44 -05:00
bcostm fbd7a97e19 stm32 ticker: rename macro and update ST HAL Tick functions 
- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
 2018-07-11 14:39:42 +02:00
bcostm b1bbd765b7 stm32 ticker: rename files and move functions 
- rename hal_tick_common.c in hal_tick_overrides.c
- move 16 and 32bits timer functions in us_ticker.c
 2018-07-11 14:36:58 +02:00
Steven Cooreman 001844231b Add EFM32GG11_STK3701 support 2018-07-11 10:45:38 +02:00
jeromecoutant 1052993236 STM32 RTC : bypass shadow registers 
- RTC_SSR for the subseconds
- RTC_TR for the time
- RTC_DR for the date

These registers were accessed through shadow registers which are synchronized with PCLK1 (APB1 clock).
They are now accessed directly in order to avoid waiting for the synchronization duration.
 2018-07-11 10:08:02 +02:00
Martin Kojtal 396c88ac3c Raytac: target removal 
No files to build - should not be in targets
Reverts part of the https://github.com/ARMmbed/mbed-os/pull/6178
 2018-07-10 12:23:34 +01:00
Kimmo Vaisanen a5ac795304 Disable LSE for MTB_USI_WM_BN_BM_22 
Current MTB_USI_WM_BN_BM_22 modules do not have OSC32_IN connected, so
external xtal is not in use.
 2018-07-10 08:49:38 +03:00
Marcus Chang 4bb84fdb71 Change NRF52 series UART to only use one SWI channel 
This fixes conflicts with the SoftDevice.
 2018-07-09 12:54:09 -07:00
Marcus Chang cfb99d689a Fix inconsistent SWI configuration in NRF52 series 
All SWI channels except SWI0 is being used by the SoftDevice and
not only SWI1.
 2018-07-09 12:54:09 -07:00
Marcus Chang 01135e30ce Remove white space in config files for NRF52 series 2018-07-09 12:54:08 -07:00
Cruz Monrreal bcec185754
Merge pull request #7352 from bcostm/fix_rtc_ticker 
STM32: Fix RTC test issue on targets using a 16-bit timer for us_ticker
 2018-07-09 10:20:13 -05:00
Karl Zhang bbb97c803b Flash API: Enable Flash api on CM3DS 
Implement flash_api.c for CM3DS on MPS2+.
Because MPS2+ board has no physical flash chip, the implementation emulates
flash over SRAM.
 2018-07-09 21:07:48 +08:00
Cruz Monrreal 69d8c0bac3
Merge pull request #7429 from codeauroraforum/MXRT_Fix_AnalogIn 
MXRT1050: Ensure the pins are in input mode for analogin
 2018-07-06 11:24:40 -05:00
Cruz Monrreal 59defa29e9
Merge pull request #7406 from OpenNuvoton/nuvoton_fix_wakeup_delay 
NANO130: Change PLL clock source to HIRC instead of HXT
 2018-07-06 11:20:40 -05:00
Mahesh Mahadevan 19b6ef2e87 MXRT1050: Ensure the pins are in input mode for analogin 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-05 17:23:07 -05:00
Mahesh Mahadevan c24d158fb4 MIMXRT1050_EVK: Move clock enable after check of pin 
Enable clock could return an error if pin is NC

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-05 10:59:00 -05:00
Cruz Monrreal 9f27672f0f
Merge pull request #7420 from codeauroraforum/Fix_MXRT_GPIO_IRQ 
MIMXRT1050_EVK: Fix the GPIO IRQ number assignements
 2018-07-05 10:51:02 -05:00
Cruz Monrreal 4942ec540c
Merge pull request #7413 from mikaleppanen/wiced_removed_def_inst 
Modified Wiced drivers EMAC instance get
 2018-07-05 10:42:41 -05:00
Cruz Monrreal 917dc8394c
Merge pull request #7405 from marcuschangarm/fix-nrf52-target 
Fix target definition for NRF52 series
 2018-07-05 10:41:55 -05:00
Cruz Monrreal 8b6dfc4050
Merge pull request #7401 from marcuschangarm/fix-nrf52-irq 
Fix interrupt initialization for NRF52 series
 2018-07-05 10:41:20 -05:00
Cruz Monrreal 3faedca1cf
Merge pull request #7390 from jeromecoutant/PR_TWO 
DISCO STM32L4 : Add TWO_RAM_REGIONS macro
 2018-07-05 10:39:31 -05:00
Cruz Monrreal 513960f17d
Merge pull request #7386 from evva-sfw/feature/make_clock_src_changeable 
Make clock source changeable over mbed_app.json for EFM32-Targets
 2018-07-05 10:39:11 -05:00
Cruz Monrreal 1941906f72
Merge pull request #7376 from bcostm/dev_leds_disco_L496ag 
DISCO_L496AG: change LED1 and LED2 pins
 2018-07-05 10:37:57 -05:00
Mahesh Mahadevan 9b48f3978a MIMXRT1050_EVK: Fix the GPIO IRQ number assignements 
Use the GPIO_Combined IRQ array

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-04 11:53:47 -05:00
bcostm a838cb21d1 save/restore timer registers before/after deepsleep 2018-07-04 16:44:00 +02:00
bcostm 9523bcf8c9 Use elapsed time only for 16bit timer 2018-07-04 16:43:21 +02:00
bcostm fcdd529f89 Re-enable IT CC1 after deepsleep 2018-07-04 10:16:32 +02:00
bcostm f785c23e89 HAL_GetTick returns elapsed time 2018-07-04 10:16:31 +02:00
bcostm 26cb388d14 Use us_ticker_read while SDK is not ready 2018-07-04 10:15:15 +02:00
Mika Leppänen 83a82d31e0 Modified Wiced drivers EMAC instance get 
Removed EMAC get_default_instance() since WLAN drivers are not default EMAC drivers.
Moved EMAC static declaration inside get_instance().
 2018-07-04 09:44:28 +03:00
ccli8 13fec628d0 [NANO130] Change PLL clock source to HIRC instead of HXT 
This change is to reduce delay of wake-up from power-down to pass Greentea test.
Because HIRC's accuracy is worse than HXT's, we must switch back to HXT for e.g. USBD application.
This can be done through setting NU_CLOCK_PLL to NU_HXT_PLL.
 2018-07-03 15:37:53 +08:00
Marcus Chang 3f28fe2f54 Fix target definition for NRF52 series 
* Removed RTC, NRF52840 doesn't support RTC API.
 * Reorganized DEVICE_HAS order for NRF52832.
 2018-07-02 16:58:33 -07:00
Mahesh Mahadevan 34dab4a4d9 LPC546XX: Fix UART mux setting in the LPCXpresso board 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-02 15:16:57 -05:00
Marcus Chang a0224ed794 Fix interrupt initialization for NRF52 series 
In some cases the UARTE interrupt would be enabled with pending
interrupts. This commit ensures that interrupts are only enabled
from a known state.
 2018-07-02 11:13:50 -07:00
Martin Kojtal 2353e7b1c6
Merge pull request #7029 from OpenNuvoton/nuvoton_5.9_ticker 
Nuvoton: Adhere to reworked ticker spec to release with Mbed OS 5.9
 2018-07-02 17:28:11 +02:00
Martin Kojtal 44acaf587b
Merge pull request #7369 from marcuschangarm/fix-nrf52-serial 
Fix race condition in serial_api.c for NRF52 series
 2018-07-02 17:24:16 +02:00
jeromecoutant 40da60b959 DISCO STM32L4 : Add TWO_RAM_REGIONS macro 2018-07-02 14:03:05 +02:00
bcostm b6beb74d9d DISCO_L496AG: update LEDs comments in PeripheralPins.c 2018-07-02 10:27:23 +02:00
bcostm a9ba4f9bf5 DISCO_L496AG: change LED1 and LED2 pins 2018-07-02 10:20:49 +02:00
PHST 9d9db81841 Make clock source changeable over mbed_app.json 
By adding the missing include the clock source for EFM32-Targets is changeable over mbed_app.json.
 2018-07-02 10:04:05 +02:00
Cruz Monrreal 2da597e56a
Merge pull request #7326 from bcostm/dev_lpuart1_clock_source 
STM32: add lpuart_clock_source config
 2018-06-29 20:09:09 -05:00
bcostm 0c417ab8b7 astyle 2018-06-29 10:12:40 +02:00
Martin Kojtal 58fa28b9b2
Merge pull request #7313 from mprse/NRF52840_ticker_width_fix 
NRF_52840: Fix us ticker counter size
 2018-06-29 10:10:40 +02:00
bcostm 9be8541a30 STM32: add lpuart_clock_source config 
Keep same clock configuration as done before this PR (LSE and PCLK1).
Use a JSON file to change it.
 2018-06-29 10:10:29 +02:00
Marcus Chang 2d71866028 Fix typo in NRF52 series README.md 
UART configuration parameters mispelled.
 2018-06-28 16:38:29 -07:00
Marcus Chang fc087ab32c Fix race condition in serial_api.c for NRF52 series 
* Elevate RTC2 interrupt priority to same level as UARTE to prevent
race condition on shared variables.
* Remove unused TXDRDY event code.
* Fix typo in macro.
 2018-06-28 16:36:16 -07:00
jeromecoutant 3721ac44d2 STM32 serial RX/TX active patch 
In serial_tx_active and serial_rx_active functions,
we check the internal state value with

HAL_UART_STATE_BUSY_TX = 0x21U,
HAL_UART_STATE_BUSY_RX = 0x22U,

It seems that value can also be :
HAL_UART_STATE_BUSY_TX_RX = 0x23U,
 2018-06-28 18:05:52 +02:00
Cruz Monrreal bf21bac52d
Merge pull request #7351 from jeromecoutant/PR_ASTYLE 
STM32 files with MBED astyle rules
 2018-06-28 10:06:03 -05:00
ccli8 4f04ae489e [Nuvoton] Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-06-28 16:34:45 +08:00
ccli8 1fa3374310 [Nuvoton] Remove special handling for dummy interrupt in lp_ticker 
It is because dummy interrupt is very rare or pending time caused by it
is very short.
 2018-06-28 16:27:37 +08:00
Cruz Monrreal 5bf483ee17
Merge pull request #7330 from KariHaapalehto/clean_up 
Clean-up targets.json
 2018-06-27 18:44:41 -05:00
Cruz Monrreal faa31de72e
Merge pull request #7323 from marcuschangarm/fix-serial 
Improve serial performance for NRF52 series
 2018-06-27 18:43:43 -05:00
Przemyslaw Stekiel 9966110dd9 NRF_52840: Fix us ticker counter size 
It has been noticed that there is a problem with us ticker on NRF_52840 board after 32 bit counter has been used for us ticker on NRF52 family boards.
Currently NRF52 symbol is defined only for MCU_NRF52832 (not for MCU_NRF52840) and based on this symbol 16 or 32 bit counter is selected (16 bit for NRF51 family and 32 for NRF52 family).
Since MCU_NRF52840 defines NRF52840_XXAA and provides 32 bit counters, 32 bit counter should be selected also when NRF52840_XXAA symbol is defined.
 2018-06-27 15:33:07 +02:00
jeromecoutant 78410e7032 TARGET_STM32L4 astyle 2018-06-27 14:46:00 +02:00
jeromecoutant ecffec8336 TARGET_STM32L1 astyle 2018-06-27 14:44:37 +02:00
jeromecoutant baf97d78aa TARGET_STM32L0 astyle 2018-06-27 14:43:59 +02:00
jeromecoutant e9d7128485 TARGET_STM32F7 astyle 2018-06-27 14:42:56 +02:00
jeromecoutant f50720e2a4 TARGET_STM32F4 astyle 2018-06-27 14:42:28 +02:00
jeromecoutant 6df23ee841 TARGET_STM32F3 astyle 2018-06-27 14:32:10 +02:00
jeromecoutant f9bd4768a5 TARGET_STM32F2 astyle 2018-06-27 14:31:31 +02:00
jeromecoutant c8313901fb TARGET_STM32F1 astyle 2018-06-27 14:31:04 +02:00
jeromecoutant 6066e68ec6 TARGET_STM32F0 astyle 2018-06-27 14:23:31 +02:00
jeromecoutant 433ba46132 TARGET_STM astyle 2018-06-27 14:21:07 +02:00
Kari Haapalehto 34abadc0f6 Cleaning MTB_USI_WM_BN_BM_22, MTB_ADV_WISE_1530 and MTB_MXCHIP_EMW3166 targets 
These wiced targets are not supported at mbed-os 2 release, so removing
"2" from release_versions.
LWIP feature flag removed, since it isn't needed anymore.
EMAC removed from device_has_add, since it isn't needed with these targets.
"network-default-interface-type": "WIFI" has been added.
 2018-06-26 14:31:26 +03:00
Boting Ren 6f9c76c949 fix LED_RED mapping on NUCLEO_F429ZI 2018-06-26 16:22:28 +09:00
ccli8 310a1fe318 [Nuvoton] Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-06-26 13:47:30 +08:00
ccli8 8e11ddf3b6 [Nuvoton] Fix trap in lp_ticker ISR with non-blocking "clear interrupt flag" 2018-06-26 13:47:29 +08:00
ccli8 fe627cb722 [Nuvoton] Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-06-26 13:47:27 +08:00
ccli8 86e194d075 [Nuvoton] Reduce blocking code in lp_ticker 
1. Introduce S/W interrupt enable/disable to reduce calls to TIMER_EnableInt/TIMER_DisableInt.
2. Allow dummy interrupt because clear interrupt flag is not synchronized.
3. Enable LPTICKER_DELAY_TICKS to make lp_ticker_set_interrupt non-blocking.
 2018-06-26 13:47:26 +08:00
ccli8 7caec46512 [NANO130] Adjust static/dynamic memory allocation for IAR toolchain to pass Greentea test 2018-06-26 13:47:23 +08:00
ccli8 12792fde27 [NANO130] Fix CLK_Idle incorrectly enters into deep sleep mode 
This can happen with CLK_PowerDown() called first and then CLK_Idle() called.
 2018-06-26 13:47:22 +08:00
ccli8 3f861425da [Nuvoton] Meet new lp_ticker HAL spec (Mbed OS 5.9) 
1. Add LPTICKER in device_has option of targets.json file.
2. Disable ticker interrupt in lp_ticker_init
3. Add lp_ticker_free
4. Enable interrupt in lp_ticker_set_interrupt
 2018-06-26 13:47:17 +08:00
ccli8 ebd93ba753 [Nuvoton] Meet new us_ticker HAL spec (Mbed OS 5.9) 
1. Add USTICKER in device_has option of targets.json file.
2. Disable ticker interrupt in us_ticker_init
3. Add us_ticker_free
4. Enable interrupt in us_ticker_set_interrupt
 2018-06-26 13:45:33 +08:00
Marcus Chang 6346ba87c0 Improve serial performance for NRF52 series 
Time sensitive user callbacks are called through lowest priority
SWI handlers instead of the highest priority UART handler.
 2018-06-25 17:15:40 -07:00
Marcus Chang ddc709acec Make serial_putc non-blocking for the NRF52 series 
Previous implementation would block until character had been
completely sent, which is not what the API specifies.
 2018-06-25 13:19:15 -07:00
Marcus Chang a42f1d7a81 Remove whitespace from NRF52 serial_api.c 2018-06-25 13:16:11 -07:00
Cruz Monrreal f3424da060
Merge pull request #7287 from SeppoTakalo/remove_feature_lwip 
Remove FEATURE_LWIP
 2018-06-25 11:23:15 -05:00
Mika Leppänen 50a130b61d On STM32F439xI IAR linker file decreased stack size and increased heap 
Decreased stack size from 24kB to 1kB (stack is used on boot-up/interrupt
handler). Increased heap size from 65kB to 89kB.

Change is related to issue https://github.com/ARMmbed/mbed-os/issues/7137
where UBLOX_EVK_ODIN_W2 runs out of heap on WLAN.
 2018-06-25 10:19:16 +03:00
TomoYamanaka 36ad12c403 Modify RAM size definition of ARMCC for GR-LYCHEE 
I modified RAM size of ARMCC compiler for GR-LYCHEE.
In case of GR-LYCHEE, RAM size is 3M Byte(including Non-Cache area), but there was a typo at MACRO definition.
 2018-06-25 15:44:01 +09:00
Cruz Monrreal 8e170ccbd1
Merge pull request #6925 from TomoYamanaka/feature-flashiap_bootloader 
Support Flash iAP and Bootloader for GR-PEACH and GR-LYCHEE
 2018-06-22 14:23:57 -05:00
Cruz Monrreal d160cc6cd0
Merge pull request #7284 from KariHaapalehto/wise1530_usi22_support 
Add binary drivers for MTB_USI_WM_BN_BM_22 and MTB_ADV_WISE_1530
 2018-06-22 10:16:16 -05:00
Cruz Monrreal 24daf18044
Merge pull request #7105 from codeauroraforum/mxrt_add_ivt 
MIMXRT1050: Update to EVK Rev B
 2018-06-22 10:15:33 -05:00
Cruz Monrreal 446de6947a
Merge pull request #7145 from drahnr/master 
NRF52: add a separate .nvictable section and allow .noinit to be used…
 2018-06-21 23:32:22 -05:00
TomoYamanaka 94c13c5362 Support Bootloader for GR-PEACH and GR-LYCHEE 
The mainly changes is below:
- Update scatter file, linker file for bootloader support
- Update the file for RZ/A1 serial flash boot loader
- Add "device name" and "bootloader_supported" in targets.json
 2018-06-22 10:40:45 +09:00
TomoYamanaka 18a8eac72b Support Flash iAP for GR-PEACH and GR-LYCHEE 
The mainly changes is below:
- Add flash_api.c
- Add the definition of SPI multi I/O Bus controller that is used for flash access
- Add "FLASH" as device feature
- Add the macro regarding information of the incorporated Flash
- Add the processing to expand code to RAM
 2018-06-22 10:40:45 +09:00
Cruz Monrreal e8ec3614b0
Merge pull request #7291 from aqib-ublox/master 
adding USTICKER label for C027
 2018-06-21 18:23:07 -05:00
Mahesh Mahadevan 632892d355 MIMXRT1050: Update to EVK Rev B 
1. Add the IVT header to the binary as this is required for boot up
   This was earlier added by the DAPLink firmware. As it is no longer
   handled in DAPLink, the header needs to be added inside mbed.
2. Update drivers

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-06-21 13:34:12 -05:00
Cruz Monrreal 0b8f46763a
Merge pull request #7220 from melvinvdb/fix_nrf5x_interrupt_pull_mode 
Fix mbed::InterruptIn.mode() in NRF5x targets
 2018-06-21 10:31:48 -05:00
aqib nasim 8efe3b5bcd adding USTICKER label for C027 2018-06-21 17:00:26 +05:00
Bernhard Schuster 124e15f196 NRF52: attempt to complete 86ce955d96 for ARMCC and IAR 2018-06-21 13:24:49 +02:00
Kari Haapalehto 699811be72 Add binary drivers for MTB_USI_WM_BN_BM_22 and MTB_ADV_WISE_1530 2018-06-21 12:15:53 +03:00
Seppo Takalo e4d1a9a85a Remove FEATURE_LWIP. The LwIP stack is enabled on all builds now 
Leave the FEATURE_LWIP enabled in build scripts so that it does
not break any builds.

Removed 'feature_add: ["LWIP"]' on all targets.
 2018-06-21 11:00:00 +03:00
Marcus Chang 6cec180d0b Fix SPI initialization for NRF52 series 
New changes to Mbed error reporting in 5.9 exposed bug in SPI
driver where an instance was uninitialized twice which triggered
an ASSERT.

This fix keeps track of which instance has been initialized and
only calls uninit when it is safe.
 2018-06-20 15:09:14 -07:00
Cruz Monrreal 84d6b79dec
Merge pull request #7172 from mprse/NRF5x_updates 
Unify RTC, lp ticker, and us ticker for NRF51 and NRF52 series
 2018-06-20 16:08:05 -05:00
Cruz Monrreal c4113ae2f5
Merge pull request #7175 from jamesbeyond/fm_mbed_hal 
Enable new HAL us_ticker API on fast model MPS2 platform
 2018-06-20 12:58:18 -05:00
Cruz Monrreal badb79ee4b
Merge pull request #7272 from KariHaapalehto/emw3166_driver_support 
Add binary drivers for MTB_MXCHIP_EMW3166
 2018-06-20 12:56:03 -05:00
Cruz Monrreal 5420c46486
Merge pull request #7271 from innovavn/lpc43xx_serial 
Fix lpc43xx serial pin map compiling error
 2018-06-20 09:04:05 -05:00
Cruz Monrreal 093b4f05a2
Merge pull request #7241 from LMESTM/Fix_DeepsleepStackUsage 
STM32: Reduce HAL_deepsleep stack usage
 2018-06-20 08:38:56 -05:00
Cruz Monrreal cc1e4f0ff8
Merge pull request #7205 from bcostm/fix_hash_data_alignment 
STM32: Fix data alignment issue in HASH function for F2, F7, L4
 2018-06-20 07:55:57 -05:00
Kari Haapalehto ea2f53b03f Add binary drivers for MTB_MXCHIP_EMW3166 2018-06-20 12:42:08 +03:00
canhkha c64971c100
Fix lpc43xx serial pin map compiling error 2018-06-20 13:59:48 +07:00
Cruz Monrreal e8005f6d72
Merge pull request #7206 from mikaleppanen/k64f_async_powerup 
K64f non-blocking powerup
 2018-06-19 21:49:37 -05:00
Cruz Monrreal 567689c725
Merge pull request #7259 from SeppoTakalo/default_wifi 
Provide default WiFi interfaces for Ublox and Realtek
 2018-06-19 21:46:45 -05:00
Laurent MEUNIER 81adafb5a7 STM32: Reduce HAL_deepsleep stack usage 
There are cases where a call hal_deepsleep would overflow the idle task
stack, especially in developper or debug profile.

In order to avoid this case, we split ForceClockOutofDeepSleep
into two separate functions the two structure RCC_ClkInitStruct and
RCC_OscInitStruct are not allocated at the same time.
 2018-06-19 17:32:00 +02:00
Cruz Monrreal 31df3d2865
Merge pull request #7242 from davidsaada/david_uniform_text_region 
Rename text region in ARM linker file for a few NXP CPUs
 2018-06-19 09:45:23 -05:00
Seppo Takalo b4726cbca5 Provide default WiFi interface for Ublox EVK ODIN W2 2018-06-19 16:40:55 +03:00
Seppo Takalo e2d3769211 Provide default WiFI interface for REALTEK_RTL8195AM 2018-06-19 16:40:54 +03:00
Martin Kojtal c964f2ee66
Merge pull request #7226 from juhoeskeli/wise_1570_app_start 
Make MTB_ADV_WISE_1570 respect MBED_APP_START & enable bootloader
 2018-06-19 14:12:07 +02:00
Martin Kojtal 97c9925e8a
Merge pull request #7249 from maximmbed/fix-file-name-warning 
Maxim: Rename files to fix warning
 2018-06-19 14:11:21 +02:00
Melvin van den berg 4986daaa7d - Fixed coding style 
- Set default pull mode to PullNone in gpio_irq_init
 2018-06-19 13:11:31 +02:00
Przemyslaw Stekiel 02d7d25850 us_ticker_set_interrupt: fix bit-shift operation 2018-06-19 08:55:35 +02:00
Przemyslaw Stekiel 80fabcb125 Use lp_ticker.c for NRF51 and NRF52 boards 2018-06-19 08:47:06 +02:00
Przemyslaw Stekiel 4a8de084b9 Use common_rtc.h for NRF51 and NRF52 boards 2018-06-19 08:47:05 +02:00
Przemyslaw Stekiel b073720d62 NRF5x: Increase lp us ticker interrupt priority 
Set the second highest user level, leaving the highest for UART (we are having constant overflows) and two levels below for everything else.
This should increase the timer accuracy.
 2018-06-19 08:47:05 +02:00
Przemyslaw Stekiel 7e222f2994 NRF5x: Add bug fix for the first timer read. 
It has been noticed that first read value can not be trusted.
 2018-06-19 08:47:04 +02:00
Przemyslaw Stekiel 1583cbc78e Use common us_ticker.c for NRF51 and NRF52 boards 2018-06-19 08:47:04 +02:00