mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #7703 from li-ho/adi_tmr_api
Resolve us_ticker.c api discrepancy between EV_COG_AD4050LZ and EV_COG_AD3029LZpull/7727/head
Cruz Monrreal
GitHub
commit
0eb7e7dd89
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@ -202,12 +202,12 @@ static void event_timer()
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tmrConfig.nLoad = cnt;
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tmrConfig.nAsyncLoad = cnt;
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, tmrConfig);
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, &tmrConfig);
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adi_tmr_Enable(ADI_TMR_DEVICE_GP2, true);
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} else {
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tmrConfig.nLoad = 65535u;
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tmrConfig.nAsyncLoad = 65535u;
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, tmrConfig);
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, &tmrConfig);
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adi_tmr_Enable(ADI_TMR_DEVICE_GP2, true);
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}
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}
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@ -274,13 +274,13 @@ void us_ticker_init(void)
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tmrConfig.nAsyncLoad = 0;
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tmrConfig.bReloading = false;
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tmrConfig.bSyncBypass = true; // Allow x1 prescale: requires PCLK as a clk
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP0, tmrConfig);
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP0, &tmrConfig);
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/* Configure GP1 to have a period 256 times longer than GP0 */
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tmrConfig.nLoad = 0;
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tmrConfig.nAsyncLoad = 0;
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tmrConfig.ePrescaler = ADI_TMR_PRESCALER_256; // TMR1 = 26MHz/256
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP1, tmrConfig);
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP1, &tmrConfig);
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/* Configure GP2 for doing event counts */
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tmrConfig.bCountingUp = true;
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@ -291,7 +291,7 @@ void us_ticker_init(void)
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tmrConfig.nAsyncLoad = 0;
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tmrConfig.bReloading = false;
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tmrConfig.bSyncBypass = true; // Allow x1 prescale
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, tmrConfig);
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, &tmrConfig);
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/*------------------------- GP TIMER ENABLE ------------------------------*/
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@ -2,7 +2,7 @@
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* @file adi_tmr_config.h
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* @brief GP and RGB timer device driver configuration
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-----------------------------------------------------------------------------
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Copyright (c) 2016 Analog Devices, Inc.
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Copyright (c) 2016-2018 Analog Devices, Inc.
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All rights reserved.
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@ -169,7 +169,13 @@ POSSIBILITY OF SUCH DAMAGE.
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a value of 0 - 39. Please refer hardware reference manual to know
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which events can be captured by a particular GP timer.
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*/
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#if defined(__ADUCM3029__)
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#define TMR0_CFG_EVENT_CAPTURE (9u)
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#elif defined(__ADUCM4050__)
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#define TMR0_CFG_EVENT_CAPTURE (27u)
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#else
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#error TMR is not ported for this processor
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#endif
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/*************************************************************
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GP Timer 0 PWM0 Configuration
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@ -295,8 +301,13 @@ POSSIBILITY OF SUCH DAMAGE.
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a value of 0 - 39. Please refer hardware reference manual to know
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which events can be captured by a particular GP timer.
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*/
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#if defined(__ADUCM3029__)
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#define TMR1_CFG_EVENT_CAPTURE (15u)
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#elif defined(__ADUCM4050__)
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#define TMR1_CFG_EVENT_CAPTURE (28u)
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#else
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#error TMR is not ported for this processor
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#endif
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/*************************************************************
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GP Timer 1 PWM0 Configuration
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*************************************************************/
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@ -419,8 +430,13 @@ POSSIBILITY OF SUCH DAMAGE.
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a value of 0 - 39. Please refer hardware reference manual to know
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which events can be captured by a particular GP timer.
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*/
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#if defined(__ADUCM3029__)
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#define TMR2_CFG_EVENT_CAPTURE (6u)
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#elif defined(__ADUCM4050__)
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#define TMR2_CFG_EVENT_CAPTURE (27u)
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#else
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#error TMR is not ported for this processor
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#endif
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/*************************************************************
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GP Timer 2 PWM0 Configuration
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*************************************************************/
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@ -451,7 +467,7 @@ POSSIBILITY OF SUCH DAMAGE.
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/*! @} */
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#if defined(__ADUCM4050__)
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/*************************************************************
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RGB Timer Configuration
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*************************************************************/
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@ -629,7 +645,7 @@ POSSIBILITY OF SUCH DAMAGE.
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the PWM output remains idle. It can be any value from 0 to 65535.
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*/
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#define TMR3_CFG_PWM2_MATCH_VALUE (0u)
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#endif
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/*! @} */
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/*************************************************************
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@ -676,9 +692,17 @@ POSSIBILITY OF SUCH DAMAGE.
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#error "Invalid configuration"
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#endif
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#if defined(__ADUCM3029__)
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#if TMR0_CFG_EVENT_CAPTURE > 15u
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#error "Invalid configuration"
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#endif
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#elif defined(__ADUCM4050__)
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#if TMR0_CFG_EVENT_CAPTURE > 39u
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#error "Invalid configuration"
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#endif
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#else
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#error TMR is not ported for this processor
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#endif
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#if TMR0_CFG_ENABLE_PWM0_MATCH_MODE > 1u
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#error "Invalid configuration"
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@ -736,9 +760,17 @@ POSSIBILITY OF SUCH DAMAGE.
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#error "Invalid configuration"
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#endif
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#if defined(__ADUCM3029__)
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#if TMR1_CFG_EVENT_CAPTURE > 15u
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#error "Invalid configuration"
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#endif
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#elif defined(__ADUCM4050__)
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#if TMR1_CFG_EVENT_CAPTURE > 39u
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#error "Invalid configuration"
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#endif
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#else
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#error TMR is not ported for this processor
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#endif
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#if TMR1_CFG_ENABLE_PWM0_MATCH_MODE > 1u
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#error "Invalid configuration"
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@ -796,9 +828,17 @@ POSSIBILITY OF SUCH DAMAGE.
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#error "Invalid configuration"
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#endif
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#if defined(__ADUCM3029__)
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#if TMR2_CFG_EVENT_CAPTURE > 15u
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#error "Invalid configuration"
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#endif
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#elif defined(__ADUCM4050__)
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#if TMR2_CFG_EVENT_CAPTURE > 39u
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#error "Invalid configuration"
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#endif
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#else
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#error TMR is not ported for this processor
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#endif
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#if TMR2_CFG_ENABLE_PWM0_MATCH_MODE > 1u
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#error "Invalid configuration"
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@ -812,6 +852,7 @@ POSSIBILITY OF SUCH DAMAGE.
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#error "Invalid configuration"
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#endif
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#if defined(__ADUCM4050__)
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/*************************************************************
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RGB Timer Macro Validation
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**************************************************************/
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@ -896,6 +937,7 @@ POSSIBILITY OF SUCH DAMAGE.
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#error "Invalid configuration"
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#endif
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#endif
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/*! @} */
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@ -2,7 +2,7 @@
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* @file adi_tmr.h
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* @brief GP and RGB timer device driver public header file
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-----------------------------------------------------------------------------
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Copyright (c) 2016 Analog Devices, Inc.
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Copyright (c) 2016-2018 Analog Devices, Inc.
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All rights reserved.
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@ -56,12 +56,16 @@ POSSIBILITY OF SUCH DAMAGE.
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* @{
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*/
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/* C++ linkage */
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/*!
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*****************************************************************************
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* \enum ADI_TMR_RESULT
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* Enumeration for result code returned from the timer device driver functions.
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* The return value of all timer APIs returning #ADI_TMR_RESULT should always
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* The return value of all timer APIs returning #ADI_TMR_RESULT should always
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* be tested at the application level for success or failure.
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*****************************************************************************/
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typedef enum {
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@ -97,10 +101,17 @@ typedef enum {
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ADI_TMR_DEVICE_GP1 = 1u,
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/*! General purpose timer 2 */
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ADI_TMR_DEVICE_GP2 = 2u,
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#if defined(__ADUCM3029__)
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/*! Total number of devices (private) */
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ADI_TMR_DEVICE_NUM = 3u,
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#elif defined(__ADUCM4050__)
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/*! RGB timer */
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ADI_TMR_DEVICE_RGB = 3u,
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/*! Total number of devices (private) */
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ADI_TMR_DEVICE_NUM = 4u,
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#else
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#error TMR is not ported for this processor
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#endif
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} ADI_TMR_DEVICE;
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/*!
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@ -110,7 +121,7 @@ typedef enum {
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*****************************************************************************/
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typedef enum {
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/*! Timeout event occurred */
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ADI_TMR_EVENT_TIMEOUT = 0x01,
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ADI_TMR_EVENT_TIMEOUT = 0x01,
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/*! Event capture event occurred */
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ADI_TMR_EVENT_CAPTURE = 0x02,
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} ADI_TMR_EVENT;
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@ -124,7 +135,7 @@ typedef enum {
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/*! Count every 1 source clock periods */
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ADI_TMR_PRESCALER_1 = 0u,
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/*! Count every 16 source clock periods */
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ADI_TMR_PRESCALER_16 = 1u,
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ADI_TMR_PRESCALER_16 = 1u,
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/*! Count every 64 source clock periods */
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ADI_TMR_PRESCALER_64 = 2u,
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/*! Count every 256 source clock periods */
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@ -138,11 +149,11 @@ typedef enum {
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*****************************************************************************/
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typedef enum {
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/*! Use periphreal clock (PCLK) */
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ADI_TMR_CLOCK_PCLK = 0u,
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ADI_TMR_CLOCK_PCLK = 0u,
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/*! Use internal high frequency clock (HFOSC) */
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ADI_TMR_CLOCK_HFOSC = 1u,
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ADI_TMR_CLOCK_HFOSC = 1u,
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/*! Use internal low frequency clock (LFOSC) */
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ADI_TMR_CLOCK_LFOSC = 2u,
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ADI_TMR_CLOCK_LFOSC = 2u,
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/*! Use external low frequency clock (LFXTAL) */
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ADI_TMR_CLOCK_LFXTAL = 3u,
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} ADI_TMR_CLOCK_SOURCE;
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@ -151,7 +162,7 @@ typedef enum {
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*****************************************************************************
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* \enum ADI_TMR_PWM_OUTPUT
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* RGB PWM outputs, used to specify which PWM output to configure. For the GP
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* timers only #ADI_TMR_PWM_OUTPUT_0 is allowed. The RGB timer has all three
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* timers only #ADI_TMR_PWM_OUTPUT_0 is allowed. The RGB timer has all three
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* outputs.
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*****************************************************************************/
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typedef enum {
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@ -168,7 +179,7 @@ typedef enum {
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/*!
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*****************************************************************************
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* \struct ADI_TMR_CONFIG
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* Configuration structure to fill and pass to #adi_tmr_ConfigTimer when
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* Configuration structure to fill and pass to #adi_tmr_ConfigTimer when
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* configuring the GP or RGB timer
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*****************************************************************************/
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typedef struct {
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@ -180,7 +191,7 @@ typedef struct {
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ADI_TMR_PRESCALER ePrescaler;
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/*! Clock source */
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ADI_TMR_CLOCK_SOURCE eClockSource;
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/*! Load value (only relent in periodic mode) */
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/*! Load value (only relevant in periodic mode) */
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uint16_t nLoad;
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/*! Asynchronous load value (only relevant in periodic mode, and when PCLK is used) */
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uint16_t nAsyncLoad;
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@ -193,7 +204,7 @@ typedef struct {
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/*!
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*****************************************************************************
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* \struct ADI_TMR_EVENT_CONFIG
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* Configuration structure to fill and pass to #adi_tmr_ConfigEvent when
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* Configuration structure to fill and pass to #adi_tmr_ConfigEvent when
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* configuring event capture
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*****************************************************************************/
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typedef struct {
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@ -208,7 +219,7 @@ typedef struct {
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/*!
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*****************************************************************************
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* \struct ADI_TMR_PWM_CONFIG
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* Configuration structure to fill and pass to #adi_tmr_ConfigPwm when
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* Configuration structure to fill and pass to #adi_tmr_ConfigPwm when
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* configuring pulse width modulation output
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*****************************************************************************/
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typedef struct {
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@ -232,9 +243,9 @@ typedef struct {
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ADI_TMR_RESULT adi_tmr_Init (ADI_TMR_DEVICE const eDevice, ADI_CALLBACK const pfCallback, void * const pCBParam, bool bEnableInt);
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/* Configuration interface functions */
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ADI_TMR_RESULT adi_tmr_ConfigTimer (ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG timerConfig);
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ADI_TMR_RESULT adi_tmr_ConfigEvent (ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_CONFIG eventConfig);
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ADI_TMR_RESULT adi_tmr_ConfigPwm (ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFIG pwmConfig );
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ADI_TMR_RESULT adi_tmr_ConfigTimer (ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG* timerConfig);
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ADI_TMR_RESULT adi_tmr_ConfigEvent (ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_CONFIG* eventConfig);
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ADI_TMR_RESULT adi_tmr_ConfigPwm (ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFIG* pwmConfig );
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/* Timer start and stop */
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ADI_TMR_RESULT adi_tmr_Enable (ADI_TMR_DEVICE const eDevice, bool bEnable);
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@ -246,7 +257,9 @@ ADI_TMR_RESULT adi_tmr_GetCaptureCount (ADI_TMR_DEVICE const eDevice, uint16_t *
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/* Reload function */
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ADI_TMR_RESULT adi_tmr_Reload (ADI_TMR_DEVICE const eDevice);
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#ifdef __cplusplus
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}
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#endif
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/*! @} */
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@ -2,7 +2,7 @@
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* @file adi_tmr.c
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* @brief GP and RGB timer device driver implementation
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-----------------------------------------------------------------------------
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Copyright (c) 2016 Analog Devices, Inc.
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Copyright (c) 2016-2018 Analog Devices, Inc.
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All rights reserved.
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@ -86,7 +86,7 @@ POSSIBILITY OF SUCH DAMAGE.
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#include "adi_tmr_data.c"
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#endif
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#if defined(__ADUCM4050__)
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/* In adi_tmr_ConfigPwm, the bit positions for just PWM0 are used for PWM1 and PWM2 to simplify the code. Check here to make sure this is safe. */
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#if BITP_TMR_RGB_PWM0CTL_IDLESTATE != BITP_TMR_RGB_PWM1CTL_IDLESTATE
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#error "Bit positions for PWM0 and PWM1 do not match. Fix adi_tmr_ConfigPwm."
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@ -100,17 +100,36 @@ POSSIBILITY OF SUCH DAMAGE.
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#if BITP_TMR_RGB_PWM0CTL_MATCH != BITP_TMR_RGB_PWM2CTL_MATCH
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#error "Bit positions for PWM0 and PWM2 do not match. Fix adi_tmr_ConfigPwm."
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#endif
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#endif /*__ADUCM4050__*/
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/*! Number of events that can be captured */
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#if defined(__ADUCM3029__)
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#define ADI_TMR_NUM_EVENTS (16u)
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#elif defined(__ADUCM4050__)
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#define ADI_TMR_NUM_EVENTS (40u)
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#else
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#error TMR is not ported for this processor
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#endif
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/*! \cond PRIVATE */
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/* Since the RGB typedef is a superset of the GP typedef, treat the GP timers as RGB timers and restrict top register access */
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#if defined(__ADUCM3029__)
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static ADI_TMR_TypeDef * adi_tmr_registers[ADI_TMR_DEVICE_NUM] = {pADI_TMR0, pADI_TMR1, pADI_TMR2};
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#elif defined(__ADUCM4050__)
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static ADI_TMR_RGB_TypeDef * adi_tmr_registers[ADI_TMR_DEVICE_NUM] = {(ADI_TMR_RGB_TypeDef *) pADI_TMR0, (ADI_TMR_RGB_TypeDef *) pADI_TMR1, (ADI_TMR_RGB_TypeDef *) pADI_TMR2, pADI_TMR_RGB};
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#else
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#error TMR is not ported for this processor
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#endif
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/* Interrupt enums */
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#if defined(__ADUCM3029__)
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static const IRQn_Type adi_tmr_interrupt[ADI_TMR_DEVICE_NUM] = {TMR0_EVT_IRQn, TMR1_EVT_IRQn, TMR2_EVT_IRQn};
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#elif defined(__ADUCM4050__)
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static const IRQn_Type adi_tmr_interrupt[ADI_TMR_DEVICE_NUM] = {TMR0_EVT_IRQn, TMR1_EVT_IRQn, TMR2_EVT_IRQn, TMR_RGB_EVT_IRQn};
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#else
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#error TMR is not ported for this processor
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#endif
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/* Private data that the driver needs to retain between function calls */
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static ADI_CALLBACK adi_tmr_callbacks[ADI_TMR_DEVICE_NUM];
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@ -121,8 +140,9 @@ static void CommonIntHandler (ADI_TMR_DEVICE const eDevice);
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void GP_Tmr0_Int_Handler(void);
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void GP_Tmr1_Int_Handler(void);
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void GP_Tmr2_Int_Handler(void);
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#if defined(__ADUCM4050__)
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void RGB_Tmr_Int_Handler(void);
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#endif
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/*! \endcond */
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@ -181,10 +201,10 @@ ADI_TMR_RESULT adi_tmr_Init(ADI_TMR_DEVICE const eDevice, ADI_CALLBACK const pfC
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adi_tmr_registers[eDevice]->CTL = aTimerCtlConfig [eDevice];
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adi_tmr_registers[eDevice]->LOAD = aTimerLoadConfig [eDevice];
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adi_tmr_registers[eDevice]->ALOAD = aTimerALoadConfig [eDevice];
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adi_tmr_registers[eDevice]->EVENTSELECT = aTimerEventConfig [eDevice];
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adi_tmr_registers[eDevice]->PWM0CTL = aTimerPwmCtlConfig [eDevice];
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adi_tmr_registers[eDevice]->PWM0MATCH = aTimerPwmMatchConfig[eDevice];
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#if defined(__ADUCM4050__)
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adi_tmr_registers[eDevice]->EVENTSELECT = aTimerEventConfig [eDevice];
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/* IF(Initializing the RGB timer, there are 2 other PWM outputs to configure) */
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if (eDevice == ADI_TMR_DEVICE_RGB) {
|
||||
/* The array is bumped by 1 to get to the 5th entry in the static config array, which contains RGB PWM1 */
|
||||
|
|
@ -194,6 +214,7 @@ ADI_TMR_RESULT adi_tmr_Init(ADI_TMR_DEVICE const eDevice, ADI_CALLBACK const pfC
|
|||
adi_tmr_registers[eDevice]->PWM2CTL = aTimerPwmCtlConfig [eDevice+2u];
|
||||
adi_tmr_registers[eDevice]->PWM2MATCH = aTimerPwmMatchConfig[eDevice+2u];
|
||||
} /* ENDIF */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
return ADI_TMR_SUCCESS;
|
||||
|
|
@ -219,7 +240,7 @@ ADI_TMR_RESULT adi_tmr_Init(ADI_TMR_DEVICE const eDevice, ADI_CALLBACK const pfC
|
|||
* - #ADI_TMR_SUCCESS Function call completed successfully
|
||||
*
|
||||
*/
|
||||
ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG timerConfig) {
|
||||
ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG * timerConfig) {
|
||||
uint16_t nTemp;
|
||||
#ifdef ADI_DEBUG
|
||||
/* IF(Bad device input parameter) */
|
||||
|
|
@ -227,7 +248,7 @@ ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG
|
|||
return ADI_TMR_BAD_DEVICE_NUM;
|
||||
} /* ENDIF */
|
||||
/* IF(Bad configuration, cannot enable reloading while in free running mode) */
|
||||
if ((timerConfig.bPeriodic == false) && (timerConfig.bReloading == true)) {
|
||||
if ((timerConfig->bPeriodic == false) && (timerConfig->bReloading == true)) {
|
||||
return ADI_TMR_BAD_RELOAD_CONFIGURATION;
|
||||
} /* ENDIF */
|
||||
/* IF(The timer is already running) */
|
||||
|
|
@ -236,8 +257,8 @@ ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG
|
|||
} /* ENDIF */
|
||||
#endif
|
||||
/* Set the load registers */
|
||||
adi_tmr_registers[eDevice]->LOAD = timerConfig.nLoad;
|
||||
adi_tmr_registers[eDevice]->ALOAD = timerConfig.nAsyncLoad;
|
||||
adi_tmr_registers[eDevice]->LOAD = timerConfig->nLoad;
|
||||
adi_tmr_registers[eDevice]->ALOAD = timerConfig->nAsyncLoad;
|
||||
|
||||
/* IF(Busy bit does not clear after waiting) */
|
||||
if (ADI_TMR_SUCCESS != WaitForStatusBit(eDevice, (uint16_t) BITM_TMR_RGB_STAT_BUSY)) {
|
||||
|
|
@ -249,26 +270,26 @@ ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG
|
|||
nTemp &= (uint16_t) (BITM_TMR_RGB_CTL_EVTEN | BITM_TMR_RGB_CTL_RSTEN);
|
||||
|
||||
/* Setup the prescaler and the clock source */
|
||||
nTemp |= (uint16_t)(((uint16_t) timerConfig.ePrescaler ) << BITP_TMR_RGB_CTL_PRE);
|
||||
nTemp |= (uint16_t)(((uint16_t) timerConfig.eClockSource) << BITP_TMR_RGB_CTL_CLK);
|
||||
nTemp |= (uint16_t)(((uint16_t) timerConfig->ePrescaler ) << BITP_TMR_RGB_CTL_PRE);
|
||||
nTemp |= (uint16_t)(((uint16_t) timerConfig->eClockSource) << BITP_TMR_RGB_CTL_CLK);
|
||||
|
||||
/* IF(Periodic mode) */
|
||||
if (timerConfig.bPeriodic == true) {
|
||||
if (timerConfig->bPeriodic == true) {
|
||||
nTemp |= (1u << BITP_TMR_RGB_CTL_MODE);
|
||||
} /* ENDIF */
|
||||
|
||||
/* IF(Counting up) */
|
||||
if (timerConfig.bCountingUp == true) {
|
||||
if (timerConfig->bCountingUp == true) {
|
||||
nTemp |= (1u << BITP_TMR_RGB_CTL_UP);
|
||||
} /* ENDIF */
|
||||
|
||||
/* IF(Reloading is enabled) */
|
||||
if (timerConfig.bReloading == true) {
|
||||
if (timerConfig->bReloading == true) {
|
||||
nTemp |= (1u << BITP_TMR_RGB_CTL_RLD);
|
||||
} /* ENDIF */
|
||||
|
||||
/* IF(Sync bypass is enabled) */
|
||||
if (timerConfig.bSyncBypass == true) {
|
||||
if (timerConfig->bSyncBypass == true) {
|
||||
nTemp |= (1u << BITP_TMR_RGB_CTL_SYNCBYP);
|
||||
} /* ENDIF */
|
||||
|
||||
|
|
@ -301,14 +322,14 @@ ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG
|
|||
* - #ADI_TMR_SUCCESS Function call completed successfully
|
||||
*
|
||||
*/
|
||||
ADI_TMR_RESULT adi_tmr_ConfigEvent(ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_CONFIG eventConfig) {
|
||||
ADI_TMR_RESULT adi_tmr_ConfigEvent(ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_CONFIG * eventConfig) {
|
||||
#ifdef ADI_DEBUG
|
||||
/* IF(Bad device input parameter) */
|
||||
if (eDevice >= ADI_TMR_DEVICE_NUM) {
|
||||
return ADI_TMR_BAD_DEVICE_NUM;
|
||||
} /* ENDIF */
|
||||
/* IF(Bad event input parameter) */
|
||||
if (eventConfig.nEventID >= ADI_TMR_NUM_EVENTS) {
|
||||
if (eventConfig->nEventID >= ADI_TMR_NUM_EVENTS) {
|
||||
return ADI_TMR_BAD_EVENT_ID;
|
||||
} /* ENDIF */
|
||||
/* IF(The timer is already running) */
|
||||
|
|
@ -316,9 +337,10 @@ ADI_TMR_RESULT adi_tmr_ConfigEvent(ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_C
|
|||
return ADI_TMR_OPERATION_NOT_ALLOWED;
|
||||
} /* ENDIF */
|
||||
#endif
|
||||
#if defined(__ADUCM4050__)
|
||||
/* Set the event number */
|
||||
adi_tmr_registers[eDevice]->EVENTSELECT = (uint16_t) eventConfig.nEventID;
|
||||
|
||||
adi_tmr_registers[eDevice]->EVENTSELECT = (uint16_t) eventConfig->nEventID;
|
||||
#endif
|
||||
/* IF(Busy bit does not clear after waiting) */
|
||||
if (ADI_TMR_SUCCESS != WaitForStatusBit(eDevice, (uint16_t) BITM_TMR_RGB_STAT_BUSY)) {
|
||||
return ADI_TMR_DEVICE_BUSY;
|
||||
|
|
@ -328,15 +350,20 @@ ADI_TMR_RESULT adi_tmr_ConfigEvent(ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_C
|
|||
adi_tmr_registers[eDevice]->CTL &= (uint16_t) ~(BITM_TMR_RGB_CTL_EVTEN | BITM_TMR_RGB_CTL_RSTEN);
|
||||
|
||||
/* IF(Turning event capture on) */
|
||||
if (eventConfig.bEnable == true) {
|
||||
if (eventConfig->bEnable == true) {
|
||||
adi_tmr_registers[eDevice]->CTL |= (uint16_t) BITM_TMR_RGB_CTL_EVTEN;
|
||||
} /* ENDIF */
|
||||
|
||||
/* IF(Enabling reset on event capture) */
|
||||
if (eventConfig.bPrescaleReset == true) {
|
||||
if (eventConfig->bPrescaleReset == true) {
|
||||
adi_tmr_registers[eDevice]->CTL |= (uint16_t) BITM_TMR_RGB_CTL_RSTEN;
|
||||
} /* ENDIF */
|
||||
|
||||
#if defined(__ADUCM3029__)
|
||||
/* Write the event index */
|
||||
adi_tmr_registers[eDevice]->CTL |= (uint16_t) (((uint16_t) eventConfig->nEventID) << BITP_TMR_CTL_EVTRANGE);
|
||||
#endif
|
||||
|
||||
return ADI_TMR_SUCCESS;
|
||||
}
|
||||
|
||||
|
|
@ -364,7 +391,7 @@ ADI_TMR_RESULT adi_tmr_ConfigEvent(ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_C
|
|||
* - #ADI_TMR_SUCCESS Function call completed successfully
|
||||
*
|
||||
*/
|
||||
ADI_TMR_RESULT adi_tmr_ConfigPwm(ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFIG pwmConfig) {
|
||||
ADI_TMR_RESULT adi_tmr_ConfigPwm(ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFIG * pwmConfig) {
|
||||
uint16_t nControl = 0u;
|
||||
#ifdef ADI_DEBUG
|
||||
/* IF(Bad device input parameter) */
|
||||
|
|
@ -375,35 +402,38 @@ ADI_TMR_RESULT adi_tmr_ConfigPwm(ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFI
|
|||
if ((adi_tmr_registers[eDevice]->CTL & BITM_TMR_RGB_CTL_EN) == BITM_TMR_RGB_CTL_EN) {
|
||||
return ADI_TMR_OPERATION_NOT_ALLOWED;
|
||||
} /* ENDIF */
|
||||
#if defined(__ADUCM4050__)
|
||||
/* IF(Bad PWM output and device combo OR bad PWM output) */
|
||||
if (((eDevice != ADI_TMR_DEVICE_RGB) && (pwmConfig.eOutput != ADI_TMR_PWM_OUTPUT_0)) || (pwmConfig.eOutput >= ADI_TMR_PWM_OUTPUT_NUM)) {
|
||||
if (((eDevice != ADI_TMR_DEVICE_RGB) && (pwmConfig->eOutput != ADI_TMR_PWM_OUTPUT_0)) || (pwmConfig->eOutput >= ADI_TMR_PWM_OUTPUT_NUM)) {
|
||||
return ADI_TMR_BAD_PWM_NUM;
|
||||
} /* ENDIF */
|
||||
#endif
|
||||
#endif
|
||||
/* IF(Idle high is set) */
|
||||
if (pwmConfig.bIdleHigh == true) {
|
||||
if (pwmConfig->bIdleHigh == true) {
|
||||
nControl = (1u << ((uint16_t) BITP_TMR_RGB_PWM0CTL_IDLESTATE));
|
||||
} /* ENDIF */
|
||||
|
||||
/* IF(Match mode is enabled) */
|
||||
if (pwmConfig.bMatch == true) {
|
||||
if (pwmConfig->bMatch == true) {
|
||||
nControl |= (1u << ((uint16_t) BITP_TMR_RGB_PWM0CTL_MATCH));
|
||||
} /* ENDIF */
|
||||
|
||||
|
||||
/* IF(PWM output 0) */
|
||||
if (pwmConfig.eOutput == ADI_TMR_PWM_OUTPUT_0) {
|
||||
if (pwmConfig->eOutput == ADI_TMR_PWM_OUTPUT_0) {
|
||||
adi_tmr_registers[eDevice]->PWM0CTL = nControl;
|
||||
adi_tmr_registers[eDevice]->PWM0MATCH = pwmConfig.nMatchValue;
|
||||
adi_tmr_registers[eDevice]->PWM0MATCH = pwmConfig->nMatchValue;
|
||||
#if defined(__ADUCM4050__)
|
||||
/* IF(PWM output 1) */
|
||||
} else if (pwmConfig.eOutput == ADI_TMR_PWM_OUTPUT_1) {
|
||||
} else if (pwmConfig->eOutput == ADI_TMR_PWM_OUTPUT_1) {
|
||||
adi_tmr_registers[eDevice]->PWM1CTL = nControl;
|
||||
adi_tmr_registers[eDevice]->PWM1MATCH = pwmConfig.nMatchValue;
|
||||
adi_tmr_registers[eDevice]->PWM1MATCH = pwmConfig->nMatchValue;
|
||||
/* ELSE(PWM output 2) */
|
||||
} else {
|
||||
adi_tmr_registers[eDevice]->PWM2CTL = nControl;
|
||||
adi_tmr_registers[eDevice]->PWM2MATCH = pwmConfig.nMatchValue;
|
||||
adi_tmr_registers[eDevice]->PWM2MATCH = pwmConfig->nMatchValue;
|
||||
#endif
|
||||
} /* ENDIF */
|
||||
|
||||
return ADI_TMR_SUCCESS;
|
||||
}
|
||||
|
||||
|
|
@ -599,13 +629,13 @@ void GP_Tmr2_Int_Handler(void) {
|
|||
CommonIntHandler(ADI_TMR_DEVICE_GP2);
|
||||
ISR_EPILOG()
|
||||
}
|
||||
|
||||
#if defined(__ADUCM4050__)
|
||||
void RGB_Tmr_Int_Handler(void) {
|
||||
ISR_PROLOG()
|
||||
CommonIntHandler(ADI_TMR_DEVICE_RGB);
|
||||
ISR_EPILOG()
|
||||
}
|
||||
|
||||
#endif
|
||||
/*! \endcond */
|
||||
|
||||
/*! @} */
|
||||
|
|
|
|||
|
|
@ -51,6 +51,34 @@ POSSIBILITY OF SUCH DAMAGE.
|
|||
#include <adi_tmr_config.h>
|
||||
#include <drivers/tmr/adi_tmr.h>
|
||||
|
||||
/* Macro mapping from ADuCM4050 to ADuCM3029 */
|
||||
#if defined(__ADUCM3029__)
|
||||
#define BITM_TMR_RGB_CTL_EN BITM_TMR_CTL_EN
|
||||
#define PWM0CTL PWMCTL
|
||||
#define PWM0MATCH PWMMATCH
|
||||
#define BITM_TMR_RGB_STAT_BUSY BITM_TMR_STAT_BUSY
|
||||
#define BITM_TMR_RGB_CTL_EVTEN BITM_TMR_CTL_EVTEN
|
||||
#define BITM_TMR_RGB_CTL_RSTEN BITM_TMR_CTL_RSTEN
|
||||
#define BITP_TMR_RGB_CTL_RSTEN BITP_TMR_CTL_RSTEN
|
||||
#define BITP_TMR_RGB_CTL_EVTEN BITP_TMR_CTL_EVTEN
|
||||
#define BITP_TMR_RGB_CTL_PRE BITP_TMR_CTL_PRE
|
||||
#define BITP_TMR_RGB_CTL_CLK BITP_TMR_CTL_CLK
|
||||
#define BITP_TMR_RGB_CTL_MODE BITP_TMR_CTL_MODE
|
||||
#define BITP_TMR_RGB_CTL_UP BITP_TMR_CTL_UP
|
||||
#define BITP_TMR_RGB_CTL_RLD BITP_TMR_CTL_RLD
|
||||
#define BITP_TMR_RGB_CTL_SYNCBYP BITP_TMR_CTL_SYNCBYP
|
||||
#define BITP_TMR_RGB_PWM0CTL_IDLESTATE BITP_TMR_PWMCTL_IDLESTATE
|
||||
#define BITP_TMR_RGB_PWM0CTL_MATCH BITP_TMR_PWMCTL_MATCH
|
||||
#define BITM_TMR_RGB_CLRINT_TIMEOUT BITM_TMR_CLRINT_TIMEOUT
|
||||
#define BITM_TMR_RGB_STAT_PDOK BITM_TMR_STAT_PDOK
|
||||
#define BITM_TMR_RGB_STAT_TIMEOUT BITM_TMR_STAT_TIMEOUT
|
||||
#define BITM_TMR_RGB_STAT_CAPTURE BITM_TMR_STAT_CAPTURE
|
||||
#define BITM_TMR_RGB_CLRINT_EVTCAPT BITM_TMR_CLRINT_EVTCAPT
|
||||
#define BITM_TMR_RGB_CLRINT_TIMEOUT BITM_TMR_CLRINT_TIMEOUT
|
||||
#define BITM_TMR_RGB_CTL_RLD BITM_TMR_CTL_RLD
|
||||
#endif /*__ADUCM3029__*/
|
||||
|
||||
#ifndef TARGET_Analog_Devices
|
||||
/* CTL register static configuration */
|
||||
static uint16_t aTimerCtlConfig[] =
|
||||
{
|
||||
|
|
@ -80,7 +108,7 @@ static uint16_t aTimerCtlConfig[] =
|
|||
(TMR2_CFG_ENABLE_SYNC_BYPASS << BITP_TMR_RGB_CTL_SYNCBYP) |
|
||||
(TMR2_CFG_ENABLE_PRESCALE_RESET << BITP_TMR_RGB_CTL_RSTEN) |
|
||||
(TMR2_CFG_ENABLE_EVENT_CAPTURE << BITP_TMR_RGB_CTL_EVTEN),
|
||||
|
||||
#if defined(__ADUCM4050__)
|
||||
(TMR3_CFG_COUNT_UP << BITP_TMR_RGB_CTL_UP) |
|
||||
(TMR3_CFG_MODE << BITP_TMR_RGB_CTL_MODE) |
|
||||
(TMR3_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) |
|
||||
|
|
@ -89,6 +117,7 @@ static uint16_t aTimerCtlConfig[] =
|
|||
(TMR3_CFG_ENABLE_SYNC_BYPASS << BITP_TMR_RGB_CTL_SYNCBYP) |
|
||||
(TMR3_CFG_ENABLE_PRESCALE_RESET << BITP_TMR_RGB_CTL_RSTEN) |
|
||||
(TMR3_CFG_ENABLE_EVENT_CAPTURE << BITP_TMR_RGB_CTL_EVTEN),
|
||||
#endif
|
||||
};
|
||||
|
||||
/* LOAD register static configuration */
|
||||
|
|
@ -97,7 +126,9 @@ static uint16_t aTimerLoadConfig[] =
|
|||
TMR0_CFG_LOAD_VALUE,
|
||||
TMR1_CFG_LOAD_VALUE,
|
||||
TMR2_CFG_LOAD_VALUE,
|
||||
#if defined(__ADUCM4050__)
|
||||
TMR3_CFG_LOAD_VALUE,
|
||||
#endif
|
||||
};
|
||||
|
||||
/* Asynchronous LOAD static configuraton */
|
||||
|
|
@ -106,10 +137,13 @@ static uint16_t aTimerALoadConfig[] =
|
|||
TMR0_CFG_ASYNC_LOAD_VALUE,
|
||||
TMR1_CFG_ASYNC_LOAD_VALUE,
|
||||
TMR2_CFG_ASYNC_LOAD_VALUE,
|
||||
#if defined(__ADUCM4050__)
|
||||
TMR3_CFG_ASYNC_LOAD_VALUE,
|
||||
#endif
|
||||
};
|
||||
|
||||
/* EVENTSELECT static configuration */
|
||||
#if defined(__ADUCM4050__)
|
||||
static uint16_t aTimerEventConfig[] =
|
||||
{
|
||||
TMR0_CFG_EVENT_CAPTURE,
|
||||
|
|
@ -117,6 +151,7 @@ static uint16_t aTimerEventConfig[] =
|
|||
TMR2_CFG_EVENT_CAPTURE,
|
||||
TMR3_CFG_EVENT_CAPTURE,
|
||||
};
|
||||
#endif
|
||||
|
||||
/* PWM CTL static configuration */
|
||||
static uint16_t aTimerPwmCtlConfig[] =
|
||||
|
|
@ -129,7 +164,7 @@ static uint16_t aTimerPwmCtlConfig[] =
|
|||
|
||||
(TMR2_CFG_PWM0_IDLE_STATE << BITP_TMR_RGB_PWM0CTL_IDLESTATE) |
|
||||
(TMR2_CFG_PWM0_MATCH_VALUE << BITP_TMR_RGB_PWM0CTL_MATCH),
|
||||
|
||||
#if defined(__ADUCM4050__)
|
||||
(TMR3_CFG_PWM0_IDLE_STATE << BITP_TMR_RGB_PWM0CTL_IDLESTATE) |
|
||||
(TMR3_CFG_PWM0_MATCH_VALUE << BITP_TMR_RGB_PWM0CTL_MATCH),
|
||||
|
||||
|
|
@ -138,6 +173,7 @@ static uint16_t aTimerPwmCtlConfig[] =
|
|||
|
||||
(TMR3_CFG_PWM2_IDLE_STATE << BITP_TMR_RGB_PWM2CTL_IDLESTATE) |
|
||||
(TMR3_CFG_PWM2_MATCH_VALUE << BITP_TMR_RGB_PWM2CTL_MATCH),
|
||||
#endif
|
||||
};
|
||||
|
||||
/* PWM MATCH static configuration */
|
||||
|
|
@ -145,10 +181,12 @@ static uint16_t aTimerPwmMatchConfig[] = {
|
|||
TMR0_CFG_PWM0_MATCH_VALUE,
|
||||
TMR1_CFG_PWM0_MATCH_VALUE,
|
||||
TMR2_CFG_PWM0_MATCH_VALUE,
|
||||
#if defined(__ADUCM4050__)
|
||||
TMR3_CFG_PWM0_MATCH_VALUE,
|
||||
TMR3_CFG_PWM1_MATCH_VALUE,
|
||||
TMR3_CFG_PWM2_MATCH_VALUE
|
||||
#endif
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* ADI_TMR_DATA */
|
||||
|
|
|
|||
Loading…
Reference in New Issue