diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/us_ticker.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/us_ticker.c index 3dcd428aad..86c8a07ddc 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/us_ticker.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/us_ticker.c @@ -202,12 +202,12 @@ static void event_timer() tmrConfig.nLoad = cnt; tmrConfig.nAsyncLoad = cnt; - adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, tmrConfig); + adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, &tmrConfig); adi_tmr_Enable(ADI_TMR_DEVICE_GP2, true); } else { tmrConfig.nLoad = 65535u; tmrConfig.nAsyncLoad = 65535u; - adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, tmrConfig); + adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, &tmrConfig); adi_tmr_Enable(ADI_TMR_DEVICE_GP2, true); } } @@ -274,13 +274,13 @@ void us_ticker_init(void) tmrConfig.nAsyncLoad = 0; tmrConfig.bReloading = false; tmrConfig.bSyncBypass = true; // Allow x1 prescale: requires PCLK as a clk - adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP0, tmrConfig); + adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP0, &tmrConfig); /* Configure GP1 to have a period 256 times longer than GP0 */ tmrConfig.nLoad = 0; tmrConfig.nAsyncLoad = 0; tmrConfig.ePrescaler = ADI_TMR_PRESCALER_256; // TMR1 = 26MHz/256 - adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP1, tmrConfig); + adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP1, &tmrConfig); /* Configure GP2 for doing event counts */ tmrConfig.bCountingUp = true; @@ -291,7 +291,7 @@ void us_ticker_init(void) tmrConfig.nAsyncLoad = 0; tmrConfig.bReloading = false; tmrConfig.bSyncBypass = true; // Allow x1 prescale - adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, tmrConfig); + adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, &tmrConfig); /*------------------------- GP TIMER ENABLE ------------------------------*/ diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_tmr_config.h b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_tmr_config.h index 8d6ee10347..f6407dbc38 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_tmr_config.h +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/config/adi_tmr_config.h @@ -2,7 +2,7 @@ * @file adi_tmr_config.h * @brief GP and RGB timer device driver configuration ----------------------------------------------------------------------------- -Copyright (c) 2016 Analog Devices, Inc. +Copyright (c) 2016-2018 Analog Devices, Inc. All rights reserved. @@ -169,7 +169,13 @@ POSSIBILITY OF SUCH DAMAGE. a value of 0 - 39. Please refer hardware reference manual to know which events can be captured by a particular GP timer. */ +#if defined(__ADUCM3029__) +#define TMR0_CFG_EVENT_CAPTURE (9u) +#elif defined(__ADUCM4050__) #define TMR0_CFG_EVENT_CAPTURE (27u) +#else +#error TMR is not ported for this processor +#endif /************************************************************* GP Timer 0 PWM0 Configuration @@ -295,8 +301,13 @@ POSSIBILITY OF SUCH DAMAGE. a value of 0 - 39. Please refer hardware reference manual to know which events can be captured by a particular GP timer. */ +#if defined(__ADUCM3029__) +#define TMR1_CFG_EVENT_CAPTURE (15u) +#elif defined(__ADUCM4050__) #define TMR1_CFG_EVENT_CAPTURE (28u) - +#else +#error TMR is not ported for this processor +#endif /************************************************************* GP Timer 1 PWM0 Configuration *************************************************************/ @@ -419,8 +430,13 @@ POSSIBILITY OF SUCH DAMAGE. a value of 0 - 39. Please refer hardware reference manual to know which events can be captured by a particular GP timer. */ +#if defined(__ADUCM3029__) +#define TMR2_CFG_EVENT_CAPTURE (6u) +#elif defined(__ADUCM4050__) #define TMR2_CFG_EVENT_CAPTURE (27u) - +#else +#error TMR is not ported for this processor +#endif /************************************************************* GP Timer 2 PWM0 Configuration *************************************************************/ @@ -451,7 +467,7 @@ POSSIBILITY OF SUCH DAMAGE. /*! @} */ - +#if defined(__ADUCM4050__) /************************************************************* RGB Timer Configuration *************************************************************/ @@ -629,7 +645,7 @@ POSSIBILITY OF SUCH DAMAGE. the PWM output remains idle. It can be any value from 0 to 65535. */ #define TMR3_CFG_PWM2_MATCH_VALUE (0u) - +#endif /*! @} */ /************************************************************* @@ -676,9 +692,17 @@ POSSIBILITY OF SUCH DAMAGE. #error "Invalid configuration" #endif +#if defined(__ADUCM3029__) +#if TMR0_CFG_EVENT_CAPTURE > 15u +#error "Invalid configuration" +#endif +#elif defined(__ADUCM4050__) #if TMR0_CFG_EVENT_CAPTURE > 39u #error "Invalid configuration" #endif +#else +#error TMR is not ported for this processor +#endif #if TMR0_CFG_ENABLE_PWM0_MATCH_MODE > 1u #error "Invalid configuration" @@ -736,9 +760,17 @@ POSSIBILITY OF SUCH DAMAGE. #error "Invalid configuration" #endif +#if defined(__ADUCM3029__) +#if TMR1_CFG_EVENT_CAPTURE > 15u +#error "Invalid configuration" +#endif +#elif defined(__ADUCM4050__) #if TMR1_CFG_EVENT_CAPTURE > 39u #error "Invalid configuration" #endif +#else +#error TMR is not ported for this processor +#endif #if TMR1_CFG_ENABLE_PWM0_MATCH_MODE > 1u #error "Invalid configuration" @@ -796,9 +828,17 @@ POSSIBILITY OF SUCH DAMAGE. #error "Invalid configuration" #endif +#if defined(__ADUCM3029__) +#if TMR2_CFG_EVENT_CAPTURE > 15u +#error "Invalid configuration" +#endif +#elif defined(__ADUCM4050__) #if TMR2_CFG_EVENT_CAPTURE > 39u #error "Invalid configuration" #endif +#else +#error TMR is not ported for this processor +#endif #if TMR2_CFG_ENABLE_PWM0_MATCH_MODE > 1u #error "Invalid configuration" @@ -812,6 +852,7 @@ POSSIBILITY OF SUCH DAMAGE. #error "Invalid configuration" #endif +#if defined(__ADUCM4050__) /************************************************************* RGB Timer Macro Validation **************************************************************/ @@ -896,6 +937,7 @@ POSSIBILITY OF SUCH DAMAGE. #error "Invalid configuration" #endif +#endif /*! @} */ diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/tmr/adi_tmr.h b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/tmr/adi_tmr.h index 9331593a12..679ced2245 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/tmr/adi_tmr.h +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/drivers/tmr/adi_tmr.h @@ -2,7 +2,7 @@ * @file adi_tmr.h * @brief GP and RGB timer device driver public header file ----------------------------------------------------------------------------- -Copyright (c) 2016 Analog Devices, Inc. +Copyright (c) 2016-2018 Analog Devices, Inc. All rights reserved. @@ -56,12 +56,16 @@ POSSIBILITY OF SUCH DAMAGE. * @{ */ +/* C++ linkage */ +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ /*! ***************************************************************************** * \enum ADI_TMR_RESULT * Enumeration for result code returned from the timer device driver functions. - * The return value of all timer APIs returning #ADI_TMR_RESULT should always + * The return value of all timer APIs returning #ADI_TMR_RESULT should always * be tested at the application level for success or failure. *****************************************************************************/ typedef enum { @@ -97,10 +101,17 @@ typedef enum { ADI_TMR_DEVICE_GP1 = 1u, /*! General purpose timer 2 */ ADI_TMR_DEVICE_GP2 = 2u, +#if defined(__ADUCM3029__) + /*! Total number of devices (private) */ + ADI_TMR_DEVICE_NUM = 3u, +#elif defined(__ADUCM4050__) /*! RGB timer */ ADI_TMR_DEVICE_RGB = 3u, /*! Total number of devices (private) */ ADI_TMR_DEVICE_NUM = 4u, +#else +#error TMR is not ported for this processor +#endif } ADI_TMR_DEVICE; /*! @@ -110,7 +121,7 @@ typedef enum { *****************************************************************************/ typedef enum { /*! Timeout event occurred */ - ADI_TMR_EVENT_TIMEOUT = 0x01, + ADI_TMR_EVENT_TIMEOUT = 0x01, /*! Event capture event occurred */ ADI_TMR_EVENT_CAPTURE = 0x02, } ADI_TMR_EVENT; @@ -124,7 +135,7 @@ typedef enum { /*! Count every 1 source clock periods */ ADI_TMR_PRESCALER_1 = 0u, /*! Count every 16 source clock periods */ - ADI_TMR_PRESCALER_16 = 1u, + ADI_TMR_PRESCALER_16 = 1u, /*! Count every 64 source clock periods */ ADI_TMR_PRESCALER_64 = 2u, /*! Count every 256 source clock periods */ @@ -138,11 +149,11 @@ typedef enum { *****************************************************************************/ typedef enum { /*! Use periphreal clock (PCLK) */ - ADI_TMR_CLOCK_PCLK = 0u, + ADI_TMR_CLOCK_PCLK = 0u, /*! Use internal high frequency clock (HFOSC) */ - ADI_TMR_CLOCK_HFOSC = 1u, + ADI_TMR_CLOCK_HFOSC = 1u, /*! Use internal low frequency clock (LFOSC) */ - ADI_TMR_CLOCK_LFOSC = 2u, + ADI_TMR_CLOCK_LFOSC = 2u, /*! Use external low frequency clock (LFXTAL) */ ADI_TMR_CLOCK_LFXTAL = 3u, } ADI_TMR_CLOCK_SOURCE; @@ -151,7 +162,7 @@ typedef enum { ***************************************************************************** * \enum ADI_TMR_PWM_OUTPUT * RGB PWM outputs, used to specify which PWM output to configure. For the GP - * timers only #ADI_TMR_PWM_OUTPUT_0 is allowed. The RGB timer has all three + * timers only #ADI_TMR_PWM_OUTPUT_0 is allowed. The RGB timer has all three * outputs. *****************************************************************************/ typedef enum { @@ -168,7 +179,7 @@ typedef enum { /*! ***************************************************************************** * \struct ADI_TMR_CONFIG - * Configuration structure to fill and pass to #adi_tmr_ConfigTimer when + * Configuration structure to fill and pass to #adi_tmr_ConfigTimer when * configuring the GP or RGB timer *****************************************************************************/ typedef struct { @@ -180,7 +191,7 @@ typedef struct { ADI_TMR_PRESCALER ePrescaler; /*! Clock source */ ADI_TMR_CLOCK_SOURCE eClockSource; - /*! Load value (only relent in periodic mode) */ + /*! Load value (only relevant in periodic mode) */ uint16_t nLoad; /*! Asynchronous load value (only relevant in periodic mode, and when PCLK is used) */ uint16_t nAsyncLoad; @@ -193,7 +204,7 @@ typedef struct { /*! ***************************************************************************** * \struct ADI_TMR_EVENT_CONFIG - * Configuration structure to fill and pass to #adi_tmr_ConfigEvent when + * Configuration structure to fill and pass to #adi_tmr_ConfigEvent when * configuring event capture *****************************************************************************/ typedef struct { @@ -208,7 +219,7 @@ typedef struct { /*! ***************************************************************************** * \struct ADI_TMR_PWM_CONFIG - * Configuration structure to fill and pass to #adi_tmr_ConfigPwm when + * Configuration structure to fill and pass to #adi_tmr_ConfigPwm when * configuring pulse width modulation output *****************************************************************************/ typedef struct { @@ -232,9 +243,9 @@ typedef struct { ADI_TMR_RESULT adi_tmr_Init (ADI_TMR_DEVICE const eDevice, ADI_CALLBACK const pfCallback, void * const pCBParam, bool bEnableInt); /* Configuration interface functions */ -ADI_TMR_RESULT adi_tmr_ConfigTimer (ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG timerConfig); -ADI_TMR_RESULT adi_tmr_ConfigEvent (ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_CONFIG eventConfig); -ADI_TMR_RESULT adi_tmr_ConfigPwm (ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFIG pwmConfig ); +ADI_TMR_RESULT adi_tmr_ConfigTimer (ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG* timerConfig); +ADI_TMR_RESULT adi_tmr_ConfigEvent (ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_CONFIG* eventConfig); +ADI_TMR_RESULT adi_tmr_ConfigPwm (ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFIG* pwmConfig ); /* Timer start and stop */ ADI_TMR_RESULT adi_tmr_Enable (ADI_TMR_DEVICE const eDevice, bool bEnable); @@ -246,7 +257,9 @@ ADI_TMR_RESULT adi_tmr_GetCaptureCount (ADI_TMR_DEVICE const eDevice, uint16_t * /* Reload function */ ADI_TMR_RESULT adi_tmr_Reload (ADI_TMR_DEVICE const eDevice); - +#ifdef __cplusplus +} +#endif /*! @} */ diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr.c index b7153b79a8..57352b1f67 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr.c @@ -2,7 +2,7 @@ * @file adi_tmr.c * @brief GP and RGB timer device driver implementation ----------------------------------------------------------------------------- -Copyright (c) 2016 Analog Devices, Inc. +Copyright (c) 2016-2018 Analog Devices, Inc. All rights reserved. @@ -86,7 +86,7 @@ POSSIBILITY OF SUCH DAMAGE. #include "adi_tmr_data.c" #endif - +#if defined(__ADUCM4050__) /* In adi_tmr_ConfigPwm, the bit positions for just PWM0 are used for PWM1 and PWM2 to simplify the code. Check here to make sure this is safe. */ #if BITP_TMR_RGB_PWM0CTL_IDLESTATE != BITP_TMR_RGB_PWM1CTL_IDLESTATE #error "Bit positions for PWM0 and PWM1 do not match. Fix adi_tmr_ConfigPwm." @@ -100,17 +100,36 @@ POSSIBILITY OF SUCH DAMAGE. #if BITP_TMR_RGB_PWM0CTL_MATCH != BITP_TMR_RGB_PWM2CTL_MATCH #error "Bit positions for PWM0 and PWM2 do not match. Fix adi_tmr_ConfigPwm." #endif +#endif /*__ADUCM4050__*/ /*! Number of events that can be captured */ +#if defined(__ADUCM3029__) +#define ADI_TMR_NUM_EVENTS (16u) +#elif defined(__ADUCM4050__) #define ADI_TMR_NUM_EVENTS (40u) +#else +#error TMR is not ported for this processor +#endif /*! \cond PRIVATE */ /* Since the RGB typedef is a superset of the GP typedef, treat the GP timers as RGB timers and restrict top register access */ +#if defined(__ADUCM3029__) +static ADI_TMR_TypeDef * adi_tmr_registers[ADI_TMR_DEVICE_NUM] = {pADI_TMR0, pADI_TMR1, pADI_TMR2}; +#elif defined(__ADUCM4050__) static ADI_TMR_RGB_TypeDef * adi_tmr_registers[ADI_TMR_DEVICE_NUM] = {(ADI_TMR_RGB_TypeDef *) pADI_TMR0, (ADI_TMR_RGB_TypeDef *) pADI_TMR1, (ADI_TMR_RGB_TypeDef *) pADI_TMR2, pADI_TMR_RGB}; +#else +#error TMR is not ported for this processor +#endif /* Interrupt enums */ +#if defined(__ADUCM3029__) +static const IRQn_Type adi_tmr_interrupt[ADI_TMR_DEVICE_NUM] = {TMR0_EVT_IRQn, TMR1_EVT_IRQn, TMR2_EVT_IRQn}; +#elif defined(__ADUCM4050__) static const IRQn_Type adi_tmr_interrupt[ADI_TMR_DEVICE_NUM] = {TMR0_EVT_IRQn, TMR1_EVT_IRQn, TMR2_EVT_IRQn, TMR_RGB_EVT_IRQn}; +#else +#error TMR is not ported for this processor +#endif /* Private data that the driver needs to retain between function calls */ static ADI_CALLBACK adi_tmr_callbacks[ADI_TMR_DEVICE_NUM]; @@ -121,8 +140,9 @@ static void CommonIntHandler (ADI_TMR_DEVICE const eDevice); void GP_Tmr0_Int_Handler(void); void GP_Tmr1_Int_Handler(void); void GP_Tmr2_Int_Handler(void); +#if defined(__ADUCM4050__) void RGB_Tmr_Int_Handler(void); - +#endif /*! \endcond */ @@ -181,10 +201,10 @@ ADI_TMR_RESULT adi_tmr_Init(ADI_TMR_DEVICE const eDevice, ADI_CALLBACK const pfC adi_tmr_registers[eDevice]->CTL = aTimerCtlConfig [eDevice]; adi_tmr_registers[eDevice]->LOAD = aTimerLoadConfig [eDevice]; adi_tmr_registers[eDevice]->ALOAD = aTimerALoadConfig [eDevice]; - adi_tmr_registers[eDevice]->EVENTSELECT = aTimerEventConfig [eDevice]; adi_tmr_registers[eDevice]->PWM0CTL = aTimerPwmCtlConfig [eDevice]; adi_tmr_registers[eDevice]->PWM0MATCH = aTimerPwmMatchConfig[eDevice]; - +#if defined(__ADUCM4050__) + adi_tmr_registers[eDevice]->EVENTSELECT = aTimerEventConfig [eDevice]; /* IF(Initializing the RGB timer, there are 2 other PWM outputs to configure) */ if (eDevice == ADI_TMR_DEVICE_RGB) { /* The array is bumped by 1 to get to the 5th entry in the static config array, which contains RGB PWM1 */ @@ -194,6 +214,7 @@ ADI_TMR_RESULT adi_tmr_Init(ADI_TMR_DEVICE const eDevice, ADI_CALLBACK const pfC adi_tmr_registers[eDevice]->PWM2CTL = aTimerPwmCtlConfig [eDevice+2u]; adi_tmr_registers[eDevice]->PWM2MATCH = aTimerPwmMatchConfig[eDevice+2u]; } /* ENDIF */ +#endif #endif return ADI_TMR_SUCCESS; @@ -219,7 +240,7 @@ ADI_TMR_RESULT adi_tmr_Init(ADI_TMR_DEVICE const eDevice, ADI_CALLBACK const pfC * - #ADI_TMR_SUCCESS Function call completed successfully * */ -ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG timerConfig) { +ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG * timerConfig) { uint16_t nTemp; #ifdef ADI_DEBUG /* IF(Bad device input parameter) */ @@ -227,7 +248,7 @@ ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG return ADI_TMR_BAD_DEVICE_NUM; } /* ENDIF */ /* IF(Bad configuration, cannot enable reloading while in free running mode) */ - if ((timerConfig.bPeriodic == false) && (timerConfig.bReloading == true)) { + if ((timerConfig->bPeriodic == false) && (timerConfig->bReloading == true)) { return ADI_TMR_BAD_RELOAD_CONFIGURATION; } /* ENDIF */ /* IF(The timer is already running) */ @@ -236,8 +257,8 @@ ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG } /* ENDIF */ #endif /* Set the load registers */ - adi_tmr_registers[eDevice]->LOAD = timerConfig.nLoad; - adi_tmr_registers[eDevice]->ALOAD = timerConfig.nAsyncLoad; + adi_tmr_registers[eDevice]->LOAD = timerConfig->nLoad; + adi_tmr_registers[eDevice]->ALOAD = timerConfig->nAsyncLoad; /* IF(Busy bit does not clear after waiting) */ if (ADI_TMR_SUCCESS != WaitForStatusBit(eDevice, (uint16_t) BITM_TMR_RGB_STAT_BUSY)) { @@ -249,26 +270,26 @@ ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG nTemp &= (uint16_t) (BITM_TMR_RGB_CTL_EVTEN | BITM_TMR_RGB_CTL_RSTEN); /* Setup the prescaler and the clock source */ - nTemp |= (uint16_t)(((uint16_t) timerConfig.ePrescaler ) << BITP_TMR_RGB_CTL_PRE); - nTemp |= (uint16_t)(((uint16_t) timerConfig.eClockSource) << BITP_TMR_RGB_CTL_CLK); + nTemp |= (uint16_t)(((uint16_t) timerConfig->ePrescaler ) << BITP_TMR_RGB_CTL_PRE); + nTemp |= (uint16_t)(((uint16_t) timerConfig->eClockSource) << BITP_TMR_RGB_CTL_CLK); /* IF(Periodic mode) */ - if (timerConfig.bPeriodic == true) { + if (timerConfig->bPeriodic == true) { nTemp |= (1u << BITP_TMR_RGB_CTL_MODE); } /* ENDIF */ /* IF(Counting up) */ - if (timerConfig.bCountingUp == true) { + if (timerConfig->bCountingUp == true) { nTemp |= (1u << BITP_TMR_RGB_CTL_UP); } /* ENDIF */ /* IF(Reloading is enabled) */ - if (timerConfig.bReloading == true) { + if (timerConfig->bReloading == true) { nTemp |= (1u << BITP_TMR_RGB_CTL_RLD); } /* ENDIF */ /* IF(Sync bypass is enabled) */ - if (timerConfig.bSyncBypass == true) { + if (timerConfig->bSyncBypass == true) { nTemp |= (1u << BITP_TMR_RGB_CTL_SYNCBYP); } /* ENDIF */ @@ -301,14 +322,14 @@ ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG * - #ADI_TMR_SUCCESS Function call completed successfully * */ -ADI_TMR_RESULT adi_tmr_ConfigEvent(ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_CONFIG eventConfig) { +ADI_TMR_RESULT adi_tmr_ConfigEvent(ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_CONFIG * eventConfig) { #ifdef ADI_DEBUG /* IF(Bad device input parameter) */ if (eDevice >= ADI_TMR_DEVICE_NUM) { return ADI_TMR_BAD_DEVICE_NUM; } /* ENDIF */ /* IF(Bad event input parameter) */ - if (eventConfig.nEventID >= ADI_TMR_NUM_EVENTS) { + if (eventConfig->nEventID >= ADI_TMR_NUM_EVENTS) { return ADI_TMR_BAD_EVENT_ID; } /* ENDIF */ /* IF(The timer is already running) */ @@ -316,9 +337,10 @@ ADI_TMR_RESULT adi_tmr_ConfigEvent(ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_C return ADI_TMR_OPERATION_NOT_ALLOWED; } /* ENDIF */ #endif +#if defined(__ADUCM4050__) /* Set the event number */ - adi_tmr_registers[eDevice]->EVENTSELECT = (uint16_t) eventConfig.nEventID; - + adi_tmr_registers[eDevice]->EVENTSELECT = (uint16_t) eventConfig->nEventID; +#endif /* IF(Busy bit does not clear after waiting) */ if (ADI_TMR_SUCCESS != WaitForStatusBit(eDevice, (uint16_t) BITM_TMR_RGB_STAT_BUSY)) { return ADI_TMR_DEVICE_BUSY; @@ -328,15 +350,20 @@ ADI_TMR_RESULT adi_tmr_ConfigEvent(ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_C adi_tmr_registers[eDevice]->CTL &= (uint16_t) ~(BITM_TMR_RGB_CTL_EVTEN | BITM_TMR_RGB_CTL_RSTEN); /* IF(Turning event capture on) */ - if (eventConfig.bEnable == true) { + if (eventConfig->bEnable == true) { adi_tmr_registers[eDevice]->CTL |= (uint16_t) BITM_TMR_RGB_CTL_EVTEN; } /* ENDIF */ /* IF(Enabling reset on event capture) */ - if (eventConfig.bPrescaleReset == true) { + if (eventConfig->bPrescaleReset == true) { adi_tmr_registers[eDevice]->CTL |= (uint16_t) BITM_TMR_RGB_CTL_RSTEN; } /* ENDIF */ +#if defined(__ADUCM3029__) + /* Write the event index */ + adi_tmr_registers[eDevice]->CTL |= (uint16_t) (((uint16_t) eventConfig->nEventID) << BITP_TMR_CTL_EVTRANGE); +#endif + return ADI_TMR_SUCCESS; } @@ -364,7 +391,7 @@ ADI_TMR_RESULT adi_tmr_ConfigEvent(ADI_TMR_DEVICE const eDevice, ADI_TMR_EVENT_C * - #ADI_TMR_SUCCESS Function call completed successfully * */ -ADI_TMR_RESULT adi_tmr_ConfigPwm(ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFIG pwmConfig) { +ADI_TMR_RESULT adi_tmr_ConfigPwm(ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFIG * pwmConfig) { uint16_t nControl = 0u; #ifdef ADI_DEBUG /* IF(Bad device input parameter) */ @@ -375,35 +402,38 @@ ADI_TMR_RESULT adi_tmr_ConfigPwm(ADI_TMR_DEVICE const eDevice, ADI_TMR_PWM_CONFI if ((adi_tmr_registers[eDevice]->CTL & BITM_TMR_RGB_CTL_EN) == BITM_TMR_RGB_CTL_EN) { return ADI_TMR_OPERATION_NOT_ALLOWED; } /* ENDIF */ +#if defined(__ADUCM4050__) /* IF(Bad PWM output and device combo OR bad PWM output) */ - if (((eDevice != ADI_TMR_DEVICE_RGB) && (pwmConfig.eOutput != ADI_TMR_PWM_OUTPUT_0)) || (pwmConfig.eOutput >= ADI_TMR_PWM_OUTPUT_NUM)) { + if (((eDevice != ADI_TMR_DEVICE_RGB) && (pwmConfig->eOutput != ADI_TMR_PWM_OUTPUT_0)) || (pwmConfig->eOutput >= ADI_TMR_PWM_OUTPUT_NUM)) { return ADI_TMR_BAD_PWM_NUM; } /* ENDIF */ +#endif #endif /* IF(Idle high is set) */ - if (pwmConfig.bIdleHigh == true) { + if (pwmConfig->bIdleHigh == true) { nControl = (1u << ((uint16_t) BITP_TMR_RGB_PWM0CTL_IDLESTATE)); } /* ENDIF */ /* IF(Match mode is enabled) */ - if (pwmConfig.bMatch == true) { + if (pwmConfig->bMatch == true) { nControl |= (1u << ((uint16_t) BITP_TMR_RGB_PWM0CTL_MATCH)); } /* ENDIF */ - + /* IF(PWM output 0) */ - if (pwmConfig.eOutput == ADI_TMR_PWM_OUTPUT_0) { + if (pwmConfig->eOutput == ADI_TMR_PWM_OUTPUT_0) { adi_tmr_registers[eDevice]->PWM0CTL = nControl; - adi_tmr_registers[eDevice]->PWM0MATCH = pwmConfig.nMatchValue; + adi_tmr_registers[eDevice]->PWM0MATCH = pwmConfig->nMatchValue; +#if defined(__ADUCM4050__) /* IF(PWM output 1) */ - } else if (pwmConfig.eOutput == ADI_TMR_PWM_OUTPUT_1) { + } else if (pwmConfig->eOutput == ADI_TMR_PWM_OUTPUT_1) { adi_tmr_registers[eDevice]->PWM1CTL = nControl; - adi_tmr_registers[eDevice]->PWM1MATCH = pwmConfig.nMatchValue; + adi_tmr_registers[eDevice]->PWM1MATCH = pwmConfig->nMatchValue; /* ELSE(PWM output 2) */ } else { adi_tmr_registers[eDevice]->PWM2CTL = nControl; - adi_tmr_registers[eDevice]->PWM2MATCH = pwmConfig.nMatchValue; + adi_tmr_registers[eDevice]->PWM2MATCH = pwmConfig->nMatchValue; +#endif } /* ENDIF */ - return ADI_TMR_SUCCESS; } @@ -599,13 +629,13 @@ void GP_Tmr2_Int_Handler(void) { CommonIntHandler(ADI_TMR_DEVICE_GP2); ISR_EPILOG() } - +#if defined(__ADUCM4050__) void RGB_Tmr_Int_Handler(void) { ISR_PROLOG() CommonIntHandler(ADI_TMR_DEVICE_RGB); ISR_EPILOG() } - +#endif /*! \endcond */ /*! @} */ diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr_data.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr_data.c index 31b2dbe8fc..9363e284a0 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr_data.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr_data.c @@ -51,6 +51,34 @@ POSSIBILITY OF SUCH DAMAGE. #include #include +/* Macro mapping from ADuCM4050 to ADuCM3029 */ +#if defined(__ADUCM3029__) +#define BITM_TMR_RGB_CTL_EN BITM_TMR_CTL_EN +#define PWM0CTL PWMCTL +#define PWM0MATCH PWMMATCH +#define BITM_TMR_RGB_STAT_BUSY BITM_TMR_STAT_BUSY +#define BITM_TMR_RGB_CTL_EVTEN BITM_TMR_CTL_EVTEN +#define BITM_TMR_RGB_CTL_RSTEN BITM_TMR_CTL_RSTEN +#define BITP_TMR_RGB_CTL_RSTEN BITP_TMR_CTL_RSTEN +#define BITP_TMR_RGB_CTL_EVTEN BITP_TMR_CTL_EVTEN +#define BITP_TMR_RGB_CTL_PRE BITP_TMR_CTL_PRE +#define BITP_TMR_RGB_CTL_CLK BITP_TMR_CTL_CLK +#define BITP_TMR_RGB_CTL_MODE BITP_TMR_CTL_MODE +#define BITP_TMR_RGB_CTL_UP BITP_TMR_CTL_UP +#define BITP_TMR_RGB_CTL_RLD BITP_TMR_CTL_RLD +#define BITP_TMR_RGB_CTL_SYNCBYP BITP_TMR_CTL_SYNCBYP +#define BITP_TMR_RGB_PWM0CTL_IDLESTATE BITP_TMR_PWMCTL_IDLESTATE +#define BITP_TMR_RGB_PWM0CTL_MATCH BITP_TMR_PWMCTL_MATCH +#define BITM_TMR_RGB_CLRINT_TIMEOUT BITM_TMR_CLRINT_TIMEOUT +#define BITM_TMR_RGB_STAT_PDOK BITM_TMR_STAT_PDOK +#define BITM_TMR_RGB_STAT_TIMEOUT BITM_TMR_STAT_TIMEOUT +#define BITM_TMR_RGB_STAT_CAPTURE BITM_TMR_STAT_CAPTURE +#define BITM_TMR_RGB_CLRINT_EVTCAPT BITM_TMR_CLRINT_EVTCAPT +#define BITM_TMR_RGB_CLRINT_TIMEOUT BITM_TMR_CLRINT_TIMEOUT +#define BITM_TMR_RGB_CTL_RLD BITM_TMR_CTL_RLD +#endif /*__ADUCM3029__*/ + +#ifndef TARGET_Analog_Devices /* CTL register static configuration */ static uint16_t aTimerCtlConfig[] = { @@ -80,7 +108,7 @@ static uint16_t aTimerCtlConfig[] = (TMR2_CFG_ENABLE_SYNC_BYPASS << BITP_TMR_RGB_CTL_SYNCBYP) | (TMR2_CFG_ENABLE_PRESCALE_RESET << BITP_TMR_RGB_CTL_RSTEN) | (TMR2_CFG_ENABLE_EVENT_CAPTURE << BITP_TMR_RGB_CTL_EVTEN), - +#if defined(__ADUCM4050__) (TMR3_CFG_COUNT_UP << BITP_TMR_RGB_CTL_UP) | (TMR3_CFG_MODE << BITP_TMR_RGB_CTL_MODE) | (TMR3_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) | @@ -89,6 +117,7 @@ static uint16_t aTimerCtlConfig[] = (TMR3_CFG_ENABLE_SYNC_BYPASS << BITP_TMR_RGB_CTL_SYNCBYP) | (TMR3_CFG_ENABLE_PRESCALE_RESET << BITP_TMR_RGB_CTL_RSTEN) | (TMR3_CFG_ENABLE_EVENT_CAPTURE << BITP_TMR_RGB_CTL_EVTEN), +#endif }; /* LOAD register static configuration */ @@ -97,7 +126,9 @@ static uint16_t aTimerLoadConfig[] = TMR0_CFG_LOAD_VALUE, TMR1_CFG_LOAD_VALUE, TMR2_CFG_LOAD_VALUE, +#if defined(__ADUCM4050__) TMR3_CFG_LOAD_VALUE, +#endif }; /* Asynchronous LOAD static configuraton */ @@ -106,10 +137,13 @@ static uint16_t aTimerALoadConfig[] = TMR0_CFG_ASYNC_LOAD_VALUE, TMR1_CFG_ASYNC_LOAD_VALUE, TMR2_CFG_ASYNC_LOAD_VALUE, +#if defined(__ADUCM4050__) TMR3_CFG_ASYNC_LOAD_VALUE, +#endif }; /* EVENTSELECT static configuration */ +#if defined(__ADUCM4050__) static uint16_t aTimerEventConfig[] = { TMR0_CFG_EVENT_CAPTURE, @@ -117,6 +151,7 @@ static uint16_t aTimerEventConfig[] = TMR2_CFG_EVENT_CAPTURE, TMR3_CFG_EVENT_CAPTURE, }; +#endif /* PWM CTL static configuration */ static uint16_t aTimerPwmCtlConfig[] = @@ -129,7 +164,7 @@ static uint16_t aTimerPwmCtlConfig[] = (TMR2_CFG_PWM0_IDLE_STATE << BITP_TMR_RGB_PWM0CTL_IDLESTATE) | (TMR2_CFG_PWM0_MATCH_VALUE << BITP_TMR_RGB_PWM0CTL_MATCH), - +#if defined(__ADUCM4050__) (TMR3_CFG_PWM0_IDLE_STATE << BITP_TMR_RGB_PWM0CTL_IDLESTATE) | (TMR3_CFG_PWM0_MATCH_VALUE << BITP_TMR_RGB_PWM0CTL_MATCH), @@ -138,6 +173,7 @@ static uint16_t aTimerPwmCtlConfig[] = (TMR3_CFG_PWM2_IDLE_STATE << BITP_TMR_RGB_PWM2CTL_IDLESTATE) | (TMR3_CFG_PWM2_MATCH_VALUE << BITP_TMR_RGB_PWM2CTL_MATCH), +#endif }; /* PWM MATCH static configuration */ @@ -145,10 +181,12 @@ static uint16_t aTimerPwmMatchConfig[] = { TMR0_CFG_PWM0_MATCH_VALUE, TMR1_CFG_PWM0_MATCH_VALUE, TMR2_CFG_PWM0_MATCH_VALUE, +#if defined(__ADUCM4050__) TMR3_CFG_PWM0_MATCH_VALUE, TMR3_CFG_PWM1_MATCH_VALUE, TMR3_CFG_PWM2_MATCH_VALUE +#endif }; - +#endif #endif /* ADI_TMR_DATA */