mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #7843 from codeauroraforum/MXRT_Fix_I2C_Byte_Transfer
MIMXRT1050: Fix I2C Byte transfer functionspull/7873/head
commit
cb8d09a88a
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@ -23,8 +23,6 @@
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#include "fsl_lpi2c.h"
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#include "PeripheralPins.h"
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/* 7 bit IIC addr - R/W flag not included */
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static int i2c_address = 0;
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/* Array of I2C peripheral base address. */
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static LPI2C_Type *const i2c_addrs[] = LPI2C_BASE_PTRS;
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@ -59,11 +57,24 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl)
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int i2c_start(i2c_t *obj)
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{
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if (LPI2C_MasterStart(i2c_addrs[obj->instance], 0, kLPI2C_Write) != kStatus_Success) {
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return 1;
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}
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LPI2C_Type *base = i2c_addrs[obj->instance];
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int status = 0;
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return 0;
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obj->address_set = 0;
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/* Clear all flags. */
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LPI2C_MasterClearStatusFlags(base, kLPI2C_MasterEndOfPacketFlag |
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kLPI2C_MasterStopDetectFlag |
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kLPI2C_MasterNackDetectFlag |
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kLPI2C_MasterArbitrationLostFlag |
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kLPI2C_MasterFifoErrFlag |
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kLPI2C_MasterPinLowTimeoutFlag |
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kLPI2C_MasterDataMatchFlag);
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/* Turn off auto-stop option. */
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base->MCFGR1 &= ~LPI2C_MCFGR1_AUTOSTOP_MASK;
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return status;
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}
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int i2c_stop(i2c_t *obj)
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@ -72,6 +83,8 @@ int i2c_stop(i2c_t *obj)
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return 1;
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}
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obj->address_set = 0;
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return 0;
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}
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@ -88,7 +101,6 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
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LPI2C_Type *base = i2c_addrs[obj->instance];
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lpi2c_master_transfer_t master_xfer;
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i2c_address = address >> 1;
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memset(&master_xfer, 0, sizeof(master_xfer));
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master_xfer.slaveAddress = address >> 1;
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master_xfer.direction = kLPI2C_Read;
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@ -164,11 +176,10 @@ int i2c_byte_read(i2c_t *obj, int last)
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lpi2c_master_transfer_t master_xfer;
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memset(&master_xfer, 0, sizeof(master_xfer));
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master_xfer.slaveAddress = i2c_address;
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master_xfer.direction = kLPI2C_Read;
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master_xfer.data = &data;
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master_xfer.dataSize = 1;
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master_xfer.flags = kLPI2C_TransferNoStopFlag;
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master_xfer.flags = kLPI2C_TransferNoStopFlag | kLPI2C_TransferNoStartFlag;
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if (LPI2C_MasterTransferBlocking(base, &master_xfer) != kStatus_Success) {
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return I2C_ERROR_NO_SLAVE;
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@ -179,21 +190,37 @@ int i2c_byte_read(i2c_t *obj, int last)
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int i2c_byte_write(i2c_t *obj, int data)
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{
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LPI2C_Type *base = i2c_addrs[obj->instance];
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lpi2c_master_transfer_t master_xfer;
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status_t ret_value;
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uint32_t status;
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size_t txCount;
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size_t txFifoSize = FSL_FEATURE_LPI2C_FIFO_SIZEn(base);
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memset(&master_xfer, 0, sizeof(master_xfer));
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master_xfer.slaveAddress = i2c_address;
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master_xfer.direction = kLPI2C_Write;
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master_xfer.data = &data;
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master_xfer.dataSize = 1;
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master_xfer.flags = kLPI2C_TransferNoStopFlag;
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/* Clear error flags. */
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LPI2C_MasterClearStatusFlags(base, LPI2C_MasterGetStatusFlags(base));
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ret_value = LPI2C_MasterTransferBlocking(base, &master_xfer);
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/* Wait till there is room in the TX FIFO */
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do {
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/* Get the number of words in the tx fifo and compute empty slots. */
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LPI2C_MasterGetFifoCounts(base, NULL, &txCount);
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txCount = txFifoSize - txCount;
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} while (!txCount);
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if (ret_value == kStatus_Success) {
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if (!obj->address_set) {
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obj->address_set = 1;
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/* Issue start command. */
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base->MTDR = LPI2C_MTDR_CMD(0x4U) | LPI2C_MTDR_DATA(data);
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} else {
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/* Write byte into LPI2C master data register. */
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base->MTDR = data;
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}
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/* Wait till data is pushed out of the FIFO */
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while (!(base->MSR & kLPI2C_MasterTxReadyFlag)) {
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}
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status = LPI2C_MasterCheckAndClearError(base, LPI2C_MasterGetStatusFlags(base));
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if (status == kStatus_Success) {
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return 1;
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} else if (ret_value == kStatus_LPI2C_Nak) {
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} else if (status == kStatus_LPI2C_Nak) {
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return 0;
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} else {
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return 2;
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@ -50,6 +50,7 @@ struct analogin_s {
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struct i2c_s {
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uint32_t instance;
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uint8_t address_set;
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};
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struct spi_s {
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