mirror of https://github.com/ARMmbed/mbed-os.git
save/restore timer registers before/after deepsleep
parent
9523bcf8c9
commit
a838cb21d1
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@ -36,6 +36,8 @@
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#include "mbed_error.h"
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extern void rtc_synchronize(void);
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extern void save_timer_ctx(void);
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extern void restore_timer_ctx(void);
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/* Wait loop - assuming tick is 1 us */
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static void wait_loop(uint32_t timeout)
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@ -161,8 +163,7 @@ void hal_deepsleep(void)
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// Disable IRQs
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core_util_critical_section_enter();
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// Save the timer counter value in order to reprogram it after deepsleep
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uint32_t EnterTimeUS = us_ticker_read();
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save_timer_ctx();
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// Request to enter STOP mode with regulator in low power mode
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#if TARGET_STM32L4
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@ -187,6 +188,7 @@ void hal_deepsleep(void)
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#else /* TARGET_STM32L4 */
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HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
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#endif /* TARGET_STM32L4 */
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// Verify Clock Out of Deep Sleep
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ForceClockOutofDeepSleep();
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@ -199,12 +201,7 @@ void hal_deepsleep(void)
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* deep sleep */
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wait_loop(500);
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// Reprogram the timer counter value saved before the deepsleep
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TIM_HandleTypeDef TimMasterHandle;
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TimMasterHandle.Instance = TIM_MST;
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__HAL_TIM_SET_COUNTER(&TimMasterHandle, EnterTimeUS);
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__HAL_TIM_CLEAR_FLAG(&TimMasterHandle, TIM_FLAG_CC1);
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__HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC1);
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restore_timer_ctx();
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#if DEVICE_RTC
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/* Wait for RTC RSF bit synchro if RTC is configured */
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@ -216,6 +213,7 @@ void hal_deepsleep(void)
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rtc_synchronize();
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}
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#endif
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// Enable IRQs
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core_util_critical_section_exit();
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}
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@ -78,3 +78,20 @@ void us_ticker_clear_interrupt(void)
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__HAL_TIM_CLEAR_FLAG(&TimMasterHandle, TIM_FLAG_CC1);
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}
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uint32_t timer_cnt_reg;
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uint32_t timer_ccr1_reg;
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uint32_t timer_dier_reg;
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void save_timer_ctx(void)
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{
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timer_cnt_reg = __HAL_TIM_GET_COUNTER(&TimMasterHandle);
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timer_ccr1_reg = __HAL_TIM_GET_COMPARE(&TimMasterHandle, TIM_CHANNEL_1);
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timer_dier_reg = TIM_MST->DIER;
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}
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void restore_timer_ctx(void)
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{
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__HAL_TIM_SET_COUNTER(&TimMasterHandle, timer_cnt_reg);
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__HAL_TIM_SET_COMPARE(&TimMasterHandle, TIM_CHANNEL_1, timer_ccr1_reg);
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TIM_MST->DIER = timer_dier_reg;
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}
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