mirror of https://github.com/ARMmbed/mbed-os.git
Remove whitespace from NRF52 serial_api.c
parent
f3424da060
commit
a42f1d7a81
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@ -52,18 +52,18 @@
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#if UART0_ENABLED == 0
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#error UART0 is disabled. DEVICE_SERIAL must also be disabled to continue.
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#endif
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#endif
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/***
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* _____ __ _ _ _
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* / ____| / _(_) | | (_)
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* | | ___ _ __ | |_ _ __ _ _ _ _ __ __ _| |_ _ ___ _ __
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* | | / _ \| '_ \| _| |/ _` | | | | '__/ _` | __| |/ _ \| '_ \
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* _____ __ _ _ _
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* / ____| / _(_) | | (_)
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* | | ___ _ __ | |_ _ __ _ _ _ _ __ __ _| |_ _ ___ _ __
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* | | / _ \| '_ \| _| |/ _` | | | | '__/ _` | __| |/ _ \| '_ \
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* | |___| (_) | | | | | | | (_| | |_| | | | (_| | |_| | (_) | | | |
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* \_____\___/|_| |_|_| |_|\__, |\__,_|_| \__,_|\__|_|\___/|_| |_|
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* __/ |
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* |___/
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* __/ |
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* |___/
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*/
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/**
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@ -116,7 +116,7 @@
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#define CALLBACK_DELAY_US 100
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/**
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* Use RTC2 for idle timeouts and deferred callbacks.
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* Use RTC2 for idle timeouts and deferred callbacks.
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* Each channel is dedicated to one particular task.
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*/
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#define UARTE0_RTC_TIMEOUT_CHANNEL 0
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@ -131,14 +131,14 @@
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/***
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* _______ _ __
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* |__ __| | | / _|
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* | |_ _ _ __ ___ __| | ___| |_ ___
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* _______ _ __
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* |__ __| | | / _|
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* | |_ _ _ __ ___ __| | ___| |_ ___
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* | | | | | '_ \ / _ \/ _` |/ _ \ _/ __|
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* | | |_| | |_) | __/ (_| | __/ | \__ \
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* |_|\__, | .__/ \___|\__,_|\___|_| |___/
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* __/ | |
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* |___/|_|
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* __/ | |
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* |___/|_|
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*/
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/**
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@ -161,7 +161,7 @@ typedef enum
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/**
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* Internal struct for storing each UARTE instance's state:
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*
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*
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* owner: pointer to serial object currently using instance.
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* buffer: buffers assigned to EasyDMA.
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* rxdrdy_counter: count received characters for idle detection.
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@ -203,14 +203,14 @@ typedef enum {
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/***
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* _____ _ _ _ __ __ _ _ _
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* / ____| | | | | | \ \ / / (_) | | | |
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* | | __| | ___ | |__ __ _| | \ \ / /_ _ _ __ _ __ _| |__ | | ___ ___
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* _____ _ _ _ __ __ _ _ _
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* / ____| | | | | | \ \ / / (_) | | | |
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* | | __| | ___ | |__ __ _| | \ \ / /_ _ _ __ _ __ _| |__ | | ___ ___
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* | | |_ | |/ _ \| '_ \ / _` | | \ \/ / _` | '__| |/ _` | '_ \| |/ _ \/ __|
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* | |__| | | (_) | |_) | (_| | | \ / (_| | | | | (_| | |_) | | __/\__ \
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* \_____|_|\___/|_.__/ \__,_|_| \/ \__,_|_| |_|\__,_|_.__/|_|\___||___/
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*
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*
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*
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*
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*/
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/**
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@ -229,7 +229,7 @@ static NRF_UARTE_Type *nordic_nrf5_uart_register[UART_ENABLED_COUNT] = {
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};
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/**
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* @brief Create atomic fifo using macro. Macro defines static arrays
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* @brief Create atomic fifo using macro. Macro defines static arrays
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* for buffer and internal state.
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*/
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NRF_ATFIFO_DEF(nordic_nrf5_uart_fifo_0, uint8_t, UART0_FIFO_BUFFER_SIZE);
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@ -246,14 +246,14 @@ serial_t stdio_uart = { 0 };
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/***
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* _____ _ _______ _
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* / ____| | | |__ __(_)
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* | | _ _ ___| |_ ___ _ __ ___ | | _ _ __ ___ ___ _ __
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* _____ _ _______ _
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* / ____| | | |__ __(_)
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* | | _ _ ___| |_ ___ _ __ ___ | | _ _ __ ___ ___ _ __
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* | | | | | / __| __/ _ \| '_ ` _ \ | | | | '_ ` _ \ / _ \ '__|
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* | |___| |_| \__ \ || (_) | | | | | | | | | | | | | | | __/ |
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* \_____\__,_|___/\__\___/|_| |_| |_| |_| |_|_| |_| |_|\___|_|
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*
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*
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* | |___| |_| \__ \ || (_) | | | | | | | | | | | | | | | __/ |
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* \_____\__,_|___/\__\___/|_| |_| |_| |_| |_|_| |_| |_|\___|_|
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*
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*
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*/
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/**
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@ -279,7 +279,7 @@ static void nordic_custom_ticker_set(uint32_t timeout, int channel)
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}
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/**
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* @brief Set idle timeout for particular instance.
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* @brief Set idle timeout for particular instance.
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* This function translates instance number to RTC channel.
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*
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* @param[in] instance The instance
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@ -316,19 +316,19 @@ static void nordic_custom_ticker_set_callback(int instance)
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/***
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* _______ _ _ _ _ _
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* |__ __(_) | | | | | | |
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* | | _ _ __ ___ ___ _ __ | |__| | __ _ _ __ __| | | ___ _ __
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* _______ _ _ _ _ _
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* |__ __(_) | | | | | | |
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* | | _ _ __ ___ ___ _ __ | |__| | __ _ _ __ __| | | ___ _ __
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* | | | | '_ ` _ \ / _ \ '__| | __ |/ _` | '_ \ / _` | |/ _ \ '__|
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* | | | | | | | | | __/ | | | | | (_| | | | | (_| | | __/ |
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* |_| |_|_| |_| |_|\___|_| |_| |_|\__,_|_| |_|\__,_|_|\___|_|
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*
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*
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* | | | | | | | | | __/ | | | | | (_| | | | | (_| | | __/ |
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* |_| |_|_| |_| |_|\___|_| |_| |_|\__,_|_| |_|\__,_|_|\___|_|
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*
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*
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*/
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/**
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* @brief Interrupt handler for idle timeouts.
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* This function fans out interrupts from ISR and
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* This function fans out interrupts from ISR and
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* translates channel to instance.
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*
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* @param[in] instance The instance
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@ -336,10 +336,10 @@ static void nordic_custom_ticker_set_callback(int instance)
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static void nordic_nrf5_uart_timeout_handler(uint32_t instance)
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{
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/**
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* Check if any characters have been received or buffers been flushed
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* Check if any characters have been received or buffers been flushed
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* since the last idle timeout.
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*/
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if ((nordic_nrf5_uart_state[instance].rxdrdy_counter > 0) ||
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if ((nordic_nrf5_uart_state[instance].rxdrdy_counter > 0) ||
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(nordic_nrf5_uart_state[instance].endrx_counter > 0)) {
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/* Activity detected, reset timeout. */
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@ -350,8 +350,8 @@ static void nordic_nrf5_uart_timeout_handler(uint32_t instance)
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/* No activity detected, no timeout set. */
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nordic_nrf5_uart_state[instance].ticker_is_running = false;
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/**
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* Stop Rx, this triggers a buffer swap and copies data from
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/**
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* Stop Rx, this triggers a buffer swap and copies data from
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* DMA buffer to FIFO buffer.
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*/
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nrf_uarte_task_trigger(nordic_nrf5_uart_register[instance],
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@ -450,21 +450,21 @@ static void nordic_nrf5_rtc2_handler(void)
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/***
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* _ _ _____ _______ ______ _ _ _ _ _
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* | | | | /\ | __ \__ __| | ____| | | | | | | | | |
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* | | | | / \ | |__) | | | | |____ _____ _ __ | |_ | |__| | __ _ _ __ __| | | ___ _ __
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* _ _ _____ _______ ______ _ _ _ _ _
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* | | | | /\ | __ \__ __| | ____| | | | | | | | | |
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* | | | | / \ | |__) | | | | |____ _____ _ __ | |_ | |__| | __ _ _ __ __| | | ___ _ __
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* | | | |/ /\ \ | _ / | | | __\ \ / / _ \ '_ \| __| | __ |/ _` | '_ \ / _` | |/ _ \ '__|
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* | |__| / ____ \| | \ \ | | | |___\ V / __/ | | | |_ | | | | (_| | | | | (_| | | __/ |
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* \____/_/ \_\_| \_\ |_| |______\_/ \___|_| |_|\__| |_| |_|\__,_|_| |_|\__,_|_|\___|_|
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*
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*
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* | |__| / ____ \| | \ \ | | | |___\ V / __/ | | | |_ | | | | (_| | | | | (_| | | __/ |
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* \____/_/ \_\_| \_\ |_| |______\_/ \___|_| |_|\__| |_| |_|\__,_|_| |_|\__,_|_|\___|_|
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*
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*
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*/
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/**
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* @brief Event handler for when Rx buffer is full or buffer swap has been
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* @brief Event handler for when Rx buffer is full or buffer swap has been
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* triggered by idle task.
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*
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* Copy data from DMA buffer to FIFO buffer.
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*
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* Copy data from DMA buffer to FIFO buffer.
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* Post callback if not already posted.
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*
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* @param[in] instance The instance
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@ -511,13 +511,13 @@ static void nordic_nrf5_uart_event_handler_endrx(int instance)
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nordic_nrf5_uart_state[instance].callback_posted = true;
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nordic_custom_ticker_set_callback(instance);
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}
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}
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}
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}
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/**
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* @brief Event handler for when DMA has been armed with Rx buffer.
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*
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* Arm Rx buffer with second buffer for optimal reception.
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*
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* Arm Rx buffer with second buffer for optimal reception.
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*
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* @param[in] instance The instance
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*/
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@ -525,7 +525,7 @@ static void nordic_nrf5_uart_event_handler_rxstarted(int instance)
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{
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uint8_t next_bank = nordic_nrf5_uart_state[instance].active_bank ^ 0x01;
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nrf_uarte_rx_buffer_set(nordic_nrf5_uart_register[instance], nordic_nrf5_uart_state[instance].buffer[next_bank], DMA_BUFFER_SIZE);
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nrf_uarte_rx_buffer_set(nordic_nrf5_uart_register[instance], nordic_nrf5_uart_state[instance].buffer[next_bank], DMA_BUFFER_SIZE);
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}
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/**
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@ -546,7 +546,7 @@ static void nordic_nrf5_uart_event_handler_rxdrdy(int instance)
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nordic_nrf5_uart_state[instance].ticker_is_running = true;
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nordic_custom_ticker_set_timeout(instance);
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}
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}
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}
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/**
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@ -570,7 +570,7 @@ static void nordic_nrf5_uart_event_handler_endtx(int instance)
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#if DEVICE_SERIAL_ASYNCH
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/**
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* @brief Asynchronous event handler for when Rx DMA buffer is full.
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* @brief Asynchronous event handler for when Rx DMA buffer is full.
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*
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* @param[in] instance The instance
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*/
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@ -629,8 +629,8 @@ static void nordic_nrf5_uart_event_handler_endtx_asynch(int instance)
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#endif
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/**
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* @brief UARTE event handler.
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*
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* @brief UARTE event handler.
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*
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* Collect signals from UARTE0 and UARTE1 ISR and translate to instance.
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*
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* @param[in] instance The instance
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@ -647,8 +647,8 @@ static void nordic_nrf5_uart_event_handler(int instance)
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if (nordic_nrf5_uart_state[instance].rx_asynch) {
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nordic_nrf5_uart_event_handler_endrx_asynch(instance);
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} else
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#endif
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} else
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#endif
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{
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nordic_nrf5_uart_event_handler_endrx(instance);
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}
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@ -717,19 +717,19 @@ static void nordic_nrf5_uart1_handler(void)
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/***
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* _____ __ _ _ _
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* / ____| / _(_) | | (_)
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* | | ___ _ __ | |_ _ __ _ _ _ _ __ __ _| |_ _ ___ _ __
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* | | / _ \| '_ \| _| |/ _` | | | | '__/ _` | __| |/ _ \| '_ \
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* _____ __ _ _ _
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* / ____| / _(_) | | (_)
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* | | ___ _ __ | |_ _ __ _ _ _ _ __ __ _| |_ _ ___ _ __
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* | | / _ \| '_ \| _| |/ _` | | | | '__/ _` | __| |/ _ \| '_ \
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* | |___| (_) | | | | | | | (_| | |_| | | | (_| | |_| | (_) | | | |
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* \_____\___/|_| |_|_| |_|\__, |\__,_|_| \__,_|\__|_|\___/|_| |_|
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* __/ |
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* |___/
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* __/ |
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* |___/
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*/
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/**
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* @brief Enable UARTE interrupts.
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*
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*
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* Translates instance to UARTE register.
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* Set IRQ priority to highest to avoid Rx overflow.
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*
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@ -740,7 +740,7 @@ static void nordic_nrf5_uart_irq_enable(int instance)
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if (instance == 0) {
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nrf_drv_common_irq_enable(UARTE0_UART0_IRQn, APP_IRQ_PRIORITY_HIGHEST);
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}
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}
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#if UART1_ENABLED
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else if (instance == 1) {
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@ -752,7 +752,7 @@ static void nordic_nrf5_uart_irq_enable(int instance)
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/**
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* @brief Configure UARTE based on serial object settings.
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*
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*
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* Common for both Rx and Tx.
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*
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* @param obj The object
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@ -867,7 +867,7 @@ static void nordic_nrf5_uart_configure_rx_asynch(int instance)
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/* Disable shortcut. Next Rx buffer must be manually started. */
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nrf_uarte_shorts_disable(nordic_nrf5_uart_register[instance], NRF_UARTE_SHORT_ENDRX_STARTRX);
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/* Set asynchronous mode. */
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/* Set asynchronous mode. */
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nordic_nrf5_uart_state[instance].rx_asynch = true;
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/* Enable Rx interrupt. */
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@ -908,15 +908,15 @@ static void nordic_nrf5_serial_configure(serial_t *obj)
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if (uart_object->rx_asynch == true) {
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nordic_nrf5_uart_configure_rx_asynch(instance);
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} else
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#endif
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} else
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#endif
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{
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/* Set non-asynchronous mode. */
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nordic_nrf5_uart_configure_rx(instance);
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nrf_uarte_task_trigger(nordic_nrf5_uart_register[instance],
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NRF_UARTE_TASK_STARTRX);
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}
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}
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}
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#if DEVICE_SERIAL_ASYNCH
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/* Owner hasn't changed but mode has. Reconfigure. */
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else if ((uart_object->rx_asynch == false) && (nordic_nrf5_uart_state[instance].rx_asynch == true)) {
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@ -934,14 +934,14 @@ static void nordic_nrf5_serial_configure(serial_t *obj)
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}
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/***
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* __ __ _ _ _ _ _ _____ _____
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* __ __ _ _ _ _ _ _____ _____
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* | \/ | | | | | | | | /\ | | /\ | __ \_ _|
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* | \ / | |__ ___ __| | | |__| | / \ | | / \ | |__) || |
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* | |\/| | '_ \ / _ \/ _` | | __ | / /\ \ | | / /\ \ | ___/ | |
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* | | | | |_) | __/ (_| | | | | |/ ____ \| |____ / ____ \| | _| |_
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* | \ / | |__ ___ __| | | |__| | / \ | | / \ | |__) || |
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* | |\/| | '_ \ / _ \/ _` | | __ | / /\ \ | | / /\ \ | ___/ | |
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* | | | | |_) | __/ (_| | | | | |/ ____ \| |____ / ____ \| | _| |_
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* |_| |_|_.__/ \___|\__,_| |_| |_/_/ \_\______| /_/ \_\_| |_____|
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*
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*
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*
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*
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*/
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/** Initialize the serial peripheral. It sets the default parameters for serial
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@ -976,17 +976,17 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
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nrf_rtc_event_clear(NRF_RTC2, NRF_RTC_EVENT_COMPARE_3);
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/* Enable interrupts for all four RTC2 channels. */
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nrf_rtc_event_enable(NRF_RTC2,
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NRF_RTC_INT_COMPARE0_MASK |
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NRF_RTC_INT_COMPARE1_MASK |
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NRF_RTC_INT_COMPARE2_MASK |
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nrf_rtc_event_enable(NRF_RTC2,
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NRF_RTC_INT_COMPARE0_MASK |
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NRF_RTC_INT_COMPARE1_MASK |
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NRF_RTC_INT_COMPARE2_MASK |
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NRF_RTC_INT_COMPARE3_MASK);
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/* Enable RTC2 IRQ. Priority is set to lowest so that the UARTE ISR can interrupt it. */
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nrf_drv_common_irq_enable(RTC2_IRQn, APP_IRQ_PRIORITY_LOWEST);
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/* Start RTC2. According to the datasheet the added power consumption is neglible so
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* the RTC2 will run forever.
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/* Start RTC2. According to the datasheet the added power consumption is neglible so
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* the RTC2 will run forever.
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*/
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nrf_rtc_task_trigger(NRF_RTC2, NRF_RTC_TASK_START);
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@ -1289,18 +1289,18 @@ void serial_pinout_tx(PinName tx)
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/**
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* Legacy API. Not used by Mbed.
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*/
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MBED_ASSERT(0);
|
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MBED_ASSERT(0);
|
||||
}
|
||||
|
||||
/***
|
||||
* _____ _ _ _____ _____
|
||||
* _____ _ _ _____ _____
|
||||
* / ____(_) | | /\ | __ \_ _|
|
||||
* | (___ _ _ __ ___ _ __ | | ___ / \ | |__) || |
|
||||
* \___ \| | '_ ` _ \| '_ \| |/ _ \ / /\ \ | ___/ | |
|
||||
* ____) | | | | | | | |_) | | __/ / ____ \| | _| |_
|
||||
* | (___ _ _ __ ___ _ __ | | ___ / \ | |__) || |
|
||||
* \___ \| | '_ ` _ \| '_ \| |/ _ \ / /\ \ | ___/ | |
|
||||
* ____) | | | | | | | |_) | | __/ / ____ \| | _| |_
|
||||
* |_____/|_|_| |_| |_| .__/|_|\___| /_/ \_\_| |_____|
|
||||
* | |
|
||||
* |_|
|
||||
* | |
|
||||
* |_|
|
||||
*/
|
||||
|
||||
/** The serial interrupt handler registration
|
||||
|
@ -1400,8 +1400,8 @@ int serial_getc(serial_t *obj)
|
|||
/* serial_getc is a blocking call. */
|
||||
while (*head == *tail);
|
||||
|
||||
/* Get 1 byte from FIFO buffer. The buffer is atomic
|
||||
* and doesn't need to be protected in a critical section.
|
||||
/* Get 1 byte from FIFO buffer. The buffer is atomic
|
||||
* and doesn't need to be protected in a critical section.
|
||||
*/
|
||||
nrf_atfifo_item_get_t context;
|
||||
uint8_t *byte = (uint8_t *) nrf_atfifo_item_get(fifo, &context);
|
||||
|
@ -1446,11 +1446,11 @@ void serial_putc(serial_t *obj, int character)
|
|||
|
||||
/**
|
||||
* The UARTE module can generate two different Tx events: TXDRDY when each character has
|
||||
* been transmitted and ENDTX when the entire buffer has been sent.
|
||||
*
|
||||
* For the blocking serial_putc, TXDRDY interrupts are enabled and only used for the
|
||||
* been transmitted and ENDTX when the entire buffer has been sent.
|
||||
*
|
||||
* For the blocking serial_putc, TXDRDY interrupts are enabled and only used for the
|
||||
* single character TX IRQ callback handler. The ENDTX event does not generate an interrupt
|
||||
* but is caught using a busy-wait loop. Once ENDTX has been generated we disable TXDRDY
|
||||
* but is caught using a busy-wait loop. Once ENDTX has been generated we disable TXDRDY
|
||||
* interrupts again.
|
||||
*/
|
||||
|
||||
|
@ -1531,14 +1531,14 @@ int serial_writable(serial_t *obj)
|
|||
}
|
||||
|
||||
/***
|
||||
* _ _____ _____
|
||||
* _ _____ _____
|
||||
* /\ | | /\ | __ \_ _|
|
||||
* / \ ___ _ _ _ __ ___| |__ _ __ ___ _ __ ___ _ _ ___ / \ | |__) || |
|
||||
* / /\ \ / __| | | | '_ \ / __| '_ \| '__/ _ \| '_ \ / _ \| | | / __| / /\ \ | ___/ | |
|
||||
* / ____ \\__ \ |_| | | | | (__| | | | | | (_) | | | | (_) | |_| \__ \ / ____ \| | _| |_
|
||||
* / \ ___ _ _ _ __ ___| |__ _ __ ___ _ __ ___ _ _ ___ / \ | |__) || |
|
||||
* / /\ \ / __| | | | '_ \ / __| '_ \| '__/ _ \| '_ \ / _ \| | | / __| / /\ \ | ___/ | |
|
||||
* / ____ \\__ \ |_| | | | | (__| | | | | | (_) | | | | (_) | |_| \__ \ / ____ \| | _| |_
|
||||
* /_/ \_\___/\__, |_| |_|\___|_| |_|_| \___/|_| |_|\___/ \__,_|___/ /_/ \_\_| |_____|
|
||||
* __/ |
|
||||
* |___/
|
||||
* __/ |
|
||||
* |___/
|
||||
*/
|
||||
|
||||
#if DEVICE_SERIAL_ASYNCH
|
||||
|
@ -1590,7 +1590,7 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx
|
|||
if (nrf_drv_is_in_RAM(tx) || (tx_length <= UART0_FIFO_BUFFER_SIZE)) {
|
||||
valid = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
#if UART1_ENABLED
|
||||
else {
|
||||
if (nrf_drv_is_in_RAM(tx) || (tx_length <= UART1_FIFO_BUFFER_SIZE)) {
|
||||
|
@ -1620,7 +1620,7 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx
|
|||
nordic_nrf5_uart_fifo_0_data[index] = pointer[index];
|
||||
}
|
||||
|
||||
buffer = (uint8_t *) nordic_nrf5_uart_fifo_0_data;
|
||||
buffer = (uint8_t *) nordic_nrf5_uart_fifo_0_data;
|
||||
}
|
||||
|
||||
/* Store callback handler, mask and reset event value. */
|
||||
|
@ -1633,12 +1633,12 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx
|
|||
nordic_nrf5_serial_configure(obj);
|
||||
|
||||
/**
|
||||
* The UARTE module can generate two different Tx events: TXDRDY when each
|
||||
* character has been transmitted and ENDTX when the entire buffer has been sent.
|
||||
*
|
||||
* For the async serial_tx_async, TXDRDY interrupts are disabled completely. ENDTX
|
||||
* The UARTE module can generate two different Tx events: TXDRDY when each
|
||||
* character has been transmitted and ENDTX when the entire buffer has been sent.
|
||||
*
|
||||
* For the async serial_tx_async, TXDRDY interrupts are disabled completely. ENDTX
|
||||
* interrupts are enabled and used to signal the completion of the async transfer.
|
||||
*
|
||||
*
|
||||
* The ENDTX interrupt is diabled immediately after it is fired in the ISR.
|
||||
*/
|
||||
|
||||
|
|
Loading…
Reference in New Issue