Remove white space in config files for NRF52 series

pull/7453/head
Marcus Chang 2018-07-09 12:44:09 -07:00
parent bcec185754
commit 01135e30ce
3 changed files with 7394 additions and 7394 deletions
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52
TARGET_MCU_NRF52832/config
TARGET_MCU_NRF52840/config

View File

@ -21,20 +21,20 @@
"target_overrides": {
"DELTA_DFBM_NQ620": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
@ -44,20 +44,20 @@
},
"MTB_LAIRD_BL652": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
@ -66,40 +66,40 @@
},
"MTB_UBLOX_NINA_B1": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
]
},
"NRF52_DK": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
@ -107,60 +107,60 @@
},
"RBLAB_BLENANO2": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
]
},
"UBLOX_EVA_NINA": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
]
},
"UBLOX_EVK_NINA_B1": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
@ -168,20 +168,20 @@
},
"VBLUNO52": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
@ -189,8 +189,8 @@
},
"NRF52840_DK": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"CONFIG_GPIO_AS_PINRESET",
"SWI_DISABLE0",
"NRF52_ERRATA_20"
],
"target.console-uart-flow-control": "RTSCTS"