mirror of https://github.com/ARMmbed/mbed-os.git
				
				
				
			MXRT1050_EVK: Ensure certain low power function are linked to internal memory
Low power functions related to powering off FLEXSPI and SDRAM needs to be copied to internal memory Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>pull/7419/head
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			@ -14,9 +14,9 @@
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 * limitations under the License.
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 */
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#include "pinmap.h"
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#include "fsl_clock_config.h"
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#include "fsl_clock.h"
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#include "lpm.h"
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#define LPSPI_CLOCK_SOURCE_DIVIDER (7U)
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#define LPI2C_CLOCK_SOURCE_DIVIDER (5U)
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			@ -124,11 +124,39 @@ void BOARD_ConfigMPU(void)
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    SCB_EnableICache();
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}
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#if defined(TOOLCHAIN_GCC_ARM)
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extern uint32_t __ram_function_flash_start[];
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#define __RAM_FUNCTION_FLASH_START __ram_function_flash_start
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extern uint32_t __ram_function_ram_start[];
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#define __RAM_FUNCTION_RAM_START __ram_function_ram_start
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extern uint32_t __ram_function_size[];
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#define __RAM_FUNCTION_SIZE __ram_function_size
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void Board_CopyToRam()
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{
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    unsigned char *source;
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    unsigned char *destiny;
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    unsigned int size;
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    source = (unsigned char *)(__RAM_FUNCTION_FLASH_START);
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    destiny = (unsigned char *)(__RAM_FUNCTION_RAM_START);
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    size = (unsigned long)(__RAM_FUNCTION_SIZE);
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    while (size--)
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    {
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        *destiny++ = *source++;
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    }
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}
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#endif
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// called before main
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void mbed_sdk_init()
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{
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    BOARD_ConfigMPU();
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    BOARD_BootClockRUN();
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#if defined(TOOLCHAIN_GCC_ARM)
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    Board_CopyToRam();
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#endif
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    LPM_Init();
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}
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void spi_setup_clock()
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			@ -77,6 +77,9 @@
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#define m_text_start                   0x60002400
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#define m_text_size                    0x03FFDC00
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#define m_text2_start                  0x00000000
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#define m_text2_size                   0x00020000
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#define m_data_start                   0x80000000
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#define m_data_size                    0x01E00000
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			@ -139,6 +142,9 @@ LR_IROM1 m_flash_config_start m_text_start+m_text_size-m_flash_config_start {
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  }
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  ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
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  }
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  RW_m_ram_text m_text2_start UNINIT m_text2_size { ; load address = execution address
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    * (RamFunction)
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  }
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  RW_m_ncache m_ncache_start m_ncache_size { ; ncache RW data
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    * (NonCacheable.init)
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    * (NonCacheable)
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			@ -72,6 +72,7 @@ MEMORY
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  m_ivt                 (RX)  : ORIGIN = 0x60001000, LENGTH = 0x00001000
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  m_interrupts          (RX)  : ORIGIN = 0x60002000, LENGTH = 0x00000400
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  m_text                (RX)  : ORIGIN = 0x60002400, LENGTH = 0x03FFDC00
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  m_text2               (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
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  m_data                (RW)  : ORIGIN = 0x80000000, LENGTH = 0x01E00000
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  m_ncache              (RW)  : ORIGIN = 0x81E00000, LENGTH = 0x00200000
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  m_data2               (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00020000
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			@ -225,7 +226,21 @@ SECTIONS
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    __data_end__ = .;        /* define a global symbol at data end */
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  } > m_data
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  __NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
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  __ram_function_flash_start = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for TCM data initialization */
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  .ram_function : AT(__ram_function_flash_start)
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  {
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    . = ALIGN(32);
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    __ram_function_ram_start = .;
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    *(RamFunction)
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    . = ALIGN(128);
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    __ram_function_ram_end = .;
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  } > m_text2
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  __ram_function_size = SIZEOF(.ram_function);
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  __NDATA_ROM = __ram_function_flash_start + SIZEOF(.ram_function);
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  .ncache.init : AT(__NDATA_ROM)
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  {
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    __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
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			@ -67,6 +67,9 @@ define symbol m_interrupts_end         = 0x600023FF;
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define symbol m_text_start             = 0x60002400;
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define symbol m_text_end               = 0x63FFFFFF;
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define symbol m_text2_start            = 0x00000000;
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define symbol m_text2_end              = 0x0001FFFF;
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define symbol m_interrupts_ram_start   = 0x20000000;
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define symbol m_interrupts_ram_end     = 0x20000000 + __ram_vector_table_offset__;
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			@ -108,6 +111,8 @@ define memory mem with size = 4G;
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define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
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                          | mem:[from m_text_start to m_text_end];
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define region TEXT2_region = mem:[from m_text2_start to m_text2_end];
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define region DATA_region = mem:[from m_data_start to m_data_end];
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define region DATA2_region = mem:[from m_data2_start to m_data2_end];
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define region DATA3_region  = mem:[from m_data3_start to m_data3_end-__size_cstack__];
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			@ -139,4 +144,5 @@ place in DATA3_region                        { block ZI };
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place in DATA3_region                        { last block HEAP };
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place in CSTACK_region                      { block CSTACK };
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place in NCACHE_region                      { block NCACHE_VAR };
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place in TEXT2_region                       { section .textrw};
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place in m_interrupts_ram_region            { section m_interrupts_ram };
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			@ -3,7 +3,7 @@
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 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
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 * Copyright 2016-2017 NXP
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 * All rights reserved.
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 * 
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 *
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 * Redistribution and use in source and binary forms, with or without modification,
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 * are permitted (subject to the limitations in the disclaimer below) provided
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 *  that the following conditions are met:
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			@ -149,7 +149,7 @@ enum _status_groups
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    kStatusGroup_LPC_MINISPI = 76,            /*!< Group number for LPC_MINISPI status codes. */
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    kStatusGroup_NOTIFIER = 98,               /*!< Group number for NOTIFIER status codes. */
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    kStatusGroup_DebugConsole = 99,           /*!< Group number for debug console status codes. */
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    kStatusGroup_SEMC = 100,                   /*!< Group number for SEMC status codes. */    
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    kStatusGroup_SEMC = 100,                   /*!< Group number for SEMC status codes. */
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    kStatusGroup_ApplicationRangeStart = 101, /*!< Starting number for application groups. */
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};
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			@ -347,35 +347,6 @@ _Pragma("diag_suppress=Pm120")
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/* @} */
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/*! @name Time sensitive region */
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/* @{ */
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#if defined(FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE) && FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE
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#if (defined(__ICCARM__))
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#define AT_QUICKACCESS_SECTION_CODE(func) func @"CodeQuickAccess"
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#define AT_QUICKACCESS_SECTION_DATA(func) func @"DataQuickAccess"
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#elif(defined(__ARMCC_VERSION))
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#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"))) func
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#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
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#elif(defined(__GNUC__))
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#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"))) func
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#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
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#else
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#error Toolchain not supported.
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#endif /* defined(__ICCARM__) */
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#else
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#if (defined(__ICCARM__))
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#define AT_QUICKACCESS_SECTION_CODE(func) func
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#define AT_QUICKACCESS_SECTION_DATA(func) func
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#elif(defined(__ARMCC_VERSION))
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#define AT_QUICKACCESS_SECTION_CODE(func) func
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#define AT_QUICKACCESS_SECTION_DATA(func) func
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#elif(defined(__GNUC__))
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#define AT_QUICKACCESS_SECTION_CODE(func) func
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#define AT_QUICKACCESS_SECTION_DATA(func) func
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#else
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#error Toolchain not supported.
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#endif    
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#endif /* __FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE */
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/* @} */
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/*******************************************************************************
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 * API
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			@ -557,15 +528,15 @@ _Pragma("diag_suppress=Pm120")
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     * @param size The length required to malloc.
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     * @param alignbytes The alignment size.
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     * @retval The allocated memory.
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     */    
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     */
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    void *SDK_Malloc(size_t size, size_t alignbytes);
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    /*!
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     * @brief Free memory.
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     *
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     * @param ptr The memory to be release.
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     */ 
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    void SDK_Free(void *ptr);    
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     */
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    void SDK_Free(void *ptr);
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#if defined(__cplusplus)
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}
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