Merge pull request #7798 from simosillankorva/NUCLEO_F303RE_bootloader_support

Add bootloader support for target NUCLEO_F303RE
pull/7890/head
Cruz Monrreal 2018-08-21 09:50:26 -05:00 committed by GitHub
commit a8f390ebec
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 29 additions and 21 deletions

View File

@ -33,12 +33,6 @@
#include "stm32f3xx.h"
#include "mbed_error.h"
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
@ -89,13 +83,6 @@ void SystemInit(void)
/* Disable all interrupts */
RCC->CIR = 0x00000000U;
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif
}

View File

@ -1,3 +1,4 @@
#! armcc -E
; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2014, STMicroelectronics
@ -27,10 +28,18 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; STM32F303RE: 512KB FLASH (0x80000) + 64KB SRAM (0x10000)
LR_IROM1 0x08000000 0x80000 { ; load region size_region
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif
ER_IROM1 0x08000000 0x80000 { ; load address = execution address
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x80000
#endif
; STM32F303RE: 512KB FLASH (0x80000) + 64KB SRAM (0x10000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)

View File

@ -1,7 +1,15 @@
/* Linker script to configure memory regions. */
#ifndef MBED_APP_START
#define MBED_APP_START 0x08000000
#endif
#ifndef MBED_APP_SIZE
#define MBED_APP_SIZE 512K
#endif
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 16K
RAM (rwx) : ORIGIN = 0x20000194, LENGTH = 64K - 0x194
}

View File

@ -1,7 +1,10 @@
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; }
/* [ROM = 512kb = 0x80000] */
define symbol __intvec_start__ = 0x08000000;
define symbol __region_ROM_start__ = 0x08000000;
define symbol __region_ROM_end__ = 0x0807FFFF;
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __region_CCMRAM_start__ = 0x10000000;
define symbol __region_CCMRAM_end__ = 0x10003FFF;
@ -21,7 +24,7 @@ define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMR
/* Stack and Heap */
/*Heap 1/4 of ram and stack 1/8*/
define symbol __size_cstack__ = 0x2000;
define symbol __size_heap__ = 0x4000;
define symbol __size_heap__ = 0x5000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };

View File

@ -1020,6 +1020,7 @@
"detect_code": ["0745"],
"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
"release_versions": ["2", "5"],
"bootloader_supported": true,
"device_name": "STM32F303RE"
},
"NUCLEO_F303ZE": {