mirror of https://github.com/ARMmbed/mbed-os.git
Refactoring memory regions definitions for MPS2_M7 targets
* added memory_zones.h * all linker scripts reference the definitions from memory_zones.h * tool chains use predefined 1K as ISR Stack size * ARM Complier 5 and GCC will auto calculated heap size * IAR use predefined 2MiB as heap sizepull/7706/head
Qinghao Shi
parent
7159329efc
commit
8fc384296e
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@ -1,3 +1,4 @@
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#! armcc -E
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;* MPS2 CMSIS Library
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;*
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;* Copyright (c) 2006-2018 ARM Limited
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@ -33,15 +34,31 @@
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; *** Scatter-Loading Description File ***
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; *************************************************************
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LR_IROM1 0x00000000 0x00400000 { ; load region size_region
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ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
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#include "../memory_zones.h"
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#include "../cmsis_nvic.h"
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#if (defined(__stack_size__))
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#define STACK_SIZE __stack_size__
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#else
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#define STACK_SIZE 0x0400
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#endif
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; The vector table is loaded at address 0x00000000 in Flash memory region.
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LR_IROM1 MAPPABLE_START MAPPABLE_SIZE {
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ER_IROM1 MAPPABLE_START MAPPABLE_SIZE {
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
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RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
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.ANY (+RW +ZI)
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}
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}
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LR_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE { ; load region size_region
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ER_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE { ; load address = execution address
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
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RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down
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}
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}
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@ -34,38 +34,14 @@
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; CMSDK_CM7 Device
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;
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;******************************************************************************
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;
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;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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;
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#include "../memory_zones.h"
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00004000
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00001000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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__initial_sp EQU ZBT_SRAM2_START + ZBT_SRAM2_SIZE
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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@ -260,31 +236,4 @@ PORT0_7_Handler
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap PROC
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ENDP
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ALIGN
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ENDIF
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END
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@ -27,11 +27,15 @@
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/* The length of the VECTORS region is a bit larger than
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* is necessary based on the number of exception handlers.
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*/
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#include "../memory_zones.h"
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#include "../cmsis_nvic.h"
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MEMORY
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{
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VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
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FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00040000 - 0x00000400
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RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00020000
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VECTORS (rx) : ORIGIN = MAPPABLE_START, LENGTH = MAPPABLE_SIZE
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FLASH (rx) : ORIGIN = ZBT_SRAM1_START, LENGTH = ZBT_SRAM1_SIZE
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RAM (rwx) : ORIGIN = ZBT_SRAM2_START, LENGTH = ZBT_SRAM2_SIZE
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}
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/* Linker script to place sections and symbol values. Should be used together
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@ -62,11 +66,10 @@ MEMORY
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*/
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ENTRY(Reset_Handler)
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HEAP_SIZE = 0x4000;
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STACK_SIZE = 0x1000;
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STACK_SIZE = 0x400;
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/* Size of the vector table in SRAM */
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M_VECTOR_RAM_SIZE = 0x140;
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M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;
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SECTIONS
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{
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@ -188,13 +191,13 @@ SECTIONS
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bss_size = __bss_end__ - __bss_start__;
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.heap :
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.heap (COPY):
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{
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. = ALIGN(8);
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__end__ = .;
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PROVIDE(end = .);
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__HeapBase = .;
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. += HEAP_SIZE;
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*(.heap*)
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__HeapLimit = .;
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__heap_limit = .; /* Add for _sbrk */
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} > RAM
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@ -19,25 +19,37 @@
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* limitations under the License.
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*/
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/* The RAM region doesn't start at the beginning of the RAM address
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* space to create space for the vector table copied over to the RAM by mbed.
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* The space left is a bit bigger than is necessary based on the number of
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* interrupt handlers.
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/*
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* WARNING: these symbols are the same as the defines in ../memory_zones.h but
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* can not be included here. Please make sure that the two definitions match.
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*/
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/* Code memory zones */
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define symbol MAPPABLE_START = 0x00000000;
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define symbol MAPPABLE_SIZE = 0x00004000; /* 16 KiB */
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define symbol ZBT_SRAM1_START = (0x00000000 + 0x00004000);
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define symbol ZBT_SRAM1_SIZE = (0x00400000 - 0x00004000); /* 4 MiB - 16 KiB */
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/* Data memory zones */
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define symbol ZBT_SRAM2_START = 0x20000000;
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define symbol ZBT_SRAM2_SIZE = 0x00400000; /* 4 MB */
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/* NVIC vector numbers and size. */
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define symbol NVIC_NUM_VECTORS = (16 + 48);
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define symbol NVIC_VECTORS_SIZE = (NVIC_NUM_VECTORS * 4);
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x00000000;
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define symbol __ICFEDIT_intvec_start__ = MAPPABLE_START;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20000140;
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define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
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define symbol __ICFEDIT_region_ROM_start__ = ZBT_SRAM1_START;
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define symbol __ICFEDIT_region_ROM_end__ = ZBT_SRAM1_START + ZBT_SRAM1_SIZE - 1;
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define symbol __ICFEDIT_region_RAM_start__ = ZBT_SRAM2_START + NVIC_VECTORS_SIZE;
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define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE - 1;
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/*-Sizes-*/
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/* Heap and Stack size */
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define symbol __ICFEDIT_size_heap__ = 0x4000;
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define symbol __ICFEDIT_size_cstack__ = 0x1000;
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define symbol __ICFEDIT_size_heap__ = 0x200000;
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define symbol __ICFEDIT_size_cstack__ = 0x400;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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@ -33,7 +33,14 @@
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#ifndef MBED_CMSIS_NVIC_H
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#define MBED_CMSIS_NVIC_H
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#include "memory_zones.h"
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#define NVIC_NUM_VECTORS (16 + 48)
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#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Location of vectors in RAM
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#define NVIC_RAM_VECTOR_ADDRESS ZBT_SRAM2_START // Location of vectors in RAM
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/*
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* Size of the whole vector table in bytes. Each vector is on 32 bits.
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*/
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#define NVIC_VECTORS_SIZE (NVIC_NUM_VECTORS * 4)
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#endif
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@ -0,0 +1,50 @@
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/*
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* Copyright (c) 2017-2018 ARM Limited
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*
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* Licensed under the Apache License Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing software
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* distributed under the License is distributed on an "AS IS" BASIS
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* This file contains the information of memory zones for code and data on
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* ARM Versatile Express Cortex-M Prototyping Systems (V2M-MPS2) TRM.
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* It is used in startup code and linker scripts of supported compilers (ARM and
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* GCC_ARM).
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*
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* WARNING: IAR does not include this file and re-define these values in
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* MPS2.icf file. Please make sure that the two files share the same values.
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*
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* These memory zones are defined in section 4.2 of ARM V2M-MPS2 RTL and
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* Fast Model Reference Guide.
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*/
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#ifndef MEMORY_ZONES_H
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#define MEMORY_ZONES_H
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/*
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* Code memory zones
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* Please note that MPS2 on Fast Models do not implemented persistent flash memory.
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* The FLASH memory can be simulated via 4MB ZBT_SRAM1 block
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* only to keep the same name than in the CMSDK RTL and Fast Models Reference
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* Guide.
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*/
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#define MAPPABLE_START 0x00000000
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#define MAPPABLE_SIZE 0x00004000 /* 16 KiB */
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#define ZBT_SRAM1_START (0x00000000 + 0x00004000)
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#define ZBT_SRAM1_SIZE (0x00400000 - 0x00004000) /* 4 MiB - 16 KiB*/
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/* Data memory zones */
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#define ZBT_SRAM2_START 0x20000000
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#define ZBT_SRAM2_SIZE 0x00400000 /* 4 MiB */
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#endif /* MEMORY_ZONES_H */
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