mirror of https://github.com/ARMmbed/mbed-os.git
[Nuvoton] Synchronize lp_ticker code to us_ticker
This is to make us_ticker/lp_ticker code consistent.pull/7029/head
ccli8
parent
86e194d075
commit
fe627cb722
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@ -40,21 +40,37 @@ static const struct nu_modinit_s timer0_modinit = {TIMER_0, TMR0_MODULE, CLK_CLK
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#define TIMER_MODINIT timer0_modinit
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static int ticker_inited = 0;
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/* S/W interrupt enable/disable
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*
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* Because H/W interrupt enable/disable (TIMER_EnableInt/TIMER_DisableInt) needs delay for lp_ticker,
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* we introduce S/W interrupt enable/disable to avoid blocking code. With S/W interrupt enable/disable,
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* H/W interrupt is always enabled after ticker_init. A S/W flag is used to tell whether or not
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* ticker_irq_handler is ready to call.
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*/
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/* Ticker uninitialized */
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#define NU_TICKER_UNINIT 0
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/* Ticker initialized with interrupt disabled */
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#define NU_TICKER_INIT_INTR_DIS 1
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/* Ticker initialized with interrupt enabled */
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#define NU_TICKER_INIT_INTR_EN 2
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/* Track ticker status */
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static volatile uint16_t ticker_stat = NU_TICKER_UNINIT;
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#define TMR_CMP_MIN 2
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#define TMR_CMP_MAX 0xFFFFFFu
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void us_ticker_init(void)
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{
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if (ticker_inited) {
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if (ticker_stat) {
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/* By HAL spec, ticker_init allows the ticker to keep counting and disables the
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* ticker interrupt. */
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us_ticker_disable_interrupt();
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us_ticker_clear_interrupt();
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return;
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}
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ticker_inited = 1;
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ticker_stat = NU_TICKER_INIT_INTR_DIS;
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// Reset IP
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SYS_ResetModule(TIMER_MODINIT.rsetidx);
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@ -82,7 +98,7 @@ void us_ticker_init(void)
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NVIC_EnableIRQ(TIMER_MODINIT.irq_n);
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TIMER_DisableInt(timer_base);
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TIMER_EnableInt(timer_base);
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TIMER_Start(timer_base);
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/* Wait for timer to start counting and raise active flag */
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@ -95,6 +111,7 @@ void us_ticker_free(void)
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/* Stop counting */
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TIMER_Stop(timer_base);
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/* Wait for timer to stop counting and unset active flag */
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while((timer_base->CTL & TIMER_CTL_ACTSTS_Msk));
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@ -105,12 +122,12 @@ void us_ticker_free(void)
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/* Disable IP clock */
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CLK_DisableModuleClock(TIMER_MODINIT.clkidx);
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ticker_inited = 0;
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ticker_stat = NU_TICKER_UNINIT;
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}
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uint32_t us_ticker_read()
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{
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if (! ticker_inited) {
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if (ticker_stat == NU_TICKER_UNINIT) {
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us_ticker_init();
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}
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@ -121,6 +138,9 @@ uint32_t us_ticker_read()
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void us_ticker_set_interrupt(timestamp_t timestamp)
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{
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/* We can call ticker_irq_handler now. */
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ticker_stat = NU_TICKER_INIT_INTR_EN;
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/* In continuous mode, counter will be reset to zero with the following sequence:
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* 1. Stop counting
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* 2. Configure new CMP value
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@ -136,13 +156,12 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
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uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK;
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cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX);
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timer_base->CMP = cmp_timer;
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TIMER_EnableInt(timer_base);
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}
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void us_ticker_disable_interrupt(void)
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{
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TIMER_DisableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
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/* We cannot call ticker_irq_handler now. */
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ticker_stat = NU_TICKER_INIT_INTR_DIS;
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}
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void us_ticker_clear_interrupt(void)
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@ -152,6 +171,9 @@ void us_ticker_clear_interrupt(void)
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void us_ticker_fire_interrupt(void)
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{
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/* We can call ticker_irq_handler now. */
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ticker_stat = NU_TICKER_INIT_INTR_EN;
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// NOTE: This event was in the past. Set the interrupt as pending, but don't process it here.
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// This prevents a recursive loop under heavy load which can lead to a stack overflow.
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NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n);
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@ -168,10 +190,15 @@ const ticker_info_t* us_ticker_get_info()
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static void tmr0_vec(void)
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{
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TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
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/* NOTE: We need to clear interrupt flag earlier to reduce possibility of dummy interrupt.
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* This is because "clear interrupt flag" needs delay which isn't added here to avoid
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* blocking in ISR code. */
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us_ticker_clear_interrupt();
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// NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler();
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us_ticker_irq_handler();
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if (ticker_stat == NU_TICKER_INIT_INTR_EN) {
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us_ticker_irq_handler();
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}
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}
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#endif
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@ -40,21 +40,37 @@ static const struct nu_modinit_s timer0_modinit = {TIMER_0, TMR0_MODULE, CLK_CLK
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#define TIMER_MODINIT timer0_modinit
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static int ticker_inited = 0;
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/* S/W interrupt enable/disable
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*
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* Because H/W interrupt enable/disable (TIMER_EnableInt/TIMER_DisableInt) needs delay for lp_ticker,
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* we introduce S/W interrupt enable/disable to avoid blocking code. With S/W interrupt enable/disable,
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* H/W interrupt is always enabled after ticker_init. A S/W flag is used to tell whether or not
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* ticker_irq_handler is ready to call.
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*/
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/* Ticker uninitialized */
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#define NU_TICKER_UNINIT 0
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/* Ticker initialized with interrupt disabled */
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#define NU_TICKER_INIT_INTR_DIS 1
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/* Ticker initialized with interrupt enabled */
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#define NU_TICKER_INIT_INTR_EN 2
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/* Track ticker status */
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static volatile uint16_t ticker_stat = NU_TICKER_UNINIT;
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#define TMR_CMP_MIN 2
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#define TMR_CMP_MAX 0xFFFFFFu
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void us_ticker_init(void)
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{
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if (ticker_inited) {
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if (ticker_stat) {
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/* By HAL spec, ticker_init allows the ticker to keep counting and disables the
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* ticker interrupt. */
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us_ticker_disable_interrupt();
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us_ticker_clear_interrupt();
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return;
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}
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ticker_inited = 1;
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ticker_stat = NU_TICKER_INIT_INTR_DIS;
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// Reset IP
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SYS_ResetModule(TIMER_MODINIT.rsetidx);
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@ -82,7 +98,7 @@ void us_ticker_init(void)
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NVIC_EnableIRQ(TIMER_MODINIT.irq_n);
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TIMER_DisableInt(timer_base);
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TIMER_EnableInt(timer_base);
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TIMER_Start(timer_base);
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/* Wait for timer to start counting and raise active flag */
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@ -106,12 +122,12 @@ void us_ticker_free(void)
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/* Disable IP clock */
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CLK_DisableModuleClock(TIMER_MODINIT.clkidx);
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ticker_inited = 0;
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ticker_stat = NU_TICKER_UNINIT;
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}
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uint32_t us_ticker_read()
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{
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if (! ticker_inited) {
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if (ticker_stat == NU_TICKER_UNINIT) {
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us_ticker_init();
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}
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@ -122,6 +138,9 @@ uint32_t us_ticker_read()
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void us_ticker_set_interrupt(timestamp_t timestamp)
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{
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/* We can call ticker_irq_handler now. */
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ticker_stat = NU_TICKER_INIT_INTR_EN;
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/* In continuous mode, counter will be reset to zero with the following sequence:
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* 1. Stop counting
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* 2. Configure new CMP value
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@ -137,13 +156,12 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
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uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK;
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cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX);
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timer_base->CMP = cmp_timer;
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TIMER_EnableInt(timer_base);
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}
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void us_ticker_disable_interrupt(void)
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{
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TIMER_DisableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
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/* We cannot call ticker_irq_handler now. */
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ticker_stat = NU_TICKER_INIT_INTR_DIS;
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}
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void us_ticker_clear_interrupt(void)
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@ -153,6 +171,9 @@ void us_ticker_clear_interrupt(void)
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void us_ticker_fire_interrupt(void)
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{
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/* We can call ticker_irq_handler now. */
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ticker_stat = NU_TICKER_INIT_INTR_EN;
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// NOTE: This event was in the past. Set the interrupt as pending, but don't process it here.
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// This prevents a recursive loop under heavy load which can lead to a stack overflow.
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NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n);
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@ -169,10 +190,15 @@ const ticker_info_t* us_ticker_get_info()
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static void tmr0_vec(void)
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{
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TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
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/* NOTE: We need to clear interrupt flag earlier to reduce possibility of dummy interrupt.
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* This is because "clear interrupt flag" needs delay which isn't added here to avoid
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* blocking in ISR code. */
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us_ticker_clear_interrupt();
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// NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler();
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us_ticker_irq_handler();
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if (ticker_stat == NU_TICKER_INIT_INTR_EN) {
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us_ticker_irq_handler();
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}
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}
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#endif
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@ -42,21 +42,37 @@ static const struct nu_modinit_s timer0_modinit = {TIMER_0, TMR0_MODULE, CLK_CLK
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#define TIMER_MODINIT timer0_modinit
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static int ticker_inited = 0;
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/* S/W interrupt enable/disable
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*
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* Because H/W interrupt enable/disable (TIMER_EnableInt/TIMER_DisableInt) needs delay for lp_ticker,
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* we introduce S/W interrupt enable/disable to avoid blocking code. With S/W interrupt enable/disable,
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* H/W interrupt is always enabled after ticker_init. A S/W flag is used to tell whether or not
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* ticker_irq_handler is ready to call.
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*/
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/* Ticker uninitialized */
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#define NU_TICKER_UNINIT 0
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/* Ticker initialized with interrupt disabled */
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#define NU_TICKER_INIT_INTR_DIS 1
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/* Ticker initialized with interrupt enabled */
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#define NU_TICKER_INIT_INTR_EN 2
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/* Track ticker status */
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static volatile uint16_t ticker_stat = NU_TICKER_UNINIT;
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#define TMR_CMP_MIN 2
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#define TMR_CMP_MAX 0xFFFFFFu
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void us_ticker_init(void)
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{
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if (ticker_inited) {
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if (ticker_stat) {
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/* By HAL spec, ticker_init allows the ticker to keep counting and disables the
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* ticker interrupt. */
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us_ticker_disable_interrupt();
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us_ticker_clear_interrupt();
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return;
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}
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ticker_inited = 1;
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ticker_stat = NU_TICKER_INIT_INTR_DIS;
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// Reset IP
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SYS_ResetModule(TIMER_MODINIT.rsetidx);
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@ -84,7 +100,7 @@ void us_ticker_init(void)
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NVIC_EnableIRQ(TIMER_MODINIT.irq_n);
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TIMER_DisableInt(timer_base);
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TIMER_EnableInt(timer_base);
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TIMER_Start(timer_base);
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/* Wait for timer to start counting and raise active flag */
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@ -108,12 +124,12 @@ void us_ticker_free(void)
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/* Disable IP clock */
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CLK_DisableModuleClock(TIMER_MODINIT.clkidx);
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ticker_inited = 0;
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ticker_stat = NU_TICKER_UNINIT;
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}
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uint32_t us_ticker_read()
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{
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if (! ticker_inited) {
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if (ticker_stat == NU_TICKER_UNINIT) {
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us_ticker_init();
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}
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@ -124,6 +140,9 @@ uint32_t us_ticker_read()
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void us_ticker_set_interrupt(timestamp_t timestamp)
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{
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/* We can call ticker_irq_handler now. */
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ticker_stat = NU_TICKER_INIT_INTR_EN;
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/* In continuous mode, counter will be reset to zero with the following sequence:
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* 1. Stop counting
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* 2. Configure new CMP value
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@ -139,13 +158,12 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
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uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK;
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cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX);
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timer_base->CMPR = cmp_timer;
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TIMER_EnableInt(timer_base);
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}
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void us_ticker_disable_interrupt(void)
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{
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TIMER_DisableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
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/* We cannot call ticker_irq_handler now. */
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ticker_stat = NU_TICKER_INIT_INTR_DIS;
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}
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void us_ticker_clear_interrupt(void)
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@ -155,6 +173,9 @@ void us_ticker_clear_interrupt(void)
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void us_ticker_fire_interrupt(void)
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{
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/* We can call ticker_irq_handler now. */
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ticker_stat = NU_TICKER_INIT_INTR_EN;
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// NOTE: This event was in the past. Set the interrupt as pending, but don't process it here.
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// This prevents a recursive loop under heavy load which can lead to a stack overflow.
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NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n);
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@ -171,10 +192,15 @@ const ticker_info_t* us_ticker_get_info()
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void TMR0_IRQHandler(void)
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{
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TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
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/* NOTE: We need to clear interrupt flag earlier to reduce possibility of dummy interrupt.
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* This is because "clear interrupt flag" needs delay which isn't added here to avoid
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* blocking in ISR code. */
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us_ticker_clear_interrupt();
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// NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler();
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us_ticker_irq_handler();
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if (ticker_stat == NU_TICKER_INIT_INTR_EN) {
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us_ticker_irq_handler();
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}
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}
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#endif
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@ -40,21 +40,37 @@ static const struct nu_modinit_s timer0_modinit = {TIMER_0, TMR0_MODULE, CLK_CLK
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#define TIMER_MODINIT timer0_modinit
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static int ticker_inited = 0;
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/* S/W interrupt enable/disable
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*
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* Because H/W interrupt enable/disable (TIMER_EnableInt/TIMER_DisableInt) needs delay for lp_ticker,
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* we introduce S/W interrupt enable/disable to avoid blocking code. With S/W interrupt enable/disable,
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* H/W interrupt is always enabled after ticker_init. A S/W flag is used to tell whether or not
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* ticker_irq_handler is ready to call.
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*/
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/* Ticker uninitialized */
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#define NU_TICKER_UNINIT 0
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/* Ticker initialized with interrupt disabled */
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#define NU_TICKER_INIT_INTR_DIS 1
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/* Ticker initialized with interrupt enabled */
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#define NU_TICKER_INIT_INTR_EN 2
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/* Track ticker status */
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static volatile uint16_t ticker_stat = NU_TICKER_UNINIT;
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#define TMR_CMP_MIN 2
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#define TMR_CMP_MAX 0xFFFFFFu
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void us_ticker_init(void)
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{
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if (ticker_inited) {
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if (ticker_stat) {
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/* By HAL spec, ticker_init allows the ticker to keep counting and disables the
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* ticker interrupt. */
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us_ticker_disable_interrupt();
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us_ticker_clear_interrupt();
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return;
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}
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ticker_inited = 1;
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ticker_stat = NU_TICKER_INIT_INTR_DIS;
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// Reset IP
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SYS_ResetModule(TIMER_MODINIT.rsetidx);
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@ -81,7 +97,7 @@ void us_ticker_init(void)
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NVIC_EnableIRQ(TIMER_MODINIT.irq_n);
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TIMER_DisableInt(timer_base);
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TIMER_EnableInt(timer_base);
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TIMER_Start(timer_base);
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/* Wait for timer to start counting and raise active flag */
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@ -105,12 +121,12 @@ void us_ticker_free(void)
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/* Disable IP clock */
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CLK_DisableModuleClock(TIMER_MODINIT.clkidx);
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ticker_inited = 0;
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ticker_stat = NU_TICKER_UNINIT;
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}
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uint32_t us_ticker_read()
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{
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if (! ticker_inited) {
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if (ticker_stat == NU_TICKER_UNINIT) {
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us_ticker_init();
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}
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||||
|
|
@ -121,6 +137,9 @@ uint32_t us_ticker_read()
|
|||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
/* We can call ticker_irq_handler now. */
|
||||
ticker_stat = NU_TICKER_INIT_INTR_EN;
|
||||
|
||||
/* In continuous mode, counter will be reset to zero with the following sequence:
|
||||
* 1. Stop counting
|
||||
* 2. Configure new CMP value
|
||||
|
|
@ -136,13 +155,12 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
|
|||
uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK;
|
||||
cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX);
|
||||
timer_base->CMP = cmp_timer;
|
||||
|
||||
TIMER_EnableInt(timer_base);
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
TIMER_DisableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
|
||||
/* We cannot call ticker_irq_handler now. */
|
||||
ticker_stat = NU_TICKER_INIT_INTR_DIS;
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void)
|
||||
|
|
@ -152,6 +170,9 @@ void us_ticker_clear_interrupt(void)
|
|||
|
||||
void us_ticker_fire_interrupt(void)
|
||||
{
|
||||
/* We can call ticker_irq_handler now. */
|
||||
ticker_stat = NU_TICKER_INIT_INTR_EN;
|
||||
|
||||
// NOTE: This event was in the past. Set the interrupt as pending, but don't process it here.
|
||||
// This prevents a recursive loop under heavy load which can lead to a stack overflow.
|
||||
NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n);
|
||||
|
|
@ -168,10 +189,15 @@ const ticker_info_t* us_ticker_get_info()
|
|||
|
||||
static void tmr0_vec(void)
|
||||
{
|
||||
TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
|
||||
|
||||
/* NOTE: We need to clear interrupt flag earlier to reduce possibility of dummy interrupt.
|
||||
* This is because "clear interrupt flag" needs delay which isn't added here to avoid
|
||||
* blocking in ISR code. */
|
||||
us_ticker_clear_interrupt();
|
||||
|
||||
// NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler();
|
||||
us_ticker_irq_handler();
|
||||
if (ticker_stat == NU_TICKER_INIT_INTR_EN) {
|
||||
us_ticker_irq_handler();
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue