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[M2351] Linker files support both of secure & non-secure domain

pull/7302/head
cyliangtw 2017-09-19 18:13:43 +08:00 committed by ccli8
parent a2aac528f4
commit f06644a920
3 changed files with 93 additions and 23 deletions
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46
targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_ARM_MICRO/M2351.sct
View File

@ -1,3 +1,28 @@
#if (__DOMAIN_NS == 1U)
LR_IROM1 0x10040000 {
ER_IROM1 0x10040000 { ; load address = execution address
*(RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
ARM_LIB_STACK 0x30010000 EMPTY 0x800 {
}
ER_IRAMVEC 0x30001800 EMPTY (4*(16 + 102)) { ; Reserve for vectors
}
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
.ANY (+RW +ZI)
}
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x30010000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
}
}
ScatterAssert(LoadLimit(LR_IROM1) <= 0x10080000) ; 256 KB APROM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x30020000) ; 64 KB SRAM
#else
LR_IROM1 0x00000000 {
ER_IROM1 0x00000000 { ; load address = execution address
@ -5,11 +30,7 @@ LR_IROM1 0x00000000 {
*(InRoot$$Sections)
.ANY (+RO)
}
;UVISOR AlignExpr(+0, 16) { ; 16 byte-aligned
; uvisor-lib.a (+RW +ZI)
;}
ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
}
@ -19,9 +40,16 @@ LR_IROM1 0x00000000 {
.ANY (+RW +ZI)
}
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x18000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
}
}
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20018000) ; 96 KB SRAM
LR_IROM2 0x3F000
{
NSC_ROM +0 0x1000
{
*(Veneer$$CMSE)
}
}
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00040000) ; 256 KB APROM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20010000) ; 64 KB SRAM
#endif

46
targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_ARM_STD/M2351.sct
View File

@ -1,3 +1,28 @@
#if (__DOMAIN_NS == 1U)
LR_IROM1 0x10040000 {
ER_IROM1 0x10040000 { ; load address = execution address
*(RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
ARM_LIB_STACK 0x30010000 EMPTY 0x800 {
}
ER_IRAMVEC 0x30001800 EMPTY (4*(16 + 102)) { ; Reserve for vectors
}
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
.ANY (+RW +ZI)
}
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x30010000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
}
}
ScatterAssert(LoadLimit(LR_IROM1) <= 0x10080000) ; 256 KB APROM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x30020000) ; 64 KB SRAM
#else
LR_IROM1 0x00000000 {
ER_IROM1 0x00000000 { ; load address = execution address
@ -5,11 +30,7 @@ LR_IROM1 0x00000000 {
*(InRoot$$Sections)
.ANY (+RO)
}
;UVISOR AlignExpr(+0, 16) { ; 16 byte-aligned
; uvisor-lib.a (+RW +ZI)
;}
ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
}
@ -19,9 +40,16 @@ LR_IROM1 0x00000000 {
.ANY (+RW +ZI)
}
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x18000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
}
}
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20018000) ; 96 KB SRAM
LR_IROM2 0x3F000
{
NSC_ROM +0 0x1000
{
*(Veneer$$CMSE)
}
}
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00040000) ; 256 KB APROM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20010000) ; 64 KB SRAM
#endif

24
targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/M2351.ld
View File

@ -1,17 +1,30 @@
/*
* Nuvoton M2351 GCC linker script file
*/
StackSize = 0x800;
#if (__DOMAIN_NS == 1U)
MEMORY
{
VECTORS (rx) : ORIGIN = 0x10040000, LENGTH = 0x00000400
FLASH (rx) : ORIGIN = 0x10040400, LENGTH = 0x00040000 - 0x00000400
RAM_INTERN (rwx) : ORIGIN = 0x30010000, LENGTH = 0x00010000 - 0x00000000
}
#else
MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x0003F0000 - 0x00000400
NSC_FLASH (rx) : ORIGIN = 0x0003F000, LENGTH = 0x00080000 - 0x0003F000
RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00018000 - 0x00000000
FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x0003F000 - 0x00000400
NSC_FLASH (rx) : ORIGIN = 0x0003F000, LENGTH = 0x00040000 - 0x0003F000
RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 - 0x00000000
}
#endif
/**
* Must match cmsis_nvic.h
*/
@ -112,6 +125,7 @@ SECTIONS
KEEP(*(.eh_frame*))
} > FLASH
#if (__DOMAIN_NS != 1U)
/* Veneer$$CMSE : */
.gnu.sgstubs :
{
@ -119,7 +133,7 @@ SECTIONS
*(.gnu.sgstubs.*)
__sgstubs_end = .;
} > NSC_FLASH
#endif
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)