mirror of https://github.com/ARMmbed/mbed-os.git
[M2351] Centralize size configuration for secure flash, secure SRAM, NSC, and bootloader
ccli8
parent
ca63abae73
commit
dd7fd76758
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@ -1,18 +1,39 @@
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#! armcc -E
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#include "partition_M2351_sub.h"
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/* Check relevant macros have been defined */
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#if (! defined(NU_TZ_SECURE_FLASH_SIZE))
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#error("NU_TZ_SECURE_FLASH_SIZE not defined")
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#endif
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#if (! defined(NU_TZ_SECURE_SRAM_SIZE))
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#error("NU_TZ_SECURE_SRAM_SIZE not defined")
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#endif
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#if (! defined(NU_TZ_NSC_REGION_SIZE))
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#error("NU_TZ_NSC_REGION_SIZE not defined")
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#endif
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/* Requirements for NSC location
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*
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* 1. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.
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* 2. Greentea flash IAP uses last 4 sectors for its test. Avoid this range.
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* 3. Greentea NVSTORE uses last 2 sectors or 4KB x 2 for its test. Avoid this range.
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*/
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#define NSC_REGION_BASE 0x0003D000
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#define NSC_REGION_SIZE 0x00001000
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#define NU_TZ_NSC_REGION_BASE (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_REGION_SIZE)
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#if defined(__DOMAIN_NS) && __DOMAIN_NS
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LR_IROM1 0x10040000 ; load address = execution address
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{
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#if (! defined(MBED_APP_START))
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#define MBED_APP_START (0x10000000 + NU_TZ_SECURE_FLASH_SIZE)
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#endif
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#if (! defined(MBED_APP_SIZE))
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#define MBED_APP_SIZE (0x80000 - NU_TZ_SECURE_FLASH_SIZE)
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#endif
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LR_IROM1 MBED_APP_START
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{
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/* load address = execution address */
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ER_IROM1 +0
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{
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*(RESET, +First)
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@ -20,35 +41,43 @@ LR_IROM1 0x10040000 ; load address = executi
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.ANY (+RO)
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}
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ARM_LIB_STACK 0x30006000 EMPTY 0x800
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ARM_LIB_STACK 0x30000000 + NU_TZ_SECURE_SRAM_SIZE EMPTY 0x800
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{
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}
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ER_IRAMVEC 0x30006800 EMPTY (4*(16 + 102)) ; Reserve for vectors
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/* Reserve for vectors */
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ER_IRAMVEC 0x30000800 + NU_TZ_SECURE_SRAM_SIZE EMPTY (4*(16 + 102))
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{
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}
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RW_IRAM1 AlignExpr(+0, 16) ; 16 byte-aligned
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{
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/* 16 byte-aligned */
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RW_IRAM1 AlignExpr(+0, 16)
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{
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x30006000 + 0x12000 - AlignExpr(ImageLimit(RW_IRAM1), 16))
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x30018000 - AlignExpr(ImageLimit(RW_IRAM1), 16))
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{
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}
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}
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; Total 512 KB APROM: 256 KB for secure + NSC + reserved, 256 KB for non-secure
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ScatterAssert(LoadLimit(LR_IROM1) <= 0x10080000)
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; Total 96 KB SRAM: 24 KB for secure, 72 KB for non-secure
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ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))
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ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x30018000)
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#else
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LR_IROM1 0x00000000
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#if (! defined(MBED_APP_START))
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#define MBED_APP_START 0
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#endif
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#if (! defined(MBED_APP_SIZE))
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#define MBED_APP_SIZE NU_TZ_SECURE_FLASH_SIZE
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#endif
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LR_IROM1 MBED_APP_START
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{
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ER_IROM1 +0 ; load address = execution address
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/* load address = execution address */
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ER_IROM1 +0
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{
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*(RESET, +First)
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*(InRoot$$Sections)
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@ -59,33 +88,34 @@ LR_IROM1 0x00000000
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{
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}
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ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 102)) ; Reserve for vectors
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/* Reserve for vectors */
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ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 102))
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{
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}
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RW_IRAM1 AlignExpr(+0, 16) ; 16 byte-aligned
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{
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/* 16 byte-aligned */
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RW_IRAM1 AlignExpr(+0, 16)
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{
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x6000 - AlignExpr(ImageLimit(RW_IRAM1), 16))
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + NU_TZ_SECURE_SRAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
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{
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}
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}
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LR_IROM2 NSC_REGION_BASE
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LR_IROM2 NU_TZ_NSC_REGION_BASE
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{
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NSC_ROM +0 NSC_REGION_SIZE
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NSC_ROM +0 NU_TZ_NSC_REGION_SIZE
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{
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*(Veneer$$CMSE)
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}
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}
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; Total 512 KB APROM: 256 KB for secure + NSC + reserved, 256 KB for non-secure
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ScatterAssert(LoadLimit(LR_IROM1) <= NSC_REGION_BASE)
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ScatterAssert(LoadLimit(LR_IROM2) <= (NSC_REGION_BASE + NSC_REGION_SIZE))
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; Total 96 KB SRAM: 24 KB for secure, 72 KB for non-secure
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ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20006000)
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ScatterAssert(LoadLimit(LR_IROM1) <= NU_TZ_NSC_REGION_BASE)
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ScatterAssert(LoadLimit(LR_IROM2) <= (NU_TZ_NSC_REGION_BASE + NU_TZ_NSC_REGION_SIZE))
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/* By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000 */
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ScatterAssert(LoadBase(LR_IROM2) >= 0x4000)
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ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (0x20000000 + NU_TZ_SECURE_SRAM_SIZE))
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#endif
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@ -0,0 +1,23 @@
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/**************************************************************************//**
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* @file partition_M2351_sub.c
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* @version V3.00
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* @brief SAU configuration for secure/nonsecure region settings.
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*
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* @note
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* Copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
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*
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******************************************************************************/
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#ifndef PARTITION_M2351_SUB
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#define PARTITION_M2351_SUB
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/* Secure flash size: 256 KB */
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#define NU_TZ_SECURE_FLASH_SIZE 0x40000
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/* Secure SRAM size: 24 KB */
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#define NU_TZ_SECURE_SRAM_SIZE 0x6000
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/* NSC region size: 4 KB */
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#define NU_TZ_NSC_REGION_SIZE 0x1000
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#endif /* PARTITION_M2351_SUB */
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@ -1,18 +1,39 @@
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#! armcc -E
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#include "partition_M2351_sub.h"
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/* Check relevant macros have been defined */
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#if (! defined(NU_TZ_SECURE_FLASH_SIZE))
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#error("NU_TZ_SECURE_FLASH_SIZE not defined")
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#endif
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#if (! defined(NU_TZ_SECURE_SRAM_SIZE))
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#error("NU_TZ_SECURE_SRAM_SIZE not defined")
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#endif
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#if (! defined(NU_TZ_NSC_REGION_SIZE))
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#error("NU_TZ_NSC_REGION_SIZE not defined")
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#endif
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/* Requirements for NSC location
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*
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* 1. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.
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* 2. Greentea flash IAP uses last 4 sectors for its test. Avoid this range.
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* 3. Greentea NVSTORE uses last 2 sectors or 4KB x 2 for its test. Avoid this range.
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*/
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#define NSC_REGION_BASE 0x0003D000
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#define NSC_REGION_SIZE 0x00001000
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#define NU_TZ_NSC_REGION_BASE (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_REGION_SIZE)
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#if defined(__DOMAIN_NS) && __DOMAIN_NS
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LR_IROM1 0x10040000 ; load address = execution address
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{
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#if (! defined(MBED_APP_START))
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#define MBED_APP_START (0x10000000 + NU_TZ_SECURE_FLASH_SIZE)
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#endif
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#if (! defined(MBED_APP_SIZE))
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#define MBED_APP_SIZE (0x80000 - NU_TZ_SECURE_FLASH_SIZE)
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#endif
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LR_IROM1 MBED_APP_START
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{
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/* load address = execution address */
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ER_IROM1 +0
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{
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*(RESET, +First)
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@ -20,35 +41,43 @@ LR_IROM1 0x10040000 ; load address = executi
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.ANY (+RO)
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}
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ARM_LIB_STACK 0x30006000 EMPTY 0x800
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ARM_LIB_STACK 0x30000000 + NU_TZ_SECURE_SRAM_SIZE EMPTY 0x800
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{
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}
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ER_IRAMVEC 0x30006800 EMPTY (4*(16 + 102)) ; Reserve for vectors
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/* Reserve for vectors */
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ER_IRAMVEC 0x30000800 + NU_TZ_SECURE_SRAM_SIZE EMPTY (4*(16 + 102))
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{
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}
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RW_IRAM1 AlignExpr(+0, 16) ; 16 byte-aligned
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{
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/* 16 byte-aligned */
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RW_IRAM1 AlignExpr(+0, 16)
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{
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x30006000 + 0x12000 - AlignExpr(ImageLimit(RW_IRAM1), 16))
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x30018000 - AlignExpr(ImageLimit(RW_IRAM1), 16))
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{
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}
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}
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; Total 512 KB APROM: 256 KB for secure + NSC + reserved, 256 KB for non-secure
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ScatterAssert(LoadLimit(LR_IROM1) <= 0x10080000)
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; Total 96 KB SRAM: 24 KB for secure, 72 KB for non-secure
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ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))
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ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x30018000)
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#else
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LR_IROM1 0x00000000
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#if (! defined(MBED_APP_START))
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#define MBED_APP_START 0
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#endif
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#if (! defined(MBED_APP_SIZE))
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#define MBED_APP_SIZE NU_TZ_SECURE_FLASH_SIZE
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#endif
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LR_IROM1 MBED_APP_START
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{
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ER_IROM1 +0 ; load address = execution address
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/* load address = execution address */
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ER_IROM1 +0
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{
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*(RESET, +First)
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*(InRoot$$Sections)
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@ -59,33 +88,34 @@ LR_IROM1 0x00000000
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{
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}
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ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 102)) ; Reserve for vectors
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/* Reserve for vectors */
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ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 102))
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{
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}
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RW_IRAM1 AlignExpr(+0, 16) ; 16 byte-aligned
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{
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/* 16 byte-aligned */
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RW_IRAM1 AlignExpr(+0, 16)
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{
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x6000 - AlignExpr(ImageLimit(RW_IRAM1), 16))
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + NU_TZ_SECURE_SRAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
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{
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}
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}
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LR_IROM2 NSC_REGION_BASE
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LR_IROM2 NU_TZ_NSC_REGION_BASE
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{
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NSC_ROM +0 NSC_REGION_SIZE
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NSC_ROM +0 NU_TZ_NSC_REGION_SIZE
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{
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*(Veneer$$CMSE)
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}
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}
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; Total 512 KB APROM: 256 KB for secure + NSC + reserved, 256 KB for non-secure
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ScatterAssert(LoadLimit(LR_IROM1) <= NSC_REGION_BASE)
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ScatterAssert(LoadLimit(LR_IROM2) <= (NSC_REGION_BASE + NSC_REGION_SIZE))
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; Total 96 KB SRAM: 24 KB for secure, 72 KB for non-secure
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ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20006000)
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ScatterAssert(LoadLimit(LR_IROM1) <= NU_TZ_NSC_REGION_BASE)
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ScatterAssert(LoadLimit(LR_IROM2) <= (NU_TZ_NSC_REGION_BASE + NU_TZ_NSC_REGION_SIZE))
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/* By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000 */
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ScatterAssert(LoadBase(LR_IROM2) >= 0x4000)
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ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (0x20000000 + NU_TZ_SECURE_SRAM_SIZE))
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#endif
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@ -0,0 +1,23 @@
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/**************************************************************************//**
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* @file partition_M2351_sub.c
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* @version V3.00
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* @brief SAU configuration for secure/nonsecure region settings.
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*
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* @note
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* Copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
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*
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******************************************************************************/
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#ifndef PARTITION_M2351_SUB
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#define PARTITION_M2351_SUB
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/* Secure flash size: 256 KB */
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#define NU_TZ_SECURE_FLASH_SIZE 0x40000
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/* Secure SRAM size: 24 KB */
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#define NU_TZ_SECURE_SRAM_SIZE 0x6000
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/* NSC region size: 4 KB */
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#define NU_TZ_NSC_REGION_SIZE 0x1000
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#endif /* PARTITION_M2351_SUB */
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@ -1,35 +1,63 @@
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/*
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* Nuvoton M2351 GCC linker script file
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*/
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StackSize = 0x800;
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#include "partition_M2351_sub.h"
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/* Check relevant macros have been defined */
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#if (! defined(NU_TZ_SECURE_FLASH_SIZE))
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#error("NU_TZ_SECURE_FLASH_SIZE not defined")
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#endif
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#if (! defined(NU_TZ_SECURE_SRAM_SIZE))
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#error("NU_TZ_SECURE_SRAM_SIZE not defined")
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#endif
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#if (! defined(NU_TZ_NSC_REGION_SIZE))
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#error("NU_TZ_NSC_REGION_SIZE not defined")
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#endif
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/* Requirements for NSC location
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*
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* 1. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.
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* 2. Greentea flash IAP uses last 4 sectors for its test. Avoid this range.
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* 3. Greentea NVSTORE uses last 2 sectors or 4KB x 2 for its test. Avoid this range.
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*/
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#define NSC_REGION_BASE 0x0003D000
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#define NSC_REGION_SIZE 0x00001000
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#define NU_TZ_NSC_REGION_BASE (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_REGION_SIZE)
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#if defined(__DOMAIN_NS) && __DOMAIN_NS
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#if (! defined(MBED_APP_START))
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#define MBED_APP_START (0x10000000 + NU_TZ_SECURE_FLASH_SIZE)
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#endif
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#if (! defined(MBED_APP_SIZE))
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#define MBED_APP_SIZE (0x80000 - NU_TZ_SECURE_FLASH_SIZE)
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#endif
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MEMORY
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{
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VECTORS (rx) : ORIGIN = 0x10040000, LENGTH = 0x00000400
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FLASH (rx) : ORIGIN = 0x10040400, LENGTH = 0x00040000 - 0x00000400
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RAM_INTERN (rwx) : ORIGIN = 0x30006000, LENGTH = 0x00018000 - 0x00006000
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VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
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FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x400
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RAM_INTERN (rwx) : ORIGIN = 0x30000000 + NU_TZ_SECURE_SRAM_SIZE, LENGTH = 0x00018000 - NU_TZ_SECURE_SRAM_SIZE
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}
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#else
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#if (! defined(MBED_APP_START))
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#define MBED_APP_START 0
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#endif
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#if (! defined(MBED_APP_SIZE))
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#define MBED_APP_SIZE NU_TZ_SECURE_FLASH_SIZE
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#endif
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MEMORY
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{
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VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
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FLASH (rx) : ORIGIN = 0x00000400, LENGTH = NSC_REGION_BASE - 0x00000400
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NSC_FLASH (rx) : ORIGIN = NSC_REGION_BASE, LENGTH = NSC_REGION_SIZE
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RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00006000 - 0x00000000
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VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
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FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = NU_TZ_NSC_REGION_BASE - MBED_APP_START - 0x400
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NSC_FLASH (rx) : ORIGIN = NU_TZ_NSC_REGION_BASE, LENGTH = NU_TZ_NSC_REGION_SIZE
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RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = NU_TZ_SECURE_SRAM_SIZE
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}
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#endif
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@ -141,7 +169,10 @@ SECTIONS
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__sgstubs_start = .;
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*(.gnu.sgstubs.*)
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__sgstubs_end = .;
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} > NSC_FLASH
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} > NSC_FLASH
|
||||
|
||||
/* By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000. */
|
||||
ASSERT(__sgstubs_start >= 0x4000, "By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.")
|
||||
#endif
|
||||
.ARM.extab :
|
||||
{
|
||||
|
|
|
|||
|
|
@ -0,0 +1,23 @@
|
|||
/**************************************************************************//**
|
||||
* @file partition_M2351_sub.c
|
||||
* @version V3.00
|
||||
* @brief SAU configuration for secure/nonsecure region settings.
|
||||
*
|
||||
* @note
|
||||
* Copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef PARTITION_M2351_SUB
|
||||
#define PARTITION_M2351_SUB
|
||||
|
||||
/* Secure flash size: 256 KB */
|
||||
#define NU_TZ_SECURE_FLASH_SIZE 0x40000
|
||||
|
||||
/* Secure SRAM size: 24 KB */
|
||||
#define NU_TZ_SECURE_SRAM_SIZE 0x6000
|
||||
|
||||
/* NSC region size: 4 KB */
|
||||
#define NU_TZ_NSC_REGION_SIZE 0x1000
|
||||
|
||||
#endif /* PARTITION_M2351_SUB */
|
||||
|
|
@ -20,6 +20,12 @@
|
|||
#include "M2351.h"
|
||||
#include "m2351_stddriver_sup.h"
|
||||
#include "cmsis_nvic.h"
|
||||
#include "partition_M2351.h"
|
||||
|
||||
/* Check relevant macro has been defined */
|
||||
#if (! defined(NU_TZ_SECURE_FLASH_SIZE))
|
||||
#error("NU_TZ_SECURE_FLASH_SIZE not defined")
|
||||
#endif
|
||||
|
||||
// Support linker-generated symbol as start of relocated vector table.
|
||||
#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
|
||||
|
|
@ -32,7 +38,7 @@ extern uint32_t __start_vector_table__;
|
|||
|
||||
/* TZ_START_NS: Start address of non-secure application */
|
||||
#ifndef TZ_START_NS
|
||||
#define TZ_START_NS (0x10040000U)
|
||||
#define TZ_START_NS (NS_OFFSET + NU_TZ_SECURE_FLASH_SIZE)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -11,6 +11,42 @@
|
|||
#ifndef PARTITION_M2351
|
||||
#define PARTITION_M2351
|
||||
|
||||
#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
|
||||
|
||||
#include "partition_M2351_sub.h"
|
||||
|
||||
extern int Image$$NSC_ROM$$Base;
|
||||
|
||||
#define NU_TZ_NSC_REGION_BASE ((uint32_t) &Image$$NSC_ROM$$Base)
|
||||
|
||||
#elif defined(__ICCARM__)
|
||||
|
||||
#error ("TODO: Support IAR")
|
||||
|
||||
#elif defined(__GNUC__)
|
||||
|
||||
#include "partition_M2351_sub.h"
|
||||
|
||||
extern int __sgstubs_start;
|
||||
|
||||
#define NU_TZ_NSC_REGION_BASE ((uint32_t) &__sgstubs_start)
|
||||
|
||||
#endif
|
||||
|
||||
/* Check relevant macros have been defined */
|
||||
#if (! defined(NU_TZ_SECURE_FLASH_SIZE))
|
||||
#error("NU_TZ_SECURE_FLASH_SIZE not defined")
|
||||
#endif
|
||||
#if (! defined(NU_TZ_SECURE_SRAM_SIZE))
|
||||
#error("NU_TZ_SECURE_SRAM_SIZE not defined")
|
||||
#endif
|
||||
#if (! defined(NU_TZ_NSC_REGION_BASE))
|
||||
#error("NU_TZ_NSC_REGION_BASE not defined")
|
||||
#endif
|
||||
#if (! defined(NU_TZ_NSC_REGION_SIZE))
|
||||
#error("NU_TZ_NSC_REGION_SIZE not defined")
|
||||
#endif
|
||||
|
||||
/*
|
||||
//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
|
||||
*/
|
||||
|
|
@ -35,7 +71,7 @@
|
|||
// <0x16000=> 88KB
|
||||
// <0x18000=> 96KB
|
||||
*/
|
||||
#define SCU_SECURE_SRAM_SIZE 0x6000
|
||||
#define SCU_SECURE_SRAM_SIZE NU_TZ_SECURE_SRAM_SIZE
|
||||
#define NON_SECURE_SRAM_BASE (0x30000000 + SCU_SECURE_SRAM_SIZE)
|
||||
|
||||
|
||||
|
|
@ -50,7 +86,7 @@
|
|||
// <o>Secure Flash ROM Size <0x800-0x7FFFF:0x800>
|
||||
*/
|
||||
|
||||
#define FMC_SECURE_ROM_SIZE 0x40000
|
||||
#define FMC_SECURE_ROM_SIZE NU_TZ_SECURE_FLASH_SIZE
|
||||
|
||||
#define FMC_NON_SECURE_BASE (0x10000000 + FMC_SECURE_ROM_SIZE)
|
||||
|
||||
|
|
@ -387,11 +423,11 @@ __STATIC_INLINE void SCU_Setup(void)
|
|||
/*
|
||||
// <o>Start Address <0-0xFFFFFFE0>
|
||||
*/
|
||||
#define SAU_INIT_START3 0x3D000
|
||||
#define SAU_INIT_START3 NU_TZ_NSC_REGION_BASE
|
||||
/*
|
||||
// <o>End Address <0x1F-0xFFFFFFFF>
|
||||
*/
|
||||
#define SAU_INIT_END3 0x3DFFF
|
||||
#define SAU_INIT_END3 (NU_TZ_NSC_REGION_BASE + NU_TZ_NSC_REGION_SIZE - 1)
|
||||
/*
|
||||
// <o>Region is
|
||||
// <0=>Non-Secure
|
||||
|
|
|
|||
Loading…
Reference in New Issue