mirror of https://github.com/ARMmbed/mbed-os.git
STM32: Reduce HAL_deepsleep stack usage
There are cases where a call hal_deepsleep would overflow the idle task stack, especially in developper or debug profile. In order to avoid this case, we split ForceClockOutofDeepSleep into two separate functions the two structure RCC_ClkInitStruct and RCC_OscInitStruct are not allocated at the same time.pull/7241/head
parent
ed9a1f1327
commit
81adafb5a7
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@ -49,38 +49,16 @@ static void wait_loop(uint32_t timeout)
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return;
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}
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// On L4 platforms we've seen unstable PLL CLK configuraiton
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// when DEEP SLEEP exits just few µs after being entered
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// So we need to force MSI usage before setting clocks again
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static void ForceClockOutofDeepSleep(void)
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static void ForcePeriphOutofDeepSleep(void)
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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uint32_t pFLatency = 0;
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/* Enable Power Control clock */
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__HAL_RCC_PWR_CLK_ENABLE();
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#ifdef PWR_FLAG_VOS
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/* Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0 */
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//while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOS) != RESET) {};
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#endif
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/* Get the Oscillators configuration according to the internal RCC registers */
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HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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#if (TARGET_STM32L4 || TARGET_STM32L1) /* MSI used for L4 */
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_4; // Intermediate freq, 1MHz range
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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error("clock issue\r\n");
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}
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/* Get the Clocks configuration according to the internal RCC registers */
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HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &pFLatency);
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@ -100,16 +78,6 @@ static void ForceClockOutofDeepSleep(void)
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error("clock issue\r\n");
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}
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#else /* HSI used on others */
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = 16;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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error("clock issue");
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}
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/* Get the Clocks configuration according to the internal RCC registers */
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HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &pFLatency);
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@ -132,6 +100,50 @@ static void ForceClockOutofDeepSleep(void)
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#endif // TARGET_STM32L4
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}
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static void ForceOscOutofDeepSleep(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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/* Enable Power Control clock */
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__HAL_RCC_PWR_CLK_ENABLE();
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/* Get the Oscillators configuration according to the internal RCC registers */
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HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
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#if (TARGET_STM32L4 || TARGET_STM32L1) /* MSI used for L4 */
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_4; // Intermediate freq, 1MHz range
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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error("clock issue\r\n");
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}
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#else /* HSI used on others */
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = 16;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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error("clock issue");
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}
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#endif // TARGET_STM32L4
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}
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/* The content of this function has been split into 2 separate functions
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so that the involved structures are not allocated on the stack in parallel.
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This will reduce the maximum stack usage in case on non-optimized / debug
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compilers settings */
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static void ForceClockOutofDeepSleep(void)
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{
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ForceOscOutofDeepSleep();
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ForcePeriphOutofDeepSleep();
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}
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void hal_sleep(void)
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{
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// Disable IRQs
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