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[M2351] Support PWM out

pull/7302/head
ccli8 2018-03-06 16:50:58 +08:00
parent d05ef693ac
commit 13e1209c83
4 changed files with 236 additions and 2 deletions
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23
targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_epwm.c
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@ -103,6 +103,26 @@ uint32_t EPWM_ConfigCaptureChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_
* To change duty cycle later, it should get the configured period value and calculate the new comparator value.
*/
uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle)
{
return EPWM_ConfigOutputChannel2(epwm, u32ChannelNum, u32Frequency, u32DutyCycle, 1);
}
/**
* @brief This function Configure EPWM generator and get the nearest frequency in edge aligned(up counter type) auto-reload mode
* @param[in] epwm The pointer of the specified EPWM module
* - EPWM0 : EPWM Group 0
* - EPWM1 : EPWM Group 1
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5
* @param[in] u32Frequency Target generator frequency
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 100. 10 means 10%, 20 means 20%...
* @param[in] u32Frequency2 Target generator frequency = u32Frequency / u32Frequency2
* @return Nearest frequency clock in nano second
* @note Since every two channels, (0 & 1), (2 & 3), shares a prescaler. Call this API to configure EPWM frequency may affect
* existing frequency of other channel.
* @note This function is used for initial stage.
* To change duty cycle later, it should get the configured period value and calculate the new comparator value.
*/
uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle, uint32_t u32Frequency2)
{
uint32_t u32PWMClockSrc;
uint32_t i;
@ -120,7 +140,8 @@ uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t
for(u16Prescale = 1U; u16Prescale < 0xFFFU; u16Prescale++)/* prescale could be 0~0xFFF */
{
i = (u32PWMClockSrc / u32Frequency) / u16Prescale;
// Note: Support frequency < 1
i = (uint64_t) u32PWMClockSrc * u32Frequency2 / u32Frequency / u16Prescale;
/* If target value is larger than CNR, need to use a larger prescaler */
if(i <= (0x10000U))
{

5
targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_epwm.h
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@ -541,6 +541,11 @@ extern "C"
/*---------------------------------------------------------------------------------------------------------*/
uint32_t EPWM_ConfigCaptureChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32UnitTimeNsec, uint32_t u32CaptureEdge);
uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle);
uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm,
uint32_t u32ChannelNum,
uint32_t u32Frequency,
uint32_t u32DutyCycle,
uint32_t u32Frequency2);
void EPWM_Start(EPWM_T *epwm, uint32_t u32ChannelMask);
void EPWM_Stop(EPWM_T *epwm, uint32_t u32ChannelMask);
void EPWM_ForceStop(EPWM_T *epwm, uint32_t u32ChannelMask);

208
targets/TARGET_NUVOTON/TARGET_M2351/pwmout_api.c Normal file
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@ -0,0 +1,208 @@
/* mbed Microcontroller Library
* Copyright (c) 2017-2018 Nuvoton
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "pwmout_api.h"
#if DEVICE_PWMOUT
#include "cmsis.h"
#include "pinmap.h"
#include "PeripheralPins.h"
#include "nu_modutil.h"
#include "nu_miscutil.h"
#include "nu_bitutil.h"
struct nu_pwm_var {
uint32_t en_msk;
};
static struct nu_pwm_var pwm0_var = {
.en_msk = 0
};
static struct nu_pwm_var pwm1_var = {
.en_msk = 0
};
static uint32_t pwm_modinit_mask = 0;
static const struct nu_modinit_s pwm_modinit_tab[] = {
{PWM_0_0, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P0_IRQn, &pwm0_var},
{PWM_0_1, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P0_IRQn, &pwm0_var},
{PWM_0_2, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P1_IRQn, &pwm0_var},
{PWM_0_3, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P1_IRQn, &pwm0_var},
{PWM_0_4, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P2_IRQn, &pwm0_var},
{PWM_0_5, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P2_IRQn, &pwm0_var},
{PWM_1_0, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P0_IRQn, &pwm1_var},
{PWM_1_1, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P0_IRQn, &pwm1_var},
{PWM_1_2, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P1_IRQn, &pwm1_var},
{PWM_1_3, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P1_IRQn, &pwm1_var},
{PWM_1_4, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P2_IRQn, &pwm1_var},
{PWM_1_5, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P2_IRQn, &pwm1_var},
{NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL}
};
static void pwmout_config(pwmout_t* obj, int start);
void pwmout_init(pwmout_t* obj, PinName pin)
{
obj->pwm = (PWMName) pinmap_peripheral(pin, PinMap_PWM);
MBED_ASSERT((int) obj->pwm != NC);
const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == (int) obj->pwm);
// NOTE: All channels (identified by PWMName) share a PWM module. This reset will also affect other channels of the same PWM module.
if (! ((struct nu_pwm_var *) modinit->var)->en_msk) {
/* Reset module
*
* NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
*/
SYS_ResetModule_S(modinit->rsetidx);
}
uint32_t chn = NU_MODSUBINDEX(obj->pwm);
// NOTE: Channels 0/1/2/3/4/5 share a clock source.
if ((((struct nu_pwm_var *) modinit->var)->en_msk & 0x3F) == 0) {
/* Select IP clock source
*
* NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
*/
CLK_SetModuleClock_S(modinit->clkidx, modinit->clksrc, modinit->clkdiv);
/* Enable IP clock
*
* NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
*/
CLK_EnableModuleClock_S(modinit->clkidx);
}
// Wire pinout
pinmap_pinout(pin, PinMap_PWM);
// Default: period = 10 ms, pulse width = 0 ms
obj->period_us = 1000 * 10;
obj->pulsewidth_us = 0;
pwmout_config(obj, 0);
((struct nu_pwm_var *) modinit->var)->en_msk |= 1 << chn;
// Mark this module to be inited.
int i = modinit - pwm_modinit_tab;
pwm_modinit_mask |= 1 << i;
}
void pwmout_free(pwmout_t* obj)
{
EPWM_T *pwm_base = (EPWM_T *) NU_MODBASE(obj->pwm);
uint32_t chn = NU_MODSUBINDEX(obj->pwm);
EPWM_ForceStop(pwm_base, 1 << chn);
const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == (int) obj->pwm);
((struct nu_pwm_var *) modinit->var)->en_msk &= ~(1 << chn);
if ((((struct nu_pwm_var *) modinit->var)->en_msk & 0x3F) == 0) {
/* Disable IP clock
*
* NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
*/
CLK_DisableModuleClock_S(modinit->clkidx);
}
// Mark this module to be deinited.
int i = modinit - pwm_modinit_tab;
pwm_modinit_mask &= ~(1 << i);
}
void pwmout_write(pwmout_t* obj, float value)
{
obj->pulsewidth_us = NU_CLAMP((uint32_t) (value * obj->period_us), 0, obj->period_us);
pwmout_config(obj, 1);
}
float pwmout_read(pwmout_t* obj)
{
return NU_CLAMP((((float) obj->pulsewidth_us) / obj->period_us), 0.0f, 1.0f);
}
void pwmout_period(pwmout_t* obj, float seconds)
{
pwmout_period_us(obj, seconds * 1000000.0f);
}
void pwmout_period_ms(pwmout_t* obj, int ms)
{
pwmout_period_us(obj, ms * 1000);
}
// Set the PWM period, keeping the duty cycle the same.
void pwmout_period_us(pwmout_t* obj, int us)
{
uint32_t period_us_old = obj->period_us;
uint32_t pulsewidth_us_old = obj->pulsewidth_us;
obj->period_us = us;
obj->pulsewidth_us = NU_CLAMP(obj->period_us * pulsewidth_us_old / period_us_old, 0, obj->period_us);
pwmout_config(obj, 1);
}
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
{
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
}
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
{
pwmout_pulsewidth_us(obj, ms * 1000);
}
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
{
obj->pulsewidth_us = NU_CLAMP(us, 0, obj->period_us);
pwmout_config(obj, 1);
}
static void pwmout_config(pwmout_t* obj, int start)
{
EPWM_T *pwm_base = (EPWM_T *) NU_MODBASE(obj->pwm);
uint32_t chn = NU_MODSUBINDEX(obj->pwm);
// To avoid abnormal pulse on (re-)configuration, follow the sequence: stop/configure(/re-start).
// NOTE: The issue is met in ARM mbed CI test tests-api-pwm on M487.
EPWM_ForceStop(pwm_base, 1 << chn);
// NOTE: Support period < 1s
// NOTE: ARM mbed CI test fails due to first PWM pulse error. Workaround by:
// 1. Inverse duty cycle (100 - duty)
// 2. Inverse PWM output polarity
// This trick is here to pass ARM mbed CI test. First PWM pulse error still remains.
EPWM_ConfigOutputChannel2(pwm_base, chn, 1000 * 1000, 100 - obj->pulsewidth_us * 100 / obj->period_us, obj->period_us);
pwm_base->POLCTL |= 1 << (EPWM_POLCTL_PINV0_Pos + chn);
if (start) {
// Enable output of the specified PWM channel
EPWM_EnableOutput(pwm_base, 1 << chn);
EPWM_Start(pwm_base, 1 << chn);
}
}
#endif

2
targets/targets.json
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@ -4228,7 +4228,7 @@
"is_disk_virtual": true,
"supported_toolchains": ["GCC_ARM", "IAR", "ARMC6"],
"inherits": ["Target"],
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "LOWPOWERTIMER", "RTC", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH"],
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "LOWPOWERTIMER", "RTC", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH"],
"detect_code": ["1305"],
"release_versions": ["5"],
"device_name": "M2351KIAAEES",