This commit represents the second stage of the low power implementations
that are required from Mbed 5.10 onwards. Besides the default hal
implementations (rtc_api.c and sleep.c), the PL031 RTC's native driver
needed to be added. Due to HW limitations in SSE-050 and the CM3DS,
Deep Sleep couldn't be implemented, therefore it is functionally
identical to Sleep (WFI).
Change-Id: Ibed2bdb452f48c98024dc7ef07fb51a4425e0a80
Signed-off-by: Bence Kaposzta <bence.kaposzta@arm.com>
This commit represents the first stage of the low power implementations
that are required from Mbed 5.10 onwards. The LP ticker has been
implemented using a CMSDK Dual Timer's both timers (HW prescaler needed
to operate in the specified frequency domain), whereas the us ticker
uses one CMSDK Timer. Besides the default hal implementations (lp_ticker.c
and us_ticker.c), the CMSDK Dual Timer's native driver needed to be added.
Change-Id: I0b16b93dfac7753bebf430a2ce77761cb9c43ee5
Signed-off-by: Bence Kaposzta <bence.kaposzta@arm.com>
`flash_get_erase_value` is added in hal/TARGET_FLASH_CMSIS_ALGO/flash_common_algo.c
duplicate copy of same function in targets/TARGET_NUVOTON/TARGET_M2351/flash_api.c
resulted in build issues with secure build
hex files subfolder moved up one level to avoid license confusion.
Removed non-TLS implementation of TRNG. Removed unused crypto libraries and headers.
Replaced Cypress copyright licence per agreement.
Removed unsed eeprom emulation middleware files.
Renamed assembler files from *.s to *.S
Removed "device_name" from targets.json definitions as it is not supoprted yet.
Exporter hooks removed completely.
Cleanup and improvements to the comments, including removal of the redundant doxygen comments.
Code run through astyle. Additionally:
- changes to drivers/Timer.cpp reverted
- ipcpipe_transport.* files removed as they are not used for now,
- fixed condition in stdio_init.cpp to perform serial initialization only when STDIO is enabled,
- added missing resurce manager call in PWM initialization,
- us_ticker initialization changed to use pre-reserved clock divider (to avoid resource manager call).
Changed reporting level from info to debug in PSOC6.py.
Added missing includes for function declarations in startup files.
Fixed (removed) garbadge text in psoc6_utils.c
Precompiled binaries updated for recent changes in psoc6_utils.c and moved to a separate folder; README and LICENSE files added.
1. In drivers/Timer.cpp make sure that hardware timer is initialized outside of critical section.
This is because on PSoC 6 hardware resources are shared between both cores
and we have to make sure that the other core is not already using a particular resource.
This mechanism is based on interprocessor communication taht cannot be handled iside of
critical section.
2. Added support for post-binary hook function for PSoC 6 targets, so the hex image for M0+ CPU core
can be merged with M4 core image for the final image.
3. Added possibility to use hook function from exportes, so the M0+ hex image could be included
in the generated project.
4. Included hex images in the build dependency list, so the update of image is catched by the
build process.
1. Complete set of HAL drivers for all peripherals of CY8C63xx PSoC chips.
2. Cypress PDL library updated to official 3.0.1 version.
3. Tree structure reorganized and cleaned up:
+ TARGET_Cypress
+--+ TARGET_PSOC6+ -> code & libs applicable to all PSoC 6 based devices
+--+ TARGET_CY86XX -> code & libs applicable to PSoC 63 based devices
| +--- TARGET_MCU_PSOC6_M0 -> code & libs applicable to PSoC6 Corted M0+ core
| +--- TARGET_MCU_PSOC6_M4 -> code & libs applicable to PSoC6 Corted M0F core
|
+--+ TARGET_FUTURE_SEQUANA -> code applicable to Sequana board, both cores
+--- TARGET_FUTURE_SEQUANA_M0 -> code applicable only to M0+ core on Sequana board
Ethernet controller. To ensure proper operation, some methods
needed to be updated in the SMSC9220's native driver as well.
It passes all related Greentea tests, however when supervised by
the Python environment it tends to fail because of Timeout.
The current timeout is set to 1200s that seems to be a little bit short
to finish all test cases, the timeout happens towards the end of the
last test case.
Change-Id: I914608c34828b493a80e133cd132537a297bfc84
Signed-off-by: Bence Kaposzta <bence.kaposzta@arm.com>
Due to buggy flow control logic in the UARTE, the stop signal
is not being set as it is supposed to when the the module is
not ready to receive data.
This commit signals the sender to halt transmitting when a DMA
buffer is full and only continue again when the atomic FIFO
buffer has been emptied. This allows platforms with hardware
flow control to minimize all buffers and rely on flow control
instead.
Only deep sleep when the wakeup time is more than
MBED_CONF_TARGET_DEEP_SLEEP_LATENCY ms in the future.
This ensures that RTOS events are handled at the correct time. Note -
when deep sleep is allow interrupt latency may still be as high as
10ms.
LPC devices require a checksummed vector table to boot. To ensure
this most programmers automatically compute the checksum when
programming flash. This causes problems with verification if the
original image does not have a checksummed vector table. This is because
when reading the data back the checksum location differs from the
original image.
To fix this verification failure this patch adds a post build hook to
checksum the vector table of the LPC54XXX. This fixes flash
verification failures due to the checksum not matching.
The preprocessor based macro check #if evaluates all
enums as 0 and hence the code does not get compiled.
Since move this to a runtime check where the pin variable
can be correctly evaluated.
Delete mbed_overrides.c as it has a target specific mbed_sdk_init() to
resolve linking problem.
This is a follow on patch to:
https://github.com/ARMmbed/mbed-os/pull/8046
Add 16-bit access mode when writing the transfer size to prevent
the QSPI transaction from starting
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Small space savings, the casting from int to float will bloat
the code a bit. Using wait(1.0f) for example would avoid it,
but seems a bit silly to use floats for anything unless
really needed (in embedded products).
While investigating the RX issue on NRF52_DK after SDK 14 updates,
it is observed that the RX FIFO doesn't get filled up, when the
flow control is disabled. Hence the readable never returns true.
If using Serial interface, the stdio file handles (0, 1, 2) get opened.
This results in configuring the flow control for STDIO, and it is observed
that the RX FIFO gets filled.
However, if RawSerial is used, the STDIO file handles
don't get opened. During the debug process it was observed that if the
flow control is configured once and then set to disabled, RX worked
as expected.
Alternative to this approach is that user application specifically
enables flow control as done in mbed's Greentea test suite. See https://goo.gl/r8nBYH
See https://goo.gl/8VB2qg step 14 for _initio's description.
See test code to reproduce the issue and test fix here: https://goo.gl/AQU1xG
Description
The change in behavior with NRF52's UART RX is documented here. #6891
This change is a fix for the above issue.
If the specified frequency exceeds the upper limit and lower limit at SPI driver, an error is output, but this does not match policy with other renesas drivers. Thus I revises the processing as follows.
- If "hz" is maximum over, it is rounded by the maximum value.
- If "hz" is minimum under, it is rounded by the minimum value.
For Arm toolchain build, Mbed 2(classic) programs occur an unexpected error if there is "#include "mem_XXXX.h"" in the script file.
It seems that the linker script can't find the include file because "mem_XXXX.h" file is not in the same path with the linker script.
(Refer to Issue #6975.)
To address this issue, I remove inclusion processing and define the related macros at ARMCC linker script file.
HEAP memory should be 4K aligned for GCC newlib, with ISR stack at the end of
RAM memory we loose 3K of RAM memory. This fix is for device with <16K RAM to
use RAM entirely.
Revert deprecation of FlashIAPBlockDevice 2 argument constructor has this was a breaking change. This follows a similar change in the external flashiap-driver repo.
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
Set the ISR stack to be 1KB. https://github.com/ARMmbed/mbed-os/pull/7238
Set the heap size to 3KB(2KB + overhead + spare) so that atleast 2KB free ram is
available for testing.
With dynamic heap size, explicit size is not required. IAR 7.8 supports
static heap, hence the change is needed in IAR linker files.
This fix avoid a long waiting loop in rtc_write function,
which was not acceptable in TICKLESS context.
Implementation comments added.
Global variable name has been updated for easier maintenance:
- LPTICKER_counter is the U32 continuous tick counter
- LPTICKER_RTC_time is the RTC time used to get the time difference
between rtc_read_lp() calls
While investigating the RX issue on NRF52_DK after SDK 14 updates,
it is observed that the RX FIFO doesn't get filled up, when the
flow control is disabled. Hence the readable never returns true.
If using Serial interface, the stdio file handles (0, 1, 2) get opened.
This results in configuring the flow control for STDIO, and it is observed
that the RX FIFO gets filled.
However, if RawSerial is used, the STDIO file handles
don't get opened. During the debug process it was observed that if the
flow control is configured once and then set to disabled, RX worked
as expected.
Alternative to this approach is that user application specifically
enables flow control as done in mbed's Greentea test suite. See https://goo.gl/r8nBYH
See https://goo.gl/8VB2qg step 14 for _initio's description.
See test code to reproduce the issue and test fix here: https://goo.gl/AQU1xG
Description
The change in behavior with NRF52's UART RX is documented here. #6891
This change is a fix for the above issue.
Currently the return value of flash_get_page_size() is 1 since the min size per one writing is 1 byte by Flash spec.
However, I noticed that this value causes a enormous write time When writing large data such as FW update.
So I revised this value to 8 byte by considering the writing time, memory alignment and memory hole.
Need to ensure the transmission has been started before sending a STOP condition.
Issue found on the NUCLEO_H743ZI due certainly to the high-speed clock used.
But this is normally needed also on all STM32 devices using the I2C peripheral version 2.
For both implementation, RTC and LPTIM, there is some delay in the
set_interrupt function due to HW constraints.
Value has been set to 4 for STM32L0,
because SystemClock is slower than other families.
When both tickless and LPTICKER_DELAY_TICKS are enabled some ST
devices randomly get stuck sleeping forever. This is because the
wake up time passed to the rtc is ignored if the previous match is
about to occur. This causes the device to get stuck in sleep.
This patch prevents matches from getting dropped by the rtc by
deactivating the rtc wake up timer before setting a new value.
Events leading up to this failure for the RTC:
-1st call to lp_ticker_set_interrupt
-delay until ticker interrupt is about to fire
-2nd call to lp_ticker_set_interrupt
-interrupt for 1st call fires and match time for 2nd call is dropped
-LowPowerTickerWrapper gets ticker interrupt but treats it as a
spurious interrupt and drops it since it comes in too early
-device enters sleep without a wakeup source and locks up
1, edit "targets.json" to let "REALTEK_RTL8195AM" target inherit from "MCU_RTL8195A"
2, change file structures for folder "Target_Realtek"
3, add "PeripheralPins.h" and "PeripheralPins.c"
Date is managed only by SW
within CUBE functions HAL_RTC_GetDate and HAL_RTC_SetDate.
They are then replaced by functions that saved counters in HW registers.
RTC_ReadTimeCounter and RTC_WriteTimeCounter are then added to the ST API.
pwmout:
Used SystemCoreClock
Serial fuart:
SERIAL_5 & SERIAL_3 have same CTS pin (PA7), only function register is different (4 & 2).
pinmap_peripheral() will always return first match from the map.
Hence changed as, if SERIAL_5 is used, then pinmap_peripheral() should return SERIAL_5 (function register 2 to be set).
MTU2(Multi function Timer pulse Unit 2) can create the low freaquency.
Currently GR-LYCHEE uses MTU2 channel 3 for LPTicker, but I noticed that a part of it is used by another function.
Thus, I changed MTU2 channel number for LPTicker to 2.
I changed _page_program() func because "buf" which is an argument of data_send() for writing must be a RAM address in order to operate in SPI mode.
(ex: if it is ROM table data, writing will be failure.)
Also, I changed the period of interrupt disable/enable at _page_program() func and _sector_erase() func because lock period is too long.
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
TB_SENSE_12 would have been left behind by the changes in #7778. This commit implements the changes in mbed to allow targets to provide a default network interface for Silicon Labs targets.
To enable the feature US_TICKER, file is newly implemented with Timer B, which has proper clock prescale and free running after match interrupt.
Old us_ticker driver file (Timer A) is producing up to 100us tolerance, which causes to fail US_TICKER feature.
Hence, changed the peripheral ticker A to B.
Use the `mbed_sdk_inited` flag to correct the `HAL_GetTick()` behavior
after waking up from deep sleep mode. `ticker_read_us()` must not be
used to read us_ticker timestamp after waking up until the us_ticker
context is restored. More detailed description in issue #8117.
Fixes#8117
1. Add Pin defines for missing PWM pins
2. Update the hal to account for the number of PWM instances
3. Fix the register reload policy
4. Configure the XBAR to put the PWM fault inputs in inactive state
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Replace wait_us with nu_busy_wait_us in lp_ticker since wait_us is not allowed in sleep test
which would suspend us ticker layer on which wait_us relies. nu_busy_wait_us is implemented
by calling us ticker HAL API directly rather than relying on us ticker layer.
If us_ticker/lp_ticker is scheduled and then the interrupt is disabled, the originally scheduled
interrupt may still become pending. If this occurs, then an interrupt will fire twice on the next
call to us_ticker_set_interrupt/lp_ticker_set_interrupt - once immediately and then a second time
at the appropriate time.
This patch prevents the first interrupt by clearing interrupts in
us_ticker_set_interrupt/lp_ticker_set_interrupt before calling NVIC_EnableIRQ.
There are scenarios where putc is called within a critical section, e.g
to log ASSERTs in early initialization code. The interrupts being
disabled here prevents the handlers for the UARTE from executing.
This breaks the tx_in_progress flag based approach. The tx_in_progress
never gets reset. Poll on the TXDRDY instead.
It can be recreated with a simple program as shown here:
*************** Current Behavior ****************
++ MbedOS Error Info ++
Error Status: 0x80FF0100 Code: 256 Module: 255
Error Message: F
************** With Fix *************************
++ MbedOS Error Info ++
Error Status: 0x80FF0100 Code: 256 Module: 255
Error Message: Fatal Run-time error
Location: 0x2C0A9
Error Value: 0x0
Current Thread: Id: 0x20005520 Entry: 0x30EBF StackSize: 0x1000 StackMem: 0x20004520 SP: 0x20005490
For more info, visit: https://armmbed.github.io/mbedos-error/?error=0x80FF0100
-- MbedOS Error Info --
nrf failure at .\main.cpp:22
***************************************************
Add the target config option "boot-stack-size" which is passed to the
linker as the define "MBED_BOOT_STACK_SIZE" so the linker can
adjust the stack accordingly. On mbed 2 the boot stack becomes the
main stack after boot. On mbed 5 the boot stack becomes the
ISR stack after boot. Because of these different uses the stack size
for mbed 2 is set to 4K by default while on mbed 5 it is set to 1k.
Additionally, the NRF5X family requires a larger interrupt stack size
due to the softdevice so the size is increased to 2k on mbed 5 builds.
Depending on initial size allocated on STM32L4 devices with
TWO_RAM_REGIONS set a crash may occur. This is because there is a
mismatch between the size newlib is expecting and the size actually
returned by _sbrk. This is because the STM32L4 implementation of _sbrk
is performing alignment internally.
This patch fixes this problem by removing the code in __wrap__sbrk
which performs the alignment.
1. Modify PinMode enum to fully support GPIO I/O modes.
2. Translate input pull mode/direction to I/O mode, where H/W doesn't support
separate configuration for input pull mode/direction.
3. Allow for configuring I/O mode in addition to input pull mode.
The code is written such that access to the data input/output happens word-by-word, and that means unaligned access is fine (though with a performance loss) on Cortex-M3/M4 devices.
This will be part of custom instruction transfer, the flow will be:
1. write data
2. wait for transfer to complete (poll status register from the memory device)
1. Added a flag to issue START command
2. Do not send START command inside i2c_start function as
the LPI2C hardware will issue a STOP on reception
of a NACK
3. Remove the i2c_address global variable, this is not
required
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Remove the repeated_start flag and code as this is not needed
for the LPI2C module
2. Enable the SION bit on the I2C pins
3. Enable 22K Pullup option of the I2C pins
4. Update the 0 byte write implementation to ensure the START
command gets flushed out of the FIFO
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Deleted lines that caused the problem. Note that, in nrf_drv_pwm_init there are lines that check if pwm instance is already running, so we don't even need to check it in nordic_pwm_init.
nrf_drv_uninit should be used in nordic_pwm_restart.
Correctly detect and handle the low power run mode when entering and exiting sleep mode.
The generic `hal_sleep` implementation tries to exit LPR mode always, resulting in a spin-loop during a critical section (disabled IRQ).
The new approach returns from LPR to Run mode if enabled (LPR bit set), enters sleep, and resets to the original state on wakeup (WFI).
As suggested by Russ Butler in mbed-os issue #7328, and until there is an
implementation of mbed-os issue #4408, we are implementing a workaround
at HAL level to check if there is any ongoing serial transfer (which happens
if HW FIFO is not yet empty).
In case a transfer is ongoing, we're not entering deep sleep and
return immediately.
The period of pwm we could get was limited to 69.9 ms, because prescaler value was set once only during initialization. base->mod is a 16 bit register, to get longer period we have to slow down the clk.
SKIP_SYSCLK_INIT prevents reinitializing the SYS_CLK PLL used by SDRAM.
This PLL is setup during bootup by the ROM code.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Low power functions related to powering off FLEXSPI and SDRAM needs
to be copied to internal memory
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
* align MPS2_M0 FVP target with other MPS2 targets
* moved memory_zones.h
* chnage the flash_api.c where referencing the old memory_zones
* modify mbed_rtx.h to use the memory_zones definations as INITIAL_SP
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
* added memory_zones.h
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
* added memory_zones.h
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
* added memory_zones.h
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
* added memory_zones.h
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
This PR provides implementation of ticker_free() function for the following boards:
ARCH_PRO
EV_COG_AD3029LZ
EV_COG_AD4050LZ
K22F
K64F
K82F
KW24D
KW41Z
LPC546XX
NRF51_DK
NRF52_DK
NUCLEO_F207ZG
NUCLEO_F401RE
NUCLEO_F429ZI
NUCLEO_F746ZG
REALTEK_RTL8195AM
I modified the _page_program() because when the request of the size exceeding the maximum size(256 byte) per one writing of Flash recieved, it was not able to loop the writing with sifting the address every 256 byte.
Also I modified the return value of flash_get_page_size() because I found that the minimum size per one writing of Flash is 1 byte by reviewing Flash spec.
"FLASH_PAGE_SIZE" macro's value is remain 256, it doesn't be used at flash_get_page_size(), used at _page_program() for refferencing of the maximum page size.
Although other venders implement this feature by using RTC, in my H/W(RZ_A1), I cannot use RTC because it does not satisfy the spec of LP Ticker (ms order and low frequency between 8 KHz and 64 KHz).
Therefore I implemented this feature by creating 1024 division by MTU2(Multi function Timer pulse Unit 2) in order to satisfy this spec.
As a result of investigating, the most unaffected channel among MTU2 placed on GR-PEACH and GR-LYCHEE was channel 3, so I use channel 3 for this feature.
- mbed_drv_cfg.h
I added a macro of MTU2 channel to this file for commonalizing code for GR-PEACH and GR-LYCHEE, and referenced it's macro at us_ticker.c.
- targets.json
I added a macro for enabling LP Ticker.
- mtu2.c mtu2.h
I defined fuction of MTU2's clock supply and stop.
Because MTU2 is utilized by pwm driver too, those function were referenced at lp_ticker driver and pwm driver.
- lp_ticker.c lp_ticker_init()
In order to satisfy the LP Ticker spec, I implemented by creating 1024 division by MTU2.
When an interrupt is required, it will be set with ticker_set_interrupt().
- lp_ticker.c lp_ticker_free()
This function stops the counting and powerdown the lp_ticker.
- lp_ticker.c lp_read()
This function returns the timer counter of MTU2.
- lp_ticker.c lp_ticker_set_interrupt()
In order to satisfy specifications, I implemented lp_ticker_set_interrupt() function.
- lp_ticker.c lp_ticker_fire_interrupt()
In order to satisfy spec, I implemented lp_ticker_fire_interrupt() function.
Also I added GIC_EnableIRQ for allowing the interrupt at end of function.
- lp_ticker.c lp_ticker_get_info()
To satisfy the spec, I implemented lp_ticker_get_info() function. The value of freq includes rounding off.
i2c_api implementation for NRF52 does a disable() followed by uninit().
The uniinit() implementation in NRF drivers layer makes another call to
disable. This throws off the state of the I2C instance leading to an
assert. Since the disable is only invoked from the I2C API layer for
Nordic, remove this redundant call.
Signed-off-by: Naveen Kaje <Naveen.Kaje@arm.com>
The ITM must be initialized before the SoftDevice, but due to the
lazy initialization in C++ on (at least) GCC the ITM init call
might happen too late.
This commit moves the initialization code into the NRF52 system
startup file.
1. Rename m2351_stddriver_sup.h/c to stddriver_secure.h/.c for naming consistency
2. Add hal_secure.h to include hal-exported secure functions
3. Change return/argument type in secure functions:
(1) Change int to int32_t
(2) Change PinName to int32_t
(3) Change time_t to int64_t
4. Update secure lib/bin accordingly
1. Power down RTC access from CPU domain in rtc_free. After rtc_free, RTC gets
inaccessible from CPU domain but keeps counting.
2. Fix RTC cannot cross reset cycle.
To initialize/uninitialize H/W module, we need to control secure SYS/CLK regions through secure functions.
For a new thread to call these secure functions, we need to allocate secure context for it.
Mahesh Mahadevan
Bence Kaposzta
Oren Cohen
Cruz Monrreal II
Teppo Järvelin
Yoshihiro TSUBOI
Steve Cartmell
shileiyu
Deepika
Qinghao Shi
Martin Kojtal
Adam Heinrich
jeromecoutant
David Saada
Leon Lindenfelser
Ganesh Ramachandran
Leszek Rusinowicz
Adrien Chardon
bcostm
Ammad Rehmat
Marcus Chang
Yossi Levy
Russ Butler
micgur01
Naveen Kaje
Jarkko Paso
Offir Kochalsky
Ashok Rao
Mac Lobdell
aqin
Janne Kiiskila
ccli8
Lu
Anna Bridge
TomoYamanaka
Amanda Butler
Brian Daniels
Juho Eskeli
Eman869
zzw
cedrick kukela
Markus Siglreithmaier
alrodlim
Steven
Andrew Leech
Filip Jagodzinski
thesupershan
Aleshandre Diaz
mattbrown015
Cesar
Kari Haapalehto
Michael Kaplan
Maciej Bocianski
Seppo Takalo
Jammu Kekkonen
Wajahat Abbas
justinkim
Edmund Hsu
Steven Cooreman
Fred.Li
ben
adustm
Martin Kojtal
Senthil Ramakrishnan
Simo Sillankorva
Jiwon Yune
MateuszM
Mika Leppänen
Mirela Chirica
Laurent Meunier
Jiwon Yune
Przemyslaw Stekiel
mudassar-ublox
Nis Madsen
cyliangtw
PHST
Keyur Hariya
RFulchiero