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DISCO_L496AG : enable ADC 

See User Manual, VREF+ is not connected by default

NB: Use 2.5V as reference (instead of 3.3V)
for internal channels calculation
pull/8168/head
jeromecoutant 2018-09-18 11:56:08 +02:00
parent 3da606e586
commit f510efff38
1 changed files with 12 additions and 1 deletions
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13
targets/TARGET_STM/TARGET_STM32L4/analogin_device.c
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@ -83,12 +83,23 @@ void analogin_init(analogin_t *obj, PinName pin)
obj->handle.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; // DR register is overwritten with the last conversion result in case of overrun
obj->handle.Init.OversamplingMode = DISABLE; // No oversampling
#if defined(TARGET_DISCO_L496AG)
/* VREF+ is not connected to VDDA by default */
/* Use 2.5V as reference (instead of 3.3V) for internal channels calculation */
__HAL_RCC_SYSCFG_CLK_ENABLE();
HAL_SYSCFG_VREFBUF_VoltageScalingConfig(SYSCFG_VREFBUF_VOLTAGE_SCALE1); /* VREF_OUT2 = 2.5 V */
HAL_SYSCFG_VREFBUF_HighImpedanceConfig(SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE);
if (HAL_SYSCFG_EnableVREFBUF() != HAL_OK) {
error("HAL_SYSCFG_EnableVREFBUF issue\n");
}
#endif /* TARGET_DISCO_L496AG */
// Enable ADC clock
__HAL_RCC_ADC_CLK_ENABLE();
__HAL_RCC_ADC_CONFIG(RCC_ADCCLKSOURCE_SYSCLK);
if (HAL_ADC_Init(&obj->handle) != HAL_OK) {
error("Cannot initialize ADC");
error("Cannot initialize ADC\n");
}
// ADC calibration is done only once