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Renesas: Fix alignment of execute region to 8-byte boundary 

--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
pull/8024/head
Deepika 2018-09-19 10:13:11 -05:00 committed by deepikabhavnani
parent 2a8ae84cb1
commit d120222b6c
5 changed files with 30 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct
View File

@ -52,7 +52,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE ; load region size_region
RAM_CODE 0x20020000
{ * (RAM_CODE) } ; Application RAM_CODE
RW_DATA +0 ALIGN 0x4
RW_DATA +0 ALIGN 0x8
{ * (+RW) } ; Application RW data (.data)
RW_IRAM1 +0 ALIGN 0x10

20
targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_GCC_ARM/RZA1LU.ld
View File

@ -117,7 +117,7 @@ SECTIONS
.copy.table :
{
. = ALIGN(4);
. = ALIGN(8);
__copy_table_start__ = .;
LONG (__etext)
LONG (__data_start__)
@ -133,7 +133,7 @@ SECTIONS
.zero.table :
{
. = ALIGN(4);
. = ALIGN(8);
__zero_table_start__ = .;
LONG (__bss_start__)
LONG (__bss_end__ - __bss_start__)
@ -142,7 +142,7 @@ SECTIONS
__zero_table_end__ = .;
} > SFLASH
.ram_code : ALIGN( 0x4 ) {
.ram_code : ALIGN( 0x8 ) {
__ram_code_load = .;
__ram_code_start = LOADADDR(.ram_code) + ( __ram_code_load - ADDR(.ram_code) );
@ -150,7 +150,7 @@ SECTIONS
*(RAM_CONST)
. = ALIGN( 0x4 );
. = ALIGN( 0x8 );
__ram_code_end = LOADADDR(.ram_code) + ( . - ADDR(.ram_code) );
} > RAM AT > SFLASH
@ -175,13 +175,13 @@ SECTIONS
*(.data*)
Image$$RW_DATA$$Limit = .;
. = ALIGN(4);
. = ALIGN(8);
/* preinit data */
PROVIDE (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(4);
. = ALIGN(8);
/* init data */
PROVIDE (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
@ -189,14 +189,14 @@ SECTIONS
PROVIDE (__init_array_end = .);
. = ALIGN(4);
. = ALIGN(8);
/* finit data */
PROVIDE (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE (__fini_array_end = .);
. = ALIGN(4);
. = ALIGN(8);
/* All data end */
__data_end__ = .;
@ -245,7 +245,7 @@ SECTIONS
__nc_data_start = .;
*(NC_DATA)
. = ALIGN(4);
. = ALIGN(8);
__nc_data_end = .;
Image$$RW_DATA_NC$$Limit = .;
} > RAM_NC
@ -256,7 +256,7 @@ SECTIONS
__nc_bss_start = .;
*(NC_BSS)
. = ALIGN(4);
. = ALIGN(8);
__nc_bss_end = .;
Image$$ZI_DATA_NC$$Limit = .;
} > RAM_NC

2
targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct
View File

@ -52,7 +52,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE ; load region size_region
RAM_CODE 0x20020000
{ * (RAM_CODE) } ; Application RAM_CODE
RW_DATA +0 ALIGN 0x4
RW_DATA +0 ALIGN 0x8
{ * (+RW) } ; Application RW data (.data)
RW_IRAM1 +0 ALIGN 0x10

20
targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_GCC_ARM/RZA1H.ld
View File

@ -117,7 +117,7 @@ SECTIONS
.copy.table :
{
. = ALIGN(4);
. = ALIGN(8);
__copy_table_start__ = .;
LONG (__etext)
LONG (__data_start__)
@ -133,7 +133,7 @@ SECTIONS
.zero.table :
{
. = ALIGN(4);
. = ALIGN(8);
__zero_table_start__ = .;
LONG (__bss_start__)
LONG (__bss_end__ - __bss_start__)
@ -142,7 +142,7 @@ SECTIONS
__zero_table_end__ = .;
} > SFLASH
.ram_code : ALIGN( 0x4 ) {
.ram_code : ALIGN( 0x8 ) {
__ram_code_load = .;
__ram_code_start = LOADADDR(.ram_code) + ( __ram_code_load - ADDR(.ram_code) );
@ -150,7 +150,7 @@ SECTIONS
*(RAM_CONST)
. = ALIGN( 0x4 );
. = ALIGN( 0x8 );
__ram_code_end = LOADADDR(.ram_code) + ( . - ADDR(.ram_code) );
} > RAM AT > SFLASH
@ -175,13 +175,13 @@ SECTIONS
*(.data*)
Image$$RW_DATA$$Limit = .;
. = ALIGN(4);
. = ALIGN(8);
/* preinit data */
PROVIDE (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(4);
. = ALIGN(8);
/* init data */
PROVIDE (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
@ -189,14 +189,14 @@ SECTIONS
PROVIDE (__init_array_end = .);
. = ALIGN(4);
. = ALIGN(8);
/* finit data */
PROVIDE (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE (__fini_array_end = .);
. = ALIGN(4);
. = ALIGN(8);
/* All data end */
__data_end__ = .;
@ -245,7 +245,7 @@ SECTIONS
__nc_data_start = .;
*(NC_DATA)
. = ALIGN(4);
. = ALIGN(8);
__nc_data_end = .;
Image$$RW_DATA_NC$$Limit = .;
} > RAM_NC
@ -256,7 +256,7 @@ SECTIONS
__nc_bss_start = .;
*(NC_BSS)
. = ALIGN(4);
. = ALIGN(8);
__nc_bss_end = .;
Image$$ZI_DATA_NC$$Limit = .;
} > RAM_NC

16
targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_GCC_ARM/VKRZA1H.ld
View File

@ -114,7 +114,7 @@ SECTIONS
.copy.table :
{
. = ALIGN(4);
. = ALIGN(8);
__copy_table_start__ = .;
LONG (__etext)
LONG (__data_start__)
@ -127,7 +127,7 @@ SECTIONS
.zero.table :
{
. = ALIGN(4);
. = ALIGN(8);
__zero_table_start__ = .;
LONG (__bss_start__)
LONG (__bss_end__ - __bss_start__)
@ -153,13 +153,13 @@ SECTIONS
*(.data*)
Image$$RW_DATA$$Limit = .;
. = ALIGN(4);
. = ALIGN(8);
/* preinit data */
PROVIDE (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(4);
. = ALIGN(8);
/* init data */
PROVIDE (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
@ -167,14 +167,14 @@ SECTIONS
PROVIDE (__init_array_end = .);
. = ALIGN(4);
. = ALIGN(8);
/* finit data */
PROVIDE (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE (__fini_array_end = .);
. = ALIGN(4);
. = ALIGN(8);
/* All data end */
__data_end__ = .;
@ -223,7 +223,7 @@ SECTIONS
__nc_data_start = .;
*(NC_DATA)
. = ALIGN(4);
. = ALIGN(8);
__nc_data_end = .;
Image$$RW_DATA_NC$$Limit = .;
} > RAM_NC
@ -234,7 +234,7 @@ SECTIONS
__nc_bss_start = .;
*(NC_BSS)
. = ALIGN(4);
. = ALIGN(8);
__nc_bss_end = .;
Image$$ZI_DATA_NC$$Limit = .;
} > RAM_NC