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rtl8195am lib updates 

1, rtl8195am lib updates. Preparation for the low power features.
pull/8014/head
zzw 2018-09-06 14:28:34 +08:00
parent 201ec14d45
commit b06553fa25
80 changed files with 6403 additions and 6977 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/PinNames.h
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@ -216,9 +216,7 @@ typedef enum {
D15 = PB_2,
D16 = PA_1,
D17 = PA_0,
D18 = PE_5,
SPI_PERSISTENT_MEM_CS = D9
D18 = PE_5
} PinName;

32
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/analogin_api.c
View File

@ -41,8 +41,11 @@ void analogin_init (analogin_t *obj, PinName pin)
HAL_ADC_INIT_DAT HalADCInitDataTmp;
PHAL_ADC_INIT_DAT pHalADCInitDataTmp = &HalADCInitDataTmp;
/* To backup user config first */
#if defined(CONFIG_MBED_ENABLED)
_memset(&(obj->HalADCInitData), 0, sizeof(HAL_ADC_INIT_DAT));
#endif
_memcpy(pHalADCInitDataTmp, &(obj->HalADCInitData), sizeof(HAL_ADC_INIT_DAT));
_memset(obj, 0x00, sizeof(analogin_t));
@ -92,17 +95,13 @@ void analogin_init (analogin_t *obj, PinName pin)
pSalADCHND->pUserCB = pSalADCMngtAdpt->pUserCB;
/*To assign user callback pointers*/
pSalADCMngtAdpt->pUserCB->pTXCB = pSalADCUserCBAdpt;
pSalADCMngtAdpt->pUserCB->pTXCCB = (pSalADCUserCBAdpt+1);
pSalADCMngtAdpt->pUserCB->pRXCB = (pSalADCUserCBAdpt+2);
pSalADCMngtAdpt->pUserCB->pRXCCB = (pSalADCUserCBAdpt+3);
pSalADCMngtAdpt->pUserCB->pRDREQCB = (pSalADCUserCBAdpt+4);
pSalADCMngtAdpt->pUserCB->pERRCB = (pSalADCUserCBAdpt+5);
pSalADCMngtAdpt->pUserCB->pDMATXCB = (pSalADCUserCBAdpt+6);
pSalADCMngtAdpt->pUserCB->pDMATXCCB = (pSalADCUserCBAdpt+7);
pSalADCMngtAdpt->pUserCB->pDMARXCB = (pSalADCUserCBAdpt+8);
pSalADCMngtAdpt->pUserCB->pDMARXCCB = (pSalADCUserCBAdpt+9);
pSalADCMngtAdpt->pUserCB->pRXCB = pSalADCUserCBAdpt;
pSalADCMngtAdpt->pUserCB->pRXCCB = (pSalADCUserCBAdpt+1);
pSalADCMngtAdpt->pUserCB->pERRCB = (pSalADCUserCBAdpt+2);
pSalADCMngtAdpt->pUserCB->pIDMARXCCB= (pSalADCUserCBAdpt+3);
pSalADCMngtAdpt->pUserCB->pDMARXCB = (pSalADCUserCBAdpt+4);
pSalADCMngtAdpt->pUserCB->pDMARXCCB = (pSalADCUserCBAdpt+5);
/* Set ADC Device Number */
pSalADCHND->DevNum = adc_idx;
@ -136,9 +135,13 @@ float analogin_read(analogin_t *obj)
uint8_t AnaloginIdx = 0;
uint32_t AnalogDat = 0;
#if defined(CONFIG_MBED_ENABLED)
//no auto-calibration implemented yet, uses hard coded calibrate
uint32_t Offset = 0x2980;
uint32_t AnalogDatFull = 0xAA00;
#else
uint32_t AnalogDatFull = 0;
#endif
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
PSAL_ADC_HND pSalADCHND = NULL;
@ -152,7 +155,12 @@ float analogin_read(analogin_t *obj)
AnalogDat = AnaloginTmp[(AnaloginIdx/2)];
AnalogDat = (AnalogDat & AnaloginDatMsk);
AnalogDat = (AnalogDat>>((u32)(16*(AnaloginIdx&0x01))));
#if defined(CONFIG_MBED_ENABLED)
AnalogDat -= Offset;
#else
AnalogDatFull = 0xCE80;
#endif
value = (float)(AnalogDat) / (float)(AnalogDatFull);
return (float)value;

2
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/analogout_api.c
View File

@ -26,6 +26,8 @@
#define DAC_POSITIVE_FULL_SCALE 0x7E0
#define DAC_NEGATIVE_FULL_SCALE 0x820
extern void HalDACPinMuxInit(void *Data);
extern void HalDACPinMuxDeInit(void *Data);
/** \brief analogout_init:\n
* to initialize DAC

BIN
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/lib_peripheral_mbed_arm.ar
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targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/lib_wlan_mbed_arm.ar
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targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/lib_peripheral_mbed_gcc.a
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targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/lib_wlan_mbed_gcc.a
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targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/lib_peripheral_mbed_iar.a
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targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/lib_wlan_mbed_iar.a
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57
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/platform_autoconf.h
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@ -18,9 +18,7 @@
/*
* Target Platform Selection
*/
#define CONFIG_WITHOUT_MONITOR 1
#undef CONFIG_RTL8195A
#undef CONFIG_RTL8195A
#define CONFIG_RTL8195A 1
#undef CONFIG_FPGA
#undef CONFIG_RTL_SIM
@ -54,12 +52,21 @@
#undef CONFIG_IMAGE_AUTO_LOAD
//#undef CONFIG_IMAGE_PAGE_LOAD
//#define CONFIG_IMAGE_AUTO_LOAD 1
#define CONFIG_BOOT_TO_UPGRADE_IMG2 1
#undef CONFIG_BOOT_TO_UPGRADE_IMG2
#undef CONFIG_PERI_UPDATE_IMG
#define CONFIG_BOOT_FROM_JTAG 1
#undef CONFIG_ALIGNMENT_EXCEPTION_ENABLE
#define CONFIG_KERNEL 1
#define PLATFORM_FREERTOS 1
#define CONFIG_MBED_ENABLED 1
#if defined(CONFIG_MBED_ENABLED)
#undef PLATFORM_FREERTOS
#define PLATFORM_CMSIS_RTOS 1
#endif
#undef PLATFORM_UCOSII
#undef PLATFORM_ECOS
#undef CONFIG_TASK_SCHEDUL_DIS
@ -73,7 +80,11 @@
#define CONFIG_WDG 1
#undef CONFIG_WDG_NON
#define CONFIG_WDG_NORMAL 1
#define CONFIG_GDMA_EN 0
#undef CONFIG_WDG_TEST
#define CONFIG_WDG_MODULE 1
#define CONFIG_GDMA_EN 1
#define CONFIG_GDMA_NORMAL 1
#undef CONFIG_GDMA_TEST
#define CONFIG_GDMA_MODULE 1
@ -85,6 +96,7 @@
#define CONFIG_GPIO_NORMAL 1
#undef CONFIG_GPIO_TEST
#define CONFIG_GPIO_MODULE 1
#if defined(CONFIG_INIC) || (CONFIG_SDIOD)
#define CONFIG_SDIO_DEVICE_EN 1
#define CONFIG_SDIO_DEVICE_NORMAL 1
@ -107,6 +119,10 @@
#define DWC_HOST_ONLY 1
#define CONFIG_USB_HOST_ONLY 1
#endif
#undef CONFIG_SDIO_HOST_EN
#undef CONFIG_USB_EN
#define CONFIG_SPI_COM_EN 1
#define CONFIG_SPI_COM_NORMAL 1
#undef CONFIG_SPI_COM_TEST
@ -121,24 +137,31 @@
#define CONFIG_I2C_MODULE 1
#undef CONFIG_DEBUG_LOG_I2C_HAL
#undef CONFIG_PCM_EN
#undef CONFIG_I2S_EN
#undef CONFIG_I2S_NORMAL
#define CONFIG_I2S_EN 1
#define CONFIG_I2S_NORMAL 1
#undef CONFIG_I2S_TEST
#undef CONFIG_I2S_MODULE
#define CONFIG_I2S_MODULE 1
#undef CONFIG_DEBUG_LOG_I2S_HAL
#undef CONFIG_NFC_EN
#undef CONFIG_NFC_NORMAL
#undef CONFIG_NFC_TEST
#undef CONFIG_NFC_MODULE
// power saving enable
#define CONFIG_SOC_PS_EN 1
#define CONFIG_SOC_PS_NORMAL 1
#undef CONFIG_SOC_PS_TEST
//#define CONFIG_SOC_PS_MODULE 1
#define CONFIG_SOC_PS_MODULE 1
#define CONFIG_CRYPTO_EN 1
#define CONFIG_CRYPTO_NORMAL 1
#undef CONFIG_CRYPTO_TEST
#define CONFIG_CRYPTO_MODULE 1
#define CONFIG_MII_EN 1
//#define CONFIG_MII_EN 1
#undef CONFIG_MII_EN
#define CONFIG_PWM_EN 1
#define CONFIG_PWM_NORMAL 1
#undef CONFIG_PWM_TEST
@ -186,19 +209,13 @@
#define CONFIG_UART_LOG_HISTORY 1
#undef CONFIG_CONSOLE_NORMALL_MODE
#define CONFIG_CONSOLE_VERIFY_MODE 1
#undef CONFIG_DEBUG_LOG
//#undef CONFIG_DEBUG_LOG
#define CONFIG_DEBUG_LOG 1
#define CONFIG_DEBUG_ERR_MSG 1
#undef CONFIG_DEBUG_WARN_MSG
#undef CONFIG_DEBUG_INFO_MSG
/*
* < SDK Option Config
*/
//#undef CONFIG_MBED_ENABLED
#ifdef CONFIG_MBED_ENABLED
#undef PLATFORM_FREERTOS
#define PLATFORM_CMSIS_RTOS 1
#endif
#undef CONFIG_APP_DEMO
/*

227
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/platform_opts.h
View File

@ -37,8 +37,9 @@ limitations under the License.
#define SUPPORT_INTERACTIVE_MODE 0//on/off wifi_interactive_mode
#define CONFIG_LOG_SERVICE_LOCK 0
#define CONFIG_LOG_USE_HS_UART 0 //command/log via highspeed uart
#define CONFIG_LOG_USE_I2C 0 //command/log via I2C
#define CONFIG_ATCMD_MP 0 //support MP AT command
#define USE_MODE 1 //for test
#endif
/**
@ -65,6 +66,7 @@ limitations under the License.
*/
#define AP_SETTING_SECTOR 0x000FE000
#define UART_SETTING_SECTOR 0x000FC000
#define SPI_SETTING_SECTOR 0x000FC000
#define FAST_RECONNECT_DATA (0x80000 - 0x1000)
/**
@ -75,6 +77,8 @@ limitations under the License.
#define CONFIG_LWIP_LAYER 1
#define CONFIG_INIT_NET 1 //init lwip layer when start up
#define CONFIG_WIFI_IND_USE_THREAD 0 // wifi indicate worker thread
#define CONFIG_ENABLE_AP_POLLING_CLIENT_ALIVE 1 // on or off AP POLLING CLIENT
//on/off relative commands in log service
#define CONFIG_SSL_CLIENT 0
@ -95,6 +99,11 @@ limitations under the License.
/* For WPS and P2P */
#define CONFIG_ENABLE_WPS 0
#define CONFIG_ENABLE_P2P 0
#if CONFIG_ENABLE_WPS
#define CONFIG_ENABLE_WPS_DISCOVERY 1
#endif
#if CONFIG_ENABLE_P2P
#define CONFIG_ENABLE_WPS_AP 1
#undef CONFIG_WIFI_IND_USE_THREAD
@ -104,6 +113,17 @@ limitations under the License.
#error "If CONFIG_ENABLE_P2P, need to define CONFIG_ENABLE_WPS_AP 1"
#endif
/* For SSL/TLS */
#define CONFIG_USE_POLARSSL 0
#define CONFIG_USE_MBEDTLS 1
#if ((CONFIG_USE_POLARSSL == 0) && (CONFIG_USE_MBEDTLS == 0)) || ((CONFIG_USE_POLARSSL == 1) && (CONFIG_USE_MBEDTLS == 1))
#undef CONFIG_USE_POLARSSL
#define CONFIG_USE_POLARSSL 1
#undef CONFIG_USE_MBEDTLS
#define CONFIG_USE_MBEDTLS 0
#endif
/* For Simple Link */
#define CONFIG_INCLUDE_SIMPLE_CONFIG 1
@ -125,6 +145,9 @@ limitations under the License.
#endif //end of #if CONFIG_WLAN
/*******************************************************************************/
/* For LWIP configuration */
#define CONFIG_LWIP_DHCP_COARSE_TIMER 60
/**
* For Ethernet configurations
*/
@ -166,6 +189,10 @@ limitations under the License.
#endif
/******************End of iNIC configurations*******************/
/* for CoAP example*/
#define CONFIG_EXAMPLE_COAP 0
/* For aj_basic_example */
#define CONFIG_EXAMPLE_AJ_BASIC 0
@ -214,6 +241,12 @@ limitations under the License.
/* For http download example */
#define CONFIG_EXAMPLE_HTTP_DOWNLOAD 0
/* For httpc example */
#define CONFIG_EXAMPLE_HTTPC 0
/* For httpd example */
#define CONFIG_EXAMPLE_HTTPD 0
/* For tcp keepalive example */
#define CONFIG_EXAMPLE_TCP_KEEPALIVE 0
@ -232,6 +265,96 @@ limitations under the License.
#define FATFS_DISK_SD 1
#define CONFIG_EXAMPLE_CODEC_SGTL5000 1
#endif
/* For audio mp3 pcm example */
#define CONFIG_EXAMPLE_AUDIO_MP3 0
#if CONFIG_EXAMPLE_AUDIO_MP3
#define FATFS_DISK_SD 1
#define CONFIG_EXAMPLE_MP3_STREAM_SGTL5000 1
#endif
/* For audio m4a example */
#define CONFIG_EXAMPLE_AUDIO_M4A 0
#if CONFIG_EXAMPLE_AUDIO_M4A
#define CONFIG_EXAMPLE_M4A_FROM_HTTP 1 // 1: From HTTP, 0: From SDCARD
#define FATFS_DISK_SD 1
#undef CONFIG_INCLUDE_SIMPLE_CONFIG
#define CONFIG_INCLUDE_SIMPLE_CONFIG 0
#undef SUPPORT_MP_MODE
#define SUPPORT_MP_MODE 0
#if (CONFIG_EXAMPLE_M4A_FROM_HTTP == 0)
#undef CONFIG_WLAN
#define CONFIG_WLAN 0
#undef CONFIG_EXAMPLE_WLAN_FAST_CONNECT
#define CONFIG_EXAMPLE_WLAN_FAST_CONNECT 0
#undef SUPPORT_LOG_SERVICE
#define SUPPORT_LOG_SERVICE 0
#else
#undef FAST_RECONNECT_DATA
#define FAST_RECONNECT_DATA (0x200000-0x1000)
#endif
#endif
/* For audio m4a example */
#define CONFIG_EXAMPLE_AUDIO_M4A_SELFPARSE 0
#if CONFIG_EXAMPLE_AUDIO_M4A_SELFPARSE
#define FATFS_DISK_SD 1
#undef CONFIG_INCLUDE_SIMPLE_CONFIG
#define CONFIG_INCLUDE_SIMP LE_CONFIG 0
#undef SUPPORT_MP_MODE
#define SUPPORT_MP_MODE 0
#undef CONFIG_WLAN
#define CONFIG_WLAN 0
#undef CONFIG_EXAMPLE_WLAN_FAST_CONNECT
#define CONFIG_EXAMPLE_WLAN_FAST_CONNECT 0
#undef SUPPORT_LOG_SERVICE
#define SUPPORT_LOG_SERVICE 0
#endif
/* For m4a,mp3 combined example */
#define CONFIG_EXAMPLE_AUDIO_M4A_MP3 0
#if CONFIG_EXAMPLE_AUDIO_M4A_MP3
#define FATFS_DISK_SD 1
#undef CONFIG_WLAN
#define CONFIG_WLAN 0
#undef CONFIG_EXAMPLE_WLAN_FAST_CONNECT
#define CONFIG_EXAMPLE_WLAN_FAST_CONNECT 0
#undef CONFIG_INCLUDE_SIMPLE_CONFIG
#define CONFIG_INCLUDE_SIMPLE_CONFIG 0
#undef SUPPORT_LOG_SERVICE
#define SUPPORT_LOG_SERVICE 0
#undef SUPPORT_MP_MODE
#define SUPPORT_MP_MODE 0
#endif
/* For audio amr example */
#define CONFIG_EXAMPLE_AUDIO_AMR 0
#if CONFIG_EXAMPLE_AUDIO_AMR
#define FATFS_DISK_SD 1
#undef CONFIG_WLAN
#define CONFIG_WLAN 0
#undef CONFIG_EXAMPLE_WLAN_FAST_CONNECT
#define CONFIG_EXAMPLE_WLAN_FAST_CONNECT 0
#undef CONFIG_INCLUDE_SIMPLE_CONFIG
#define CONFIG_INCLUDE_SIMPLE_CONFIG 0
#endif
/* For audio HLS example */
#define CONFIG_EXAMPLE_AUDIO_HLS 0
#if CONFIG_EXAMPLE_AUDIO_HLS
#define FATFS_DISK_SD 1
#undef FAST_RECONNECT_DATA
#define FAST_RECONNECT_DATA (0x200000-0x1000)
#undef CONFIG_INCLUDE_SIMPLE_CONFIG
#define CONFIG_INCLUDE_SIMPLE_CONFIG 0
#undef SUPPORT_MP_MODE
#define SUPPORT_MP_MODE 0
#endif
/*Foe alc audio dsp firmware upgrade */
#define CONFIG_EXAMPLE_ALC_DSP_FW_UPGRADE 0
/*Foe audio pcm upload */
#define CONFIG_EXAMPLE_AUDIO_PCM_UPLOAD 0
/* For UART Module AT command example */
#define CONFIG_EXAMPLE_UART_ATCMD 0
@ -250,15 +373,50 @@ limitations under the License.
#define CONFIG_EXAMPLE_WLAN_FAST_CONNECT 0
#endif
/* For SPI Module AT command example */
#define CONFIG_EXAMPLE_SPI_ATCMD 0
#if CONFIG_EXAMPLE_SPI_ATCMD
#undef FREERTOS_PMU_TICKLESS_PLL_RESERVED
#define FREERTOS_PMU_TICKLESS_PLL_RESERVED 1
#undef CONFIG_OTA_UPDATE
#define CONFIG_OTA_UPDATE 1
#undef CONFIG_TRANSPORT
#define CONFIG_TRANSPORT 1
#undef LOG_SERVICE_BUFLEN
#define LOG_SERVICE_BUFLEN 1600
#undef CONFIG_LOG_SERVICE_LOCK
#define CONFIG_LOG_SERVICE_LOCK 1
#undef CONFIG_EXAMPLE_WLAN_FAST_CONNECT
#define CONFIG_EXAMPLE_WLAN_FAST_CONNECT 0
#endif
#define CONFIG_EXAMPLE_MEDIA_SS 0
#define CONFIG_EXAMPLE_MEDIA_MS 0
#define CONFIG_EXAMPLE_MEDIA_MS 0
#define CONFIG_EXAMPLE_MEDIA_AUDIO_FROM_RTP 0
//Defines for mp3 streaming over wifi, default output through alc5651
#define CONFIG_EXAMPLE_MP3_STREAM_RTP 0
#if CONFIG_EXAMPLE_MP3_STREAM_RTP
#undef CONFIG_EXAMPLE_MEDIA_AUDIO_FROM_RTP
#define CONFIG_EXAMPLE_MEDIA_AUDIO_FROM_RTP 1
#undef CONFIG_INCLUDE_SIMPLE_CONFIG
#define CONFIG_INCLUDE_SIMPLE_CONFIG 0
//Set this flag to 1 in case sgtl5000 to be used else alc5651 will be used
#define CONFIG_EXAMPLE_MP3_STREAM_SGTL5000 0
#endif
// Use media source/sink example
#if (CONFIG_EXAMPLE_MEDIA_SS==1) || (CONFIG_EXAMPLE_MEDIA_MS==1)
#if (CONFIG_EXAMPLE_MEDIA_SS==1) || (CONFIG_EXAMPLE_MEDIA_AUDIO_FROM_RTP)
#undef CONFIG_INCLUDE_SIMPLE_CONFIG
#define CONFIG_INCLUDE_SIMPLE_CONFIG 0
#define CONFIG_ENABLE_WPS 0
#endif
#endif
/* For ISP AT COMMAND config*/
#define CONFIG_ISP 0
/* For Mjpeg capture example*/
#define CONFIG_EXAMPLE_MJPEG_CAPTURE 0
@ -266,6 +424,17 @@ limitations under the License.
#define FATFS_DISK_SD 1
#endif
/* For DCT example*/
#define CONFIG_EXAMPLE_DCT 0
/* For audio flash mp3 pcm example */
#define CONFIG_EXAMPLE_FLASH_MP3 0
#if CONFIG_EXAMPLE_FLASH_MP3
#define FATFS_DISK_FLASH 1
#define CONFIG_EXAMPLE_MP3_STREAM_SGTL5000 1
#endif
/****************** For EAP method example *******************/
#define CONFIG_EXAMPLE_EAP 0
@ -279,6 +448,9 @@ limitations under the License.
#if CONFIG_ENABLE_PEAP || CONFIG_ENABLE_TLS || CONFIG_ENABLE_TTLS
#define CONFIG_ENABLE_EAP
#undef CONFIG_EXAMPLE_WLAN_FAST_CONNECT
#define CONFIG_EXAMPLE_WLAN_FAST_CONNECT 0
#endif
@ -292,6 +464,11 @@ limitations under the License.
/* For usb mass storage example */
#define CONFIG_EXAMPLE_USB_MASS_STORAGE 0
/* For vendor specific example */
#define CONFIG_EXAMPLE_USB_VENDOR_SPECIFIC 0
#define CONFIG_EXAMPLE_USB_ISOC_DEVICE 0
/* For FATFS example*/
#define CONFIG_EXAMPLE_FATFS 0
#if CONFIG_EXAMPLE_FATFS
@ -300,8 +477,9 @@ limitations under the License.
// fatfs version
#define FATFS_R_10C
// fatfs disk interface
#define FATFS_DISK_USB 0
#define FATFS_DISK_SD 1
#define FATFS_DISK_USB 0
#define FATFS_DISK_SD 1
#define FATFS_DISK_FLASH 0
#endif
#endif
@ -380,7 +558,42 @@ in lwip_opt.h for support uart adapter*/
/* For ssl server example */
#define CONFIG_EXAMPLE_SSL_SERVER 0
/*For timelapse example */
#define CONFIG_EXAMPLE_TIMELAPSE 0
#if CONFIG_EXAMPLE_TIMELAPSE
#define CONFIG_USE_HTTP_SERVER 0
#if CONFIG_USE_HTTP_SERVER
#undef CONFIG_INCLUDE_SIMPLE_CONFIG
#define CONFIG_INCLUDE_SIMPLE_CONFIG 0
#define CONFIG_ENABLE_WPS 0
#else
#undef CONFIG_INCLUDE_SIMPLE_CONFIG
#define CONFIG_INCLUDE_SIMPLE_CONFIG 0
#define CONFIG_ENABLE_WPS 0
#define CONFIG_FATFS_EN 1
#define FATFS_R_10C
#define FATFS_DISK_SD 1
#endif
#endif
/* For ota update http example */
#define CONFIG_EXAMPLE_OTA_HTTP 0
/* For Amazon AWS IoT example */
#define CONFIG_EXAMPLE_AMAZON_AWS_IOT 0
#define CONFIG_EXAMPLE_AMAZON_ALEXA 0
/*For wifi roaming example*/
#define CONFIG_EXAMPLE_WIFI_ROAMING 0
#if CONFIG_QQ_LINK
#define FATFS_R_10C
#define FATFS_DISK_USB 0
#define FATFS_DISK_SD 1
#endif
#if CONFIG_ENABLE_WPS
#define WPS_CONNECT_RETRY_COUNT 4
#define WPS_CONNECT_RETRY_INTERVAL 5000 // in ms
#endif
#define AUTO_RECONNECT_COUNT 8
#define AUTO_RECONNECT_INTERVAL 5 // in sec
#endif

154
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c
View File

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include "rtl8195a.h"
#include "basic_types.h"
#include "hal_common.h"
#if defined(__CC_ARM) || \
(defined (__ARMCC_VERSION) && __ARMCC_VERSION >= 6010050)
@ -67,15 +69,20 @@ extern uint8_t __bss_dram_end__[];
extern VECTOR_Func NewVectorTable[];
extern void SystemCoreClockUpdate(void);
extern VOID En32KCalibration(VOID);
extern void PLAT_Start(void);
extern void PLAT_Main(void);
IMAGE2_START_RAM_FUN_SECTION
__USED
const RAM_START_FUNCTION gImage2EntryFun0 = {
PLAT_Start
};
IMAGE2_VALID_PATTEN_SECTION
__USED
const uint8_t IMAGE2_SIGNATURE[20] = {
'R', 'T', 'K', 'W', 'i', 'n', 0x0, 0xff,
(FW_VERSION&0xff), ((FW_VERSION >> 8)&0xff),
@ -166,11 +173,119 @@ void TRAP_HardFaultHandler_Patch(void)
#endif
extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n);
_WEAK void SDIO_Device_Off(void)
{
/* Disable Clock for SDIO function */
ACTCK_SDIOD_CCTRL(OFF);
/* SDIO Function Disable */
SDIOD_ON_FCTRL(OFF);
SDIOD_OFF_FCTRL(OFF);
// SDIO Pin Mux off
SDIOD_PIN_FCTRL(OFF);
}
void SYSPlatformInit(void)
{
#ifdef CONFIG_CHIP_A_CUT
//Set SPS lower voltage
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG0, (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG0)&0xf0ffffff));
#else // B-Cut & C-Cut
//Set SPS lower voltage
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG0, ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG0)&0xf0ffffff)|0x6000000));
#endif
//xtal buffer driving current
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_XTAL_CTRL1,
((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_XTAL_CTRL1)&(~(BIT_MASK_SYS_XTAL_DRV_RF1<<BIT_SHIFT_SYS_XTAL_DRV_RF1)))|(BIT_SYS_XTAL_DRV_RF1(1))));
}
void OSC_32_LINEAR_CALIBRATION(u32 num)
{
u32 Rtemp;
u32 Ttemp = 0;
u32 flag = num;
while(flag){
//set parameter
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
//offset 1 = 0x0942
Rtemp = 0x810942;
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
HalDelayUs(40);
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
//offset 2 = 0x00FF
Rtemp = 0x8200FF;
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
HalDelayUs(40);
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
//offset 3 = 0x4050
Rtemp = 0x834050;
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
HalDelayUs(40);
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
//offset 4 = 0x000A
Rtemp = 0x84000A;
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
HalDelayUs(40);
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
//offset 8 = 0x0004
Rtemp = 0x880004;
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
HalDelayUs(40);
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
//offset 0 = 0x7900
Rtemp = 0x807900;
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
HalDelayUs(40);
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
//offset 0 = 0xF900
Rtemp = 0x80F900;
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
HalDelayUs(40);
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
while(1) {
//Polling LOCK
Rtemp = 0x110000;
HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
HalDelayUs(40);
Rtemp = HAL_READ32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL1);
if ((Rtemp & 0x3000) != 0x0){
if ((Rtemp & 0x3000) == 0x3000){
flag--;
}else {
flag = 0;
}
break;
}
else {
Ttemp++;
HalDelayUs(30);
if (Ttemp > 10000) { /*Delay 100ms*/
//DiagPrintf("32K linear Calibration Fail!!\n");
flag = 0;
break;
}
}
}
}
}
// Image2 Entry Function
void PLAT_Init(void)
{
uint32_t val;
// Overwrite vector table
NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler;
#if defined ( __ICCARM__ )
@ -185,25 +300,18 @@ void PLAT_Init(void)
__rtl_memset_v1_00((void *)__bss_dtcm_start__, 0, __bss_dtcm_end__ - __bss_dtcm_start__);
__rtl_memset_v1_00((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__);
extern HAL_TIMER_OP_EXT HalTimerOpExt;
__rtl_memset_v1_00((void *)&HalTimerOpExt, 0, sizeof(HalTimerOpExt));
__rtl_memset_v1_00((void *)&HalTimerOp, 0, sizeof(HalTimerOp));
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_OSC32K_CTRL, (HAL_READ32(SYSTEM_CTRL_BASE, REG_OSC32K_CTRL)|BIT17|BIT18));
HalDelayUs(40);
#ifdef CONFIG_TIMER_MODULE
// Re-init G-Timer HAL Function pointer with ROM Patch
if (HalCommonInit() != HAL_OK) {
DBG_8195A("Hal Common Init Failed.\n");
}
#endif
HalTimerOpInit_Patch(&HalTimerOp);
SystemCoreClockUpdate();
// Set SPS lower voltage
val = __RTK_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0);
val &= 0xf0ffffff;
val |= 0x6000000;
__RTK_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, val);
// xtal buffer driving current
val = __RTK_CTRL_READ32(REG_SYS_XTAL_CTRL1);
val &= ~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1);
val |= BIT_SYS_XTAL_DRV_RF1(1);
__RTK_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, val);
SYSPlatformInit();
// Initialize SPIC, then disable it for power saving.
if ((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT_SOC_FLASH_EN) != 0) {
SpicNVMCalLoadAll();
@ -212,11 +320,19 @@ void PLAT_Init(void)
}
#ifdef CONFIG_TIMER_MODULE
OSC_32_LINEAR_CALIBRATION(10);
HalDelayUs(40);
Calibration32k();
#endif
#ifdef CONFIG_SOC_PS_MODULE
InitSoCPM();
#endif
#ifndef CONFIG_SDIO_DEVICE_EN
SDIO_DEV_Disable();
SDIO_Device_Off();
#endif
// Enter App start function

4
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_trap.h
View File

@ -18,10 +18,6 @@
typedef void (*VECTOR_Func)(void *data);
typedef struct {
void (*RamStartFun)(void);
} RAM_START_FUNCTION;
typedef struct {
void (*RamStartFun)(void);
void (*RamWakeupFun)(void);

2
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/gpio_api.c
View File

@ -20,6 +20,8 @@
#include "gpio_api.h"
extern void HAL_GPIO_DeInit(HAL_GPIO_PIN *GPIO_Pin);
// convert Mbed pin mode to HAL Pin Mode
const u8 GPIO_InPinMode[] = {
DIN_PULL_NONE, // PullNone

2
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/gpio_irq_api.c
View File

@ -19,6 +19,8 @@
#if CONFIG_GPIO_EN
#include "gpio_irq_api.h"
extern void HAL_GPIO_DeInit(HAL_GPIO_PIN *GPIO_Pin);
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
{
uint32_t pin_name;

17
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/i2c_api.c
View File

@ -15,7 +15,6 @@
*/
#include <string.h>
#include "objects.h"
#include "PinNames.h"
#include "hal_i2c.h"
@ -79,7 +78,7 @@ static SAL_I2C_TRANSFER_BUF i2crxtranbuf[4];
extern u32 ConfigDebugErr;
extern u32 ConfigDebuginfo;
void i2c_init(i2c_t *obj, PinName sda, PinName scl)
{
{
int i2c_sel;
int i2c_idx;
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
@ -230,9 +229,9 @@ void i2c_frequency(i2c_t *obj, int hz)
inline int i2c_start(i2c_t *obj)
{
memset(address_save_int , 0, sizeof(address_save_int));
memset(Byte_count , 0, sizeof(Byte_count));
memset(address_save, 0, sizeof(address_save));
_memset(address_save_int , 0, sizeof(address_save_int));
_memset(Byte_count , 0, sizeof(Byte_count));
_memset(address_save, 0, sizeof(address_save));
return 0;
}
@ -279,7 +278,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
} else {
/* Calculate user time out parameters */
I2CInTOTcnt = 300;
if ((I2CInTOTcnt != 0) && (I2CInTOTcnt != I2C_TIMEOOUT_ENDLESS)) {
if ((I2CInTOTcnt != 0) && (I2CInTOTcnt != I2C_TIMEOUT_ENDLESS)) {
InTimeoutCount = (I2CInTOTcnt*1000/TIMER_TICK_US);
InStartCount = HalTimerOp.HalTimerReadCount(1);
}
@ -345,7 +344,7 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
} else {
/* Calculate user time out parameters */
I2CInTOTcnt = 300;
if ((I2CInTOTcnt != 0) && (I2CInTOTcnt != I2C_TIMEOOUT_ENDLESS)) {
if ((I2CInTOTcnt != 0) && (I2CInTOTcnt != I2C_TIMEOUT_ENDLESS)) {
InTimeoutCount = (I2CInTOTcnt*1000/TIMER_TICK_US);
InStartCount = HalTimerOp.HalTimerReadCount(1);
}
@ -458,7 +457,7 @@ void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
address = (address & 0xFE ) >>1;
uint16_t i2c_user_addr = (uint16_t) address;
if (i2c_target_addr[pSalI2CHND->DevNum] != i2c_user_addr) {
@ -528,7 +527,7 @@ int i2c_slave_read(i2c_t *obj, char *data, int length)
} else {
/* Calculate user time out parameters */
I2CInTOTcnt = 300;
if ((I2CInTOTcnt != 0) && (I2CInTOTcnt != I2C_TIMEOOUT_ENDLESS)) {
if ((I2CInTOTcnt != 0) && (I2CInTOTcnt != I2C_TIMEOUT_ENDLESS)) {
InTimeoutCount = (I2CInTOTcnt*1000/TIMER_TICK_US);
InStartCount = HalTimerOp.HalTimerReadCount(1);
}

291
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/log_uart_api.h
View File

@ -1,10 +1,10 @@
/* mbed Microcontroller Library
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
@ -12,11 +12,12 @@
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
*/
#ifndef LOG_UART_API_H
#define LOG_UART_API_H
#if defined(CONFIG_PLATFORM_8195A) && (CONFIG_PLATFORM_8195A == 1)
#include "device.h"
#include "serial_api.h"
#include "hal_log_uart.h"
@ -25,43 +26,305 @@
extern "C" {
#endif
typedef void (*loguart_irq_handler)(uint32_t id, LOG_UART_INT_ID event);
/** @addtogroup log_uart LOG_UART
* @ingroup hal
* @brief log_uart functions
* @{
*/
///@name Ameba1 Only
///@{
/******************************************************
* Type Definitions
******************************************************/
/** Log uart irq handler function pointer type
*
* @param id : The argument for log uart interrupt handler
* @param event : The log uart interrupt indication ID. More details is shown in hal_log_uart.h
*/
typedef void (*loguart_irq_handler)(uint32_t id, LOG_UART_INT_ID event);
typedef struct log_uart_s log_uart_t;
int32_t log_uart_init (log_uart_t *obj, int baudrate, int data_bits, SerialParity parity, int stop_bits);
/******************************************************
* Function Declarations
******************************************************/
/**
* @brief Initialize Realtek log uart.
* Initialize the required parts of the log uart.
* i.e. baudrate, data bits, parity, etc.
* @param[in] obj: The address of log uart object.
* @param[in] baudrate: Baud rate of the log uart object.
* @param[in] data_bits: Data bits of the log uart object.
* @param[in] parity: Parity type of the log uart object
- ParityNone, - Do not use parity
- ParityOdd, - Use odd parity
- ParityEven, - Use even parity
- ParityForced1, - Use even parity, the same as ParityEven
- ParityForced0 - Use odd parity, the same as ParityOdd
* @param[in] stop_bits: The number of stop bits for the log uart object.
* @return 0 if initialization is successful, -1 otherwise
*/
int32_t log_uart_init(log_uart_t *obj, int baudrate, int data_bits, SerialParity parity, int stop_bits);
/**
* @brief Release the resources related to Realtek log uart.
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_free(log_uart_t *obj);
/**
* @brief Set the baud rate of log uart.
* @param[in] obj: The address of log uart object.
* @param[in] baudrate: Baud rate of the log uart object.
* @return None
*/
void log_uart_baud(log_uart_t *obj, int baudrate);
/**
* @brief Set parameters for log uart.
* including data bits, parity type and stop bits
* @param[in] obj: The address of log uart object.
* @param[in] data_bits: Data bits of log uart object.
* @param[in] parity: Parity type of the log uart object
- ParityNone, - Do not use parity
- ParityOdd, - Use odd parity
- ParityEven, - Use even parity
- ParityForced1, - Use even parity, the same as ParityEven
- ParityForced0 - Use odd parity, the same as ParityOdd
* @param[in] stop_bits: The number of stop bits for the log uart object.
* @return None
*/
void log_uart_format(log_uart_t *obj, int data_bits, SerialParity parity, int stop_bits);
/**
* @brief Set irq handler for log uart.
* @param[in] obj: The address of log uart object.
* @param[in] handler: The interrupt handler for log uart.
* @param[in] id: The argument for log uart interrupt handler.
* @return None
*/
void log_uart_irq_handler(log_uart_t *obj, loguart_irq_handler handler, uint32_t id);
/**
* @brief Enable/disable the specific irq indication ID.
* @param[in] obj: The address of log uart object.
* @param[in] irq: The log uart interrupt indication ID which will be enabled/disabled.
* @param[in] enable: 1 enable, 0 disable
* @return None
*/
void log_uart_irq_set(log_uart_t *obj, LOG_UART_INT_ID irq, uint32_t enable);
/**
* @brief Read one character from log uart.
This function will block untill the log uart gets something to read
* @param[in] obj: The address of log uart object.
* @return the character read from log uart
*/
char log_uart_getc(log_uart_t *obj);
/**
* @brief Write one character to log uart.
This function will block untill the data is successfully written to log uart
* @param[in] obj: The address of log uart object.
* @param[in] c: The one byte data to be written to log uart.
* @return None
*/
void log_uart_putc(log_uart_t *obj, char c);
/**
* @brief Check whether log uart is ready to read data
* @param[in] obj: The address of log uart object.
* @return 1 if there is data at log uart to be read, 0 otherwise
*/
int log_uart_readable(log_uart_t *obj);
/**
* @brief Check whether log uart is ready to write data
* @param[in] obj: The address of log uart object.
* @return 1 if log uart is ready for writing, 0 otherwise
*/
int log_uart_writable(log_uart_t *obj);
/**
* @brief Clear both data at log uart
This function will clear data in both TX FIFO and RX FIFO of log uart
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_clear(log_uart_t *obj);
/**
* @brief Clear TX FIFO of log uart
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_clear_tx(log_uart_t *obj);
/**
* @brief Clear RX FIFO of log uart
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_clear_rx(log_uart_t *obj);
/**
* @brief Set break control for log uart
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_break_set(log_uart_t *obj);
/**
* @brief Clear break control for log uart
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_break_clear(log_uart_t *obj);
/**
* @brief Set the handler for complete TX
* @param[in] obj: The address of log uart object.
* @param[in] handler: The function which is called when log uart has finished transmitting data.
* @param[in] id: The parameter for handler.
* @return None
*/
void log_uart_tx_comp_handler(log_uart_t *obj, void *handler, uint32_t id);
/**
* @brief Set the handler for complete RX
* @param[in] obj: The address of log uart object.
* @param[in] handler: The function which is called when log uart has finished receving data
* @param[in] id: The parameter for handler.
* @return None
*/
void log_uart_rx_comp_handler(log_uart_t *obj, void *handler, uint32_t id);
/**
* @brief Set the handler for line status
* @param[in] obj: The address of log uart object.
* @param[in] handler: The function which is called when log uart gets an line status indication ID.
* @param[in] id: The parameter for handler.
* @return None
*/
void log_uart_line_status_handler(log_uart_t *obj, void *handler, uint32_t id);
int32_t log_uart_recv (log_uart_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms);
int32_t log_uart_send (log_uart_t *obj, char *ptxbuf, uint32_t len, uint32_t timeout_ms);
int32_t log_uart_recv_stream (log_uart_t *obj, char *prxbuf, uint32_t len);
int32_t log_uart_send_stream (log_uart_t *obj, char *ptxbuf, uint32_t len);
int32_t log_uart_recv_stream_timeout (log_uart_t *obj, char *prxbuf, uint32_t len,
/**
* @brief Read data from log uart in blocking mode.
* @param[in] obj: The address of log uart object.
* @param[out] prxbuf: The buffer to store received data.
* @param[in] len: The maximum length of data to be read
* @param[in] timeout_ms: Blocking time in ms.
* @return the length of received data in bytes
*/
int32_t log_uart_recv(log_uart_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms);
/**
* @brief Send data to log uart in blocking mode
* @param[in] obj: The address of log uart object.
* @param[in] ptxbuf: Data buffer to be sent to log uart
* @param[in] len: Length of data to be sent to log uart
* @param[in] timeout_ms: Blocking time in ms.
* @return the length of sent data in bytes
*/
int32_t log_uart_send(log_uart_t *obj, char *ptxbuf, uint32_t len, uint32_t timeout_ms);
/**
* @brief Read data from log uart in interrupt mode(Non-blocking)
* @param[in] obj: The address of log uart object.
* @param[out] prxbuf: The buffer to store received data.
* @param[in] len: The maximum length of data to be read
* @return 0 if success
*/
int32_t log_uart_recv_stream(log_uart_t *obj, char *prxbuf, uint32_t len);
/**
* @brief Send data to log uart in interrupt mode(Non-blocking)
* @param[in] obj: The address of log uart object.
* @param[in] ptxbuf: Data buffer to be sent to log uart
* @param[in] len: Length of data to be sent to log uart
* @return 0 if success
*/
int32_t log_uart_send_stream(log_uart_t *obj, char *ptxbuf, uint32_t len);
/**
* @brief Read data from log uart with a given timeout in interrupt mode(Non-blocking)
* @param[in] obj: The address of log uart object.
* @param[out] prxbuf: The buffer to store received data.
* @param[in] len: The maximum length of data to be read
* @param[in] timeout_ms: The timeout for reading data in ms
* @param[in] force_cs: User callback function
* @return the length in Byte of received data before timeout, or error (< 0)
*/
int32_t log_uart_recv_stream_timeout(log_uart_t *obj, char *prxbuf, uint32_t len,
uint32_t timeout_ms, void *force_cs);
int32_t log_uart_send_stream_abort (log_uart_t *obj);
int32_t log_uart_recv_stream_abort (log_uart_t *obj);
void log_uart_disable (log_uart_t *obj);
void log_uart_enable (log_uart_t *obj);
/**
* @brief Abort interrupt mode of sending data
* @param[in] obj: The address of log uart object.
* @return the length of data sent to log uart.
*/
int32_t log_uart_send_stream_abort(log_uart_t *obj);
/**
* @brief Abort interrupt mode of receiving data
* @param[in] obj: The address of log uart object.
* @return the length of data received from log uart.
*/
int32_t log_uart_recv_stream_abort(log_uart_t *obj);
/**
* @brief Disable log uart
* @param[in] obj: The address of log uart object.
* @return None.
*/
void log_uart_disable(log_uart_t *obj);
/**
* @brief Enable log uart
* @param[in] obj: The address of log uart object.
* @return None.
*/
void log_uart_enable(log_uart_t *obj);
/**
* @brief Read Line-Status register
* @return value:
* - Bit 0: RX Data Ready
* - Bit 1: Overrun Error
* - Bit 2: Parity Error
* - Bit 3: Framing Error
* - Bit 4: Break Interrupt (received data input is held in 0 state for a longer than a full word tx time)
* - Bit 5: TX FIFO empty (THR empty)
* - Bit 6: TX FIFO empty (THR & TSR both empty)
* - Bit 7: Receiver FIFO Error (parity error, framing error or break indication)
*/
uint8_t log_uart_raed_lsr(log_uart_t *obj);
/**
* @brief Read Modem-Status register
* @return value:
* - Bit 0: DCTS, The CTS line has changed its state
* - Bit 1: DDSR, The DSR line has changed its state
* - Bit 2: TERI, RI line has changed its state from low to high state
* - Bit 3: DDCD, DCD line has changed its state
* - Bit 4: Complement of the CTS input
* - Bit 5: Complement of the DSR input
* - Bit 6: Complement of the RI input
* - Bit 7: Complement of the DCD input
*/
uint8_t log_uart_raed_msr(log_uart_t *obj);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif //CONFIG_PLATFORM_8195A
#endif // end of "#ifndef LOG_UART_API_H"

2
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/port_api.c
View File

@ -142,7 +142,7 @@ void port_mode(port_t *obj, PinMode mode)
break;
}
if (obj->mask & (1 << i)) { // If the pin is used
pin_mode(obj->pin_def[i], mode);
pin_mode((PinName)obj->pin_def[i], mode);
}
}
}

4
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/serial_api.c
View File

@ -73,13 +73,17 @@ static HAL_GDMA_OP UartGdmaOp;
#ifdef CONFIG_MBED_ENABLED
#include "log_uart_api.h"
#include "hal_log_uart.h"
int stdio_uart_inited = 0;
serial_t stdio_uart;
log_uart_t stdio_uart_log;
static uint32_t serial_log_irq_ids;
static uart_irq_handler log_irq_handler;
static uint32_t serial_log_irq_en;
#endif
static void SerialTxDoneCallBack(VOID *pAdapter);

90
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/spi_api.c
View File

@ -16,7 +16,7 @@
#include "objects.h"
#include "spi_api.h"
#include "spi_ex_api.h"
#include "PinNames.h"
#include "pinmap.h"
#include "hal_ssi.h"
@ -32,6 +32,11 @@ void spi_tx_done_callback(VOID *obj);
void spi_rx_done_callback(VOID *obj);
void spi_bus_tx_done_callback(VOID *obj);
#ifdef CONFIG_GDMA_EN
HAL_GDMA_OP SpiGdmaOp;
#endif
uint8_t SPI0_IS_AS_SLAVE = 0;
//TODO: Load default Setting: It should be loaded from external setting file.
extern const DW_SSI_DEFAULT_SETTING SpiDefaultSetting;
@ -73,10 +78,12 @@ void spi_init (spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName sse
_memset((void*)obj, 0, sizeof(spi_t));
obj->state = 0;
/* SsiClockDivider doesn't support odd number */
uint32_t SystemClock = SystemGetCpuClk();
uint32_t MaxSsiFreq = (SystemClock >> 2) >> 1;
DBG_SSI_INFO("SystemClock: %d\n", SystemGetCpuClk());
DBG_SSI_INFO("MaxSsiFreq : %d\n", SystemGetCpuClk() >> 3);
/* SsiClockDivider doesn't support odd number */
DBG_SSI_INFO("SystemClock: %d\n", SystemClock);
DBG_SSI_INFO("MaxSsiFreq : %d\n", MaxSsiFreq);
ssi_mosi = pinmap_peripheral(mosi, PinMap_SSI_MOSI);
ssi_miso = pinmap_peripheral(miso, PinMap_SSI_MISO);
@ -119,7 +126,23 @@ void spi_init (spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName sse
DBG_SSI_ERR(ANSI_COLOR_RED"spi_init(): SPI %x init fails.\n"ANSI_COLOR_RESET,pHalSsiAdaptor->Index);
return;
}
osDelay(1);
pHalSsiAdaptor->TxCompCallback = spi_tx_done_callback;
pHalSsiAdaptor->TxCompCbPara = (void*)obj;
pHalSsiAdaptor->RxCompCallback = spi_rx_done_callback;
pHalSsiAdaptor->RxCompCbPara = (void*)obj;
pHalSsiAdaptor->TxIdleCallback = spi_bus_tx_done_callback;
pHalSsiAdaptor->TxIdleCbPara = (void*)obj;
#ifdef CONFIG_GDMA_EN
HalGdmaOpInit((VOID*)&SpiGdmaOp);
pHalSsiAdaptor->DmaConfig.pHalGdmaOp = &SpiGdmaOp;
pHalSsiAdaptor->DmaConfig.pRxHalGdmaAdapter = &obj->spi_gdma_adp_rx;
pHalSsiAdaptor->DmaConfig.pTxHalGdmaAdapter = &obj->spi_gdma_adp_tx;
obj->dma_en = 0;
pHalSsiAdaptor->HaveTxChannel = 0;
pHalSsiAdaptor->HaveRxChannel = 0;
#endif
}
void spi_free (spi_t *obj)
@ -129,6 +152,17 @@ void spi_free (spi_t *obj)
HalSsiDeInit(pHalSsiAdaptor);
SPI0_MULTI_CS_CTRL(OFF);
#ifdef CONFIG_GDMA_EN
if (obj->dma_en & SPI_DMA_RX_EN) {
HalSsiRxGdmaDeInit(pHalSsiAdaptor);
}
if (obj->dma_en & SPI_DMA_TX_EN) {
HalSsiTxGdmaDeInit(pHalSsiAdaptor);
}
obj->dma_en = 0;
#endif
}
void spi_format (spi_t *obj, int bits, int mode, int slave)
@ -183,6 +217,7 @@ void spi_format (spi_t *obj, int bits, int mode, int slave)
if (pHalSsiAdaptor->Index == 0) {
pHalSsiAdaptor->Role = SSI_SLAVE;
pHalSsiAdaptor->SlaveOutputEnable = SLV_TXD_ENABLE; // <-- Slave only
SPI0_IS_AS_SLAVE = 1;
DBG_SSI_INFO("SPI0 is as slave\n");
} else {
DBG_SSI_ERR("The SPI%d cannot work as Slave mode, only SPI0 does.\r\n", pHalSsiAdaptor->Index);
@ -247,10 +282,12 @@ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
char *rx_buffer, int rx_length, char write_fill)
{
int total = (tx_length > rx_length) ? tx_length : rx_length;
int i;
char out, in;
for (int i = 0; i < total; i++) {
char out = (i < tx_length) ? tx_buffer[i] : write_fill;
char in = spi_master_write(obj, out);
for (i = 0; i < total; i++) {
out = (i < tx_length) ? tx_buffer[i] : write_fill;
in = spi_master_write(obj, out);
if (i < rx_length) {
rx_buffer[i] = in;
}
@ -296,3 +333,40 @@ int spi_busy (spi_t *obj)
}
// Bus Idle: Real TX done, TX FIFO empty and bus shift all data out already
void spi_bus_tx_done_callback(VOID *obj)
{
spi_t *spi_obj = (spi_t *)obj;
spi_irq_handler handler;
if (spi_obj->bus_tx_done_handler) {
handler = (spi_irq_handler)spi_obj->bus_tx_done_handler;
handler(spi_obj->bus_tx_done_irq_id, (SpiIrq)0);
}
}
void spi_tx_done_callback(VOID *obj)
{
spi_t *spi_obj = (spi_t *)obj;
spi_irq_handler handler;
if (spi_obj->state & SPI_STATE_TX_BUSY) {
spi_obj->state &= ~SPI_STATE_TX_BUSY;
if (spi_obj->irq_handler) {
handler = (spi_irq_handler)spi_obj->irq_handler;
handler(spi_obj->irq_id, SpiTxIrq);
}
}
}
void spi_rx_done_callback(VOID *obj)
{
spi_t *spi_obj = (spi_t *)obj;
spi_irq_handler handler;
spi_obj->state &= ~SPI_STATE_RX_BUSY;
if (spi_obj->irq_handler) {
handler = (spi_irq_handler)spi_obj->irq_handler;
handler(spi_obj->irq_id, SpiRxIrq);
}
}

244
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/spi_ex_api.h Normal file
View File

@ -0,0 +1,244 @@
/* mbed Microcontroller Library
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_SPI_EXT_API_H
#define MBED_SPI_EXT_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup spi_ex SPI_EX
* @ingroup hal
* @brief spi extended functions
* @{
*/
///@name Ameba Common
///@{
#define SPI_DMA_RX_EN (1<<0)
#define SPI_DMA_TX_EN (1<<1)
enum {
SPI_SCLK_IDLE_LOW=0, // the SCLK is Low when SPI is inactive
SPI_SCLK_IDLE_HIGH=2 // the SCLK is High when SPI is inactive
};
// SPI Master mode: for continuous transfer, how the CS toggle:
enum {
SPI_CS_TOGGLE_EVERY_FRAME=0, // let SCPH=0 then the CS toggle every frame
SPI_CS_TOGGLE_START_STOP=1 // let SCPH=1 the CS toggle at start and stop
};
enum {
SPI_SCLK_TOGGLE_MIDDLE=0, // Serial Clk toggle at middle of 1st data bit and latch data at 1st Clk edge
SPI_SCLK_TOGGLE_START=1 // Serial Clk toggle at start of 1st data bit and latch data at 2nd Clk edge
};
typedef enum {
CS_0 = 0,
CS_1 = 1,
CS_2 = 2,
CS_3 = 3,
CS_4 = 4,
CS_5 = 5,
CS_6 = 6,
CS_7 = 7
}ChipSelect;
#define SPI_STATE_READY 0x00
#define SPI_STATE_RX_BUSY (1<<1)
#define SPI_STATE_TX_BUSY (1<<2)
typedef enum {
SpiRxIrq,
SpiTxIrq
} SpiIrq;
typedef void (*spi_irq_handler)(uint32_t id, SpiIrq event);
/**
* @brief Set SPI interrupt handler if needed.
* @param obj: spi object define in application software.
* @param handler: interrupt callback function
* @param id: interrupt callback parameter
* @retval none
*/
void spi_irq_hook(spi_t *obj, spi_irq_handler handler, uint32_t id);
/**
* @brief Set SPI interrupt bus tx done handler if needed.
* @param obj: spi object define in application software.
* @param handler: interrupt bus tx done callback function
* @param id: interrupt callback parameter
* @retval none
*/
void spi_bus_tx_done_irq_hook(spi_t *obj, spi_irq_handler handler, uint32_t id);
/**
* @brief Slave device to flush tx fifo.
* @param obj: spi slave object define in application software.
* @note : It will discard all data in both tx fifo and rx fifo
*/
void spi_slave_flush_fifo(spi_t * obj);
/**
* @brief slave recv target length data use interrupt mode.
* @param obj: spi slave object define in application software.
* @param rx_buffer: buffer to save data read from SPI FIFO.
* @param length: number of data bytes to be read.
* @retval : stream init status
*/
int32_t spi_slave_read_stream(spi_t *obj, char *rx_buffer, uint32_t length);
/**
* @brief slave send target length data use interrupt mode.
* @param obj: spi slave object define in application software.
* @param tx_buffer: buffer to be written to Tx FIFO.
* @param length: number of data bytes to be send.
* @retval : stream init status
*/
int32_t spi_slave_write_stream(spi_t *obj, char *tx_buffer, uint32_t length);
/**
* @brief master recv target length data use interrupt mode.
* @param obj: spi master object define in application software.
* @param rx_buffer: buffer to save data read from SPI FIFO.
* @param length: number of data bytes to be read.
* @retval : stream init status
*/
int32_t spi_master_read_stream(spi_t *obj, char *rx_buffer, uint32_t length);
/**
* @brief master send target length data use interrupt mode.
* @param obj: spi master object define in application software.
* @param tx_buffer: buffer to be written to Tx FIFO.
* @param length: number of data bytes to be send.
* @retval : stream init status
*/
int32_t spi_master_write_stream(spi_t *obj, char *tx_buffer, uint32_t length);
/**
* @brief master send & recv target length data use interrupt mode.
* @param obj: spi master object define in application software.
* @param tx_buffer: buffer to be written to Tx FIFO.
* @param rx_buffer: buffer to save data read from SPI FIFO.
* @param length: number of data bytes to be send & recv.
* @retval : stream init status
*/
int32_t spi_master_write_read_stream(spi_t *obj, char *tx_buffer, char *rx_buffer, uint32_t length);
/**
* @brief slave recv target length data use interrupt mode and timeout mechanism.
* @param obj: spi slave object define in application software.
* @param rx_buffer: buffer to save data read from SPI FIFO.
* @param length: number of data bytes to be read.
* @param timeout_ms: timeout waiting time.
* @retval : number of bytes read already
*/
int32_t spi_slave_read_stream_timeout(spi_t *obj, char *rx_buffer, uint32_t length, uint32_t timeout_ms);
/**
* @brief slave recv target length data use interrupt mode and stop if the spi bus is idle.
* @param obj: spi slave object define in application software.
* @param rx_buffer: buffer to save data read from SPI FIFO.
* @param length: number of data bytes to be read.
* @retval : number of bytes read already
*/
int32_t spi_slave_read_stream_terminate(spi_t *obj, char *rx_buffer, uint32_t length);
//#ifdef CONFIG_GDMA_EN
/**
* @brief slave recv target length data use DMA mode.
* @param obj: spi slave object define in application software.
* @param rx_buffer: buffer to save data read from SPI FIFO.
* @param length: number of data bytes to be read.
* @retval : stream init status
*/
int32_t spi_slave_read_stream_dma(spi_t *obj, char *rx_buffer, uint32_t length);
/**
* @brief slave send target length data use DMA mode.
* @param obj: spi slave object define in application software.
* @param tx_buffer: buffer to be written to Tx FIFO.
* @param length: number of data bytes to be send.
* @retval : stream init status
*/
int32_t spi_slave_write_stream_dma(spi_t *obj, char *tx_buffer, uint32_t length);
/**
* @brief master send & recv target length data use DMA mode.
* @param obj: spi master object define in application software.
* @param tx_buffer: buffer to be written to Tx FIFO.
* @param rx_buffer: buffer to save data read from SPI FIFO.
* @param length: number of data bytes to be send & recv.
* @retval : stream init status
*/
int32_t spi_master_write_read_stream_dma(spi_t * obj, char * tx_buffer, char * rx_buffer, uint32_t length);
/**
* @brief master recv target length data use DMA mode.
* @param obj: spi master object define in application software.
* @param rx_buffer: buffer to save data read from SPI FIFO.
* @param length: number of data bytes to be read.
* @retval : stream init status
* @note : DMA or Interrupt mode can be used to TX dummy data
*/
int32_t spi_master_read_stream_dma(spi_t *obj, char *rx_buffer, uint32_t length);
/**
* @brief master send target length data use DMA mode.
* @param obj: spi master object define in application software.
* @param tx_buffer: buffer to be written to Tx FIFO.
* @param length: number of data bytes to be send.
* @retval : stream init status
*/
int32_t spi_master_write_stream_dma(spi_t *obj, char *tx_buffer, uint32_t length);
/**
* @brief slave recv target length data use DMA mode and timeout mechanism.
* @param obj: spi slave object define in application software.
* @param rx_buffer: buffer to save data read from SPI FIFO.
* @param length: number of data bytes to be read.
* @param timeout_ms: timeout waiting time.
* @retval : number of bytes read already
*/
int32_t spi_slave_read_stream_dma_timeout(spi_t *obj, char *rx_buffer, uint32_t length, uint32_t timeout_ms);
/**
* @brief slave recv target length data use DMA mode and stop if the spi bus is idle.
* @param obj: spi slave object define in application software.
* @param rx_buffer: buffer to save data read from SPI FIFO.
* @param length: number of data bytes to be read.
* @retval : number of bytes read already
*/
int32_t spi_slave_read_stream_dma_terminate(spi_t * obj, char * rx_buffer, uint32_t length);
//#endif
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif

2
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/timer_api.c
View File

@ -76,7 +76,7 @@ void gtimer_init (gtimer_t *obj, uint32_t tid)
pTimerAdapter->TimerIrqPriority = 0;
pTimerAdapter->TimerLoadValueUs = 0xFFFFFFFF; // Just a whatever value
pTimerAdapter->TimerMode = USER_DEFINED;
HalTimerInit ((VOID*) pTimerAdapter);
}

2
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/timer_api.h
View File

@ -29,7 +29,7 @@ enum {
TIMER3 = 5, // GTimer 5, share with PWM_2
TIMER4 = 0, // GTimer 0, share with software-RTC functions
GTIMER_MAX = 5
GTIMER_MAX = 5
};
void gtimer_init (gtimer_t *obj, uint32_t tid);

2
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/trng_api.c
View File

@ -27,7 +27,7 @@
void trng_init(trng_t *obj)
{
_memset((void *)obj, 0, sizeof(trng_t));
analogin_init(&obj->tradcng, ADC0);
analogin_init(&obj->tradcng, (PinName)ADC0);
obj->inited = 1;
}

4
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/us_ticker.c
View File

@ -97,7 +97,7 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
HalTimerOp.HalTimerDis((u32)TimerAdapter.TimerId);
HalTimerOpExt.HalTimerReLoad((u32)TimerAdapter.TimerId, TimerAdapter.TimerLoadValueUs);
HalTimerOpExt.HalTimerSync(SYS_TIM_ID);
//HalTimerOpExt.HalTimerSync(SYS_TIM_ID);
HalTimerOp.HalTimerEn((u32)TimerAdapter.TimerId);
}
@ -107,7 +107,7 @@ void us_ticker_fire_interrupt(void)
HalTimerOp.HalTimerDis((u32)TimerAdapter.TimerId);
HalTimerOpExt.HalTimerReLoad((u32)TimerAdapter.TimerId, TimerAdapter.TimerLoadValueUs);
HalTimerOpExt.HalTimerSync(SYS_TIM_ID);
//HalTimerOpExt.HalTimerSync(SYS_TIM_ID);
HalTimerOp.HalTimerEn((u32)TimerAdapter.TimerId);
}

1
targets/TARGET_Realtek/TARGET_AMEBA/rtw_emac.cpp
View File

@ -76,6 +76,7 @@ bool RTW_EMAC::get_hwaddr(uint8_t *addr) const
} else {
printf("Get HW address failed\r\n");
}
return true;
}
void RTW_EMAC::set_hwaddr(const uint8_t *addr)

285
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/api/platform/platform_stdlib.h
View File

@ -16,272 +16,41 @@
#ifndef __PLATFORM_STDLIB_H__
#define __PLATFORM_STDLIB_H__
#define USE_CLIB_PATCH 0
#if defined (__GNUC__)
/* build rom should set USE_RTL_ROM_CLIB=0 */
#ifndef CONFIG_MBED_ENABLED
#include <rt_lib_rom.h>
#endif
#ifdef __cplusplus
extern "C" {
#endif
#ifdef CONFIG_BUILD_ROM
#define USE_RTL_ROM_CLIB 0
#else
#define BUFFERED_PRINTF 0
#ifndef CONFIG_MBED_ENABLED
#define USE_RTL_ROM_CLIB 1
#else
#define USE_RTL_ROM_CLIB 0
#endif
#if defined(CONFIG_PLATFORM_8195A)+\
defined(CONFIG_PLATFORM_8711B)+\
defined(CONFIG_PLATFORM_8721D)+\
defined(CONFIG_PLATFORM_8195BHP)+\
defined(USE_STM322xG_EVAL)+\
defined(USE_STM324xG_EVAL)+\
defined(STM32F10X_XL) > 1
#error "Cannot define two or more platform at one time"
#endif
#if defined(CONFIG_PLATFORM_8195A)
#if defined (__IARSTDLIB__)
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include "diag.h"
#define strsep(str, delim) _strsep(str, delim)
#elif defined (__CC_ARM)
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include "diag.h"
#define strsep(str, delim) _strsep(str, delim)
#define _memset(dst, val, sz) memset(dst, val, sz)
#else
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "diag.h"
#include "strproc.h"
#include "basic_types.h"
#include "hal_misc.h"
#if USE_RTL_ROM_CLIB
#include "rtl_lib.h"
#endif
#undef printf
#undef sprintf
#undef snprintf
#undef atoi
#undef memcmp
#undef memcpy
#undef memset
#undef strcmp
#undef strcpy
#undef strlen
#undef strncmp
#undef strncpy
#undef strsep
#undef strtok
#if USE_RTL_ROM_CLIB
#undef memchr
#undef memmove
#undef strcat
#undef strchr
#undef strncat
#undef strstr
#endif
#if USE_RTL_ROM_CLIB
#if BUFFERED_PRINTF
extern int buffered_printf(const char* fmt, ...);
#define printf buffered_printf
#else
#define printf rtl_printf
#endif
#define sprintf rtl_sprintf
#define snprintf rtl_snprintf
#define memchr rtl_memchr
#define memcmp rtl_memcmp
#define memcpy rtl_memcpy
#define memmove rtl_memmove
#define memset rtl_memset
#define strcat rtl_strcat
#define strchr rtl_strchr
#define strcmp(s1, s2) rtl_strcmp((const char *)s1, (const char *)s2)
#define strcpy rtl_strcpy
#define strlen(str) rtl_strlen((const char *)str)
#define strncat rtl_strncat
#define strncmp(s1, s2, n) rtl_strncmp((const char *)s1, (const char *)s2, n)
#define strncpy rtl_strncpy
#define strstr rtl_strstr
#define strsep rtl_strsep
#define strtok rtl_strtok
#else
#if USE_CLIB_PATCH
extern int DiagSscanfPatch(const char *buf, const char *fmt, ...);
extern char* DiagStrtokPatch(char *str, const char* delim);
extern char* DiagStrstrPatch(char *string, char *substring);
extern int DiagSnPrintfPatch(char *buf, size_t size, const char *fmt, ...);
extern u32 DiagPrintfPatch(const char *fmt, ...);
extern u32 DiagSPrintfPatch(u8 *buf, const char *fmt, ...);
#define printf DiagPrintfPatch
#define sprintf DiagSPrintfPatch
#define snprintf DiagSnPrintfPatch
#define strstr(a, b) DiagStrstrPatch((char *)(a), (char *)(b))
#define strtok DiagStrtokPatch
#else
#define printf DiagPrintf
#define sprintf(fmt, arg...) DiagSPrintf((u8*)fmt, ##arg)
#if defined (__GNUC__)
#define snprintf DiagSnPrintf // NULL function
#define strstr(str1, str2) prvStrStr(str1, str2) // NULL function
#endif
#define strtok(str, delim) _strsep(str, delim)
#endif
#define memcmp(dst, src, sz) _memcmp(dst, src, sz)
#define memcpy(dst, src, sz) _memcpy(dst, src, sz)
#define memset(dst, val, sz) _memset(dst, val, sz)
#define strchr(s, c) _strchr(s, c) // for B-cut ROM
#define strcmp(str1, str2) prvStrCmp((const unsigned char *) str1, (const unsigned char *) str2)
#define strcpy(dest, src) _strcpy(dest, src)
#define strlen(str) prvStrLen((const unsigned char *) str)
#define strncmp(str1, str2, cnt) _strncmp(str1, str2, cnt)
#define strncpy(dest, src, count) _strncpy(dest, src, count)
#define strsep(str, delim) _strsep(str, delim)
#endif
#define atoi(str) prvAtoi(str)
#define strpbrk(cs, ct) _strpbrk(cs, ct) // for B-cut ROM
#if USE_CLIB_PATCH
#undef sscanf
#define sscanf DiagSscanfPatch
#else
#if defined (__GNUC__)
#undef sscanf //_sscanf
//extern int DiagSscanfPatch(const char *buf, const char *fmt, ...);
//#define sscanf DiagSscanfPatch
#define sscanf sscanf // use libc sscanf
#endif
#endif
#endif // defined (__IARSTDLIB__)
//
// memory management
//
#ifndef CONFIG_MBED_ENABLED
extern void *pvPortMalloc( size_t xWantedSize );
extern void vPortFree( void *pv );
#define malloc pvPortMalloc
#define free vPortFree
#endif
#include "platform_stdlib_rtl8195a.h"
#elif defined (CONFIG_PLATFORM_8711B)
#if defined (__IARSTDLIB__)
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <stdarg.h> /* va_list */
#include "diag.h"
#define strsep(str, delim) _strsep(str, delim)
#else
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h> /* va_list */
#include "diag.h"
#include "strproc.h"
#include "memproc.h"
#include "basic_types.h"
#if USE_RTL_ROM_CLIB
#include "rtl_lib.h"
#include "rom_libc_string.h"
#endif
#undef printf
#undef sprintf
#undef snprintf
#undef memchr
#undef memcmp
#undef memcpy
#undef memset
#undef memmove
#undef strcmp
#undef strcpy
#undef strlen
#undef strncmp
#undef strncpy
#undef strsep
#undef strtok
#undef strcat
#undef strchr
#undef strncat
#undef strstr
#undef atol
#undef atoi
#undef strpbrk
#if USE_RTL_ROM_CLIB
#if BUFFERED_PRINTF
extern int buffered_printf(const char* fmt, ...);
#define printf buffered_printf
#else
#define printf rtl_printf
#endif
#define sprintf rtl_sprintf
#define snprintf rtl_snprintf
#define vsnprintf rtl_vsnprintf
#else
#define printf DiagPrintf
#define sprintf(fmt, arg...) DiagSPrintf((u8*)fmt, ##arg)
#define snprintf DiagSnPrintf // NULL function
#define vsnprintf(buf, size, fmt, ap) VSprintf(buf, fmt, ap)
#endif
#define memchr __rtl_memchr_v1_00
#define memcmp(dst, src, sz) _memcmp(dst, src, sz)
#define memcpy(dst, src, sz) _memcpy(dst, src, sz)
#define memmove __rtl_memmove_v1_00
#define memset(dst, val, sz) _memset(dst, val, sz)
#define strchr(s, c) _strchr(s, c) // for B-cut ROM
#define strcmp(str1, str2) prvStrCmp((const unsigned char *) str1, (const unsigned char *) str2)
#define strcpy(dest, src) _strcpy(dest, src)
#define strlen(str) prvStrLen((const unsigned char *) str)
#define strsep(str, delim) _strsep(str, delim)
#define strstr(str1, str2) prvStrStr(str1, str2) // NULL function
#define strtok(str, delim) prvStrtok(str, delim)//_strsep(str, delim)
#define strcat __rtl_strcat_v1_00
#define strncmp(str1, str2, cnt) _strncmp(str1, str2, cnt)
#define strncpy(dest, src, count) _strncpy(dest, src, count)
#define strncat __rtl_strncat_v1_00
#define atol(str) strtol(str,NULL,10)
#define atoi(str) prvAtoi(str)
#define strpbrk(cs, ct) _strpbrk(cs, ct) // for B-cut ROM
#if defined (__GNUC__)
#undef sscanf
#define sscanf _sscanf_patch
#define rand Rand
#endif
//extern int _sscanf_patch(const char *buf, const char *fmt, ...);
//#define sscanf _sscanf_patch
#endif // defined (__IARSTDLIB__)
//
// memory management
//
extern void *pvPortMalloc( size_t xWantedSize );
extern void vPortFree( void *pv );
#define malloc pvPortMalloc
#define free vPortFree
#include "platform_stdlib_rtl8711b.h"
#elif defined (CONFIG_PLATFORM_8721D)
#include "platform_stdlib_rtl8721d.h"
#elif defined(CONFIG_PLATFORM_8195BHP)
#include "platform_stdlib_rtl8195bhp.h"
#elif defined(USE_STM322xG_EVAL) || defined(USE_STM324xG_EVAL) || defined(STM32F10X_XL)
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include "platform_stdlib_stm32.h"
#elif defined (CONFIG_PLATFORM_8710C)
#include "platform_stdlib_rtl8710c.h"
#else
#error "Undefined Platform stdlib"
#endif
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#include "basic_types.h"
#endif
#ifdef __cplusplus
}
#endif
#endif //__PLATFORM_STDLIB_H__

166
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/api/platform/platform_stdlib_rtl8195a.h Normal file
View File

@ -0,0 +1,166 @@
#ifndef PLATFORM_STDLIB_RTL8195A_H
#define PLATFORM_STDLIB_RTL8195A_H
#define USE_CLIB_PATCH 0
#if defined (__GNUC__)
/* build rom should set USE_RTL_ROM_CLIB=0 */
#if !defined(CONFIG_MBED_ENABLED)
#include <rt_lib_rom.h>
#endif
#endif
#if defined(CONFIG_BUILD_ROM) || defined(CONFIG_MBED_ENABLED)
#define USE_RTL_ROM_CLIB 0
#else
#define BUFFERED_PRINTF 0
#define USE_RTL_ROM_CLIB 1
#endif
#if defined (__IARSTDLIB__)
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include "diag.h"
#define strsep(str, delim) _strsep(str, delim)
#elif defined (__CC_ARM)
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include "diag.h"
#define strsep(str, delim) _strsep(str, delim)
#elif defined (CONFIG_MBED_ENABLED)
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include "diag.h"
#define strsep(str, delim) _strsep(str, delim)
#else
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "diag.h"
#include "strproc.h"
#include "basic_types.h"
#include "hal_misc.h"
#if USE_RTL_ROM_CLIB
#include "rtl_lib.h"
#endif
#undef printf
#undef sprintf
#undef snprintf
#undef atoi
#undef memcmp
#undef memcpy
#undef memset
#undef strcmp
#undef strcpy
#undef strlen
#undef strncmp
#undef strncpy
#undef strsep
#undef strtok
#if USE_RTL_ROM_CLIB
#undef memchr
#undef memmove
#undef strcat
#undef strchr
#undef strncat
#undef strstr
#endif
#if USE_RTL_ROM_CLIB
#if BUFFERED_PRINTF
extern int buffered_printf(const char* fmt, ...);
#define printf buffered_printf
#else
#define printf rtl_printf
#endif
#define sprintf rtl_sprintf
#define snprintf rtl_snprintf
#define memchr rtl_memchr
#define memcmp rtl_memcmp
#define memcpy rtl_memcpy
#define memmove rtl_memmove
#define memset rtl_memset
#define strcat rtl_strcat
#define strchr rtl_strchr
#define strcmp(s1, s2) rtl_strcmp((const char *)s1, (const char *)s2)
#define strcpy rtl_strcpy
#define strlen(str) rtl_strlen((const char *)str)
#define strncat rtl_strncat
#define strncmp(s1, s2, n) rtl_strncmp((const char *)s1, (const char *)s2, n)
#define strncpy rtl_strncpy
#define strstr rtl_strstr
#define strsep rtl_strsep
#define strtok rtl_strtok
#else
#if USE_CLIB_PATCH
extern int DiagSscanfPatch(const char *buf, const char *fmt, ...);
extern char* DiagStrtokPatch(char *str, const char* delim);
extern char* DiagStrstrPatch(char *string, char *substring);
extern int DiagSnPrintfPatch(char *buf, size_t size, const char *fmt, ...);
extern u32 DiagPrintfPatch(const char *fmt, ...);
extern u32 DiagSPrintfPatch(u8 *buf, const char *fmt, ...);
#define printf DiagPrintfPatch
#define sprintf DiagSPrintfPatch
#define snprintf DiagSnPrintfPatch
#define strstr(a, b) DiagStrstrPatch((char *)(a), (char *)(b))
#define strtok DiagStrtokPatch
#else
#define printf DiagPrintf
#define sprintf(fmt, arg...) DiagSPrintf((u8*)fmt, ##arg)
#if defined (__GNUC__)
#define snprintf DiagSnPrintf // NULL function
#define strstr(str1, str2) prvStrStr(str1, str2) // NULL function
#endif
#define strtok(str, delim) _strsep(str, delim)
#endif
#define memcmp(dst, src, sz) _memcmp(dst, src, sz)
#define memcpy(dst, src, sz) _memcpy(dst, src, sz)
#define memset(dst, val, sz) _memset(dst, val, sz)
#define strchr(s, c) _strchr(s, c) // for B-cut ROM
#define strcmp(str1, str2) prvStrCmp((const unsigned char *) str1, (const unsigned char *) str2)
#define strcpy(dest, src) _strcpy(dest, src)
#define strlen(str) prvStrLen((const unsigned char *) str)
#define strncmp(str1, str2, cnt) _strncmp(str1, str2, cnt)
#define strncpy(dest, src, count) _strncpy(dest, src, count)
#define strsep(str, delim) _strsep(str, delim)
#endif
#define atoi(str) prvAtoi(str)
#define strpbrk(cs, ct) _strpbrk(cs, ct) // for B-cut ROM
#if USE_CLIB_PATCH
#undef sscanf
#define sscanf DiagSscanfPatch
#else
#if defined (__GNUC__)
#undef sscanf //_sscanf
//extern int DiagSscanfPatch(const char *buf, const char *fmt, ...);
//#define sscanf DiagSscanfPatch
#define sscanf sscanf // use libc sscanf
#endif
#endif
#endif // defined (__IARSTDLIB__)
//
// memory management
//
#if defined(CONFIG_MBED_ENABLED)
//use libc memory functions
#else
extern void *pvPortMalloc( size_t xWantedSize );
extern void vPortFree( void *pv );
#define malloc pvPortMalloc
#define free vPortFree
#endif
#endif // PLATFORM_STDLIB_RTL8195A_H

1967
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/api/wifi/wifi_conf.c
View File

File diff suppressed because it is too large Load Diff

181
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/api/wifi/wifi_conf.h
View File

@ -12,26 +12,31 @@
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
* @file wifi_conf.h
* @author
* @version
* @brief This file provides user interface for Wi-Fi station and AP mode configuration
* base on the functionalities provided by Realtek Wi-Fi driver.
******************************************************************************
*/
/**
******************************************************************************
* @file wifi_conf.h
* @author
* @version
* @brief This file provides user interface for Wi-Fi station and AP mode configuration
* base on the functionalities provided by Realtek Wi-Fi driver.
******************************************************************************
*/
#ifndef __WIFI_API_H
#define __WIFI_API_H
#include "osdep_service.h"
#include "wifi_constants.h"
#include "wifi_structures.h"
#include "wifi_util.h"
#include "wifi_ind.h"
#ifndef CONFIG_MBED_ENABLED
/** @addtogroup nic NIC
* @ingroup wlan
* @brief NIC functions
* @{
*/
#include "wifi_constants.h"
#include "wifi_structures.h"
#include "wifi_util.h"
#include "wifi_ind.h"
#include <platform/platform_stdlib.h>
#endif
#ifdef __cplusplus
extern "C" {
@ -44,7 +49,15 @@
#define RTW_ENABLE_API_INFO
#ifdef RTW_ENABLE_API_INFO
#define RTW_API_INFO(args) do {printf args;} while(0)
#if defined(CONFIG_MBED_ENABLED)
extern __u32 GlobalDebugEnable;
#define RTW_API_INFO(...) do {\
if (GlobalDebugEnable) \
printf(__VA_ARGS__);\
}while(0)
#else
#define RTW_API_INFO printf
#endif
#else
#define RTW_API_INFO(args)
#endif
@ -225,18 +238,6 @@ int wifi_is_up(rtw_interface_t interface);
* RTW_STA_INTERFACE, RTW_AP_INTERFACE
* @return RTW_SUCCESS : if the interface is ready to
* transceive ethernet packets
* @return RTW_NOTFOUND : no AP with a matching SSID was
* found
* @return RTW_NOT_AUTHENTICATED: a matching AP was found but
* it won't let you
* authenticate. This can
* occur if this device is
* in the block list on the
* AP.
* @return RTW_NOT_KEYED: the device has authenticated and
* associated but has not completed
* the key exchange. This can occur
* if the passphrase is incorrect.
* @return RTW_ERROR : if the interface is not ready to
* transceive ethernet packets
*/
@ -297,6 +298,14 @@ int wifi_set_txpower(int poweridx);
*/
int wifi_get_associated_client_list(void * client_list_buffer, unsigned short buffer_length);
/**
* @brief Get connected AP's BSSID
* @param[out] bssid : the location where the AP BSSID will be stored
* @return RTW_SUCCESS : if result was successfully get
* @return RTW_ERROR : if result was not successfully get
*/
int wifi_get_ap_bssid(unsigned char *bssid);
/**
* @brief Get the SoftAP information.
* @param[out] ap_info: The location where the AP info will be stored.
@ -314,6 +323,15 @@ int wifi_get_ap_info(rtw_bss_info_t * ap_info, rtw_security_t* security);
*/
int wifi_set_country(rtw_country_code_t country_code);
/**
* @brief retrieved sta mode MAX data rate.
* @param[out] inidata_rate: MAX data rate.
* @return RTW_SUCCESS: If the INIDATA_RATE is successfully retrieved.
* @return RTW_ERROR: If the INIDATA_RATE is not retrieved.
* note: inidata_rate = 2 * (data rate), you need inidata_rate/2.0 to get the real rate
*/
int wifi_get_sta_max_data_rate(__u8 * inidata_rate);
/**
* @brief Retrieve the latest RSSI value.
* @param[out] pRSSI: Points to the integer to store the RSSI value gotten from driver.
@ -362,11 +380,21 @@ int wifi_register_multicast_address(rtw_mac_t *mac);
int wifi_unregister_multicast_address(rtw_mac_t *mac);
/**
* @brief Disable the adaptivity mode.
* @brief Setup the adaptivity mode.
* You can replace this weak function by the same name funcation to setup adaptivity mode you want.
* @param None
* @return If the function succeeds, the return value is 0.
*/
void wifi_set_mib(void);
_WEAK void wifi_set_mib(void);
/**
* @brief Setup country code.
* You can replace this weak function by the same name funcation to setup country code you want.
* @param None
* @return If the function succeeds, the return value is 0.
*/
//----------------------------------------------------------------------------//
_WEAK void wifi_set_country_code(void);
/**
* @brief Enable Wi-Fi RF.
@ -620,19 +648,31 @@ Set the network mode according to the data rate its supported.
*/
int wifi_set_network_mode(rtw_network_mode_t mode);
/**
* @brief Get the network mode.
* Driver works in BGN mode in default after driver initialization. This function is used to
* get the current wireless network mode for station mode.
* @param[in] pmode: Network mode to get.
* @return RTW_SUCCESS or RTW_ERROR.
*/
int wifi_get_network_mode(rtw_network_mode_t *pmode);
/**
* @brief Set the chip to start or stop the promiscuous mode.
* @param[in] enabled: enabled can be set 0, 1 and 2. if enabled is zero, disable the promisc, else enable the promisc.
* @param[in] enabled: enabled can be set 0, 1, 2, 3 and 4. if enabled is zero, disable the promisc, else enable the promisc.
* - 0 means disable the promisc.
* - 1 means enable the promisc.
* - 2 means enable the promisc special for length is used.
* - 1 means enable the promisc special for all ethernet frames.
* - 2 means enable the promisc special for Broadcast/Multicast ethernet frames.
* - 3 means enable the promisc special for all 802.11 frames.
* - 4 means enable the promisc special for Broadcast/Multicast 802.11 frames.
* @param[in] callback: the callback function which will
* receive and process the netowork data.
* @param[in] len_used: specify if the the promisc length is used.
* If len_used set to 1, packet length will be saved and transferred to callback function.
* @param[in] len_used: specify if the the promisc data length is used.
* If len_used set to 1, packet(frame data) length will be saved and transferred to callback function.
*
* @return RTW_SUCCESS or RTW_ERROR
* @note This function can be used to implement vendor specified simple configure.
* @note To fetch Ethernet frames, the len_used should be set to 1
*/
int wifi_set_promisc(rtw_rcr_level_t enabled, void (*callback)(unsigned char*, unsigned int, void*), unsigned char len_used);
@ -726,7 +766,6 @@ int wifi_get_autoreconnect(__u8 *mode);
*/
int wifi_get_last_error(void);
#ifdef CONFIG_CUSTOM_IE
#ifndef BIT
#define BIT(x) ((__u32)1 << (x))
@ -742,7 +781,7 @@ enum CUSTOM_IE_TYPE{
PROBE_RSP = BIT(1),
BEACON = BIT(2),
};
typedef uint32_t rtw_custom_ie_type_t;
typedef __u32 rtw_custom_ie_type_t;
#endif /* _CUSTOM_IE_TYPE_ */
/* ie format
@ -837,13 +876,79 @@ int wifi_disable_packet_filter(unsigned char filter_id);
int wifi_remove_packet_filter(unsigned char filter_id);
#endif
/**
* @brief Get antenna infomation.
* @param[in] antenna: Points to store the antenna value gotten from driver, 0: main, 1: aux.
* @return 0 if success, otherwise return -1.
*/
#ifdef CONFIG_ANTENNA_DIVERSITY
int wifi_get_antenna_info(unsigned char *antenna);
#endif // #ifdef CONFIG_ANTENNA_DIVERSITY
void wifi_set_indicate_mgnt(int enable);
/**
* @brief Get the information of MP driver
* @param[out] ability : 0x1 stand for mp driver, and 0x0 stand for normal driver
* @return RTW_SUCCESS
*/
int wifi_get_drv_ability(uint32_t *ability);
/**
* @brief Set channel plan into flash/efuse, must reboot after setting channel plan
* @param[in] channel_plan : the value of channel plan, define in wifi_constants.h
* @return RTW_SUCCESS or RTW_ERROR
*/
int wifi_set_channel_plan(uint8_t channel_plan);
/**
* @brief Get channel plan from calibration section
* @param[out] channel_plan : point to the value of channel plan, define in wifi_constants.h
* @return RTW_SUCCESS or RTW_ERROR
*/
int wifi_get_channel_plan(uint8_t *channel_plan);
#ifdef CONFIG_AP_MODE
/**
* @brief Enable packets forwarding in ap mode
* @return RTW_SUCCESS
*/
int wifi_enable_forwarding(void);
/**
* @brief Disable packets forwarding in ap mode
* @return RTW_SUCCESS
*/
int wifi_disable_forwarding(void);
#endif
#ifdef CONFIG_CONCURRENT_MODE
/**
* @brief Set flag for concurrent mode wlan1 issue_deauth when channel switched by wlan0
* usage: wifi_set_ch_deauth(0) -> wlan0 wifi_connect -> wifi_set_ch_deauth(1)
* @param[in] enable : 0 for disable and 1 for enable
* @return RTW_SUCCESS
*/
int wifi_set_ch_deauth(__u8 enable);
#endif
///@name Ameba1 Only
///@{
/**
* @brief enable AP sending QoS Null0 Data to poll Sta be alive
* @param[in] enabled: enabled can be set to 0,1.
* - 0 means enable.
* - 1 means disable.
* @return None
*/
void wifi_set_ap_polling_sta(__u8 enabled);
///@}
#ifdef __cplusplus
}
#endif
/*\@}*/
#endif // __WIFI_API_H
//----------------------------------------------------------------------------//

274
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/api/wifi/wifi_ind.c
View File

@ -1,274 +0,0 @@
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************/
#include "wifi/wifi_ind.h"
#include "wifi/wifi_conf.h"
#include "osdep_service.h"
#include "platform_stdlib.h"
/******************************************************
* Constants
******************************************************/
#define WIFI_INDICATE_MSG 0
#define WIFI_MANAGER_STACKSIZE 1300
#define WIFI_MANAGER_PRIORITY (0) //Actual priority is 4 since calling rtw_create_task
#define WIFI_MANAGER_Q_SZ 8
#define WIFI_EVENT_MAX_ROW 3
/******************************************************
* Globals
******************************************************/
static event_list_elem_t event_callback_list[WIFI_EVENT_MAX][WIFI_EVENT_MAX_ROW];
#if CONFIG_WIFI_IND_USE_THREAD
static rtw_worker_thread_t wifi_worker_thread;
#endif
//----------------------------------------------------------------------------//
#if CONFIG_WIFI_IND_USE_THREAD
static rtw_result_t rtw_send_event_to_worker(int event_cmd, char *buf, int buf_len, int flags)
{
rtw_event_message_t message;
int i;
rtw_result_t ret = RTW_SUCCESS;
char *local_buf = NULL;
if(event_cmd >= WIFI_EVENT_MAX)
return RTW_BADARG;
for(i = 0; i < WIFI_EVENT_MAX_ROW; i++){
if(event_callback_list[event_cmd][i].handler == NULL)
continue;
message.function = (event_handler_t)event_callback_list[event_cmd][i].handler;
message.buf_len = buf_len;
if(buf_len){
local_buf = (char*)pvPortMalloc(buf_len);
if(local_buf == NULL)
return RTW_NOMEM;
memcpy(local_buf, buf, buf_len);
//printf("\n!!!!!Allocate %p(%d) for evcmd %d\n", local_buf, buf_len, event_cmd);
}
message.buf = local_buf;
message.flags = flags;
message.user_data = event_callback_list[event_cmd][i].handler_user_data;
ret = rtw_push_to_xqueue(&wifi_worker_thread.event_queue, &message, 0);
if(ret != RTW_SUCCESS){
if(local_buf){
printf("\r\nrtw_send_event_to_worker: enqueue cmd %d failed and free %p(%d)\n", event_cmd, local_buf, buf_len);
vPortFree(local_buf);
}
break;
}
}
return ret;
}
#else
static rtw_result_t rtw_indicate_event_handle(int event_cmd, char *buf, int buf_len, int flags)
{
rtw_event_handler_t handle = NULL;
int i;
if(event_cmd >= WIFI_EVENT_MAX)
return RTW_BADARG;
for(i = 0; i < WIFI_EVENT_MAX_ROW; i++){
handle = event_callback_list[event_cmd][i].handler;
if(handle == NULL)
continue;
handle(buf, buf_len, flags, event_callback_list[event_cmd][i].handler_user_data);
}
return RTW_SUCCESS;
}
#endif
void wifi_indication( rtw_event_indicate_t event, char *buf, int buf_len, int flags)
{
//
// If upper layer application triggers additional operations on receiving of wext_wlan_indicate,
// please strictly check current stack size usage (by using uxTaskGetStackHighWaterMark() )
// , and tries not to share the same stack with wlan driver if remaining stack space is
// not available for the following operations.
// ex: using semaphore to notice another thread.
switch(event)
{
case WIFI_EVENT_DISCONNECT:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r %s():Disconnection indication received", __FUNCTION__);
#endif
break;
case WIFI_EVENT_CONNECT:
// For WPA/WPA2 mode, indication of connection does not mean data can be
// correctly transmitted or received. Data can be correctly transmitted or
// received only when 4-way handshake is done.
// Please check WIFI_EVENT_FOURWAY_HANDSHAKE_DONE event
#if(WIFI_INDICATE_MSG==1)
// Sample: return mac address
if(buf != NULL && buf_len == 6)
{
printf("\n\r%s():Connect indication received: %02x:%02x:%02x:%02x:%02x:%02x", __FUNCTION__,
buf[0],buf[1],buf[2],buf[3],buf[4],buf[5]);
}
#endif
break;
case WIFI_EVENT_FOURWAY_HANDSHAKE_DONE:
#if(WIFI_INDICATE_MSG==1)
if(buf != NULL)
{
if(buf_len == strlen(IW_EXT_STR_FOURWAY_DONE))
printf("\n\r%s():%s", __FUNCTION__, buf);
}
#endif
break;
case WIFI_EVENT_SCAN_RESULT_REPORT:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_SCAN_RESULT_REPORT\n", __func__);
#endif
break;
case WIFI_EVENT_SCAN_DONE:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_SCAN_DONE\n", __func__);
#endif
break;
case WIFI_EVENT_RECONNECTION_FAIL:
#if(WIFI_INDICATE_MSG==1)
if(buf != NULL){
if(buf_len == strlen(IW_EXT_STR_RECONNECTION_FAIL))
printf("\n\r%s", buf);
}
#endif
break;
case WIFI_EVENT_NO_NETWORK:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_NO_NETWORK\n", __func__);
#endif
break;
case WIFI_EVENT_RX_MGNT:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_RX_MGNT\n", __func__);
#endif
break;
#if CONFIG_ENABLE_P2P
case WIFI_EVENT_SEND_ACTION_DONE:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_SEND_ACTION_DONE\n", __func__);
#endif
break;
#endif //CONFIG_ENABLE_P2P
case WIFI_EVENT_STA_ASSOC:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_STA_ASSOC\n", __func__);
#endif
break;
case WIFI_EVENT_STA_DISASSOC:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_STA_DISASSOC\n", __func__);
#endif
break;
#ifdef CONFIG_WPS
case WIFI_EVENT_STA_WPS_START:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_STA_WPS_START\n", __func__);
#endif
break;
case WIFI_EVENT_WPS_FINISH:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_WPS_FINISH\n", __func__);
#endif
break;
case WIFI_EVENT_EAPOL_RECVD:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_EAPOL_RECVD\n", __func__);
#endif
break;
#endif
case WIFI_EVENT_BEACON_AFTER_DHCP:
#if(WIFI_INDICATE_MSG==1)
printf("\n\r%s(): WIFI_EVENT_BEACON_AFTER_DHCP\n", __func__);
#endif
break;
}
#if CONFIG_INIC_EN
inic_indicate_event(event, buf, buf_len, flags);
#endif//CONFIG_INIC_EN
#if CONFIG_WIFI_IND_USE_THREAD
rtw_send_event_to_worker(event, buf, buf_len, flags);
#else
rtw_indicate_event_handle(event, buf, buf_len, flags);
#endif
}
void wifi_reg_event_handler(unsigned int event_cmds, rtw_event_handler_t handler_func, void *handler_user_data)
{
int i = 0, j = 0;
if(event_cmds < WIFI_EVENT_MAX){
for(i=0; i < WIFI_EVENT_MAX_ROW; i++){
if(event_callback_list[event_cmds][i].handler == NULL){
for(j=0; j<WIFI_EVENT_MAX_ROW; j++){
if(event_callback_list[event_cmds][j].handler == handler_func){
return;
}
}
event_callback_list[event_cmds][i].handler = handler_func;
event_callback_list[event_cmds][i].handler_user_data = handler_user_data;
return;
}
}
}
}
void wifi_unreg_event_handler(unsigned int event_cmds, rtw_event_handler_t handler_func)
{
int i;
if(event_cmds < WIFI_EVENT_MAX){
for(i = 0; i < WIFI_EVENT_MAX_ROW; i++){
if(event_callback_list[event_cmds][i].handler == handler_func){
event_callback_list[event_cmds][i].handler = NULL;
event_callback_list[event_cmds][i].handler_user_data = NULL;
return;
}
}
}
}
void init_event_callback_list(){
memset(event_callback_list, 0, sizeof(event_callback_list));
}
int wifi_manager_init()
{
#if CONFIG_WIFI_IND_USE_THREAD
rtw_create_worker_thread(&wifi_worker_thread,
WIFI_MANAGER_PRIORITY,
WIFI_MANAGER_STACKSIZE,
WIFI_MANAGER_Q_SZ);
#endif
return 0;
}
void rtw_wifi_manager_deinit()
{
#if CONFIG_WIFI_IND_USE_THREAD
rtw_delete_worker_thread(&wifi_worker_thread);
#endif
}

23
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/api/wifi/wifi_ind.h
View File

@ -13,16 +13,23 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
* @file wifi_ind.h
* @author
* @version
* @brief This file provides the functions related to event handler mechanism.
******************************************************************************
*/
******************************************************************************
* @file wifi_ind.h
* @author
* @version
* @brief This file provides the functions related to event handler mechanism.
******************************************************************************
*/
#ifndef _WIFI_INDICATE_H
#define _WIFI_INDICATE_H
/** @addtogroup nic NIC
* @ingroup wlan
* @brief NIC functions
* @{
*/
#include "wifi_conf.h"
typedef void (*rtw_event_handler_t)(char *buf, int buf_len, int flags, void* handler_user_data );
@ -83,5 +90,7 @@ extern void wifi_reg_event_handler(unsigned int event_cmds, rtw_event_handler_t
*/
extern void wifi_unreg_event_handler(unsigned int event_cmds, rtw_event_handler_t handler_func);
/*\@}*/
#endif //_WIFI_INDICATE_H

482
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/api/wifi/wifi_promisc.c
View File

@ -1,482 +0,0 @@
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************/
#include "tcpip.h"
#include "wifi/wifi_conf.h"
#ifndef CONFIG_WLAN
#define CONFIG_WLAN 1
#endif
#if CONFIG_WLAN
#include <platform/platform_stdlib.h>
// Add extra interfaces to make release sdk able to determine promisc API linking
void promisc_deinit(void *padapter)
{
#ifdef CONFIG_PROMISC
_promisc_deinit(padapter);
#endif
}
int promisc_recv_func(void *padapter, void *rframe)
{
// Never reach here if not define CONFIG_PROMISC
#ifdef CONFIG_PROMISC
return _promisc_recv_func(padapter, rframe);
#else
return 0;
#endif
}
int promisc_set(rtw_rcr_level_t enabled, void (*callback)(unsigned char*, unsigned int, void*), unsigned char len_used)
{
#ifdef CONFIG_PROMISC
return _promisc_set(enabled, callback, len_used);
#else
return -1;
#endif
}
unsigned char is_promisc_enabled(void)
{
#ifdef CONFIG_PROMISC
return _is_promisc_enabled();
#else
return 0;
#endif
}
int promisc_get_fixed_channel(void *fixed_bssid, u8 *ssid, int *ssid_length)
{
#ifdef CONFIG_PROMISC
return _promisc_get_fixed_channel(fixed_bssid, ssid, ssid_length);
#else
return 0;
#endif
}
// End of Add extra interfaces
struct eth_frame {
struct eth_frame *prev;
struct eth_frame *next;
unsigned char da[6];
unsigned char sa[6];
unsigned int len;
unsigned char type;
signed char rssi;
};
#if CONFIG_INIC_CMD_RSP
#if defined(__IAR_SYSTEMS_ICC__)
#pragma pack(1)
#endif
struct inic_eth_frame {
unsigned char da[6];
unsigned char sa[6];
unsigned int len;
unsigned char type;
};
#if defined(__IAR_SYSTEMS_ICC__)
#pragma pack()
#endif
static struct inic_eth_frame *inic_frame, *inic_frame_tail = NULL;
static int inic_frame_cnt = 0;
#define MAX_INIC_FRAME_NUM 50 //maximum packets for each channel
extern void inic_c2h_msg(const char *atcmd, char status, char *msg, u16 msg_len);
#endif
struct eth_buffer {
struct eth_frame *head;
struct eth_frame *tail;
};
static struct eth_buffer eth_buffer;
#ifdef CONFIG_PROMISC
#define MAX_PACKET_FILTER_INFO 5
#define FILTER_ID_INIT_VALUE 10
rtw_packet_filter_info_t paff_array[MAX_PACKET_FILTER_INFO]={{0}, {0}, {0}, {0}, {0}};
static u8 packet_filter_enable_num = 0;
void promisc_init_packet_filter()
{
int i = 0;
for(i=0; i<MAX_PACKET_FILTER_INFO; i++){
paff_array[i].filter_id = FILTER_ID_INIT_VALUE;
paff_array[i].enable = 0;
paff_array[i].patt.mask_size = 0;
paff_array[i].rule = RTW_POSITIVE_MATCHING;
paff_array[i].patt.mask = NULL;
paff_array[i].patt.pattern = NULL;
}
packet_filter_enable_num = 0;
}
int promisc_add_packet_filter(u8 filter_id, rtw_packet_filter_pattern_t *patt, rtw_packet_filter_rule_t rule)
{
int i = 0;
while(i < MAX_PACKET_FILTER_INFO){
if(paff_array[i].filter_id == FILTER_ID_INIT_VALUE){
break;
}
i++;
}
if(i == MAX_PACKET_FILTER_INFO)
return -1;
paff_array[i].filter_id = filter_id;
paff_array[i].patt.offset= patt->offset;
paff_array[i].patt.mask_size = patt->mask_size;
paff_array[i].patt.mask = rtw_malloc(patt->mask_size);
memcpy(paff_array[i].patt.mask, patt->mask, patt->mask_size);
paff_array[i].patt.pattern= rtw_malloc(patt->mask_size);
memcpy(paff_array[i].patt.pattern, patt->pattern, patt->mask_size);
paff_array[i].rule = rule;
paff_array[i].enable = 0;
return 0;
}
int promisc_enable_packet_filter(u8 filter_id)
{
int i = 0;
while(i < MAX_PACKET_FILTER_INFO){
if(paff_array[i].filter_id == filter_id)
break;
i++;
}
if(i == MAX_PACKET_FILTER_INFO)
return -1;
paff_array[i].enable = 1;
packet_filter_enable_num++;
return 0;
}
int promisc_disable_packet_filter(u8 filter_id)
{
int i = 0;
while(i < MAX_PACKET_FILTER_INFO){
if(paff_array[i].filter_id == filter_id)
break;
i++;
}
if(i == MAX_PACKET_FILTER_INFO)
return -1;
paff_array[i].enable = 0;
packet_filter_enable_num--;
return 0;
}
int promisc_remove_packet_filter(u8 filter_id)
{
int i = 0;
while(i < MAX_PACKET_FILTER_INFO){
if(paff_array[i].filter_id == filter_id)
break;
i++;
}
if(i == MAX_PACKET_FILTER_INFO)
return -1;
paff_array[i].filter_id = FILTER_ID_INIT_VALUE;
paff_array[i].enable = 0;
paff_array[i].rule = 0;
if(paff_array[i].patt.mask){
rtw_mfree((void *) paff_array[i].patt.mask, paff_array[i].patt.mask_size);
paff_array[i].patt.mask = NULL;
}
if(paff_array[i].patt.pattern){
rtw_mfree((void *) paff_array[i].patt.pattern, paff_array[i].patt.mask_size);
paff_array[i].patt.pattern = NULL;
}
paff_array[i].patt.mask_size = 0;
return 0;
}
#endif
/* Make callback simple to prevent latency to wlan rx when promiscuous mode */
static void promisc_callback(unsigned char *buf, unsigned int len, void* userdata)
{
struct eth_frame *frame = (struct eth_frame *) rtw_malloc(sizeof(struct eth_frame));
if(frame) {
frame->prev = NULL;
frame->next = NULL;
memcpy(frame->da, buf, 6);
memcpy(frame->sa, buf+6, 6);
frame->len = len;
frame->rssi = ((ieee80211_frame_info_t *)userdata)->rssi;
_lock lock;
_irqL irqL;
rtw_enter_critical(&lock, &irqL);
if(eth_buffer.tail) {
eth_buffer.tail->next = frame;
frame->prev = eth_buffer.tail;
eth_buffer.tail = frame;
}
else {
eth_buffer.head = frame;
eth_buffer.tail = frame;
}
rtw_exit_critical(&lock, &irqL);
}
}
struct eth_frame* retrieve_frame(void)
{
struct eth_frame *frame = NULL;
_lock lock;
_irqL irqL;
rtw_enter_critical(&lock, &irqL);
if(eth_buffer.head) {
frame = eth_buffer.head;
if(eth_buffer.head->next) {
eth_buffer.head = eth_buffer.head->next;
eth_buffer.head->prev = NULL;
}
else {
eth_buffer.head = NULL;
eth_buffer.tail = NULL;
}
}
rtw_exit_critical(&lock, &irqL);
return frame;
}
static void promisc_test(int duration, unsigned char len_used)
{
int ch;
unsigned int start_time;
struct eth_frame *frame;
eth_buffer.head = NULL;
eth_buffer.tail = NULL;
wifi_enter_promisc_mode();
wifi_set_promisc(RTW_PROMISC_ENABLE, promisc_callback, len_used);
for(ch = 1; ch <= 13; ch ++) {
if(wifi_set_channel(ch) == 0)
printf("\n\n\rSwitch to channel(%d)", ch);
start_time = rtw_get_current_time();
while(1) {
unsigned int current_time = rtw_get_current_time();
if(rtw_systime_to_ms(current_time - start_time) < (unsigned int)duration) {
frame = retrieve_frame();
if(frame) {
int i;
printf("\n\rDA:");
for(i = 0; i < 6; i ++)
printf(" %02x", frame->da[i]);
printf(", SA:");
for(i = 0; i < 6; i ++)
printf(" %02x", frame->sa[i]);
printf(", len=%d", frame->len);
printf(", RSSI=%d", frame->rssi);
#if CONFIG_INIC_CMD_RSP
if(inic_frame_tail){
if(inic_frame_cnt < MAX_INIC_FRAME_NUM){
memcpy(inic_frame_tail->da, frame->da, 6);
memcpy(inic_frame_tail->sa, frame->sa, 6);
inic_frame_tail->len = frame->len;
inic_frame_tail++;
inic_frame_cnt++;
}
}
#endif
rtw_mfree((void *) frame, sizeof(struct eth_frame));
}
else
rtw_mdelay_os(1); //delay 1 tick
}
else
break;
}
#if CONFIG_INIC_CMD_RSP
if(inic_frame){
inic_c2h_msg("ATWM", RTW_SUCCESS, (char *)inic_frame, sizeof(struct inic_eth_frame)*inic_frame_cnt);
memset(inic_frame, '\0', sizeof(struct inic_eth_frame)*MAX_INIC_FRAME_NUM);
inic_frame_tail = inic_frame;
inic_frame_cnt = 0;
rtw_msleep_os(10);
}
#endif
}
wifi_set_promisc(RTW_PROMISC_DISABLE, NULL, 0);
while((frame = retrieve_frame()) != NULL)
rtw_mfree((void *) frame, sizeof(struct eth_frame));
}
static void promisc_callback_all(unsigned char *buf, unsigned int len, void* userdata)
{
struct eth_frame *frame = (struct eth_frame *) rtw_malloc(sizeof(struct eth_frame));
if(frame) {
frame->prev = NULL;
frame->next = NULL;
memcpy(frame->da, buf+4, 6);
memcpy(frame->sa, buf+10, 6);
frame->len = len;
/*
* type is the first byte of Frame Control Field of 802.11 frame
* If the from/to ds information is needed, type could be reused as follows:
* frame->type = ((((ieee80211_frame_info_t *)userdata)->i_fc & 0x0100) == 0x0100) ? 2 : 1;
* 1: from ds; 2: to ds
*/
frame->type = *buf;
frame->rssi = ((ieee80211_frame_info_t *)userdata)->rssi;
_lock lock;
_irqL irqL;
rtw_enter_critical(&lock, &irqL);
if(eth_buffer.tail) {
eth_buffer.tail->next = frame;
frame->prev = eth_buffer.tail;
eth_buffer.tail = frame;
}
else {
eth_buffer.head = frame;
eth_buffer.tail = frame;
}
rtw_exit_critical(&lock, &irqL);
}
}
static void promisc_test_all(int duration, unsigned char len_used)
{
int ch;
unsigned int start_time;
struct eth_frame *frame;
eth_buffer.head = NULL;
eth_buffer.tail = NULL;
wifi_enter_promisc_mode();
wifi_set_promisc(RTW_PROMISC_ENABLE_2, promisc_callback_all, len_used);
for(ch = 1; ch <= 13; ch ++) {
if(wifi_set_channel(ch) == 0)
printf("\n\n\rSwitch to channel(%d)", ch);
start_time = rtw_get_current_time();
while(1) {
unsigned int current_time = rtw_get_current_time();
if(rtw_systime_to_ms(current_time - start_time) < (unsigned int)duration) {
frame = retrieve_frame();
if(frame) {
int i;
printf("\n\rTYPE: 0x%x, ", frame->type);
printf("DA:");
for(i = 0; i < 6; i ++)
printf(" %02x", frame->da[i]);
printf(", SA:");
for(i = 0; i < 6; i ++)
printf(" %02x", frame->sa[i]);
printf(", len=%d", frame->len);
printf(", RSSI=%d", frame->rssi);
#if CONFIG_INIC_CMD_RSP
if(inic_frame_tail){
if(inic_frame_cnt < MAX_INIC_FRAME_NUM){
memcpy(inic_frame_tail->da, frame->da, 6);
memcpy(inic_frame_tail->sa, frame->sa, 6);
inic_frame_tail->len = frame->len;
inic_frame_tail->type = frame->type;
inic_frame_tail++;
inic_frame_cnt++;
}
}
#endif
rtw_mfree((void *) frame, sizeof(struct eth_frame));
}
else
rtw_mdelay_os(1); //delay 1 tick
}
else
break;
}
#if CONFIG_INIC_CMD_RSP
if(inic_frame){
inic_c2h_msg("ATWM", RTW_SUCCESS, (char *)inic_frame, sizeof(struct inic_eth_frame)*inic_frame_cnt);
memset(inic_frame, '\0', sizeof(struct inic_eth_frame)*MAX_INIC_FRAME_NUM);
inic_frame_tail = inic_frame;
inic_frame_cnt = 0;
rtw_msleep_os(10);
}
#endif
}
wifi_set_promisc(RTW_PROMISC_DISABLE, NULL, 0);
while((frame = retrieve_frame()) != NULL)
rtw_mfree((void *) frame, sizeof(struct eth_frame));
}
void cmd_promisc(int argc, char **argv)
{
int duration;
#if CONFIG_INIC_CMD_RSP
inic_frame_tail = inic_frame = rtw_malloc(sizeof(struct inic_eth_frame)*MAX_INIC_FRAME_NUM);
if(inic_frame == NULL){
inic_c2h_msg("ATWM", RTW_BUFFER_UNAVAILABLE_TEMPORARY, NULL, 0);
return;
}
#endif
#ifdef CONFIG_PROMISC
wifi_init_packet_filter();
#endif
if((argc == 2) && ((duration = atoi(argv[1])) > 0))
//promisc_test(duration, 0);
promisc_test_all(duration, 0);
else if((argc == 3) && ((duration = atoi(argv[1])) > 0) && (strcmp(argv[2], "with_len") == 0))
promisc_test(duration, 1);
else
printf("\n\rUsage: %s DURATION_SECONDS [with_len]", argv[0]);
#if CONFIG_INIC_CMD_RSP
if(inic_frame)
rtw_mfree(inic_frame, sizeof(struct inic_eth_frame)*MAX_INIC_FRAME_NUM);
inic_frame_tail = NULL;
inic_frame_cnt = 0;
#endif
}
#endif //#if CONFIG_WLAN

1344
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/api/wifi/wifi_util.c
View File

File diff suppressed because it is too large Load Diff

2
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/api/wifi/wifi_util.h
View File

@ -28,6 +28,8 @@ extern "C" {
int wext_get_ssid(const char *ifname, __u8 *ssid);
int wext_set_ssid(const char *ifname, const __u8 *ssid, __u16 ssid_len);
int wext_set_bssid(const char *ifname, const __u8 *bssid);
int wext_get_bssid(const char *ifname, __u8 *bssid);
int wext_set_auth_param(const char *ifname, __u16 idx, __u32 value);
int wext_set_key_ext(const char *ifname, __u16 alg, const __u8 *addr, int key_idx, int set_tx, const __u8 *seq, __u16 seq_len, __u8 *key, __u16 key_len);
int wext_get_enc_ext(const char *ifname, __u16 *alg, __u8 *key_idx, __u8 *passphrase);

303
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/autoconf.h
View File

@ -14,7 +14,6 @@
* limitations under the License.
******************************************************************************/
#ifndef WLANCONFIG_H
#define WLANCONFIG_H
@ -22,19 +21,42 @@
* Include user defined options first. Anything not defined in these files
* will be set to standard values. Override anything you dont like!
*/
#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B) || defined(CONFIG_HARDWARE_8188F)
#include "platform_opts.h"
#endif
#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B)
#define CONFIG_PLATFORM_AMEBA_X
#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B) || defined(CONFIG_PLATFORM_8721D) || defined(CONFIG_PLATFORM_8195BHP)
#ifndef CONFIG_PLATFORM_AMEBA_X
#define CONFIG_PLATFORM_AMEBA_X 1
#endif
#if !defined(CONFIG_PLATFORM_AMEBA_X)
#define PLATFORM_FREERTOS 1
#define CONFIG_GSPI_HCI
#else
#define CONFIG_LX_HCI
#define CONFIG_PLATFORM_AMEBA_X 0
#endif
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#if defined(CONFIG_PLATFORM_8195BHP)
#define CONFIG_AXI_HCI
#else
#define CONFIG_LX_HCI
#endif
#else
#define PLATFORM_FREERTOS 1
#ifdef USE_SDIO_INTERFACE
#define CONFIG_SDIO_HCI
#else
#define CONFIG_GSPI_HCI
#endif
#endif // #if (CONFIG_PLATFORM_AMEBA_X == 1)
#if defined(CONFIG_HARDWARE_8188F) || defined(CONFIG_HARDWARE_8192E)|| defined(CONFIG_HARDWARE_8723D) || defined(CONFIG_HARDWARE_8821C) || defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_HARDWARE_8188E) || defined(CONFIG_PLATFORM_8721D)
#define CONFIG_FW_C2H_PKT
#define PHYDM_LINUX_CODING_STYLE 1
#else
#define PHYDM_LINUX_CODING_STYLE 0
#endif
#if (PHYDM_LINUX_CODING_STYLE == 1)
#define PHYDM_NEW_INTERFACE 1
#else
#define PHYDM_NEW_INTERFACE 0
#endif
#ifndef CONFIG_INIC_EN
@ -51,20 +73,20 @@
#define RTW_NOTCH_FILTER 0
#define CONFIG_EMBEDDED_FWIMG
#define CONFIG_PHY_SETTING_WITH_ODM
#if !defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#define CONFIG_ODM_REFRESH_RAMASK
#define HAL_MAC_ENABLE 1
#define HAL_BB_ENABLE 1
#define HAL_RF_ENABLE 1
#endif
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
/* Patch when dynamic mechanism is not ready */
//#define CONFIG_DM_PATCH
#endif
//#define CONFIG_DEBUG
//#define CONFIG_DEBUG_RTL871X
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define CONFIG_MEM_MONITOR MEM_MONITOR_SIMPLE
#define WLAN_INTF_DBG 0
//#define CONFIG_DEBUG_DYNAMIC
@ -81,15 +103,20 @@
//#define CONFIG_DONT_CARE_TP
//#define CONFIG_HIGH_TP
//#define CONFIG_MEMORY_ACCESS_ALIGNED
#ifndef PLATFORM_CMSIS_RTOS // unsupported feature
#define CONFIG_POWER_SAVING
#endif
#ifdef CONFIG_POWER_SAVING
#define CONFIG_IPS
#define CONFIG_LPS
//#define CONFIG_LPS_LCLK
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#ifdef CONFIG_LPS_LCLK
#define CONFIG_DETECT_CPWM_BY_POLLING
#define LPS_RPWM_WAIT_MS 300
#endif
#else
#define CONFIG_LPS_32K
#define TDMA_POWER_SAVING
#endif
#define CONFIG_WAIT_PS_ACK
#endif
@ -105,8 +132,12 @@
#define RX_AMSDU 0
#endif
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if !defined(CONFIG_PLATFORM_8711B)
#if defined(CONFIG_PLATFORM_8711B)
#define CONFIG_FW_C2H_PKT
#endif
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#if defined(CONFIG_PLATFORM_8195A)
#define CONFIG_USE_TCM_HEAP 1 /* USE TCM HEAP */
#endif
#define CONFIG_RECV_TASKLET_THREAD
@ -126,7 +157,7 @@
#error "CONFIG_ISR_THREAD_MODE_POLLING and CONFIG_ISR_THREAD_MODE_INTERRUPT are mutually exclusive. "
#endif
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
/* CRC DMEM optimized mode consume 1k less SRM memory consumption */
#define CRC_IMPLEMENTATION_MODE CRC_IMPLEMENTATION_DMEM_OPTIMIZED
#endif
@ -136,7 +167,7 @@
#define AES_IMPLEMENTATION_MODE AES_IMPLEMENTATION_DMEM_OPTIMIZED
#define USE_SKB_AS_XMITBUF 1
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define USE_XMIT_EXTBUFF 1
#else
#define USE_XMIT_EXTBUFF 0
@ -149,7 +180,7 @@
#define NOT_SUPPORT_VHT
#define NOT_SUPPORT_40M
#define NOT_SUPPORT_80M
#ifndef CONFIG_PLATFORM_8711B
#if defined(CONFIG_PLATFORM_8195A)
#define NOT_SUPPORT_BBSWING
#endif
#define NOT_SUPPORT_OLD_CHANNEL_PLAN
@ -164,7 +195,7 @@
#define CONFIG_AUTO_RECONNECT 1
#define ENABLE_HWPDN_PIN
#define SUPPORT_SCAN_BUF 1
#if !defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#define BE_I_CUT 1
#endif
@ -175,7 +206,6 @@
//#define CONFIG_WPA2_PREAUTH
#define PSK_SUPPORT_TKIP 1
#endif
//#define AP_PSK_SUPPORT_TKIP
/* For promiscuous mode */
#define CONFIG_PROMISC
@ -190,7 +220,7 @@
// for probe request with custom vendor specific IE
#define CONFIG_CUSTOM_IE
#if !defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 0)
/* For multicast */
#define CONFIG_MULTICAST
#endif
@ -201,20 +231,11 @@
#if defined(CONFIG_PLATFORM_8195A)
#define CONFIG_RUNTIME_PORT_SWITCH
#endif
#if defined(CONFIG_HARDWARE_8188F)
#define NET_IF_NUM 2
#else
#define NET_IF_NUM ((CONFIG_ETHERNET) + (CONFIG_WLAN) + 1)
#endif
#else
#if defined(CONFIG_HARDWARE_8188F)
#define NET_IF_NUM 1
#else
#define NET_IF_NUM ((CONFIG_ETHERNET) + (CONFIG_WLAN))
#endif
#endif
/****************** For EAP auth configurations *******************/
#define CONFIG_TLS 0
#define CONFIG_PEAP 0
@ -222,15 +243,17 @@
// DO NOT change the below config of EAP
#ifdef PRE_CONFIG_EAP
#undef CONFIG_TLS
#define CONFIG_TLS 1
#undef CONFIG_PEAP
#define CONFIG_PEAP 1
#undef CONFIG_TTLS
#define CONFIG_TTLS 1
#endif
// enable 1X code in lib_wlan as default (increase 380 bytes)
#ifndef PLATFORM_CMSIS_RTOS // unsupported feature
#define CONFIG_EAP
#endif
#if CONFIG_TLS || CONFIG_PEAP || CONFIG_TTLS
#define EAP_REMOVE_UNUSED_CODE 1
#endif
@ -268,7 +291,7 @@
#define CONFIG_AP_MODE
extern unsigned char g_user_ap_sta_num;
#define USER_AP_STA_NUM g_user_ap_sta_num
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define AP_STA_NUM 3 //2014/10/27 modify to 3
#define USE_DEDICATED_BCN_TX 0
#if USE_DEDICATED_BCN_TX
@ -284,7 +307,7 @@ extern unsigned int g_ap_sta_num;
#define CONFIG_AP_POLLING_CLIENT_ALIVE
#endif
#define CONFIG_NATIVEAP_MLME
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define CONFIG_INTERRUPT_BASED_TXBCN
#endif
#ifdef CONFIG_INTERRUPT_BASED_TXBCN
@ -292,14 +315,14 @@ extern unsigned int g_ap_sta_num;
#define CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
#endif
// #define CONFIG_GK_REKEY
#if !defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#define USE_DEDICATED_BCN_TX 1
#endif
#if CONFIG_INIC_EN
// #define REPORT_STA_EVENT //useless
#endif
#else
#if !defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#define USE_DEDICATED_BCN_TX 0
#endif
#endif
@ -308,14 +331,14 @@ extern unsigned int g_ap_sta_num;
#error "If CONFIG_GK_REKEY when CONFIG_AP_MODE, need to CONFIG_MULTIPLE_WPA_STA"
#endif
#if !defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#if !defined(CONFIG_AP_MODE) && defined(CONFIG_CONCURRENT_MODE)
#error "If CONFIG_CONCURRENT_MODEE, need to CONFIG_AP_MODE"
#endif
#endif
/* For efuse or flash config */
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define CONFIG_RW_PHYSICAL_EFUSE 0 // Mask efuse user blocks
#define CONFIG_HIDE_PROTECT_EFUSE 1
#define CONFIG_ADAPTOR_INFO_CACHING_FLASH 1
@ -333,7 +356,7 @@ extern unsigned int g_ap_sta_num;
#define MP_DRIVER 1
#define CONFIG_MP_IWPRIV_SUPPORT
// #define HAL_EFUSE_MEMORY
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define MP_REG_TEST
#endif
#else
@ -342,10 +365,19 @@ extern unsigned int g_ap_sta_num;
//Control wifi mcu function
#define CONFIG_LITTLE_WIFI_MCU_FUNCTION_THREAD
#define CONFIG_ODM_REFRESH_RAMASK
//#define CONFIG_ANTENNA_DIVERSITY
//#define CONFIG_BT_COEXIST
#endif
#endif // #ifdef CONFIG_MP_INCLUDED
#if defined(CONFIG_PLATFORM_AMEBA_X)
#ifdef CONFIG_BT_COEXIST
#undef NOT_SUPPORT_BT
#define CONFIG_BT_MAILBOX
#define CONFIG_BT_EFUSE
//#define CONFIG_BT_TWO_ANTENNA
#endif
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#if defined(CONFIG_PLATFORM_8195A)
#undef CONFIG_RTL8195A
#define CONFIG_RTL8195A
@ -363,9 +395,109 @@ extern unsigned int g_ap_sta_num;
#define CONFIG_MOVE_PSK_TO_ROM
#define CONFIG_WOWLAN
#define CONFIG_TRAFFIC_PROTECT
#define CONFIG_FABVERSION_UMC 1
#if (CONFIG_INIC_EN == 1)
#undef CONFIG_PROMISC
#undef CONFIG_WPS
#undef CONFIG_AP_MODE
#undef CONFIG_NATIVEAP_MLME
#undef CONFIG_INTERRUPT_BASED_TXBCN
#undef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
#undef USE_DEDICATED_BCN_TX
//#undef SUPPORT_SCAN_BUF
#undef CONFIG_CONCURRENT_MODE
#undef CONFIG_AUTO_RECONNECT
#endif
#endif
#if defined(CONFIG_PLATFORM_8721D)
#ifndef CONFIG_RTL8721D
#define CONFIG_RTL8721D
#endif
#undef NOT_SUPPORT_5G
#undef CONFIG_ADAPTOR_INFO_CACHING_FLASH
#define CONFIG_ADAPTOR_INFO_CACHING_FLASH 0
#define CONFIG_EFUSE_SEPARATE
#define CONFIG_WOWLAN
#define CONFIG_TRAFFIC_PROTECT
#define SUPPORT_5G_CHANNEL 1
#define DBG_DM_DIG 0 // DebugComponents: bit0
//#define CONFIG_SUPPORT_DYNAMIC_TXPWR //rtw_phydm_fill_desc_dpt todo
#if (CONFIG_INIC_EN == 1)
#undef CONFIG_PROMISC
#undef CONFIG_WPS
#undef CONFIG_AP_MODE
#undef CONFIG_NATIVEAP_MLME
#undef CONFIG_INTERRUPT_BASED_TXBCN
#undef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
#undef USE_DEDICATED_BCN_TX
//#undef SUPPORT_SCAN_BUF
#undef CONFIG_CONCURRENT_MODE
#undef CONFIG_AUTO_RECONNECT
#endif
#endif
#if defined(CONFIG_PLATFORM_8195BHP)
#define CONFIG_RTL8195B
#undef CONFIG_EAP
// #undef CONFIG_ADAPTOR_INFO_CACHING_FLASH
// #define CONFIG_ADAPTOR_INFO_CACHING_FLASH 0
#undef CHECK_FLASH_VALID_MASK
#define CHECK_FLASH_VALID_MASK 0
#undef CHECK_EFUSE_VALID_MASK
#define CHECK_EFUSE_VALID_MASK 0
#undef CONFIG_RW_PHYSICAL_EFUSE
#define CONFIG_RW_PHYSICAL_EFUSE 1 // efuse_get realraw
#undef NOT_SUPPORT_5G
#undef NOT_SUPPORT_VHT
#undef NOT_SUPPORT_40M
#undef NOT_SUPPORT_80M
#define CONFIG_BW_80
#define CONFIG_80211AC_VHT
#undef CONFIG_IPS
// #define CONFIG_NO_FW
#define CONFIG_EX_FW_BIN
#define LOAD_FW_HEADER_FROM_DRIVER
// #define RTW_IQK_FW_OFFLOAD
#define CONFIG_PHY_CAPABILITY_QUERY
#define CONFIG_FW_C2H_PKT
#define RTK_AC_SUPPORT
#define PHYDM_NEW_INTERFACE 1
#define CONFIG_ISR_THREAD_MODE_INTERRUPT /* Wlan IRQ Interrupt Mode*/
// #define CONFIG_WLAN_RF_CNTL
#define SUPPORT_5G_CHANNEL 1
#define SUPPORTABLITY_PHYDMLIZE 1
#define CONFIG_DFS
#ifdef CONFIG_DFS
#define CONFIG_DFS_ACTION
#endif
#undef CONFIG_RF_GAIN_OFFSET
#define DBG_DM_DIG 0 // DebugComponents: bit0
// #define CONFIG_DEBUG
#define RTW_HALMAC /* Use HALMAC architecture */
#define RTW_HALMAC_MU_BF 0
#define RTW_HALMAC_SU_BF 0
#define RTW_HALMAC_BT_COEX 0
#define RTW_HALMAC_DUMP_INFO 0
#define RTW_HALMAC_TXBF 0
#define RTW_HALMAC_FW_OFFLOAD 0
#define RTW_HALMAC_PHYSICAL_EFUSE 0
#define RTW_HALMAC_SIZE_OPTIMIZATION 1
#define RTW_HALMAC_SDIO_CIA_READ 0
#define RTW_HALMAC_LTE_COEX 0
#define CONFIG_MAC_LOOPBACK_DRIVER_RTL8195B 0
#endif
#elif defined(CONFIG_HARDWARE_8188F)
#define CONFIG_RTL8188F
#elif defined(CONFIG_HARDWARE_8192E)
#define CONFIG_RTL8192E
#elif defined(CONFIG_HARDWARE_8821C)
#define CONFIG_RTL8821C
#elif defined(CONFIG_HARDWARE_8723D)
#define CONFIG_RTL8723D
#elif defined(CONFIG_HARDWARE_8188E)
#define CONFIG_RTL8188E
#else
#define CONFIG_RTL8188E
#endif
@ -386,37 +518,57 @@ extern unsigned int g_ap_sta_num;
#define RTL8188E_SUPPORT 0
#define RTL8188F_SUPPORT 0
#define RTL8711B_SUPPORT 0
#define RTL8721D_SUPPORT 0
#define RTL8821C_SUPPORT 0
#define RTL8723D_SUPPORT 0
#if defined(CONFIG_PLATFORM_8195A)
#undef RTL8195A_SUPPORT
#define RTL8195A_SUPPORT 1
#elif defined(CONFIG_PLATFORM_8711B)
#undef RTL8711B_SUPPORT
#define RTL8711B_SUPPORT 1
#elif defined(CONFIG_PLATFORM_8721D)
#undef RTL8721D_SUPPORT
#define RTL8721D_SUPPORT 1
#elif defined(CONFIG_PLATFORM_8195BHP)
#undef RTL8195B_SUPPORT
#define RTL8195B_SUPPORT 1
#elif defined(CONFIG_HARDWARE_8188F)
#undef RTL8188F_SUPPORT
#define RTL8188F_SUPPORT 1
#elif defined(CONFIG_HARDWARE_8192E)
#undef RTL8192E_SUPPORT
#define RTL8192E_SUPPORT 1
#elif defined(CONFIG_HARDWARE_8821C)
#undef RTL8821C_SUPPORT
#define RTL8821C_SUPPORT 1
#elif defined(CONFIG_HARDWARE_8723D)
#undef RTL8723D_SUPPORT
#define RTL8723D_SUPPORT 1
#elif defined(CONFIG_HARDWARE_8188E)
#undef RTL8188E_SUPPORT
#define RTL8188E_SUPPORT 1
#else
#undef RTL8188E_SUPPORT
#define RTL8188E_SUPPORT 1
#endif
#define TEST_CHIP_SUPPORT 0
#define RTL8188E_FOR_TEST_CHIP 0
#define RTL8188E_FPGA_TRUE_PHY_VERIFICATION 0
// for Debug message
#define DBG 0
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#if(DBG == 0)
#define ROM_E_RTW_MSG 1
#define ROM_F_RTW_MSG 1
#if (CONFIG_INIC_EN == 0) && (PHYDM_LINUX_CODING_STYLE == 0)
/* For DM debug*/
// BB
#define DBG_RX_INFO 1
#define DBG_DM_DIG 1 // DebugComponents: bit0
#define DBG_DM_RA_MASK 1 // DebugComponents: bit1
#define DBG_DM_ANT_DIV 1 // DebugComponents: bit6
#define DBG_TX_RATE 1 // DebugComponents: bit9
#define DBG_DM_RA 1 // DebugComponents: bit9
#define DBG_DM_DIG 1 // DebugComponents: bit0
#define DBG_DM_ADAPTIVITY 1 // DebugComponents: bit16
#define DBG_DM_ADAPTIVITY 1 // DebugComponents: bit17
// RF
#define DBG_PWR_TRACKING 1 // DebugComponents: bit24
#define DBG_RF_IQK 1 // DebugComponents: bit26
@ -424,13 +576,23 @@ extern unsigned int g_ap_sta_num;
#define DBG_PWR_INDEX 1 // DebugComponents: bit30
#endif
#endif
#endif
/* For DM support */
#if defined(CONFIG_RTL8188F)
#if defined(CONFIG_RTL8188F)
#define RATE_ADAPTIVE_SUPPORT 0
#elif defined(CONFIG_RTL8821C)
#define RATE_ADAPTIVE_SUPPORT 0
#elif defined(CONFIG_RTL8192E)
#define RATE_ADAPTIVE_SUPPORT 0
#elif defined(CONFIG_RTL8723D)
#define RATE_ADAPTIVE_SUPPORT 0
#elif defined(CONFIG_PLATFORM_8711B)
#define RATE_ADAPTIVE_SUPPORT 1
#define RATE_ADAPTIVE_SUPPORT 0
#define CONFIG_ODM_REFRESH_RAMASK
#elif defined(CONFIG_PLATFORM_8721D)
#define RATE_ADAPTIVE_SUPPORT 0
//#define CONFIG_ODM_REFRESH_RAMASK
#else
#define RATE_ADAPTIVE_SUPPORT 1
#endif
@ -444,13 +606,13 @@ extern unsigned int g_ap_sta_num;
#define CONFIG_RTW_ADAPTIVITY_DML 0
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define CONFIG_POWER_TRAINING_WIL 0 // in RA
#else
#define POWER_BY_RATE_SUPPORT 0
#endif
#if defined(CONFIG_PLATFORM_AMEBA_X)
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define RTL8195A_FOR_TEST_CHIP 0
//#define CONFIG_WIFI_TEST 1
@ -466,7 +628,13 @@ extern unsigned int g_ap_sta_num;
#endif
#ifdef CONFIG_FPGA
//Enable mac loopback for test mode (Ameba)
#define CONFIG_TWO_MAC_DRIVER // for test mode
#ifdef CONFIG_WIFI_NORMAL
#define CONFIG_TWO_MAC_DRIVER // for test mode
#else //CONFIG_WIFI_VERIFY
#define ENABLE_MAC_LB_FOR_TEST_MODE
#endif
#define AP_PSK_SUPPORT_TKIP
#endif
#ifdef ENABLE_MAC_LB_FOR_TEST_MODE
@ -475,7 +643,7 @@ extern unsigned int g_ap_sta_num;
#define CONFIG_LWIP_LAYER 0
#define CONFIG_WLAN_HAL_TEST
#define CONFIG_WLAN_HAL_RX_TASK
#define CONFIG_MAC_LOOPBACK_DRIVER_RTL8711B 1
#define CONFIG_MAC_LOOPBACK_DRIVER_AMEBA 1
#define HAL_MAC_ENABLE 1
#define CONFIG_TWO_MAC_TEST_MODE
#define DISABLE_BB_RF 1
@ -508,4 +676,27 @@ extern unsigned int g_ap_sta_num;
#undef NOT_SUPPORT_40M
#undef CONFIG_CONCURRENT_MODE
#endif
#if defined(CONFIG_HARDWARE_8821C)
#define FW_IQK
#define RTW_HALMAC
#define LOAD_FW_HEADER_FROM_DRIVER
#define RTW_HALMAC_SIZE_OPTIMIZATION 1
//#define CONFIG_NO_FW
#ifdef NOT_SUPPORT_5G
#undef NOT_SUPPORT_5G
#define SUPPORT_5G_CHANNEL 1
#endif
#endif
#if defined(CONFIG_RTL8723D)
#define HAL_EFUSE_MEMORY
#endif
#define CONFIG_DFS
//#define CONFIG_EMPTY_EFUSE_PG_ENABLE
#define WLAN_WAPPER_VERSION 1
#endif //WLANCONFIG_H

104
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/drv_conf.h
View File

@ -1,104 +0,0 @@
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************/
#ifndef __DRV_CONF_H__
#define __DRV_CONF_H__
#include "autoconf.h"
#if ((RTL8195A_SUPPORT==1) || (RTL8711B_SUPPORT==1))
#include "platform_autoconf.h"
#endif
#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
#error "Shall be Linux or Windows, but not both!\n"
#endif
//Older Android kernel doesn't has CONFIG_ANDROID defined,
//add this to force CONFIG_ANDROID defined
#ifdef CONFIG_PLATFORM_ANDROID
#define CONFIG_ANDROID
#endif
#ifdef CONFIG_ANDROID
//Some Android build will restart the UI while non-printable ascii is passed
//between java and c/c++ layer (JNI). We force CONFIG_VALIDATE_SSID
//for Android here. If you are sure there is no risk on your system about this,
//mask this macro define to support non-printable ascii ssid.
//#define CONFIG_VALIDATE_SSID
#ifdef CONFIG_PLATFORM_ARM_SUNxI
#ifdef CONFIG_VALIDATE_SSID
#undef CONFIG_VALIDATE_SSID
#endif
#endif
//Android expect dbm as the rx signal strength unit
#define CONFIG_SIGNAL_DISPLAY_DBM
#endif
#if defined(CONFIG_HAS_EARLYSUSPEND) && defined (CONFIG_RESUME_IN_WORKQUEUE)
#warning "You have CONFIG_HAS_EARLYSUSPEND enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically"
#undef CONFIG_RESUME_IN_WORKQUEUE
#endif
#if defined(CONFIG_ANDROID_POWER) && defined (CONFIG_RESUME_IN_WORKQUEUE)
#warning "You have CONFIG_ANDROID_POWER enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically"
#undef CONFIG_RESUME_IN_WORKQUEUE
#endif
#ifdef CONFIG_RESUME_IN_WORKQUEUE //this can be removed, because there is no case for this...
#if !defined( CONFIG_WAKELOCK) && !defined(CONFIG_ANDROID_POWER)
#error "enable CONFIG_RESUME_IN_WORKQUEUE without CONFIG_WAKELOCK or CONFIG_ANDROID_POWER will suffer from the danger of wifi's unfunctionality..."
#error "If you still want to enable CONFIG_RESUME_IN_WORKQUEUE in this case, mask this preprossor checking and GOOD LUCK..."
#endif
#endif
//About USB VENDOR REQ
#if defined(CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX)
#warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC automatically"
#define CONFIG_USB_VENDOR_REQ_MUTEX
#endif
#if defined(CONFIG_VENDOR_REQ_RETRY) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX)
#warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_VENDOR_REQ_RETRY automatically"
#define CONFIG_USB_VENDOR_REQ_MUTEX
#endif
#ifndef CONFIG_RTW_ADAPTIVITY_EN
#define CONFIG_RTW_ADAPTIVITY_EN 0
#endif
#ifndef CONFIG_RTW_ADAPTIVITY_MODE
#define CONFIG_RTW_ADAPTIVITY_MODE 0
#endif
#ifndef CONFIG_RTW_ADAPTIVITY_DML
#define CONFIG_RTW_ADAPTIVITY_DML 0
#endif
#ifndef CONFIG_RTW_ADAPTIVITY_DC_BACKOFF
#define CONFIG_RTW_ADAPTIVITY_DC_BACKOFF 4
#endif
#ifndef CONFIG_RTW_NHM_EN
#define CONFIG_RTW_NHM_EN 0
#endif
//#include <rtl871x_byteorder.h>
#endif // __DRV_CONF_H__

52
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/rom_aes.h
View File

@ -1,52 +0,0 @@
/******************************************************************************
*
* mbed Microcontroller Library
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*
* This is ROM code section.
*
******************************************************************************/
#ifndef ROM_AES_H
#define ROM_AES_H
typedef struct
{
u32 erk[64]; /* encryption round keys */
u32 drk[64]; /* decryption round keys */
int nr; /* number of rounds */
}aes_context;
#define AES_BLOCKSIZE8 8
#define AES_BLK_SIZE 16 // # octets in an AES block
typedef union _aes_block // AES cipher block
{
unsigned long x[AES_BLK_SIZE/4]; // access as 8-bit octets or 32-bit words
unsigned char b[AES_BLK_SIZE];
}aes_block;
void AES_WRAP(unsigned char * plain, int plain_len,
unsigned char * iv, int iv_len,
unsigned char * kek, int kek_len,
unsigned char *cipher, unsigned short *cipher_len);
void AES_UnWRAP(unsigned char * cipher, int cipher_len,
unsigned char * kek, int kek_len,
unsigned char * plain);
#endif

453
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/rtw_debug.h
View File

@ -1,453 +0,0 @@
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************/
#ifndef __RTW_DEBUG_H__
#define __RTW_DEBUG_H__
#define _drv_always_ 1
#define _drv_emerg_ 2
#define _drv_alert_ 3
#define _drv_crit_ 4
#define _drv_err_ 5
#define _drv_warning_ 6
#define _drv_notice_ 7
#define _drv_info_ 8
#define _drv_dump_ 9
#define _drv_debug_ 10
#define _module_rtl871x_xmit_c_ BIT(0)
#define _module_xmit_osdep_c_ BIT(1)
#define _module_rtl871x_recv_c_ BIT(2)
#define _module_recv_osdep_c_ BIT(3)
#define _module_rtl871x_mlme_c_ BIT(4)
#define _module_mlme_osdep_c_ BIT(5)
#define _module_rtl871x_sta_mgt_c_ BIT(6)
#define _module_rtl871x_cmd_c_ BIT(7)
#define _module_cmd_osdep_c_ BIT(8)
#define _module_rtl871x_io_c_ BIT(9)
#define _module_io_osdep_c_ BIT(10)
#define _module_os_intfs_c_ BIT(11)
#define _module_rtl871x_security_c_ BIT(12)
#define _module_rtl871x_eeprom_c_ BIT(13)
#define _module_hal_init_c_ BIT(14)
#define _module_hci_hal_init_c_ BIT(15)
#define _module_rtl871x_ioctl_c_ BIT(16)
#define _module_rtl871x_ioctl_set_c_ BIT(17)
#define _module_rtl871x_ioctl_query_c_ BIT(18)
#define _module_rtl871x_pwrctrl_c_ BIT(19)
#define _module_hci_intfs_c_ BIT(20)
#define _module_hci_ops_c_ BIT(21)
#define _module_osdep_service_c_ BIT(22)
#define _module_mp_ BIT(23)
#define _module_hci_ops_os_c_ BIT(24)
#define _module_rtl871x_ioctl_os_c BIT(25)
#define _module_rtl8712_cmd_c_ BIT(26)
#define _module_fwcmd_c_ BIT(27)
#define _module_rtl8192c_xmit_c_ BIT(28)
#define _module_hal_xmit_c_ BIT(28)
#define _module_efuse_ BIT(29)
#define _module_rtl8712_recv_c_ BIT(30)
#define _module_rtl8712_led_c_ BIT(31)
#undef _MODULE_DEFINE_
#if defined _RTW_XMIT_C_
#define _MODULE_DEFINE_ _module_rtl871x_xmit_c_
#elif defined _XMIT_OSDEP_C_
#define _MODULE_DEFINE_ _module_xmit_osdep_c_
#elif defined _RTW_RECV_C_
#define _MODULE_DEFINE_ _module_rtl871x_recv_c_
#elif defined _RECV_OSDEP_C_
#define _MODULE_DEFINE_ _module_recv_osdep_c_
#elif defined _RTW_MLME_C_
#define _MODULE_DEFINE_ _module_rtl871x_mlme_c_
#elif defined _MLME_OSDEP_C_
#define _MODULE_DEFINE_ _module_mlme_osdep_c_
#elif defined _RTW_MLME_EXT_C_
#define _MODULE_DEFINE_ 1
#elif defined _RTW_STA_MGT_C_
#define _MODULE_DEFINE_ _module_rtl871x_sta_mgt_c_
#elif defined _RTW_CMD_C_
#define _MODULE_DEFINE_ _module_rtl871x_cmd_c_
#elif defined _CMD_OSDEP_C_
#define _MODULE_DEFINE_ _module_cmd_osdep_c_
#elif defined _RTW_IO_C_
#define _MODULE_DEFINE_ _module_rtl871x_io_c_
#elif defined _IO_OSDEP_C_
#define _MODULE_DEFINE_ _module_io_osdep_c_
#elif defined _OS_INTFS_C_
#define _MODULE_DEFINE_ _module_os_intfs_c_
#elif defined _RTW_SECURITY_C_
#define _MODULE_DEFINE_ _module_rtl871x_security_c_
#elif defined _RTW_EEPROM_C_
#define _MODULE_DEFINE_ _module_rtl871x_eeprom_c_
#elif defined _HAL_INTF_C_
#define _MODULE_DEFINE_ _module_hal_init_c_
#elif (defined _HCI_HAL_INIT_C_) || (defined _SDIO_HALINIT_C_)
#define _MODULE_DEFINE_ _module_hci_hal_init_c_
#elif defined _RTL871X_IOCTL_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_c_
#elif defined _RTL871X_IOCTL_SET_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_set_c_
#elif defined _RTL871X_IOCTL_QUERY_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_query_c_
#elif defined _RTL871X_PWRCTRL_C_
#define _MODULE_DEFINE_ _module_rtl871x_pwrctrl_c_
#elif defined _RTW_PWRCTRL_C_
#define _MODULE_DEFINE_ 1
#elif defined _HCI_INTF_C_
#define _MODULE_DEFINE_ _module_hci_intfs_c_
#elif defined _HCI_OPS_C_
#define _MODULE_DEFINE_ _module_hci_ops_c_
#elif defined _SDIO_OPS_C_
#define _MODULE_DEFINE_ 1
#elif defined _OSDEP_HCI_INTF_C_
#define _MODULE_DEFINE_ _module_hci_intfs_c_
#elif defined _OSDEP_SERVICE_C_
#define _MODULE_DEFINE_ _module_osdep_service_c_
#elif defined _HCI_OPS_OS_C_
#define _MODULE_DEFINE_ _module_hci_ops_os_c_
#elif defined _RTL871X_IOCTL_LINUX_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_os_c
#elif defined _RTL8712_CMD_C_
#define _MODULE_DEFINE_ _module_rtl8712_cmd_c_
#elif defined _RTL8192C_XMIT_C_
#define _MODULE_DEFINE_ 1
#elif defined _RTL8723AS_XMIT_C_
#define _MODULE_DEFINE_ 1
#elif defined _RTL8712_RECV_C_
#define _MODULE_DEFINE_ _module_rtl8712_recv_c_
#elif defined _RTL8192CU_RECV_C_
#define _MODULE_DEFINE_ _module_rtl8712_recv_c_
#elif defined _RTL871X_MLME_EXT_C_
#define _MODULE_DEFINE_ _module_mlme_osdep_c_
#elif defined _RTW_MP_C_
#define _MODULE_DEFINE_ _module_mp_
#elif defined _RTW_MP_IOCTL_C_
#define _MODULE_DEFINE_ _module_mp_
#elif defined _RTW_EFUSE_C_
#define _MODULE_DEFINE_ _module_efuse_
#endif
#ifdef PLATFORM_OS_CE
extern void rtl871x_cedbg(const char *fmt, ...);
#endif
#define RT_TRACE(_Comp, _Level, Fmt) do{}while(0)
#define _func_enter_ do{}while(0)
#define _func_exit_ do{}while(0)
#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) do{}while(0)
#ifdef PLATFORM_WINDOWS
#define DBG_871X do {} while(0)
#define MSG_8192C do {} while(0)
#define DBG_8192C do {} while(0)
#define DBG_871X_LEVEL do {} while(0)
#else
#define DBG_871X(x, ...) do {} while(0)
#define MSG_8192C(x, ...) do {} while(0)
#define DBG_8192C(x,...) do {} while(0)
#define DBG_871X_LEVEL(x,...) do {} while(0)
#endif
#undef _dbgdump
#ifdef PLATFORM_WINDOWS
#ifdef PLATFORM_OS_XP
#define _dbgdump DbgPrint
#elif defined PLATFORM_OS_CE
#define _dbgdump rtl871x_cedbg
#endif
#elif defined PLATFORM_LINUX
#define _dbgdump printk
#elif defined PLATFORM_ECOS
#define _dbgdump diag_printf
#elif defined(PLATFORM_FREERTOS) || defined (PLATFORM_CMSIS_RTOS)
#define _dbgdump printf("\n\r"); printf
#elif defined PLATFORM_FREEBSD
#define _dbgdump printf
#endif
#if !defined(CONFIG_PLATFORM_8195A) && !defined(CONFIG_PLATFORM_8711B)
#define DRIVER_PREFIX "RTL871X: "
#endif
#define DEBUG_LEVEL (_drv_err_)
#if defined (_dbgdump)
#undef DBG_871X_LEVEL
#if defined (__ICCARM__) || defined (__CC_ARM) ||defined(__GNUC__)|| defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B)
#define DBG_871X_LEVEL(level, ...) \
do {\
_dbgdump(DRIVER_PREFIX __VA_ARGS__);\
}while(0)
#else
#define DBG_871X_LEVEL(level, fmt, arg...) \
do {\
if (level <= DEBUG_LEVEL) {\
if (level <= _drv_err_ && level > _drv_always_) {\
_dbgdump(DRIVER_PREFIX"ERROR " fmt, ##arg);\
} \
else {\
_dbgdump(DRIVER_PREFIX fmt, ##arg);\
} \
}\
}while(0)
#endif //#ifdef __CC_ARM
#endif
#ifdef CONFIG_DEBUG
#if defined (_dbgdump)
#undef DBG_871X
#define DBG_871X(...) do {\
_dbgdump(DRIVER_PREFIX __VA_ARGS__);\
}while(0)
#undef MSG_8192C
#define MSG_8192C(...) do {\
_dbgdump(DRIVER_PREFIX __VA_ARGS__);\
}while(0)
#undef DBG_8192C
#define DBG_8192C(...) do {\
_dbgdump(DRIVER_PREFIX __VA_ARGS__);\
}while(0)
#endif
#endif /* CONFIG_DEBUG */
#ifdef CONFIG_DEBUG_RTL871X
#ifndef _RTL871X_DEBUG_C_
extern u32 GlobalDebugLevel;
extern u64 GlobalDebugComponents;
#endif
#if defined (_dbgdump) && defined (_MODULE_DEFINE_)
#undef RT_TRACE
#define RT_TRACE(_Comp, _Level, Fmt)\
do {\
if((_Comp & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) {\
_dbgdump("%s [0x%08x,%d]", DRIVER_PREFIX, (unsigned int)_Comp, _Level);\
_dbgdump Fmt;\
}\
}while(0)
#endif
#if defined (_dbgdump)
#undef _func_enter_
#define _func_enter_ \
do { \
if (GlobalDebugLevel >= _drv_debug_) \
{ \
_dbgdump("\n %s : %s enters at %d\n", DRIVER_PREFIX, __FUNCTION__, __LINE__);\
} \
} while(0)
#undef _func_exit_
#define _func_exit_ \
do { \
if (GlobalDebugLevel >= _drv_debug_) \
{ \
_dbgdump("\n %s : %s exits at %d\n", DRIVER_PREFIX, __FUNCTION__, __LINE__); \
} \
} while(0)
#undef RT_PRINT_DATA
#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \
if(((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) \
{ \
int __i; \
u8 *ptr = (u8 *)_HexData; \
printf("\r\n%s", DRIVER_PREFIX); \
printf(_TitleString "--------Len=%d\n\r", _HexDataLen); \
for( __i=0; __i<(int)_HexDataLen; __i++ ) \
{ \
printf("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" "); \
if (((__i + 1) % 16) == 0) printf("\n\r"); \
} \
printf("\n\r"); \
}
#endif
#endif /* CONFIG_DEBUG_RTL871X */
#ifdef CONFIG_PROC_DEBUG
int proc_get_drv_version(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_write_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_write_reg(struct file *file, const char *buffer,
unsigned long count, void *data);
int proc_get_read_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_read_reg(struct file *file, const char *buffer,
unsigned long count, void *data);
int proc_get_fwstate(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_sec_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mlmext_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_qos_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_ht_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_ap_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_adapter_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_trx_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mac_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mac_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mac_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_bb_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_bb_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_bb_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump4(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
#ifdef CONFIG_AP_MODE
int proc_get_all_sta_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
#endif
#ifdef DBG_MEMORY_LEAK
int proc_get_malloc_cnt(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
#endif
#ifdef CONFIG_FIND_BEST_CHANNEL
int proc_get_best_channel(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
#endif
int proc_get_rx_signal(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_rx_signal(struct file *file, const char *buffer,
unsigned long count, void *data);
#ifdef CONFIG_80211N_HT
int proc_get_cbw40_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_cbw40_enable(struct file *file, const char *buffer,
unsigned long count, void *data);
int proc_get_ampdu_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_ampdu_enable(struct file *file, const char *buffer,
unsigned long count, void *data);
int proc_get_rx_stbc(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_rx_stbc(struct file *file, const char *buffer,
unsigned long count, void *data);
#endif //CONFIG_80211N_HT
int proc_get_two_path_rssi(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rssi_disp(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_rssi_disp(struct file *file, const char *buffer,
unsigned long count, void *data);
#endif //CONFIG_PROC_DEBUG
#endif //__RTW_DEBUG_H__

46
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/wifi_constants.h
View File

@ -23,6 +23,12 @@
#ifndef _WIFI_CONSTANTS_H
#define _WIFI_CONSTANTS_H
/** @addtogroup nic NIC
* @ingroup wlan
* @brief NIC functions
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif
@ -46,7 +52,6 @@ extern "C" {
#define RTW_MAX_PSK_LEN (64)
#define RTW_MIN_PSK_LEN (8)
#define MCSSET_LEN 16
/**
@ -67,7 +72,6 @@ enum
RTW_BUFFER_UNAVAILABLE_PERMANENT = 10, /**< Buffer unavailable permanently */
RTW_WPS_PBC_OVERLAP = 11, /**< WPS PBC overlap */
RTW_CONNECTION_LOST = 12, /**< Connection lost */
RTW_ERROR = -1, /**< Generic Error */
RTW_BADARG = -2, /**< Bad Argument */
RTW_BADOPTION = -3, /**< Bad option */
@ -129,12 +133,9 @@ enum {
RTW_SECURITY_WPA2_TKIP_PSK = ( WPA2_SECURITY | TKIP_ENABLED ), /**< WPA2 Security with TKIP */
RTW_SECURITY_WPA2_MIXED_PSK = ( WPA2_SECURITY | AES_ENABLED | TKIP_ENABLED ), /**< WPA2 Security with AES & TKIP */
RTW_SECURITY_WPA_WPA2_MIXED = ( WPA_SECURITY | WPA2_SECURITY ), /**< WPA/WPA2 Security */
RTW_SECURITY_WPS_OPEN = WPS_ENABLED, /**< WPS with open security */
RTW_SECURITY_WPS_SECURE = (WPS_ENABLED | AES_ENABLED), /**< WPS with AES security */
RTW_SECURITY_UNKNOWN = -1, /**< May be returned by scan function if security is unknown. Do not pass this to the join function! */
RTW_SECURITY_FORCE_32_BIT = 0x7fffffff /**< Exists only to force rtw_security_t type to 32 bits */
};
typedef unsigned long rtw_security_t;
@ -181,6 +182,7 @@ enum {
RTW_COUNTRY_FCC2, // 0x2A
RTW_COUNTRY_WORLD2, // 0x47
RTW_COUNTRY_MKK2, // 0x58
RTW_COUNTRY_GLOBAL, // 0x41
/* SPECIAL */
RTW_COUNTRY_WORLD, // WORLD1
@ -364,9 +366,7 @@ enum {
RTW_COUNTRY_YT,
RTW_COUNTRY_ZA,
RTW_COUNTRY_ZW,
RTW_COUNTRY_MAX
};
typedef unsigned long rtw_country_code_t;
@ -401,6 +401,15 @@ enum {
};
typedef unsigned long rtw_scan_mode_t;
/**
* @brief The enumeration lists the supported autoreconnect mode by WIFI driver.
*/
typedef enum{
RTW_AUTORECONNECT_DISABLE,
RTW_AUTORECONNECT_FINITE,
RTW_AUTORECONNECT_INFINITE
} rtw_autoreconnect_mode_t;
/**
* @brief The enumeration lists the status to describe the connection link.
*/
@ -449,7 +458,8 @@ enum {
RTW_WPS_TYPE_REKEY = 0x0003,
RTW_WPS_TYPE_PUSHBUTTON = 0x0004,
RTW_WPS_TYPE_REGISTRAR_SPECIFIED = 0x0005,
RTW_WPS_TYPE_NONE = 0x0006
RTW_WPS_TYPE_NONE = 0x0006,
RTW_WPS_TYPE_WSC = 0x0007
};
typedef unsigned long rtw_wps_type_t;
@ -490,9 +500,20 @@ enum {
RTW_PROMISC_ENABLE_1 = 2, /**< Fetch only B/M packets */
RTW_PROMISC_ENABLE_2 = 3, /**< Fetch all 802.11 packets*/
RTW_PROMISC_ENABLE_3 = 4, /**< Fetch only B/M 802.11 packets*/
RTW_PROMISC_ENABLE_4 = 5, /**< Fetch all 802.11 packets & MIMO PLCP headers. Please note that the PLCP header would be struct rtw_rx_info_t defined in wifi_structures.h*/
};
typedef unsigned long rtw_rcr_level_t;
/**
* @brief The enumeration lists the promisc rx type.
*/
#if CONFIG_UNSUPPORT_PLCPHDR_RPT
enum {
RTW_RX_NORMAL = 0, /**< The supported 802.11 packet*/
RTW_RX_UNSUPPORT = 1, /**< Unsupported 802.11 packet info */
};
typedef unsigned long rtw_rx_type_t;
#endif
/**
* @brief The enumeration lists the disconnect reasons.
*/
@ -501,7 +522,8 @@ enum{
RTW_NONE_NETWORK = 1,
RTW_CONNECT_FAIL = 2,
RTW_WRONG_PASSWORD = 3 ,
RTW_DHCP_FAIL = 4,
RTW_4WAY_HANDSHAKE_TIMEOUT = 4,
RTW_DHCP_FAIL = 5,
RTW_UNKNOWN,
};
typedef unsigned long rtw_connect_error_flag_t;
@ -535,10 +557,16 @@ enum _WIFI_EVENT_INDICATE{
WIFI_EVENT_EAPOL_RECVD = 13,
WIFI_EVENT_NO_NETWORK = 14,
WIFI_EVENT_BEACON_AFTER_DHCP = 15,
WIFI_EVENT_IP_CHANGED = 16,
WIFI_EVENT_ICV_ERROR = 17,
WIFI_EVENT_CHALLENGE_FAIL = 18,
WIFI_EVENT_MAX,
};
typedef unsigned long rtw_event_indicate_t;
#ifdef __cplusplus
}
#endif
/*\@}*/
#endif /* _WIFI_CONSTANTS_H */

57
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/include/wifi_structures.h
View File

@ -12,7 +12,7 @@
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
******************************************************************************
* @file wifi_structures.h
* @author
* @version
@ -23,6 +23,12 @@
#ifndef _WIFI_STRUCTURES_H
#define _WIFI_STRUCTURES_H
/** @addtogroup nic NIC
* @ingroup wlan
* @brief NIC functions
* @{
*/
//#include <freertos/freertos_service.h>
#include "wifi_constants.h"
#include "dlist.h"
@ -30,7 +36,7 @@
extern "C" {
#endif
#if defined(__IAR_SYSTEMS_ICC__)
#if defined(__IAR_SYSTEMS_ICC__) || defined (__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack(1)
#endif
@ -41,11 +47,11 @@ typedef struct rtw_ssid {
unsigned char len; /**< SSID length */
unsigned char val[33]; /**< SSID name (AP name) */
} rtw_ssid_t;
#if defined(__IAR_SYSTEMS_ICC__)
#if defined(__IAR_SYSTEMS_ICC__) || defined (__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack()
#endif
#if defined(__IAR_SYSTEMS_ICC__)
#if defined(__IAR_SYSTEMS_ICC__) || defined (__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack(1)
#endif
@ -55,14 +61,15 @@ typedef struct rtw_ssid {
typedef struct rtw_mac {
unsigned char octet[6]; /**< Unique 6-byte MAC address */
} rtw_mac_t;
#if defined(__IAR_SYSTEMS_ICC__)
#if defined(__IAR_SYSTEMS_ICC__) || defined (__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack()
#endif
/**
* @brief The structure is used to describe the setting about SSID,
* security type, password and default channel, used to start AP mode.
* @note The data length of string pointed by ssid and password should not exceed 32.
* @note The data length of string pointed by ssid should not exceed 32,
* and the data length of string pointed by password should not exceed 64.
*/
typedef struct rtw_ap_info {
rtw_ssid_t ssid;
@ -75,7 +82,8 @@ typedef struct rtw_ap_info {
/**
* @brief The structure is used to describe the station mode setting about SSID,
* security type and password, used when connecting to an AP.
* @note The data length of string pointed by ssid and password should not exceed 32.
* @note The data length of string pointed by ssid should not exceed 32,
* and the data length of string pointed by password should not exceed 64.
*/
typedef struct rtw_network_info {
rtw_ssid_t ssid;
@ -86,7 +94,7 @@ typedef struct rtw_network_info {
int key_id;
}rtw_network_info_t;
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__)
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack(1)
#endif
@ -103,7 +111,7 @@ typedef struct rtw_scan_result {
unsigned int channel; /**< Radio channel that the AP beacon was received on */
rtw_802_11_band_t band; /**< Radio band */
} rtw_scan_result_t;
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__)
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack()
#endif
@ -117,7 +125,7 @@ typedef struct rtw_scan_handler_result {
} rtw_scan_handler_result_t;
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__)
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack(1)
#endif
@ -132,7 +140,7 @@ typedef struct rtw_wifi_setting {
unsigned char password[65];
unsigned char key_idx;
}rtw_wifi_setting_t;
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__)
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack()
#endif
@ -210,8 +218,33 @@ typedef struct ieee80211_frame_info{
unsigned char bssid[6];
unsigned char encrypt;
signed char rssi;
#if CONFIG_UNSUPPORT_PLCPHDR_RPT
rtw_rx_type_t type;
#endif
}ieee80211_frame_info_t;
#if CONFIG_UNSUPPORT_PLCPHDR_RPT
typedef struct rtw_rx_info {
uint16_t length; //length without FCS
uint8_t filter; // 2: 2T rate pkt; 3: LDPC pkt
signed char rssi; //-128~-1
}rtw_rx_info_t;
struct rtw_plcp_info {
struct rtw_plcp_info *prev;
struct rtw_plcp_info *next;
uint16_t length; //length without FCS
uint8_t filter; // 1: HT-20 pkt; 2: HT-40 and not LDPC pkt; 3: LDPC pkt
signed char rssi; //-128~-1
};
struct rtw_rx_buffer {
struct rtw_plcp_info *head;
struct rtw_plcp_info *tail;
};
#endif
typedef struct {
char filter_id;
rtw_packet_filter_pattern_t patt;
@ -228,4 +261,6 @@ typedef struct rtw_mac_filter_list{
}
#endif
/*\@}*/
#endif /* _WIFI_STRUCTURES_H */

14
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/src/osdep/freertos/wrapper.h
View File

@ -18,7 +18,6 @@
#ifndef __WRAPPER_H__
#define __WRAPPER_H__
//----- ------------------------------------------------------------------
// Include Files
//----- ------------------------------------------------------------------
@ -26,11 +25,8 @@
#include <string.h>
#include "wireless.h"
#include <skbuff.h>
#ifdef PLATFORM_FREERTOS
#include "freertos_service.h"
#elif defined(PLATFORM_CMSIS_RTOS)
#include "rtx_service.h"
#endif
#include "osdep_service.h"
#ifndef __LIST_H
#warning "DLIST_NOT_DEFINE!!!!!!"
//----- ------------------------------------------------------------------
@ -50,7 +46,6 @@
// };
#define LIST_HEAD_INIT(name) { &(name), &(name) }
#define INIT_LIST_HEAD(ptr) do { \
(ptr)->next = (ptr); (ptr)->prev = (ptr); \
} while (0)
@ -302,7 +297,6 @@ static __inline__ void skb_queue_head_init(struct sk_buff_head *list)
static __inline__ void __skb_queue_tail(struct sk_buff_head *list, struct sk_buff *newsk)
{
struct sk_buff *prev, *next;
newsk->list = list;
list->qlen++;
next = (struct sk_buff *)list;
@ -333,7 +327,7 @@ static __inline__ void skb_queue_tail(struct sk_buff_head *list, struct sk_buff
}
static __inline__ void skb_assign_buf(struct sk_buff *skb, unsigned char *buf, unsigned int len)
{
{
skb->head = buf;
skb->data = buf;
skb->tail = buf;
@ -452,5 +446,3 @@ void rtw_del_timer(_timer *ptimer);
#endif //__WRAPPER_H__

249
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/src/osdep/lwip_intf.c
View File

@ -4,7 +4,7 @@
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
@ -19,31 +19,24 @@
#include <autoconf.h>
#include <lwip_intf.h>
#include <lwip/netif.h>
#if !defined(CONFIG_MBED_ENABLED)
#include <lwip_netconf.h>
#include <ethernetif.h>
#endif
#include <osdep_service.h>
#include <wifi/wifi_util.h>
//----- ------------------------------------------------------------------
// External Reference
//----- ------------------------------------------------------------------
#if (CONFIG_LWIP_LAYER == 1)
#if defined(CONFIG_MBED_ENABLED)
extern struct netif *xnetif[];
#else
extern struct netif xnetif[]; //LWIP netif
#endif
extern struct netif xnetif[]; //LWIP netif
#endif
/**
* rltk_wlan_set_netif_info - set netif hw address and register dev pointer to netif device
* @idx_wlan: netif index
* 0 for STA only or SoftAP only or STA in STA+SoftAP concurrent mode,
* 1 for SoftAP in STA+SoftAP concurrent mode
* 0 for STA only or SoftAP only or STA in STA+SoftAP concurrent mode,
* 1 for SoftAP in STA+SoftAP concurrent mode
* @dev: register netdev pointer to LWIP. Reserved.
* @dev_addr: set netif hw address
*
@ -53,11 +46,11 @@ void rltk_wlan_set_netif_info(int idx_wlan, void * dev, unsigned char * dev_addr
{
#if (CONFIG_LWIP_LAYER == 1)
#if defined(CONFIG_MBED_ENABLED)
//rtw_memcpy(xnetif[idx_wlan]->hwaddr, dev_addr, 6);
//set netif hwaddr later
//rtw_memcpy(xnetif[idx_wlan]->hwaddr, dev_addr, 6);
//set netif hwaddr later
#else
rtw_memcpy(xnetif[idx_wlan].hwaddr, dev_addr, 6);
xnetif[idx_wlan].state = dev;
rtw_memcpy(xnetif[idx_wlan].hwaddr, dev_addr, 6);
xnetif[idx_wlan].state = dev;
#endif
#endif
}
@ -74,45 +67,45 @@ void rltk_wlan_set_netif_info(int idx_wlan, void * dev, unsigned char * dev_addr
int rltk_wlan_send(int idx, struct eth_drv_sg *sg_list, int sg_len, int total_len)
{
#if (CONFIG_LWIP_LAYER == 1)
struct eth_drv_sg *last_sg;
struct sk_buff *skb = NULL;
int ret = 0;
struct eth_drv_sg *last_sg;
struct sk_buff *skb = NULL;
int ret = 0;
if (idx == -1) {
DBG_ERR("netif is DOWN");
return -1;
}
DBG_TRACE("%s is called", __FUNCTION__);
if(idx == -1){
DBG_ERR("netif is DOWN");
return -1;
}
DBG_TRACE("%s is called", __FUNCTION__);
save_and_cli();
if (rltk_wlan_check_isup(idx)) {
rltk_wlan_tx_inc(idx);
} else {
DBG_ERR("netif is DOWN");
restore_flags();
return -1;
}
restore_flags();
save_and_cli();
if (rltk_wlan_check_isup(idx)) {
rltk_wlan_tx_inc(idx);
} else {
DBG_ERR("netif is DOWN");
restore_flags();
return -1;
}
restore_flags();
skb = rltk_wlan_alloc_skb(total_len);
if (skb == NULL) {
//DBG_ERR("rltk_wlan_alloc_skb() for data len=%d failed!", total_len);
ret = -1;
goto exit;
}
skb = rltk_wlan_alloc_skb(total_len);
if (skb == NULL) {
//DBG_ERR("rltk_wlan_alloc_skb() for data len=%d failed!", total_len);
ret = -1;
goto exit;
}
for (last_sg = &sg_list[sg_len]; sg_list < last_sg; ++sg_list) {
rtw_memcpy(skb->tail, (void *)(sg_list->buf), sg_list->len);
skb_put(skb, sg_list->len);
}
for (last_sg = &sg_list[sg_len]; sg_list < last_sg; ++sg_list) {
rtw_memcpy(skb->tail, (void *)(sg_list->buf), sg_list->len);
skb_put(skb, sg_list->len);
}
rltk_wlan_send_skb(idx, skb);
rltk_wlan_send_skb(idx, skb);
exit:
save_and_cli();
rltk_wlan_tx_dec(idx);
restore_flags();
return ret;
save_and_cli();
rltk_wlan_tx_dec(idx);
restore_flags();
return ret;
#endif
}
@ -127,128 +120,130 @@ exit:
void rltk_wlan_recv(int idx, struct eth_drv_sg *sg_list, int sg_len)
{
#if (CONFIG_LWIP_LAYER == 1)
struct eth_drv_sg *last_sg;
struct sk_buff *skb;
struct eth_drv_sg *last_sg;
struct sk_buff *skb;
DBG_TRACE("%s is called", __FUNCTION__);
if(idx == -1){
DBG_ERR("skb is NULL");
return;
}
skb = rltk_wlan_get_recv_skb(idx);
DBG_ASSERT(skb, "No pending rx skb");
DBG_TRACE("%s is called", __FUNCTION__);
if (!rltk_wlan_check_isup(idx)) {
return;
}
if (idx == -1) {
DBG_ERR("skb is NULL");
return;
}
skb = rltk_wlan_get_recv_skb(idx);
DBG_ASSERT(skb, "No pending rx skb");
for (last_sg = &sg_list[sg_len]; sg_list < last_sg; ++sg_list) {
if (sg_list->buf != 0) {
rtw_memcpy((void *)(sg_list->buf), skb->data, sg_list->len);
skb_pull(skb, sg_list->len);
}
}
for (last_sg = &sg_list[sg_len]; sg_list < last_sg; ++sg_list) {
if (sg_list->buf != 0) {
rtw_memcpy((void *)(sg_list->buf), skb->data, sg_list->len);
skb_pull(skb, sg_list->len);
}
}
#endif
}
int netif_is_valid_IP(int idx, unsigned char *ip_dest)
{
#if CONFIG_LWIP_LAYER == 1
#if defined(CONFIG_MBED_ENABLED)
return 1;
return 1;
#else
struct netif *pnetif = &xnetif[idx];
#if CONFIG_LWIP_LAYER == 1
struct netif * pnetif = &xnetif[idx];
ip_addr_t addr = { 0 };
ip_addr_t addr = { 0 };
#ifdef CONFIG_MEMORY_ACCESS_ALIGNED
unsigned int temp;
memcpy(&temp, ip_dest, sizeof(unsigned int));
u32_t *ip_dest_addr = &temp;
unsigned int temp;
memcpy(&temp, ip_dest, sizeof(unsigned int));
u32_t *ip_dest_addr = &temp;
#else
u32_t *ip_dest_addr = (u32_t*)ip_dest;
u32_t *ip_dest_addr = (u32_t*)ip_dest;
#endif
addr.addr = *ip_dest_addr;
if (pnetif->ip_addr.addr == 0) {
return 1;
}
if (ip_addr_ismulticast(&addr) || ip_addr_isbroadcast(&addr,pnetif)) {
return 1;
}
//if(ip_addr_netcmp(&(pnetif->ip_addr), &addr, &(pnetif->netmask))) //addr&netmask
// return 1;
if (ip_addr_cmp(&(pnetif->ip_addr),&addr)) {
return 1;
}
DBG_TRACE("invalid IP: %d.%d.%d.%d ",ip_dest[0],ip_dest[1],ip_dest[2],ip_dest[3]);
#if LWIP_VERSION_MAJOR >= 2
ip_addr_set_ip4_u32(&addr, *ip_dest_addr);
#else
addr.addr = *ip_dest_addr;
#endif
#if (LWIP_VERSION_MAJOR >= 2)
if((ip_addr_get_ip4_u32(netif_ip_addr4(pnetif))) == 0)
return 1;
#else
if(pnetif->ip_addr.addr == 0)
return 1;
#endif
if(ip_addr_ismulticast(&addr) || ip_addr_isbroadcast(&addr,pnetif)){
return 1;
}
//if(ip_addr_netcmp(&(pnetif->ip_addr), &addr, &(pnetif->netmask))) //addr&netmask
// return 1;
if(ip_addr_cmp(&(pnetif->ip_addr),&addr))
return 1;
DBG_TRACE("invalid IP: %d.%d.%d.%d ",ip_dest[0],ip_dest[1],ip_dest[2],ip_dest[3]);
#endif
#ifdef CONFIG_DONT_CARE_TP
if (pnetif->flags & NETIF_FLAG_IPSWITCH) {
return 1;
}
else
if(pnetif->flags & NETIF_FLAG_IPSWITCH)
return 1;
else
#endif
return 0;
return 0;
#endif
}
#if defined(CONFIG_MBED_ENABLED)
#else
int netif_get_idx(struct netif *pnetif)
#if !defined(CONFIG_MBED_ENABLED)
int netif_get_idx(struct netif* pnetif)
{
#if (CONFIG_LWIP_LAYER == 1)
int idx = pnetif - xnetif;
int idx = pnetif - xnetif;
switch (idx) {
case 0:
return 0;
case 1:
return 1;
default:
return -1;
}
#else
return -1;
switch(idx) {
case 0:
return 0;
case 1:
return 1;
default:
return -1;
}
#else
return -1;
#endif
}
unsigned char *netif_get_hwaddr(int idx_wlan)
{
#if (CONFIG_LWIP_LAYER == 1)
return xnetif[idx_wlan].hwaddr;
return xnetif[idx_wlan].hwaddr;
#else
return NULL;
return NULL;
#endif
}
#endif
#if defined(CONFIG_MBED_ENABLED)
emac_callback emac_callback_func = NULL;
void *emac_callback_data = NULL;
void set_callback_func(emac_callback p, void *data) {
emac_callback_func = p;
emac_callback_data = data;
void set_callback_func(emac_callback p, void *data)
{
emac_callback_func = p;
emac_callback_data = data;
}
#endif
void netif_rx(int idx, unsigned int len)
{
#if (CONFIG_LWIP_LAYER == 1)
#if defined(CONFIG_MBED_ENABLED)
emac_callback_func(emac_callback_data, NULL, len);
emac_callback_func(emac_callback_data, NULL, len);
#else
ethernetif_recv(&xnetif[idx], len);
ethernetif_recv(&xnetif[idx], len);
#endif
#endif
#if (CONFIG_INIC_EN == 1)
inic_netif_rx(idx, len);
inic_netif_rx(idx, len);
#endif
}
@ -257,7 +252,7 @@ void netif_post_sleep_processing(void)
#if (CONFIG_LWIP_LAYER == 1)
#if defined(CONFIG_MBED_ENABLED)
#else
lwip_POST_SLEEP_PROCESSING(); //For FreeRTOS tickless to enable Lwip ARP timer when leaving IPS - Alex Fang
lwip_POST_SLEEP_PROCESSING(); //For FreeRTOS tickless to enable Lwip ARP timer when leaving IPS - Alex Fang
#endif
#endif
}
@ -267,7 +262,7 @@ void netif_pre_sleep_processing(void)
#if (CONFIG_LWIP_LAYER == 1)
#if defined(CONFIG_MBED_ENABLED)
#else
lwip_PRE_SLEEP_PROCESSING();
lwip_PRE_SLEEP_PROCESSING();
#endif
#endif
}
@ -275,9 +270,9 @@ void netif_pre_sleep_processing(void)
#ifdef CONFIG_WOWLAN
unsigned char *rltk_wlan_get_ip(int idx){
#if (CONFIG_LWIP_LAYER == 1)
return LwIP_GetIP(&xnetif[idx]);
return LwIP_GetIP(&xnetif[idx]);
#else
return NULL;
return NULL;
#endif
}
#endif

12
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/src/osdep/lwip_intf.h
View File

@ -30,12 +30,12 @@ struct netif;
//----- ------------------------------------------------------------------
#if defined(CONFIG_MBED_ENABLED)
struct eth_drv_sg {
unsigned int buf;
unsigned int len;
unsigned int buf;
unsigned int len;
};
#define MAX_ETH_DRV_SG 32
#define MAX_ETH_MSG 1540
#define MAX_ETH_DRV_SG 32
#define MAX_ETH_MSG 1540
#else
#include "ethernetif.h" // moved to ethernetif.h by jimmy 12/2/2015
#endif
@ -52,8 +52,11 @@ void rltk_wlan_send_skb(int idx, struct sk_buff *skb); //struct sk_buff as defin
int rltk_wlan_send(int idx, struct eth_drv_sg *sg_list, int sg_len, int total_len);
void rltk_wlan_recv(int idx, struct eth_drv_sg *sg_list, int sg_len);
unsigned char rltk_wlan_running(unsigned char idx); // interface is up. 0: interface is down
#if defined(CONFIG_MBED_ENABLED)
typedef void (*emac_callback)(void *param, struct netif *netif, unsigned int len);
void set_callback_func(emac_callback p, void *data);
#endif
//----- ------------------------------------------------------------------
// Network Interface provided
@ -73,7 +76,6 @@ extern void lwip_PRE_SLEEP_PROCESSING(void);
extern void lwip_POST_SLEEP_PROCESSING(void);
#endif //CONFIG_LWIP_LAYER == 1
#ifdef CONFIG_WOWLAN
extern unsigned char *rltk_wlan_get_ip(int idx);
#endif

2
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/src/osdep/wireless.h
View File

@ -1206,4 +1206,6 @@ struct iw_event
#define IW_EVT_STR_STA_DISASSOC "STA Disassoc"
#define IW_EVT_STR_SEND_ACTION_DONE "Send Action Done"
#define IW_EVT_STR_NO_NETWORK "No Assoc Network After Scan Done"
#define IW_EVT_STR_ICV_ERROR "ICV Eror"
#define IW_EVT_STR_CHALLENGE_FAIL "Auth Challenge Fail"
#endif /* _LINUX_WIRELESS_H */

1
targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/src/osdep/wlan_intf.h
View File

@ -67,6 +67,7 @@ int rltk_wlan_rf_on(void);
int rltk_wlan_rf_off(void);
int rltk_wlan_check_bus(void);
int rltk_wlan_wireless_mode(unsigned char mode);
int rltk_wlan_get_wireless_mode(unsigned char *pmode);
int rltk_wlan_set_wps_phase(unsigned char is_trigger_wps);
int rtw_ps_enable(int enable);
int rltk_wlan_is_connected_to_ap(void);

1314
targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/cmsis_rtos/cmsis_rtos_service.c
View File

File diff suppressed because it is too large Load Diff

267
targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/cmsis_rtos/cmsis_rtos_service.h
View File

@ -1,25 +1,33 @@
#ifndef _RTX2_SERVICE_H_
#define _RTX2_SERVICE_H_
#ifndef _CMSIS_RTOS_SERVICE_H_
#define _CMSIS_RTOS_SERVICE_H_
//-----------------------------------------------------------------------
// Include Files
//-----------------------------------------------------------------------
#include "wireless.h"
//#include "wireless.h"
#include "dlist.h"
#include <cmsis_os2.h>
//#include <rt_TypeDef.h>
#include "RTX_Config.h"
//#include <rt_Task.h>
//#include <rt_Semaphore.h>
//#include <rt_System.h>
#include "rtx_lib.h"
// --------------------------------------------
// Platform dependent include file
// --------------------------------------------
#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B)
//#include "platform_stdlib.h"
//#include "basic_types.h"
#include <rtl8195a.h>
#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8195BHP)
#include "platform/platform_stdlib.h"
extern VOID RtlUdelayOS(u32 us);
#elif defined(CONFIG_PLATFORM_8711B)
#include "platform/platform_stdlib.h"
#elif defined(CONFIG_PLATFORM_8721D)
#include "platform/platform_stdlib.h"
#elif defined(CONFIG_HARDWARE_8821C)
#include "basic_types.h"
#include "wlan_basic_types.h"
#elif defined(CONFIG_HARDWARE_8188F)
#include "platform/platform_stdlib.h"
#elif defined(CONFIG_HARDWARE_8192E)
#include "platform/platform_stdlib.h"
#elif defined(CONFIG_HARDWARE_8723D)
#include "platform/platform_stdlib.h"
#else
// other MCU may use standard library
#include <string.h>
@ -28,7 +36,7 @@
#if (defined CONFIG_GSPI_HCI || defined CONFIG_SDIO_HCI) || defined(CONFIG_LX_HCI)
/* For SPI interface transfer and us delay implementation */
#if !defined(CONFIG_PLATFORM_8195A) && !defined(CONFIG_PLATFORM_8711B)
#if !defined(CONFIG_PLATFORM_8195A) && !defined(CONFIG_PLATFORM_8711B) && !defined(CONFIG_PLATFORM_8721D) && !defined(CONFIG_PLATFORM_8195BHP)
#include <rtwlan_bsp.h>
#endif
#endif
@ -37,129 +45,101 @@
// --------------------------------------------
// Platform dependent type define
// --------------------------------------------
#if !defined(CONFIG_PLATFORM_8195A) && !defined(CONFIG_PLATFORM_8711B)
typedef unsigned char u8;
typedef unsigned short u16;
typedef unsigned int u32;
typedef signed char s8;
typedef signed short s16;
typedef signed int s32;
typedef signed long long s64;
typedef unsigned long long u64;
typedef unsigned int uint;
typedef signed int sint;
#ifndef bool
typedef int bool;
#define true 1
#define false 0
#endif
#define IN
#define OUT
#define VOID void
#define NDIS_OID uint
#define NDIS_STATUS uint
#ifndef PVOID
typedef void * PVOID;
#endif
typedef unsigned int __kernel_size_t;
typedef int __kernel_ssize_t;
typedef __kernel_size_t SIZE_T;
typedef __kernel_ssize_t SSIZE_T;
#endif //CONFIG_PLATFORM_8195A
#define OS_TICK OS_TICK_FREQ
#define OS_TICK_RATE_MS (1000/OS_TICK)
// === SEMAPHORE ===
typedef struct {
osSemaphoreId_t id;
osSemaphoreAttr_t attr;
os_semaphore_t data;
osSemaphoreId_t id;
osSemaphoreAttr_t attr;
os_semaphore_t data;
} rtx_sema_t;
// === THREAD ===
typedef struct {
osThreadId_t id;
osThreadAttr_t attr;
os_thread_t data;
osThreadId_t id;
osThreadAttr_t attr;
os_thread_t data;
} rtx_thread_data_t;
// === MUTEX ===
typedef struct {
osMutexId_t id;
osMutexAttr_t attr;
os_mutex_t data;
osMutexId_t id;
osMutexAttr_t attr;
os_mutex_t data;
} rtx_mutex_t;
// === MAIL BOX ===
#define RTX_MB_SIZE 8
#define RTX_MB_SIZE 8
typedef struct {
osEventFlagsId_t id;
osEventFlagsAttr_t attr;
os_event_flags_t data;
osEventFlagsId_t id;
osEventFlagsAttr_t attr;
os_event_flags_t data;
uint8_t post_idx;
uint8_t fetch_idx;
void* queue[RTX_MB_SIZE];
uint8_t post_idx;
uint8_t fetch_idx;
void* queue[RTX_MB_SIZE];
} rtx_mqueue_t;
typedef struct {
osMessageQueueId_t id;
osMessageQueueAttr_t attr;
void *queue_mem;
os_message_queue_t data;
osMessageQueueId_t id;
osMessageQueueAttr_t attr;
void *queue_mem;
os_message_queue_t data;
} rtx_mbox_t;
typedef struct{
osTimerId_t id;
osTimerAttr_t attr;
os_timer_t data;
}rtx_tmr_t;
osTimerId_t id;
osTimerAttr_t attr;
os_timer_t data;
} rtx_tmr_t;
#define FIELD_OFFSET(s,field) ((SSIZE_T)&((s*)(0))->field)
#define FIELD_OFFSET(s,field) ((SSIZE_T)&((s*)(0))->field)
// os types
typedef char osdepCHAR;
typedef float osdepFLOAT;
typedef double osdepDOUBLE;
typedef long osdepLONG;
typedef short osdepSHORT;
typedef unsigned long osdepSTACK_TYPE;
typedef long osdepBASE_TYPE;
typedef unsigned long osdepTickType;
typedef char osdepCHAR;
typedef float osdepFLOAT;
typedef double osdepDOUBLE;
typedef long osdepLONG;
typedef short osdepSHORT;
typedef unsigned long osdepSTACK_TYPE;
typedef long osdepBASE_TYPE;
typedef unsigned long osdepTickType;
typedef void * _timerHandle;
typedef void * _sema;
typedef void * _mutex;
typedef void * _lock;
typedef void * _queueHandle;
typedef void * _xqueue;
typedef struct timer_list _timer;
typedef void * _timerHandle;
typedef void * _sema;
typedef void * _mutex;
typedef void * _lock;
typedef void * _queueHandle;
typedef void * _xqueue;
typedef struct timer_list _timer;
typedef struct sk_buff _pkt;
typedef unsigned char _buffer;
typedef struct sk_buff _pkt;
typedef unsigned char _buffer;
typedef unsigned int systime;
#ifndef __LIST_H
#warning "DLIST_NOT_DEFINE!!!!!!"
struct list_head {
struct list_head *next, *prev;
struct list_head *next, *prev;
};
#endif
struct __queue {
struct list_head queue;
_lock lock;
struct __queue {
struct list_head queue;
_lock lock;
};
typedef struct __queue _queue;
typedef struct list_head _list;
typedef unsigned long _irqL;
typedef struct __queue _queue;
typedef struct list_head _list;
typedef unsigned long _irqL;
typedef void* _thread_hdl_;
typedef void thread_return;
typedef void* thread_context;
typedef void* _thread_hdl_;
typedef void thread_return;
typedef void* thread_context;
typedef struct { volatile int counter; } atomic_t;
#define ATOMIC_T atomic_t
#define HZ configTICK_RATE_HZ
@ -168,33 +148,40 @@ typedef void* thread_context;
/* emulate a modern version */
#define LINUX_VERSION_CODE KERNEL_VERSION(2, 6, 17)
static __inline _list *get_next(_list *list)
static __inline _list *get_next(_list *list)
{
return list->next;
}
return list->next;
}
static __inline _list *get_list_head(_queue *queue)
static __inline _list *get_list_head(_queue *queue)
{
return (&(queue->queue));
return (&(queue->queue));
}
#define LIST_CONTAINOR(ptr, type, member) \
((type *)((char *)(ptr)-(SIZE_T)((char *)&((type *)ptr)->member - (char *)ptr)))
((type *)((char *)(ptr)-(SIZE_T)((char *)&((type *)ptr)->member - (char *)ptr)))
//#define container_of(p,t,n) (t*)((p)-&(((t*)0)->n))
#define container_of(ptr, type, member) \
((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member)))
#define TASK_PRORITY_LOW osPriorityAboveNormal//osPriorityNormal
#define TASK_PRORITY_MIDDLE osPriorityHigh//osPriorityAboveNormal
#define TASK_PRORITY_HIGH osPriorityRealtime//osPriorityHigh
#define TASK_PRORITY_SUPER osPriorityRealtime
#define TASK_PRORITY_IDEL osPriorityIdle
((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member)))
#define TASK_PRORITY_LOW 1
#define TASK_PRORITY_MIDDLE 2
#define TASK_PRORITY_HIGH 3
#define TASK_PRORITY_SUPER 4
#define PRIORITIE_OFFSET 4
#define TIMER_MAX_DELAY 0xFFFFFFFF
#define TIMER_MAX_DELAY 0xFFFFFFFF
void save_and_cli(void);
void restore_flags(void);
void cli(void);
#ifndef mdelay
#define mdelay(t) ((t/OS_TICK_RATE_MS)>0)?(osDelay(t/OS_TICK_RATE_MS)):(osDelay(1))
#endif
#ifndef udelay
#define udelay(t) ((t/(OS_TICK_RATE_MS*1000))>0)?osDelay(t/(OS_TICK_RATE_MS*1000)):(osDelay(1))
#endif
//----- ------------------------------------------------------------------
// Common Definition
//----- ------------------------------------------------------------------
@ -208,45 +195,43 @@ void cli(void);
#define KERN_INFO
#define KERN_NOTICE
#define GFP_KERNEL 1
#define GFP_ATOMIC 1
#undef GFP_KERNEL
#define GFP_KERNEL 1
#define GFP_ATOMIC 1
#define SET_MODULE_OWNER(some_struct) do { } while (0)
#define SET_NETDEV_DEV(dev, obj) do { } while (0)
#define register_netdev(dev) (0)
#define unregister_netdev(dev) do { } while (0)
#define netif_queue_stopped(dev) (0)
#define netif_wake_queue(dev) do { } while (0)
#define printk printf
#define SET_MODULE_OWNER(some_struct) do { } while (0)
#define SET_NETDEV_DEV(dev, obj) do { } while (0)
#define register_netdev(dev) (0)
#define unregister_netdev(dev) do { } while (0)
#define netif_queue_stopped(dev) (0)
#define netif_wake_queue(dev) do { } while (0)
#define printk printf
#define DBG_ERR(fmt, args...) printf("\n\r[%s] " fmt, __FUNCTION__, ## args)
#define DBG_ERR(fmt, args...) printf("\n\r[%s] " fmt, __FUNCTION__, ## args)
#if WLAN_INTF_DBG
#define DBG_TRACE(fmt, args...) printf("\n\r[%s] " fmt, __FUNCTION__, ## args)
#define DBG_INFO(fmt, args...) printf("\n\r[%s] " fmt, __FUNCTION__, ## args)
#define DBG_TRACE(fmt, args...) printf("\n\r[%s] " fmt, __FUNCTION__, ## args)
#define DBG_INFO(fmt, args...) printf("\n\r[%s] " fmt, __FUNCTION__, ## args)
#else
#define DBG_TRACE(fmt, args...)
#define DBG_INFO(fmt, args...)
#endif
#define HALT() do { cli(); for(;;);} while(0)
#define ASSERT(x) do { \
if((x) == 0) \
printf("\n\rAssert(" #x ") failed on line %d in file %s", __LINE__, __FILE__); \
HALT(); \
} while(0)
#define HALT() do { cli(); for(;;);} while(0)
#undef ASSERT
#define ASSERT(x) do { \
if((x) == 0){\
printf("\n\rAssert(" #x ") failed on line %d in file %s", __LINE__, __FILE__); \
HALT();}\
} while(0)
#undef DBG_ASSERT
#define DBG_ASSERT(x, msg) do { \
if((x) == 0) \
printf("\n\r%s, Assert(" #x ") failed on line %d in file %s", msg, __LINE__, __FILE__); \
} while(0)
#define DBG_ASSERT(x, msg) do { \
if((x) == 0) \
printf("\n\r%s, Assert(" #x ") failed on line %d in file %s", msg, __LINE__, __FILE__); \
} while(0)
//----- ------------------------------------------------------------------
// Atomic Operation
//----- ------------------------------------------------------------------
#if !defined(CONFIG_PLATFORM_8195A) && !defined(CONFIG_PLATFORM_8711B) // for 8195A, it is defined in ..system../basic_types.h
typedef struct { volatile int counter; } atomic_t;
#endif
/*
* atomic_read - read atomic variable
@ -255,6 +240,7 @@ typedef struct { volatile int counter; } atomic_t;
* Atomically reads the value of @v. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
#undef atomic_read
#define atomic_read(v) ((v)->counter)
/*
@ -265,6 +251,7 @@ typedef struct { volatile int counter; } atomic_t;
* Atomically sets the value of @v to @i. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
#undef atomic_set
#define atomic_set(v,i) ((v)->counter = (i))
/*
@ -292,6 +279,10 @@ extern u32 rtw_is_list_empty(_list *phead);
extern void rtw_list_insert_head(_list *plist, _list *phead);
extern void rtw_list_insert_tail(_list *plist, _list *phead);
extern void rtw_list_delete(_list *plist);
#define vPortExitCritical save_and_cli
#endif /* _RTX_SERVICE_H_ */
#if (defined CONFIG_PLATFORM_8711B) || (defined CONFIG_PLATFORM_8721D)
extern u32 random_seed;
#endif
#endif /* _CMSIS_RTOS_SERVICE_H_ */

2
targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/device_lock.c
View File

@ -53,7 +53,7 @@ void device_mutex_lock(RT_DEV_LOCK_E device)
{
device_mutex_init(device);
while(rtw_mutex_get_timeout(&device_mutex[device], 10000)<0)
printf("device lock timeout: %d\n", device);
printf("device lock timeout: %d\n", (int)device);
}
//======================================================

4
targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/include/device_lock.h
View File

@ -15,7 +15,9 @@ enum _RT_DEV_LOCK_E
RT_DEV_LOCK_EFUSE = 0,
RT_DEV_LOCK_FLASH = 1,
RT_DEV_LOCK_CRYPTO = 2,
RT_DEV_LOCK_MAX = 3
RT_DEV_LOCK_PTA = 3,
RT_DEV_LOCK_WLAN = 4,
RT_DEV_LOCK_MAX = 5
};
typedef uint32_t RT_DEV_LOCK_E;

961
targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/include/osdep_service.h
View File

File diff suppressed because it is too large Load Diff

106
targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/osdep_service.c
View File

@ -5,6 +5,10 @@
******************************************************************************/
#include <osdep_service.h>
#if CONFIG_USE_TCM_HEAP
#include "tcm_heap.h"
#endif
#define OSDEP_DBG(x, ...) do {} while(0)
extern struct osdep_service_ops osdep_service;
@ -53,7 +57,7 @@ int RTW_STATUS_CODE(int error_code)
u32 rtw_atoi(u8* s)
{
int num=0,flag=0;
size_t i;
int i;
for(i=0;i<=strlen((char *)s);i++)
{
@ -70,8 +74,10 @@ u32 rtw_atoi(u8* s)
return(num);
}
#if CONFIG_USE_TCM_HEAP
void *tcm_heap_malloc(int size);
void *tcm_heap_calloc(int size);
#endif
u8* _rtw_vmalloc(u32 sz)
{
u8 *pbuf = NULL;
@ -202,11 +208,10 @@ void add_mem_usage(_list *pmem_table, void *ptr, int size, int *used_num, int fl
return;
}
else{
if(flag == MEM_MONITOR_FLAG_WPAS) {
if(flag == MEM_MONITOR_FLAG_WPAS)
DBG_INFO("Alloc memory at %p with size of %d", ptr, size);
} else {
else
DBG_INFO("Alloc memory at %p with size of %d", ptr, size);
}
}
#if CONFIG_MEM_MONITOR & MEM_MONITOR_LEAK
mem_entry = (struct mem_entry *) _rtw_malloc(sizeof(struct mem_entry));
@ -608,6 +613,22 @@ void rtw_exit_critical_mutex(_mutex *pmutex, _irqL *pirqL)
OSDEP_DBG("Not implement osdep service: rtw_exit_critical_mutex");
}
void rtw_cpu_lock(void)
{
if(osdep_service.rtw_cpu_lock)
osdep_service.rtw_cpu_lock();
else
OSDEP_DBG("Not implement osdep service: rtw_cpu_lock");
}
void rtw_cpu_unlock(void)
{
if(osdep_service.rtw_cpu_unlock)
osdep_service.rtw_cpu_unlock();
else
OSDEP_DBG("Not implement osdep service: rtw_cpu_unlock");
}
void rtw_init_queue(_queue *pqueue)
{
rtw_init_listhead(&(pqueue->queue));
@ -1159,6 +1180,83 @@ u32 rtw_timerChangePeriod( _timerHandle xTimer,
return 0;
}
void *rtw_timerGetID( _timerHandle xTimer )
{
if(osdep_service.rtw_timerGetID)
return osdep_service.rtw_timerGetID(xTimer);
else
OSDEP_DBG("Not implement osdep service: rtw_timerGetID");
return NULL;
}
u32 rtw_timerStart( _timerHandle xTimer, osdepTickType xBlockTime )
{
if(osdep_service.rtw_timerStart)
return osdep_service.rtw_timerStart(xTimer, xBlockTime);
else
OSDEP_DBG("Not implement osdep service: rtw_timerStart");
return 0;
}
u32 rtw_timerStartFromISR( _timerHandle xTimer,
osdepBASE_TYPE *pxHigherPriorityTaskWoken )
{
if(osdep_service.rtw_timerStartFromISR)
return osdep_service.rtw_timerStartFromISR(xTimer, pxHigherPriorityTaskWoken);
else
OSDEP_DBG("Not implement osdep service: rtw_timerStartFromISR");
return 0;
}
u32 rtw_timerStopFromISR( _timerHandle xTimer,
osdepBASE_TYPE *pxHigherPriorityTaskWoken )
{
if(osdep_service.rtw_timerStopFromISR)
return osdep_service.rtw_timerStopFromISR(xTimer, pxHigherPriorityTaskWoken);
else
OSDEP_DBG("Not implement osdep service: rtw_timerStopFromISR");
return 0;
}
u32 rtw_timerResetFromISR( _timerHandle xTimer,
osdepBASE_TYPE *pxHigherPriorityTaskWoken )
{
if(osdep_service.rtw_timerResetFromISR)
return osdep_service.rtw_timerResetFromISR(xTimer, pxHigherPriorityTaskWoken);
else
OSDEP_DBG("Not implement osdep service: rtw_timerResetFromISR");
return 0;
}
u32 rtw_timerChangePeriodFromISR( _timerHandle xTimer,
osdepTickType xNewPeriod,
osdepBASE_TYPE *pxHigherPriorityTaskWoken )
{
if(osdep_service.rtw_timerChangePeriodFromISR)
return osdep_service.rtw_timerChangePeriodFromISR(xTimer, xNewPeriod, pxHigherPriorityTaskWoken);
else
OSDEP_DBG("Not implement osdep service: rtw_timerChangePeriodFromISR");
return 0;
}
u32 rtw_timerReset( _timerHandle xTimer,
osdepTickType xBlockTime )
{
if(osdep_service.rtw_timerReset)
return osdep_service.rtw_timerReset(xTimer, xBlockTime);
else
OSDEP_DBG("Not implement osdep service: rtw_timerReset");
return 0;
}
#if 0 //TODO
void rtw_init_delayed_work(struct delayed_work *dwork, work_func_t func, const char *name)
{

32
targets/TARGET_Realtek/TARGET_AMEBA/sdk/os/os_dep/tcm_heap.c
View File

@ -13,7 +13,7 @@
#define ROUND_UP2(x, pad) (((x) + ((pad) - 1)) & ~((pad) - 1))
#define TCM_HEAP_SIZE (40*1024)
#define TCM_HEAP_SIZE (40*1024)
static struct Heap g_tcm_heap;
@ -27,9 +27,9 @@ HEAP_DEFINE_BUF(tcm_heap, TCM_HEAP_SIZE);
static int g_heap_inited=0;
static _lock tcm_lock;
#ifdef PLATFORM_FREERTOS
#if defined(PLATFORM_FREERTOS)
extern void vPortSetExtFree( void (*free)( void *p ), uint32_t upper, uint32_t lower );
#else
#elif defined(PLATFORM_CMSIS_RTOS)
extern void rtw_set_mfree_ext( void (*free)( void *p ), uint32_t upper, uint32_t lower );
#endif
void tcm_heap_init(void)
@ -52,7 +52,7 @@ void tcm_heap_init(void)
#if defined(PLATFORM_FREERTOS)
// let RTOS know how to free memory if using as task stack
vPortSetExtFree(tcm_heap_free, 0x20000000, 0x1fff0000);
#elif defined (PLATFORM_CMSIS_RTOS)
#elif defined(PLATFORM_CMSIS_RTOS)
rtw_set_mfree_ext(tcm_heap_free, 0x20000000, 0x1fff0000);
#endif
}
@ -67,7 +67,7 @@ void tcm_heap_dump(void)
chunk;
prev = chunk, chunk = chunk->next)
{
printf(" prev %p, chunk %p, size %d \n\r", prev, chunk, chunk->size);
printf(" prev %x, chunk %x, size %d \n\r", prev, chunk, chunk->size);
}
printf("--------------\n\r");
}
@ -246,10 +246,20 @@ int tcm_heap_freeSpace(void)
*/
void *tcm_heap_malloc(int size)
{
#if defined(PLATFORM_CMSIS_RTOS)
int64_t *mem;
// Make sure that block is 8-byte aligned
size = (size + 7U) & ~((uint32_t)7U);
size += sizeof(int64_t);
mem = (int64_t *)tcm_heap_allocmem(size);
#else
int *mem;
size += sizeof(int);
if ((mem = (int*)tcm_heap_allocmem(size))){
mem = (int*)tcm_heap_allocmem(size);
#endif
if (mem){
*mem++ = size;
}
@ -262,8 +272,8 @@ void *tcm_heap_malloc(int size)
void *tcm_heap_calloc(int size)
{
void *mem;
if ((mem = tcm_heap_malloc(size)))
mem = tcm_heap_malloc(size);
if (mem)
memset(mem, 0, size);
return mem;
@ -284,7 +294,11 @@ void *tcm_heap_calloc(int size)
*/
void tcm_heap_free(void *mem)
{
#if defined(PLATFORM_CMSIS_RTOS)
int64_t *_mem = (int64_t *)mem;
#else
int *_mem = (int *)mem;
#endif
if (_mem)
{

12
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_adc.h
View File

@ -45,7 +45,8 @@ enum _ADC_DBG_LVL_ {
typedef uint32_t ADC_DBG_LVL;
typedef uint32_t * PADC_DBG_LVL;
#if defined (CONFIG_DEBUG_LOG) && defined (CONFIG_DEBUG_LOG_ADC_HAL)
#ifdef CONFIG_DEBUG_LOG
#ifdef CONFIG_DEBUG_LOG_ADC_HAL
#define DBG_8195A_ADC(...) do{ \
_DbgDump("\r"ADC_PREFIX __VA_ARGS__);\
@ -63,6 +64,7 @@ typedef uint32_t * PADC_DBG_LVL;
#define DBG_8195A_ADC(...)
#define DBG_8195A_ADC_LVL(...)
#endif
#endif
//================ ADC HAL Related Enumeration ==================
@ -213,14 +215,10 @@ typedef struct _SAL_ADC_USERCB_ADPT_ {
// ADC user callback structure
typedef struct _SAL_ADC_USER_CB_ {
PSAL_ADC_USERCB_ADPT pTXCB; //ADC Transmit Callback
PSAL_ADC_USERCB_ADPT pTXCCB; //ADC Transmit Complete Callback
PSAL_ADC_USERCB_ADPT pRXCB; //ADC Receive Callback
PSAL_ADC_USERCB_ADPT pRXCCB; //ADC Receive Complete Callback
PSAL_ADC_USERCB_ADPT pRDREQCB; //ADC Read Request Callback
PSAL_ADC_USERCB_ADPT pERRCB; //ADC Error Callback
PSAL_ADC_USERCB_ADPT pDMATXCB; //ADC DMA Transmit Callback
PSAL_ADC_USERCB_ADPT pDMATXCCB; //ADC DMA Transmit Complete Callback
PSAL_ADC_USERCB_ADPT pIDMARXCCB; //ADC Error Callback
PSAL_ADC_USERCB_ADPT pDMARXCB; //ADC DMA Receive Callback
PSAL_ADC_USERCB_ADPT pDMARXCCB; //ADC DMA Receive Complete Callback
}SAL_ADC_USER_CB, *PSAL_ADC_USER_CB;
@ -229,7 +227,7 @@ typedef struct _SAL_ADC_USER_CB_ {
typedef struct _SAL_ADC_TRANSFER_BUF_ {
u32 DataLen; //ADC Transmfer Length
u32 *pDataBuf; //ADC Transfer Buffer Pointer
u32 RSVD; //
u16 *pUserDataBuf; //
}SAL_ADC_TRANSFER_BUF,*PSAL_ADC_TRANSFER_BUF;
typedef struct _SAL_ADC_DMA_USER_DEF_ {

17
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_common.h Normal file
View File

@ -0,0 +1,17 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _HAL_COMMON_H_
#define _HAL_COMMON_H_
//================= Function Prototype START ===================
HAL_Status HalCommonInit(void);
//================= Function Prototype END ===================
#endif

5
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_dac.h
View File

@ -228,14 +228,9 @@ typedef struct _SAL_DAC_USERCB_ADPT_ {
typedef struct _SAL_DAC_USER_CB_ {
PSAL_DAC_USERCB_ADPT pTXCB; //DAC Transmit Callback
PSAL_DAC_USERCB_ADPT pTXCCB; //DAC Transmit Complete Callback
PSAL_DAC_USERCB_ADPT pRXCB; //DAC Receive Callback
PSAL_DAC_USERCB_ADPT pRXCCB; //DAC Receive Complete Callback
PSAL_DAC_USERCB_ADPT pRDREQCB; //DAC Read Request Callback
PSAL_DAC_USERCB_ADPT pERRCB; //DAC Error Callback
PSAL_DAC_USERCB_ADPT pDMATXCB; //DAC DMA Transmit Callback
PSAL_DAC_USERCB_ADPT pDMATXCCB; //DAC DMA Transmit Complete Callback
PSAL_DAC_USERCB_ADPT pDMARXCB; //DAC DMA Receive Callback
PSAL_DAC_USERCB_ADPT pDMARXCCB; //DAC DMA Receive Complete Callback
}SAL_DAC_USER_CB, *PSAL_DAC_USER_CB;
// DAC Transmit Buffer

2
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_efuse.h
View File

@ -16,10 +16,12 @@
_LONG_CALL_ROM_ extern VOID HalEFUSEPowerSwitch8195AROM(IN u8 bWrite, IN u8 PwrState, IN u8 L25OutVoltage);
extern u32 HALEFUSEOneByteReadRAM(IN u32 CtrlSetting, IN u16 Addr, OUT u8 *Data, IN u8 L25OutVoltage);
extern u32 HALEFUSEOneByteWriteRAM(IN u32 CtrlSetting, IN u16 Addr, IN u8 Data, IN u8 L25OutVoltage);
u32 HALOneByteWriteRAM(IN u32 CtrlSetting,IN u16 Addr,IN u8 Data,IN u8 L25OutVoltage);
#define EFUSERead8 HALEFUSEOneByteReadRAM
#define EFUSEWrite8 HALEFUSEOneByteWriteRAM
#define L25EOUTVOLTAGE 7
#define DISABLE 0
#endif

25
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_i2c.h
View File

@ -308,25 +308,26 @@ enum _I2C_ERR_TYPE_ {
I2C_ERR_TX_ABRT = 0x08, //I2C TX terminated
I2C_ERR_SLV_TX_NACK = 0x10, //I2C slave transmission terminated by master NACK,
//but there are data in slave TX FIFO
I2C_ERR_MST_A_NACK = 0x12,
I2C_ERR_MST_D_NACK = 0x13,
I2C_ERR_USER_REG_TO = 0x20,
I2C_ERR_MST_A_NACK = 0x20,
I2C_ERR_MST_D_NACK = 0x40,
I2C_ERR_USER_REG_TO = 0x80,
I2C_ERR_RX_CMD_TO = 0x21,
I2C_ERR_RX_FF_TO = 0x22,
I2C_ERR_TX_CMD_TO = 0x23,
I2C_ERR_TX_FF_TO = 0x24,
I2C_ERR_RX_CMD_TO = 0x100,
I2C_ERR_RX_FF_TO = 0x200,
I2C_ERR_TX_CMD_TO = 0x400,
I2C_ERR_TX_FF_TO = 0x800,
I2C_ERR_TX_ADD_TO = 0x25,
I2C_ERR_RX_ADD_TO = 0x26,
I2C_ERR_TX_ADD_TO = 0x1000,
I2C_ERR_RX_ADD_TO = 0x2000,
};
typedef uint32_t I2C_ERR_TYPE;
typedef uint32_t *PI2C_ERR_TYPE;
// I2C Time Out type
#define I2C_TIMEOOUT_DISABLE 0x00
#define I2C_TIMEOOUT_ENDLESS 0xFFFFFFFF
enum _I2C_TIMEOUT_TYPE_ {
I2C_TIMEOUT_DISABLE = 0x00,
I2C_TIMEOUT_ENDLESS = 0xFFFFFFFF,
};
typedef uint32_t I2C_TIMEOUT_TYPE;
typedef uint32_t *PI2C_TIMEOUT_TYPE;

347
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_i2s.h Normal file
View File

@ -0,0 +1,347 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _HAL_I2S_H_
#define _HAL_I2S_H_
#include "rtl8195a_i2s.h"
/* User Define Flags */
#define I2S_MAX_ID 1 // valid I2S index 0 ~ I2S_MAX_ID
/**********************************************************************/
/* I2S HAL initial data structure */
typedef struct _HAL_I2S_INIT_DAT_ {
u8 I2SIdx; /*I2S index used*/
u8 I2SEn; /*I2S module enable tx/rx/tx+rx*/
u8 I2SMaster; /*I2S Master or Slave mode*/
u8 I2SWordLen; /*I2S Word length 16 or 24bits*/
u8 I2SChNum; /*I2S Channel number mono or stereo*/
u8 I2SPageNum; /*I2S Page Number 2~4*/
u16 I2SPageSize; /*I2S page Size 1~4096 word*/
u8 *I2STxData; /*I2S Tx data pointer*/
u8 *I2SRxData; /*I2S Rx data pointer*/
u32 I2STxIntrMSK; /*I2S Tx Interrupt Mask*/
u32 I2STxIntrClr; /*I2S Tx Interrupt register to clear */
u32 I2SRxIntrMSK; /*I2S Rx Interrupt Mask*/
u32 I2SRxIntrClr; /*I2S Rx Interrupt register to clear*/
u16 I2STxIdx; /*I2S TX page index */
u16 I2SRxIdx; /*I2S RX page index */
u16 I2SHWTxIdx; /*I2S HW TX page index */
u16 I2SHWRxIdx; /*I2S HW RX page index */
u16 I2SRate; /*I2S sample rate*/
u8 I2STRxAct; /*I2S tx rx act*/
}HAL_I2S_INIT_DAT, *PHAL_I2S_INIT_DAT;
/**********************************************************************/
/* I2S Data Structures */
/* I2S Module Selection */
typedef enum _I2S_MODULE_SEL_ {
I2S0_SEL = 0x0,
I2S1_SEL = 0x1,
}I2S_MODULE_SEL,*PI2S_MODULE_SEL;
/*
typedef struct _HAL_I2S_ADAPTER_ {
u32 Enable:1;
I2S_CTL_REG I2sCtl;
I2S_SETTING_REG I2sSetting;
u32 abc;
u8 I2sIndex;
}HAL_I2S_ADAPTER, *PHAL_I2S_ADAPTER;
*/
/* I2S HAL Operations */
typedef struct _HAL_I2S_OP_ {
RTK_STATUS (*HalI2SInit) (VOID *Data);
RTK_STATUS (*HalI2SDeInit) (VOID *Data);
RTK_STATUS (*HalI2STx) (VOID *Data, u8 *pBuff);
RTK_STATUS (*HalI2SRx) (VOID *Data, u8 *pBuff);
RTK_STATUS (*HalI2SEnable) (VOID *Data);
RTK_STATUS (*HalI2SIntrCtrl) (VOID *Data);
u32 (*HalI2SReadReg) (VOID *Data, u8 I2SReg);
RTK_STATUS (*HalI2SSetRate) (VOID *Data);
RTK_STATUS (*HalI2SSetWordLen) (VOID *Data);
RTK_STATUS (*HalI2SSetChNum) (VOID *Data);
RTK_STATUS (*HalI2SSetPageNum) (VOID *Data);
RTK_STATUS (*HalI2SSetPageSize) (VOID *Data);
RTK_STATUS (*HalI2SClrIntr) (VOID *Data);
RTK_STATUS (*HalI2SClrAllIntr) (VOID *Data);
RTK_STATUS (*HalI2SDMACtrl) (VOID *Data);
/*
VOID (*HalI2sOnOff)(VOID *Data);
BOOL (*HalI2sInit)(VOID *Data);
BOOL (*HalI2sSetting)(VOID *Data);
BOOL (*HalI2sEn)(VOID *Data);
BOOL (*HalI2sIsrEnAndDis) (VOID *Data);
BOOL (*HalI2sDumpReg)(VOID *Data);
BOOL (*HalI2s)(VOID *Data);
*/
}HAL_I2S_OP, *PHAL_I2S_OP;
/**********************************************************************/
/* I2S Pinmux Selection */
#if 0
typedef enum _I2S0_PINMUX_ {
I2S0_TO_S0 = 0x0,
I2S0_TO_S1 = 0x1,
I2S0_TO_S2 = 0x2,
}I2S0_PINMUX, *PI2S0_PINMUX;
typedef enum _I2S1_PINMUX_ {
I2S1_TO_S0 = 0x0,
I2S1_TO_S1 = 0x1,
}I2S1_PINMUX, *PI2S1_PINMUX;
#endif
typedef enum _I2S_PINMUX_ {
I2S_S0 = 0,
I2S_S1 = 1,
I2S_S2 = 2,
I2S_S3 = 3
}I2S_PINMUX, *PI2S_PINMUX;
/* I2S Module Status */
typedef enum _I2S_MODULE_STATUS_ {
I2S_DISABLE = 0x0,
I2S_ENABLE = 0x1,
}I2S_MODULE_STATUS, *PI2S_MODULE_STATUS;
/* I2S Device Status */
typedef enum _I2S_Device_STATUS_ {
I2S_STS_UNINITIAL = 0x00,
I2S_STS_INITIALIZED = 0x01,
I2S_STS_IDLE = 0x02,
I2S_STS_TX_READY = 0x03,
I2S_STS_TX_ING = 0x04,
I2S_STS_RX_READY = 0x05,
I2S_STS_RX_ING = 0x06,
I2S_STS_TRX_READY = 0x07,
I2S_STS_TRX_ING = 0x08,
I2S_STS_ERROR = 0x09,
}I2S_Device_STATUS, *PI2S_Device_STATUS;
/* I2S Feature Status */
typedef enum _I2S_FEATURE_STATUS_{
I2S_FEATURE_DISABLED = 0,
I2S_FEATURE_ENABLED = 1,
}I2S_FEATURE_STATUS,*PI2S_FEATURE_STATUS;
/* I2S Device Mode */
typedef enum _I2S_DEV_MODE_ {
I2S_MASTER_MODE = 0x0,
I2S_SLAVE_MODE = 0x1
}I2S_DEV_MODE, *PI2S_DEV_MODE;
/* I2S Word Length */
typedef enum _I2S_WORD_LEN_ {
I2S_WL_16 = 0x0,
I2S_WL_24 = 0x1,
}I2S_WORD_LEN, *PI2S_WORD_LEN;
/* I2S Bus Transmit/Receive */
typedef enum _I2S_DIRECTION_ {
I2S_ONLY_RX = 0x0,
I2S_ONLY_TX = 0x1,
I2S_TXRX = 0x2
}I2S_DIRECTION, *PI2S_DIRECTION;
/* I2S Channel number */
typedef enum _I2S_CH_NUM_ {
I2S_CH_STEREO = 0x0,
I2S_CH_RSVD = 0x1,
I2S_CH_MONO = 0x2
}I2S_CH_NUM, *PI2S_CH_NUM;
/* I2S Page number */
typedef enum _I2S_PAGE_NUM_ {
I2S_1PAGE = 0x0,
I2S_2PAGE = 0x1,
I2S_3PAGE = 0x2,
I2S_4PAGE = 0x3
}I2S_PAGE_NUM, *PI2S_PAGE_NUM;
/* I2S Sample rate*/
typedef enum _I2S_SAMPLE_RATE_ {
I2S_SR_8KHZ = 0x00, // /12
I2S_SR_16KHZ = 0x01, // /6
I2S_SR_24KHZ = 0x02, // /4
I2S_SR_32KHZ = 0x03, // /3
I2S_SR_48KHZ = 0x05, // /2
I2S_SR_96KHZ = 0x06, // x1, base 96kHz
I2S_SR_7p35KHZ = 0x10,
I2S_SR_14p7KHZ = 0x11,
I2S_SR_22p05KHZ = 0x12,
I2S_SR_29p4KHZ = 0x13,
I2S_SR_44p1KHZ = 0x15,
I2S_SR_88p2KHZ = 0x16 // x1, base 88200Hz
}I2S_SAMPLE_RATE, *PI2S_SAMPLE_RATE;
/* I2S TX interrupt mask/status */
typedef enum _I2S_TX_IMR_ {
I2S_TX_INT_PAGE0_OK = (1<<0),
I2S_TX_INT_PAGE1_OK = (1<<1),
I2S_TX_INT_PAGE2_OK = (1<<2),
I2S_TX_INT_PAGE3_OK = (1<<3),
I2S_TX_INT_FULL = (1<<4),
I2S_TX_INT_EMPTY = (1<<5)
} I2S_TX_IMR, *PI2S_TX_IMR;
/* I2S RX interrupt mask/status */
typedef enum _I2S_RX_IMR_ {
I2S_RX_INT_PAGE0_OK = (1<<0),
I2S_RX_INT_PAGE1_OK = (1<<1),
I2S_RX_INT_PAGE2_OK = (1<<2),
I2S_RX_INT_PAGE3_OK = (1<<3),
I2S_RX_INT_EMPTY = (1<<4),
I2S_RX_INT_FULL = (1<<5)
} I2S_RX_IMR, *PI2S_RX_IMR;
/* I2S User Callbacks */
typedef struct _SAL_I2S_USER_CB_{
VOID (*TXCB) (VOID *Data);
VOID (*TXCCB) (VOID *Data);
VOID (*RXCB) (VOID *Data);
VOID (*RXCCB) (VOID *Data);
VOID (*RDREQCB) (VOID *Data);
VOID (*ERRCB) (VOID *Data);
VOID (*GENCALLCB) (VOID *Data);
}SAL_I2S_USER_CB,*PSAL_I2S_USER_CB;
typedef struct _I2S_USER_CB_{
VOID (*TxCCB)(uint32_t id, char *pbuf);
u32 TxCBId;
VOID (*RxCCB)(uint32_t id, char *pbuf);
u32 RxCBId;
}I2S_USER_CB,*PI2S_USER_CB;
/* Software API Level I2S Handler */
typedef struct _HAL_I2S_ADAPTER_{
u8 DevNum; //I2S device number
u8 PinMux; //I2S pin mux seletion
u8 RSVD0; //Reserved
volatile u8 DevSts; //I2S device status
u32 RSVD2; //Reserved
u32 I2SExd; //I2S extended options:
//bit 0: I2C RESTART supported,
// 0 for NOT supported,
// 1 for supported
//bit 1: I2C General Call supported
// 0 for NOT supported,
// 1 for supported
//bit 2: I2C START Byte supported
// 0 for NOT supported,
// 1 for supported
//bit 3: I2C Slave-No-Ack
// supported
// 0 for NOT supported,
// 1 for supported
//bit 4: I2C bus loading,
// 0 for 100pf,
// 1 for 400pf
//bit 5: I2C slave ack to General
// Call
//bit 6: I2C User register address
//bit 7: I2C 2-Byte User register
// address
//bit 31~bit 8: Reserved
u32 ErrType; //
u32 TimeOut; //I2S IO Timeout count
PHAL_I2S_INIT_DAT pInitDat; //Pointer to I2S initial data struct
I2S_USER_CB UserCB; //Pointer to I2S User Callback
IRQ_HANDLE IrqHandle; // Irq Handler
u32* TxPageList[4]; // The Tx DAM buffer: pointer of each page
u32* RxPageList[4]; // The Tx DAM buffer: pointer of each page
}HAL_I2S_ADAPTER, *PHAL_I2S_ADAPTER;
typedef struct _HAL_I2S_DEF_SETTING_{
u8 I2SMaster; // Master or Slave mode
u8 DevSts; //I2S device status
u8 I2SChNum; //I2S Channel number mono or stereo
u8 I2SPageNum; //I2S Page number 2~4
u8 I2STRxAct; //I2S tx rx act, tx only or rx only or tx+rx
u8 I2SWordLen; //I2S Word length 16bit or 24bit
u16 I2SPageSize; //I2S Page size 1~4096 word
u16 I2SRate; //I2S sample rate 8k ~ 96khz
u32 I2STxIntrMSK; /*I2S Tx Interrupt Mask*/
u32 I2SRxIntrMSK; /*I2S Rx Interrupt Mask*/
}HAL_I2S_DEF_SETTING, *PHAL_I2S_DEF_SETTING;
/**********************************************************************/
HAL_Status
RtkI2SLoadDefault(IN VOID *Adapter, IN VOID *Setting);
HAL_Status
RtkI2SInit(IN VOID *Data);
HAL_Status
RtkI2SDeInit(IN VOID *Data);
HAL_Status
RtkI2SEnable(IN VOID *Data);
HAL_Status
RtkI2SDisable(IN VOID *Data);
extern HAL_Status
HalI2SInit( IN VOID *Data);
extern VOID
HalI2SDeInit( IN VOID *Data);
extern HAL_Status
HalI2SDisable( IN VOID *Data);
extern HAL_Status
HalI2SEnable( IN VOID *Data);
/**********************************************************************/
VOID I2S0ISRHandle(VOID *Data);
VOID I2S1ISRHandle(VOID *Data);
/**********************************************************************/
VOID HalI2SOpInit(
IN VOID *Data
);
#endif

15
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_misc.h
View File

@ -24,6 +24,19 @@
#define CHIP_ID_8710AM 0xFA
#define CHIP_ID_SIP 0xF9
#define CHIP_ID_COMBO_SIP 0xF8
#define CHIP_ID_SIP2 0xF7
#define CHIP_ID_MICO100 0xF1
enum _HAL_RESET_REASON{
REASON_DEFAULT_RST = 0, /**< normal startup by power on */
REASON_WDT_RST, /**< hardware watch dog reset */
REASON_EXCEPTION_RST, /**< exception reset, GPIO status won't change */
REASON_SOFT_WDT_RST, /**< software watch dog reset, GPIO status won't change */
REASON_SOFT_RESTART, /**< software restart ,system_restart , GPIO status won't change */
REASON_DEEP_SLEEP_AWAKE, /**< wake up from deep-sleep */
REASON_EXT_SYS_RST /**< external system reset */
};
typedef u32 HAL_RESET_REASON;
#ifdef CONFIG_TIMER_MODULE
extern _LONG_CALL_ u32 HalDelayUs(u32 us);
@ -43,5 +56,7 @@ extern _LONG_CALL_ROM_ int _memcmp( const void *av, const void *bv, SIZE_T len )
extern _LONG_CALL_ROM_ SIZE_T _strlen(const char *s);
extern _LONG_CALL_ROM_ int _strcmp(const char *cs, const char *ct);
VOID HalSetResetCause(IN HAL_RESET_REASON reason);
HAL_RESET_REASON HalGetResetCause(VOID);
#endif //_MISC_H_

7
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_pwm.h
View File

@ -15,6 +15,9 @@
#define _HAL_PWM_H_
#define MAX_PWM_CTRL_PIN 4
#define MAX_GTIMER_NUM 4
#define MAX_DEVID_TICK 1020
// the minimum tick time for G-timer is 61 us (clock source = 32768Hz, reload value=1 and reload takes extra 1T)
//#define GTIMER_TICK_US 31 // micro-second, 1000000/32768 ~= 30.5
#define MIN_GTIMER_TIMEOUT 61 // in micro-sec, use this value to set the g-timer to generate tick for PWM. 61=(1000000/32768)*2
@ -32,6 +35,10 @@ typedef struct _HAL_PWM_ADAPTER_ {
// float duty_ratio; // the dyty ratio = pulswidth/period
}HAL_PWM_ADAPTER, *PHAL_PWM_ADAPTER;
typedef struct _HAL_PWM_GTIMER_ {
u32 tick_time; // the tick time for the G-timer
u8 reference; // map of referenced by PWM
}HAL_PWM_TIMER, *PHAL_PWM_TIMER;
extern HAL_Status
HAL_Pwm_Init(

87
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_spi_flash.h
View File

@ -69,6 +69,8 @@ enum _SPIC_BIT_MODE_ {
#define FLASH_WINBOND 3
#define FLASH_MICRON 4
#define FLASH_EON 5
#define FLASH_GD 6
#define FLASH_CYPRESS 7
//#define FLASH_MXIC_MX25L4006E 0
//#define FLASH_MXIC_MX25L8073E 0
@ -82,40 +84,41 @@ enum _SPIC_BIT_MODE_ {
#define FLASH_CMD_WRDI 0x04 //write disable
#define FLASH_CMD_WRSR 0x01 //write status register
#define FLASH_CMD_RDID 0x9F //read idenfication
#define FLASH_CMD_RDUID 0x4B //Read Unique ID
#define FLASH_CMD_RDSR 0x05 //read status register
#define FLASH_CMD_RDSFDP 0x5A //Read SFDP
#define FLASH_CMD_READ 0x03 //read data
#define FLASH_CMD_FREAD 0x0B //fast read data
#define FLASH_CMD_PP 0x02 //Page Program
#define FLASH_CMD_DREAD 0x3B //Double Output Mode command 1-1-2
#define FLASH_CMD_2READ 0xBB // 2 x I/O read command 1-2-2
#define FLASH_CMD_QREAD 0x6B // 1I / 4O read command 1-1-4
#define FLASH_CMD_4READ 0xEB // 4 x I/O read command 1-4-4
#define FLASH_CMD_DPP 0xA2 // 1-1-2
#define FLASH_CMD_2PP 0xD2 // 1-2-2
#define FLASH_CMD_QPP 0x32 // 1-1-4
#define FLASH_CMD_4PP 0x38 //quad page program 1-4-4
#define FLASH_CMD_DREAD 0x3B //Double Output Mode command 1-1-2
#define FLASH_CMD_2READ 0xBB // 2 x I/O read command 1-2-2
#define FLASH_CMD_QREAD 0x6B // 1I / 4O read command 1-1-4
#define FLASH_CMD_4READ 0xEB // 4 x I/O read command 1-4-4
#define FLASH_CMD_DPP 0xA2 // 1-1-2
#define FLASH_CMD_2PP 0xD2 // 1-2-2
#define FLASH_CMD_QPP 0x32 // 1-1-4
#define FLASH_CMD_4PP 0x38 //quad page program 1-4-4
#define FLASH_CMD_SE 0x20 //Sector Erase
#define FLASH_CMD_BE 0xD8 //Block Erase(or 0x52)
#define FLASH_CMD_CE 0xC7 //Chip Erase(or 0xC7)
#define FLASH_CMD_DP 0xB9 //Deep Power Down
#define FLASH_CMD_RDP 0xAB //Release from Deep Power-Down
#define FLASH_CMD_BE 0xD8 //Block Erase(or 0x52)
#define FLASH_CMD_CE 0xC7 //Chip Erase(or 0xC7)
#define FLASH_CMD_DP 0xB9 //Deep Power Down
#define FLASH_CMD_RDP 0xAB //Release from Deep Power-Down
/*Micron Special command*/
#define FLASH_CMD_DE 0xC4
#define FLASH_CMD_4PP2 0x12
#define FLASH_CMD_RFSR 0x70
#define FLASH_CMD_CFSR 0x50
#define FLASH_CMD_RNCR 0xB5
#define FLASH_CMD_WNCR 0xB1
#define FLASH_CMD_RVCR 0x85
#define FLASH_CMD_WVCR 0x81
#define FLASH_CMD_REVCR 0x65
#define FLASH_CMD_WEVCR 0x61
#define FLASH_CMD_REAR 0xC8
#define FLASH_CMD_WEAR 0xC5
#define FLASH_CMD_ENQUAD 0x35
#define FLASH_CMD_EXQUAD 0xF5
#define FLASH_CMD_DE 0xC4
#define FLASH_CMD_4PP2 0x12
#define FLASH_CMD_RFSR 0x70
#define FLASH_CMD_CFSR 0x50
#define FLASH_CMD_RNCR 0xB5
#define FLASH_CMD_WNCR 0xB1
#define FLASH_CMD_RVCR 0x85
#define FLASH_CMD_WVCR 0x81
#define FLASH_CMD_REVCR 0x65
#define FLASH_CMD_WEVCR 0x61
#define FLASH_CMD_REAR 0xC8
#define FLASH_CMD_WEAR 0xC5
#define FLASH_CMD_ENQUAD 0x35
#define FLASH_CMD_EXQUAD 0xF5
/*MXIC Special command*/
#define FLASH_CMD_RDCR 0x15 //read configurate register
@ -126,6 +129,19 @@ enum _SPIC_BIT_MODE_ {
#define FLASH_CMD_RDSCUR 0x2B // read security register
#define FLASH_CMD_WRSCUR 0x2F // write security register
/*WINBOND Special command*/
#define FLASH_CMD_GLOCK 0x7E
#define FLASH_CMD_GUNLOCK 0x98
#define FLASH_CMD_RLOCK 0x3D
#define FLASH_CMD_SLOCK 0x36
#define FLASH_CMD_SUNLOCK 0x39
#define FLASH_CMD_WRSR3 0x11
#define FLASH_CMD_RDSR3 0x15
/*Cypress Special command*/
#define FLASH_CMD_RDSR4 0x07 //read status register 2
#define FLASH_CMD_CLSR 0x30 //Clear status register 2 error bit
//#endif
#if 0
#if FLASH_MXIC_MX25L4006E
@ -331,11 +347,16 @@ VOID SpicBlockEraseFlashRtl8195A(IN u32 Address);
VOID SpicSectorEraseFlashRtl8195A(IN u32 Address);
VOID SpicDieEraseFlashRtl8195A(IN u32 Address);
VOID SpicWriteProtectFlashRtl8195A(IN u32 Protect);
VOID SpicWaitWipDoneRefinedRtl8195A(IN SPIC_INIT_PARA SpicInitPara);
VOID SpicWaitWipDoneRefinedRtl8195A(IN SPIC_INIT_PARA SpicInitPara);
VOID SpicWaitOperationDoneRtl8195A(IN SPIC_INIT_PARA SpicInitPara);
VOID SpicRxCmdRefinedRtl8195A(IN u8 cmd,IN SPIC_INIT_PARA SpicInitPara);
VOID SpicTxCmdWithDataRtl8195A(IN u8 cmd,IN u8 DataPhaseLen,IN u8* pData,IN SPIC_INIT_PARA SpicInitPara);
VOID SpicTxCmdWithDataNoCheckRtl8195A(IN u8 cmd, IN u8 DataPhaseLen,IN u8* pData);
VOID SpicRxCmdRefinedRtl8195A(IN u8 cmd,IN SPIC_INIT_PARA SpicInitPara);
VOID SpicRxCmdWithDataRtl8195A(IN u8 cmd,IN u8 DataPhaseLen, IN u8* pData,IN SPIC_INIT_PARA SpicInitPara);
u8 SpicGetFlashStatusRefinedRtl8195A(IN SPIC_INIT_PARA SpicInitPara);
VOID SpicInitRefinedRtl8195A(IN u8 InitBaudRate,IN u8 SpicBitMode);
u8 SpicGetFlashStatus3Rtl8195A(IN SPIC_INIT_PARA SpicInitPara);
u8 SpicGetFlashStatus4Rtl8195A(IN SPIC_INIT_PARA SpicInitPara);
VOID SpicInitRefinedRtl8195A(IN u8 InitBaudRate,IN u8 SpicBitMode);
u32 SpicWaitWipRtl8195A(VOID);
u32 SpicOneBitCalibrationRtl8195A(IN u8 SysCpuClk);
VOID SpicDisableRtl8195A(VOID);
@ -343,10 +364,18 @@ VOID SpicDeepPowerDownFlashRtl8195A(VOID);
VOID SpicUserProgramRtl8195A(IN u8 * data, IN SPIC_INIT_PARA SpicInitPara, IN u32 addr, IN u32 * LengthInfo);
VOID SpicUserReadRtl8195A(IN u32 Length, IN u32 addr, IN u8 * data, IN u8 BitMode);
VOID SpicUserReadFourByteRtl8195A(IN u32 Length, IN u32 addr, IN u32 * data, IN u8 BitMode);
VOID SpicReadUniqueIDRtl8195A(IN u8 *buff,IN u8 len);
VOID SpicReadIDRtl8195A(VOID);
VOID SpicSetFlashStatusRefinedRtl8195A(IN u32 data, IN SPIC_INIT_PARA SpicInitPara);
VOID SpicSetExtendAddrRtl8195A(IN u32 data, IN SPIC_INIT_PARA SpicInitPara);
u8 SpicGetExtendAddrRtl8195A(IN SPIC_INIT_PARA SpicInitPara);
VOID SpicSetLockModeRtl8195A(IN u8 Mode);
VOID SpicLockFlashRtl8195A(VOID);
VOID SpicUnlockFlashRtl8195A(VOID);
VOID SpicSingleLockRtl8195A(IN u32 Address);
VOID SpicSingleUnlockRtl8195A(IN u32 Address);
u8 SpicReadLockStateRtl8195A(IN u32 Address);
#if SPIC_CALIBRATION_IN_NVM
VOID SpicNVMCalLoad(u8 BitMode, u8 CpuClk);
VOID SpicNVMCalLoadAll(void);

1
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_ssi.h
View File

@ -21,6 +21,7 @@
*/
extern u32 SSI_DBG_CONFIG;
extern uint8_t SPI0_IS_AS_SLAVE;
#define SSI_DBG_ENTRANCE(...) do {\

9
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_timer.h
View File

@ -44,19 +44,16 @@ typedef struct _HAL_TIMER_OP_ {
u32 (*HalGetTimerId)(u32 *TimerId);
BOOL (*HalTimerInit)(VOID *Data);
u32 (*HalTimerReadCount)(u32 TimerId);
//VOID (*HalTimerIrqEn)(u32 TimerId);
VOID (*HalTimerIrqClear)(u32 TimerId);
VOID (*HalTimerDis)(u32 TimerId);
VOID (*HalTimerEn)(u32 TimerId);
VOID (*HalTimerDumpReg)(u32 TimerId);
//VOID (*HalTimerReLoad)(u32 TimerId, u32 LoadUs);
}HAL_TIMER_OP, *PHAL_TIMER_OP;
typedef struct _HAL_TIMER_OP_EXT_ {
PHAL_TIMER_OP phal_timer_op_rom;
VOID (*HalTimerIrqEn)(u32 TimerId);
VOID (*HalTimerReLoad)(u32 TimerId, u32 LoadUs);
VOID (*HalTimerSync)(u32 TimerId);
PHAL_TIMER_OP phal_timer_op_rom;
VOID (*HalTimerIrqEn)(u32 TimerId);
VOID (*HalTimerReLoad)(u32 TimerId, u32 LoadUs);
}HAL_TIMER_OP_EXT, *PHAL_TIMER_OP_EXT;
#ifdef CONFIG_TIMER_MODULE

9
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a.h
View File

@ -28,6 +28,7 @@
#include "hal_diag.h"
#include "hal_spi_flash.h"
#include "rtl8195a_spi_flash.h"
#include "hal_timer.h"
#include "hal_util.h"
#include "hal_efuse.h"
#include "hal_soc_ps_monitor.h"
@ -148,11 +149,9 @@ __##name##_Disable(void) \
#include "rtl8195a_trap.h"
#include "rtl8195a_clk.h"
#include "rtl8195a_misc.h"
#include "rtl8195a_sdio.h"
#endif
/* ----------------------------------------------------------------------------
-- Cortex M3 Core Configuration
---------------------------------------------------------------------------- */
@ -198,6 +197,10 @@ __##name##_Disable(void) \
#include "rtl8195a_i2c.h"
#endif
#ifdef CONFIG_PCM_EN
#include "hal_pcm.h"
#include "rtl8195a_pcm.h"
#endif
#ifdef CONFIG_PWM_EN
#include "hal_pwm.h"
@ -226,7 +229,7 @@ __##name##_Disable(void) \
#endif
#ifdef CONFIG_SDIO_DEVICE_EN
//#include "hal_sdio.h"
#include "hal_sdio.h"
#endif
#ifdef CONFIG_NFC_EN

714
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_i2s.h Normal file
View File

@ -0,0 +1,714 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8195A_I2S_H_
#define _RTL8195A_I2S_H_
//=============== Register Bit Field Definition ====================
// REG_I2S_CONTROL
#define BIT_CTLX_I2S_EN BIT(0)
#define BIT_SHIFT_CTLX_I2S_EN 0
#define BIT_MASK_CTLX_I2S_EN 0x1
#define BIT_CTRL_CTLX_I2S_EN(x) (((x) & BIT_MASK_CTLX_I2S_EN) << BIT_SHIFT_CTLX_I2S_EN)
#define BIT_SHIFT_CTLX_I2S_TRX_ACT 1
#define BIT_MASK_CTLX_I2S_TRX_ACT 0x3
#define BIT_CTRL_CTLX_I2S_TRX_ACT(x) (((x) & BIT_MASK_CTLX_I2S_TRX_ACT) << BIT_SHIFT_CTLX_I2S_TRX_ACT)
#define BIT_GET_CTLX_I2S_TRX_ACT(x) (((x) >> BIT_SHIFT_CTLX_I2S_TRX_ACT) & BIT_MASK_CTLX_I2S_TRX_ACT)
#define BIT_SHIFT_CTLX_I2S_CH_NUM 3
#define BIT_MASK_CTLX_I2S_CH_NUM 0x3
#define BIT_CTRL_CTLX_I2S_CH_NUM(x) (((x) & BIT_MASK_CTLX_I2S_CH_NUM) << BIT_SHIFT_CTLX_I2S_CH_NUM)
#define BIT_GET_CTLX_I2S_CH_NUM(x) (((x) >> BIT_SHIFT_CTLX_I2S_CH_NUM) & BIT_MASK_CTLX_I2S_CH_NUM)
#define BIT_CTLX_I2S_WL BIT(6)
#define BIT_SHIFT_CTLX_I2S_WL 6
#define BIT_MASK_CTLX_I2S_WL 0x1
#define BIT_CTRL_CTLX_I2S_WL(x) (((x) & BIT_MASK_CTLX_I2S_WL) << BIT_SHIFT_CTLX_I2S_WL)
#define BIT_CTLX_I2S_LRSWAP BIT(10)
#define BIT_SHIFT_CTLX_I2S_LRSWAP 10
#define BIT_MASK_CTLX_I2S_LRSWAP 0x1
#define BIT_CTRL_CTLX_I2S_LRSWAP(x) (((x) & BIT_MASK_CTLX_I2S_LRSWAP) << BIT_SHIFT_CTLX_I2S_LRSWAP)
#define BIT_CTLX_I2S_SCK_INV BIT(11)
#define BIT_SHIFT_CTLX_I2S_SCK_INV 11
#define BIT_MASK_CTLX_I2S_SCK_INV 0x1
#define BIT_CTRL_CTLX_I2S_SCK_INV(x) (((x) & BIT_MASK_CTLX_I2S_SCK_INV) << BIT_SHIFT_CTLX_I2S_SCK_INV)
#define BIT_CTLX_I2S_ENDIAN_SWAP BIT(12)
#define BIT_SHIFT_CTLX_I2S_ENDIAN_SWAP 12
#define BIT_MASK_CTLX_I2S_ENDIAN_SWAP 0x1
#define BIT_CTRL_CTLX_I2S_ENDIAN_SWAP(x) (((x) & BIT_MASK_CTLX_I2S_ENDIAN_SWAP) << BIT_SHIFT_CTLX_I2S_ENDIAN_SWAP)
#define BIT_CTLX_I2S_SLAVE_MODE BIT(29)
#define BIT_SHIFT_CTLX_I2S_SLAVE_MODE 29
#define BIT_MASK_CTLX_I2S_SLAVE_MODE 0x1
#define BIT_CTRL_CTLX_I2S_SLAVE_MODE(x) (((x) & BIT_MASK_CTLX_I2S_SLAVE_MODE) << BIT_SHIFT_CTLX_I2S_SLAVE_MODE)
#define BIT_CTLX_I2S_CLK_SRC BIT(30)
#define BIT_SHIFT_CTLX_I2S_CLK_SRC 30
#define BIT_MASK_CTLX_I2S_CLK_SRC 0x1
#define BIT_CTRL_CTLX_I2S_CLK_SRC(x) (((x) & BIT_MASK_CTLX_I2S_CLK_SRC) << BIT_SHIFT_CTLX_I2S_CLK_SRC)
#define BIT_CTLX_I2S_SW_RSTN BIT(31)
#define BIT_SHIFT_CTLX_I2S_SW_RSTN 31
#define BIT_MASK_CTLX_I2S_SW_RSTN 0x1
#define BIT_CTRL_CTLX_I2S_SW_RSTN(x) (((x) & BIT_MASK_CTLX_I2S_SW_RSTN) << BIT_SHIFT_CTLX_I2S_SW_RSTN)
// REG_I2S_SETTING
#define BIT_SHIFT_SETTING_I2S_PAGE_SZ 0
#define BIT_MASK_SETTING_I2S_PAGE_SZ 0xFFF
#define BIT_CTRL_SETTING_I2S_PAGE_SZ(x) (((x) & BIT_MASK_SETTING_I2S_PAGE_SZ) << BIT_SHIFT_SETTING_I2S_PAGE_SZ)
#define BIT_GET_SETTING_I2S_PAGE_SZ(x) (((x) >> BIT_SHIFT_SETTING_I2S_PAGE_SZ) & BIT_MASK_SETTING_I2S_PAGE_SZ)
#define BIT_SHIFT_SETTING_I2S_PAGE_NUM 12
#define BIT_MASK_SETTING_I2S_PAGE_NUM 0x3
#define BIT_CTRL_SETTING_I2S_PAGE_NUM(x) (((x) & BIT_MASK_SETTING_I2S_PAGE_NUM) << BIT_SHIFT_SETTING_I2S_PAGE_NUM)
#define BIT_GET_SETTING_I2S_PAGE_NUM(x) (((x) >> BIT_SHIFT_SETTING_I2S_PAGE_NUM) & BIT_MASK_SETTING_I2S_PAGE_NUM)
#define BIT_SHIFT_SETTING_I2S_SAMPLE_RATE 14
#define BIT_MASK_SETTING_I2S_SAMPLE_RATE 0x7
#define BIT_CTRL_SETTING_I2S_SAMPLE_RATE(x) (((x) & BIT_MASK_SETTING_I2S_SAMPLE_RATE) << BIT_SHIFT_SETTING_I2S_SAMPLE_RATE)
#define BIT_GET_SETTING_I2S_SAMPLE_RATE(x) (((x) >> BIT_SHIFT_SETTING_I2S_SAMPLE_RATE) & BIT_MASK_SETTING_I2S_SAMPLE_RATE)
// i2s trx page own bit
#define BIT_PAGE_I2S_OWN_BIT BIT(31)
#define BIT_SHIFT_PAGE_I2S_OWN_BIT 31
#define BIT_MASK_PAGE_I2S_OWN_BIT 0x1
#define BIT_CTRL_PAGE_I2S_OWN_BIT(x) (((x) & BIT_MASK_PAGE_I2S_OWN_BIT) << BIT_SHIFT_PAGE_I2S_OWN_BIT)
//=============== Register Address Definition ====================
#define REG_I2S_PAGE_OWN_OFF 0x004
#define REG_I2S_CTL 0x000
#define REG_I2S_TX_PAGE_PTR 0x004
#define REG_I2S_RX_PAGE_PTR 0x008
#define REG_I2S_SETTING 0x00C
#define REG_I2S_TX_MASK_INT 0x010
#define REG_I2S_TX_STATUS_INT 0x014
#define REG_I2S_RX_MASK_INT 0x018
#define REG_I2S_RX_STATUS_INT 0x01c
#define REG_I2S_TX_PAGE0_OWN 0x020
#define REG_I2S_TX_PAGE1_OWN 0x024
#define REG_I2S_TX_PAGE2_OWN 0x028
#define REG_I2S_TX_PAGE3_OWN 0x02C
#define REG_I2S_RX_PAGE0_OWN 0x030
#define REG_I2S_RX_PAGE1_OWN 0x034
#define REG_I2S_RX_PAGE2_OWN 0x038
#define REG_I2S_RX_PAGE3_OWN 0x03C
/*I2S Essential Functions and Macros*/
VOID
HalI2SWrite32(
IN u8 I2SIdx,
IN u8 I2SReg,
IN u32 I2SVal
);
u32
HalI2SRead32(
IN u8 I2SIdx,
IN u8 I2SReg
);
/*
#define HAL_I2SX_READ32(I2sIndex, addr) \
HAL_READ32(I2S0_REG_BASE+ (I2sIndex*I2S1_REG_OFF), addr)
#define HAL_I2SX_WRITE32(I2sIndex, addr, value) \
HAL_WRITE32((I2S0_REG_BASE+ (I2sIndex*I2S1_REG_OFF)), addr, value)
*/
#define HAL_I2S_WRITE32(I2SIdx, addr, value) HalI2SWrite32(I2SIdx,addr,value)
#define HAL_I2S_READ32(I2SIdx, addr) HalI2SRead32(I2SIdx,addr)
/* I2S debug output*/
#define I2S_PREFIX "RTL8195A[i2s]: "
#define I2S_PREFIX_LVL " [i2s_DBG]: "
typedef enum _I2S_DBG_LVL_ {
HAL_I2S_LVL = 0x01,
SAL_I2S_LVL = 0x02,
VERI_I2S_LVL = 0x03,
}I2S_DBG_LVL,*PI2S_DBG_LVL;
#ifdef CONFIG_DEBUG_LOG
#ifdef CONFIG_DEBUG_LOG_I2S_HAL
#define DBG_8195A_I2S(...) do{ \
_DbgDump("\r"I2S_PREFIX __VA_ARGS__);\
}while(0)
#define I2SDBGLVL 0xFF
#define DBG_8195A_I2S_LVL(LVL,...) do{\
if (LVL&I2SDBGLVL){\
_DbgDump("\r"I2S_PREFIX_LVL __VA_ARGS__);\
}\
}while(0)
#else
#define DBG_I2S_LOG_PERD 100
#define DBG_8195A_I2S(...)
#define DBG_8195A_I2S_LVL(...)
#endif
#else
#define DBG_I2S_LOG_PERD 100
#define DBG_8195A_I2S(...)
#define DBG_8195A_I2S_LVL(...)
#endif
/*
#define REG_I2S_PAGE_OWN_OFF 0x004
#define REG_I2S_CTL 0x000
#define REG_I2S_TX_PAGE_PTR 0x004
#define REG_I2S_RX_PAGE_PTR 0x008
#define REG_I2S_SETTING 0x00C
#define REG_I2S_TX_MASK_INT 0x010
#define REG_I2S_TX_STATUS_INT 0x014
#define REG_I2S_RX_MASK_INT 0x018
#define REG_I2S_RX_STATUS_INT 0x01c
#define REG_I2S_TX_PAGE0_OWN 0x020
#define REG_I2S_TX_PAGE1_OWN 0x024
#define REG_I2S_TX_PAGE2_OWN 0x028
#define REG_I2S_TX_PAGE3_OWN 0x02C
#define REG_I2S_RX_PAGE0_OWN 0x030
#define REG_I2S_RX_PAGE1_OWN 0x034
#define REG_I2S_RX_PAGE2_OWN 0x038
#define REG_I2S_RX_PAGE3_OWN 0x03C
*/
/* template
#define BIT_SHIFT_CTLX_ 7
#define BIT_MASK_CTLX_ 0x1
#define BIT_CTLX_(x) (((x) & BIT_MASK_CTLX_) << BIT_SHIFT_CTLX_)
#define BIT_INV_CTLX_ (~(BIT_MASK_CTLX_ << BIT_SHIFT_CTLX_))
*//*
#define BIT_SHIFT_CTLX_IIS_EN 0
#define BIT_MASK_CTLX_IIS_EN 0x1
#define BIT_CTLX_IIS_EN(x) (((x) & BIT_MASK_CTLX_IIS_EN) << BIT_SHIFT_CTLX_IIS_EN)
#define BIT_INV_CTLX_IIS_EN (~(BIT_MASK_CTLX_IIS_EN << BIT_SHIFT_CTLX_IIS_EN))
#define BIT_SHIFT_CTLX_TRX 1
#define BIT_MASK_CTLX_TRX 0x3
#define BIT_CTLX_TRX(x) (((x) & BIT_MASK_CTLX_TRX) << BIT_SHIFT_CTLX_TRX)
#define BIT_INV_CTLX_TRX (~(BIT_MASK_CTLX_TRX << BIT_SHIFT_CTLX_TRX))
#define BIT_SHIFT_CTLX_CH_NUM 3
#define BIT_MASK_CTLX_CH_NUM 0x3
#define BIT_CTLX_CH_NUM(x) (((x) & BIT_MASK_CTLX_CH_NUM) << BIT_SHIFT_CTLX_CH_NUM)
#define BIT_INV_CTLX_CH_NUM (~(BIT_MASK_CTLX_CH_NUM << BIT_SHIFT_CTLX_CH_NUM))
#define BIT_SHIFT_CTLX_EDGE_SW 5
#define BIT_MASK_CTLX_EDGE_SW 0x1
#define BIT_CTLX_EDGE_SW(x) (((x) & BIT_MASK_CTLX_EDGE_SW) << BIT_SHIFT_CTLX_EDGE_SW)
#define BIT_INV_CTLX_EDGE_SW (~(BIT_MASK_CTLX_EDGE_SW << BIT_SHIFT_CTLX_EDGE_SW))
#define BIT_SHIFT_CTLX_WL 6
#define BIT_MASK_CTLX_WL 0x1
#define BIT_CTLX_WL(x) (((x) & BIT_MASK_CTLX_WL) << BIT_SHIFT_CTLX_WL)
#define BIT_INV_CTLX_WL (~(BIT_MASK_CTLX_WL << BIT_SHIFT_CTLX_WL))
#define BIT_SHIFT_CTLX_LOOP_BACK 7
#define BIT_MASK_CTLX_LOOP_BACK 0x1
#define BIT_CTLX_LOOP_BACK(x) (((x) & BIT_MASK_CTLX_LOOP_BACK) << BIT_SHIFT_CTLX_LOOP_BACK)
#define BIT_INV_CTLX_LOOP_BACK (~(BIT_MASK_CTLX_LOOP_BACK << BIT_SHIFT_CTLX_LOOP_BACK))
#define BIT_SHIFT_CTLX_FORMAT 8
#define BIT_MASK_CTLX_FORMAT 0x3
#define BIT_CTLX_FORMAT(x) (((x) & BIT_MASK_CTLX_FORMAT) << BIT_SHIFT_CTLX_FORMAT)
#define BIT_INV_CTLX_FORMAT (~(BIT_MASK_CTLX_FORMAT << BIT_SHIFT_CTLX_FORMAT))
#define BIT_SHIFT_CTLX_LRSWAP 10
#define BIT_MASK_CTLX_LRSWAP 0x1
#define BIT_CTLX_LRSWAP(x) (((x) & BIT_MASK_CTLX_LRSWAP) << BIT_SHIFT_CTLX_LRSWAP)
#define BIT_INV_CTLX_LRSWAP (~(BIT_MASK_CTLX_LRSWAP << BIT_SHIFT_CTLX_LRSWAP))
#define BIT_SHIFT_CTLX_SCK_INV 11
#define BIT_MASK_CTLX_SCK_INV 0x1
#define BIT_CTLX_SCK_INV(x) (((x) & BIT_MASK_CTLX_SCK_INV) << BIT_SHIFT_CTLX_SCK_INV)
#define BIT_INV_CTLX_SCK_INV (~(BIT_MASK_CTLX_SCK_INV << BIT_SHIFT_CTLX_SCK_INV))
#define BIT_SHIFT_CTLX_ENDIAN_SWAP 12
#define BIT_MASK_CTLX_ENDIAN_SWAP 0x1
#define BIT_CTLX_ENDIAN_SWAP(x) (((x) & BIT_MASK_CTLX_ENDIAN_SWAP) << BIT_SHIFT_CTLX_ENDIAN_SWAP)
#define BIT_INV_CTLX_ENDIAN_SWAP (~(BIT_MASK_CTLX_ENDIAN_SWAP << BIT_SHIFT_CTLX_ENDIAN_SWAP))
#define BIT_SHIFT_CTLX_DEBUG_SWITCH 15
#define BIT_MASK_CTLX_DEBUG_SWITCH 0x3
#define BIT_CTLX_DEBUG_SWITCH(x) (((x) & BIT_MASK_CTLX_DEBUG_SWITCH) << BIT_SHIFT_CTLX_DEBUG_SWITCH)
#define BIT_INV_CTLX_DEBUG_SWITCH (~(BIT_MASK_CTLX_DEBUG_SWITCH << BIT_SHIFT_CTLX_DEBUG_SWITCH))
#define BIT_SHIFT_CTLX_SLAVE_SEL 29
#define BIT_MASK_CTLX_SLAVE_SEL 0x1
#define BIT_CTLX_SLAVE_SEL(x) (((x) & BIT_MASK_CTLX_SLAVE_SEL) << BIT_SHIFT_CTLX_SLAVE_SEL)
#define BIT_INV_CTLX_SLAVE_SEL (~(BIT_MASK_CTLX_SLAVE_SEL << BIT_SHIFT_CTLX_SLAVE_SEL))
#define BIT_SHIFT_CTLX_CLK_SRC 30
#define BIT_MASK_CTLX_CLK_SRC 0x1
#define BIT_CTLX_CLK_SRC(x) (((x) & BIT_MASK_CTLX_CLK_SRC) << BIT_SHIFT_CTLX_CLK_SRC)
#define BIT_INV_CTLX_CLK_SRC (~(BIT_MASK_CTLX_CLK_SRC << BIT_SHIFT_CTLX_CLK_SRC))
#define BIT_SHIFT_CTLX_SW_RSTN 31
#define BIT_MASK_CTLX_SW_RSTN 0x1
#define BIT_CTLX_SW_RSTN(x) (((x) & BIT_MASK_CTLX_SW_RSTN) << BIT_SHIFT_CTLX_SW_RSTN)
#define BIT_INV_CTLX_SW_RSTN (~(BIT_MASK_CTLX_SW_RSTN << BIT_SHIFT_CTLX_SW_RSTN))
#define BIT_SHIFT_SETTING_PAGE_SZ 0
#define BIT_MASK_SETTING_PAGE_SZ 0xFFF
#define BIT_SETTING_PAGE_SZ(x) (((x) & BIT_MASK_SETTING_PAGE_SZ) << BIT_SHIFT_SETTING_PAGE_SZ)
#define BIT_INV_SETTING_PAGE_SZ (~(BIT_MASK_SETTING_PAGE_SZ << BIT_SHIFT_SETTING_PAGE_SZ))
#define BIT_SHIFT_SETTING_PAGE_NUM 12
#define BIT_MASK_SETTING_PAGE_NUM 0x3
#define BIT_SETTING_PAGE_NUM(x) (((x) & BIT_MASK_SETTING_PAGE_NUM) << BIT_SHIFT_SETTING_PAGE_NUM)
#define BIT_INV_SETTING_PAGE_NUM (~(BIT_MASK_SETTING_PAGE_NUM << BIT_SHIFT_SETTING_PAGE_NUM))
#define BIT_SHIFT_SETTING_SAMPLE_RATE 14
#define BIT_MASK_SETTING_SAMPLE_RATE 0x7
#define BIT_SETTING_SAMPLE_RATE(x) (((x) & BIT_MASK_SETTING_SAMPLE_RATE) << BIT_SHIFT_SETTING_SAMPLE_RATE)
#define BIT_INV_SETTING_SAMPLE_RATE (~(BIT_MASK_SETTING_SAMPLE_RATE << BIT_SHIFT_SETTING_SAMPLE_RATE))
*/
typedef enum _I2S_CTL_FORMAT {
FormatI2s = 0x00,
FormatLeftJustified = 0x01,
FormatRightJustified = 0x02
}I2S_CTL_FORMAT, *PI2S_CTL_FORMAT;
typedef enum _I2S_CTL_CHNUM {
ChannelStereo = 0x00,
Channel5p1 = 0x01,
ChannelMono = 0x02
}I2S_CTL_CHNUM, *PI2S_CTL_CHNUM;
typedef enum _I2S_CTL_TRX_ACT {
RxOnly = 0x00,
TxOnly = 0x01,
TXRX = 0x02
}I2S_CTL_TRX_ACT, *PI2S_CTL_TRX_ACT;
/*
typedef struct _I2S_CTL_REG_ {
I2S_CTL_FORMAT Format;
I2S_CTL_CHNUM ChNum;
I2S_CTL_TRX_ACT TrxAct;
u32 I2s_En :1; // Bit 0
u32 Rsvd1to4 :4; // Bit 1-4 is TrxAct, ChNum
u32 EdgeSw :1; // Bit 5 Edge switch
u32 WordLength :1; // Bit 6
u32 LoopBack :1; // Bit 7
u32 Rsvd8to9 :2; // Bit 8-9 is Format
u32 DacLrSwap :1; // Bit 10
u32 SckInv :1; // Bit 11
u32 EndianSwap :1; // Bit 12
u32 Rsvd13to14 :2; // Bit 11-14
u32 DebugSwitch :2; // Bit 15-16
u32 Rsvd17to28 :12; // Bit 17-28
u32 SlaveMode :1; // Bit 29
u32 SR44p1KHz :1; // Bit 30
u32 SwRstn :1; // Bit 31
} I2S_CTL_REG, *PI2S_CTL_REG;
*/
typedef enum _I2S_SETTING_PAGE_NUM {
I2s1Page = 0x00,
I2s2Page = 0x01,
I2s3Page = 0x02,
I2s4Page = 0x03
}I2S_SETTING_PAGE_NUM, *PI2S_SETTING_PAGE_NUM;
//sampling rate
typedef enum _I2S_SETTING_SR {
I2sSR8K = 0x00,
I2sSR16K = 0x01,
I2sSR24K = 0x02,
I2sSR32K = 0x03,
I2sSR48K = 0x05,
I2sSR44p1K = 0x15,
I2sSR96K = 0x06,
I2sSR88p2K = 0x16
}I2S_SETTING_SR, *PI2S_SETTING_SR;
/*
typedef struct _I2S_SETTING_REG_ {
I2S_SETTING_PAGE_NUM PageNum;
I2S_SETTING_SR SampleRate;
u32 PageSize:12; // Bit 0-11
}I2S_SETTING_REG, *PI2S_SETTING_REG;
typedef enum _I2S_TX_ISR {
I2sTxP0OK = 0x01,
I2sTxP1OK = 0x02,
I2sTxP2OK = 0x04,
I2sTxP3OK = 0x08,
I2sTxPageUn = 0x10,
I2sTxFifoEmpty = 0x20
}I2S_TX_ISR, *PI2S_TX_ISR;
typedef enum _I2S_RX_ISR {
I2sRxP0OK = 0x01,
I2sRxP1OK = 0x02,
I2sRxP2OK = 0x04,
I2sRxP3OK = 0x08,
I2sRxPageUn = 0x10,
I2sRxFifoFull = 0x20
}I2S_RX_ISR, *PI2S_RX_ISR;
*/
/* Hal I2S function prototype*/
RTK_STATUS
HalI2SInitRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SInitRtl8195a_Patch(
IN VOID *Data
);
RTK_STATUS
HalI2SDeInitRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2STxRtl8195a(
IN VOID *Data,
IN u8 *pBuff
);
RTK_STATUS
HalI2SRxRtl8195a(
IN VOID *Data,
OUT u8 *pBuff
);
RTK_STATUS
HalI2SEnableRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SIntrCtrlRtl8195a(
IN VOID *Data
);
u32
HalI2SReadRegRtl8195a(
IN VOID *Data,
IN u8 I2SReg
);
RTK_STATUS
HalI2SSetRateRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SSetWordLenRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SSetChNumRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SSetPageNumRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SSetPageSizeRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SSetDirectionRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SSetDMABufRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SClrIntrRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SClrAllIntrRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SDMACtrlRtl8195a(
IN VOID *Data
);
u8
HalI2SGetTxPageRtl8195a(
IN VOID *Data
);
u8
HalI2SGetRxPageRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SPageSendRtl8195a(
IN VOID *Data,
IN u8 PageIdx
);
RTK_STATUS
HalI2SPageRecvRtl8195a(
IN VOID *Data
);
RTK_STATUS
HalI2SClearAllOwnBitRtl8195a(
IN VOID *Data
);
#ifdef CONFIG_CHIP_E_CUT
_LONG_CALL_ RTK_STATUS
HalI2SInitRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ RTK_STATUS
HalI2SSetRateRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ RTK_STATUS
HalI2SSetWordLenRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ RTK_STATUS
HalI2SSetChNumRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ RTK_STATUS
HalI2SSetPageNumRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ RTK_STATUS
HalI2SSetPageSizeRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ RTK_STATUS
HalI2SSetDirectionRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ RTK_STATUS
HalI2SSetDMABufRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ u8
HalI2SGetTxPageRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ u8
HalI2SGetRxPageRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ RTK_STATUS
HalI2SPageSendRtl8195a_V04(
IN VOID *Data,
IN u8 PageIdx
);
_LONG_CALL_ RTK_STATUS
HalI2SPageRecvRtl8195a_V04(
IN VOID *Data
);
_LONG_CALL_ RTK_STATUS
HalI2SClearAllOwnBitRtl8195a_V04(
IN VOID *Data
);
#endif // #ifdef CONFIG_CHIP_E_CUT
// HAL functions Wrapper
static __inline VOID
HalI2SSetRate(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
HalI2SSetRateRtl8195a(Data);
#else
HalI2SSetRateRtl8195a_V04(Data);
#endif
}
static __inline VOID
HalI2SSetWordLen(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
HalI2SSetWordLenRtl8195a(Data);
#else
HalI2SSetWordLenRtl8195a_V04(Data);
#endif
}
static __inline VOID
HalI2SSetChNum(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
HalI2SSetChNumRtl8195a(Data);
#else
HalI2SSetChNumRtl8195a_V04(Data);
#endif
}
static __inline VOID
HalI2SSetPageNum(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
HalI2SSetPageNumRtl8195a(Data);
#else
HalI2SSetPageNumRtl8195a_V04(Data);
#endif
}
static __inline VOID
HalI2SSetPageSize(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
HalI2SSetPageSizeRtl8195a(Data);
#else
HalI2SSetPageSizeRtl8195a_V04(Data);
#endif
}
static __inline VOID
HalI2SSetDirection(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
HalI2SSetDirectionRtl8195a(Data);
#else
HalI2SSetDirectionRtl8195a_V04(Data);
#endif
}
static __inline VOID
HalI2SSetDMABuf(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
HalI2SSetDMABufRtl8195a(Data);
#else
HalI2SSetDMABufRtl8195a_V04(Data);
#endif
}
static __inline u8
HalI2SGetTxPage(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
return HalI2SGetTxPageRtl8195a(Data);
#else
return HalI2SGetTxPageRtl8195a_V04(Data);
#endif
}
static __inline u8
HalI2SGetRxPage(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
return HalI2SGetRxPageRtl8195a(Data);
#else
return HalI2SGetRxPageRtl8195a_V04(Data);
#endif
}
static __inline VOID
HalI2SPageSend(
IN VOID *Data,
IN u8 PageIdx
)
{
#ifndef CONFIG_CHIP_E_CUT
HalI2SPageSendRtl8195a(Data, PageIdx);
#else
HalI2SPageSendRtl8195a_V04(Data, PageIdx);
#endif
}
static __inline VOID
HalI2SPageRecv(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
HalI2SPageRecvRtl8195a(Data);
#else
HalI2SPageRecvRtl8195a_V04(Data);
#endif
}
static __inline VOID
HalI2SClearAllOwnBit(
IN VOID *Data
)
{
#ifndef CONFIG_CHIP_E_CUT
HalI2SClearAllOwnBitRtl8195a(Data);
#else
HalI2SClearAllOwnBitRtl8195a_V04(Data);
#endif
}
#endif /* _RTL8195A_I2S_H_ */

4
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_pwm.h
View File

@ -37,6 +37,10 @@ HAL_Pwm_Disable_8195a(
HAL_PWM_ADAPTER *pPwmAdapt
);
extern void
HAL_Pwm_Dinit_8195a(
HAL_PWM_ADAPTER *pPwmAdapt
);
#ifdef CONFIG_CHIP_E_CUT
extern _LONG_CALL_ void

1060
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_sdio.h
View File

File diff suppressed because it is too large Load Diff

5
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_timer.h
View File

@ -94,11 +94,6 @@ HalTimerReadCountRtl8195a_Patch(
IN u32 TimerId
);
VOID
HalTimerSync(
IN u32 TimerId
);
VOID
HalTimerIrqEnRtl8195a(
IN u32 TimerId

49
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_uart.h
View File

@ -74,8 +74,10 @@
#define RUART_TRAN_HOLD_REG_OFF 0x24 //Transmitter Holding Register
#define RUART_MISC_CTL_REG_OFF 0x28
#define RUART_TXDMA_BURSTSIZE_MASK 0xF8 //7:3
#define RUART_RXDMA_BURSTSIZE_MASK 0x1F00 //12:8
#define RUART_TXDMA_EN_MASK 0x02 // [1]
#define RUART_RXDMA_EN_MASK 0x04 // [2]
#define RUART_TXDMA_BURSTSIZE_MASK 0xF8 // [7:3]
#define RUART_RXDMA_BURSTSIZE_MASK 0x1F00 // [12:8]
#define RUART_DEBUG_REG_OFF 0x3C
@ -551,6 +553,26 @@ HalRuartExitCriticalRtl8195a(
IN VOID *Data
);
VOID
HalRuartTxGdmaEnable8195a(
IN VOID *pHalRuartAdapter
);
VOID
HalRuartTxGdmaDisable8195a(
IN VOID *pHalRuartAdapter
);
VOID
HalRuartRxGdmaEnable8195a(
IN VOID *pHalRuartAdapter
);
VOID
HalRuartRxGdmaDisable8195a(
IN VOID *pHalRuartAdapter
);
#if CONFIG_CHIP_E_CUT
_LONG_CALL_ HAL_Status
HalRuartResetTxFifoRtl8195a_V04(
@ -649,33 +671,10 @@ _LONG_CALL_ VOID
HalRuartExitCriticalRtl8195a_V04(
IN VOID *Data
);
#endif // #if CONFIG_CHIP_E_CUT
#ifdef CONFIG_MBED_ENABLED
// Interface to ROM functions
//extern __longcall void HalRuartAdapterLoadDefRtl8195a(UART_Handle *uart, uint8_t idx);
//extern __longcall void HalRuartDeInitRtl8195a(UART_Handle *uart);
//extern __longcall HAL_Status HalRuartDisableRtl8195a(UART_Handle *data);
//extern __longcall HAL_Status HalRuartEnableRtl8195a(UART_Handle *data);
//extern __longcall void HalRuartDmaInitRtl8195a(UART_Handle *data);
//extern __longcall void HalRuartTxGdmaLoadDefRtl8195a(UART_Handle *uart, RUART_DMA_Config *cfg);
//extern __longcall void HalRuartRxGdmaLoadDefRtl8195a(UART_Handle *uart, RUART_DMA_Config *cfg);
//extern __longcall HAL_Status HalRuartGetCRtl8195a(UART_Handle *uart, uint8_t *byte);
//extern __longcall HAL_Status HalRuartPutCRtl8195a(UART_Handle *uart, uint8_t byte);
//extern __longcall HAL_Status RuartLock(UART_Handle * uart);
//extern __longcall void RuartUnlock(UART_Handle * uart);
//extern __longcall void HalRuartSetIMRRtl8195a(UART_Handle *uart);
//extern __longcall uint8_t HalRuartGetIMRRtl8195a(UART_Handle *uart);
//extern __longcall uint32_t HalRuartSendRtl8195a(UART_Handle *, uint8_t *, uint32_t, uint32_t);
//extern __longcall HAL_Status HalRuartIntSendRtl8195a(UART_Handle *, uint8_t *, uint32_t);
//extern __longcall HAL_Status HalRuartIntRecvRtl8195a(UART_Handle *, uint8_t *, uint32_t);
//extern __longcall uint32_t HalRuartRecvRtl8195a(UART_Handle *, uint8_t *, uint32_t, uint32_t);
//extern __longcall void HalRuartRegIrqRtl8195a(UART_Handle *Data);
//extern __longcall void HalRuartIntEnableRtl8195a(UART_Handle *Data);
//extern __longcall void HalRuartIntDisableRtl8195a(UART_Handle *Data);
//extern __longcall uint32_t HalRuartGetDebugValueRtl8195a(HAL_RUART_ADAPTER *Data, uint32_t sel);
//extern __longcall void HalRuartRTSCtrlRtl8195a(UART_Handle *Data, bool val);
extern __longcall HAL_Status RuartIsTimeout(uint32_t StartCount, uint32_t TimeoutCnt);
#endif

384
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/misc/driver/rtl_consol.c
View File

@ -1,384 +0,0 @@
/*******************************************************************************
*Copyright (c) 2013-2016 Realtek Semiconductor Corp, All Rights Reserved
* SPDX-License-Identifier: LicenseRef-PBL
*
* Licensed under the Permissive Binary License, Version 1.0 (the "License");
* you may not use this file except in compliance with the License.
*
* You may obtain a copy of the License at https://www.mbed.com/licenses/PBL-1.0
*
* See the License for the specific language governing permissions and limitations under the License.
*******************************************************************************
*/
#include "rtl8195a.h"
//#include <stdarg.h>
#include "rtl_consol.h"//#include "osdep_service.h"
////#include "FreeRTOS.h"
////#include "task.h"
////#include "semphr.h"
#include "tcm_heap.h"
struct task_struct RtlConsolTaskRam_task;
MON_RAM_BSS_SECTION
volatile UART_LOG_CTL UartLogCtl;
MON_RAM_BSS_SECTION
volatile UART_LOG_CTL *pUartLogCtl;
MON_RAM_BSS_SECTION
u8 *ArgvArray[MAX_ARGV];
MON_RAM_BSS_SECTION
UART_LOG_BUF UartLogBuf;
#ifdef CONFIG_UART_LOG_HISTORY
MON_RAM_BSS_SECTION
u8 UartLogHistoryBuf[UART_LOG_HISTORY_LEN][UART_LOG_CMD_BUFLEN];
#endif
_LONG_CALL_
extern u8
UartLogCmdChk(
IN u8 RevData,
IN UART_LOG_CTL *prvUartLogCtl,
IN u8 EchoFlag
);
_LONG_CALL_
extern VOID
ArrayInitialize(
IN u8 *pArrayToInit,
IN u8 ArrayLen,
IN u8 InitValue
);
_LONG_CALL_
extern VOID
UartLogHistoryCmd(
IN u8 RevData,
IN UART_LOG_CTL *prvUartLogCtl,
IN u8 EchoFlag
);
_LONG_CALL_
extern VOID
UartLogCmdExecute(
IN PUART_LOG_CTL pUartLogCtlExe
);
//=================================================
/* Minimum and maximum values a `signed long int' can hold.
(Same as `int'). */
#ifndef __LONG_MAX__
#if defined (__alpha__) || (defined (__sparc__) && defined(__arch64__)) || defined (__sparcv9) || defined (__s390x__)
#define __LONG_MAX__ 9223372036854775807L
#else
#define __LONG_MAX__ 2147483647L
#endif /* __alpha__ || sparc64 */
#endif
#undef LONG_MIN
#define LONG_MIN (-LONG_MAX-1)
#undef LONG_MAX
#define LONG_MAX __LONG_MAX__
/* Maximum value an `unsigned long int' can hold. (Minimum is 0). */
#undef ULONG_MAX
#define ULONG_MAX (LONG_MAX * 2UL + 1)
#ifndef __LONG_LONG_MAX__
#define __LONG_LONG_MAX__ 9223372036854775807LL
#endif
#if 0
//======================================================
//<Function>: UartLogIrqHandleRam
//<Usage >: To deal with Uart-Log RX IRQ
//<Argus >: VOID
//<Return >: VOID
//<Notes >: NA
//======================================================
//MON_RAM_TEXT_SECTION
VOID
UartLogIrqHandleRam
(
VOID * Data
)
{
u8 UartReceiveData = 0;
//For Test
BOOL PullMode = _FALSE;
u32 IrqEn = DiagGetIsrEnReg();
DiagSetIsrEnReg(0);
UartReceiveData = DiagGetChar(PullMode);
if (UartReceiveData == 0) {
goto exit;
}
//KB_ESC chk is for cmd history, it's a special case here.
if (UartReceiveData == KB_ASCII_ESC) {
//4 Esc detection is only valid in the first stage of boot sequence (few seconds)
if (pUartLogCtl->ExecuteEsc != _TRUE)
{
pUartLogCtl->ExecuteEsc = _TRUE;
(*pUartLogCtl).EscSTS = 0;
}
else
{
//4 the input commands are valid only when the task is ready to execute commands
if ((pUartLogCtl->BootRdy == 1)
#ifdef CONFIG_KERNEL
||(pUartLogCtl->TaskRdy == 1)
#endif
)
{
if ((*pUartLogCtl).EscSTS==0)
{
(*pUartLogCtl).EscSTS = 1;
}
}
else
{
(*pUartLogCtl).EscSTS = 0;
}
}
}
else if ((*pUartLogCtl).EscSTS==1){
if (UartReceiveData != KB_ASCII_LBRKT){
(*pUartLogCtl).EscSTS = 0;
}
else{
(*pUartLogCtl).EscSTS = 2;
}
}
else{
if ((*pUartLogCtl).EscSTS==2){
(*pUartLogCtl).EscSTS = 0;
#ifdef CONFIG_UART_LOG_HISTORY
if ((UartReceiveData=='A')|| UartReceiveData=='B'){
UartLogHistoryCmd(UartReceiveData,(UART_LOG_CTL *)pUartLogCtl,1);
}
#endif
}
else{
if (UartLogCmdChk(UartReceiveData,(UART_LOG_CTL *)pUartLogCtl,1)==2)
{
//4 check UartLog buffer to prevent from incorrect access
if (pUartLogCtl->pTmpLogBuf != NULL)
{
pUartLogCtl->ExecuteCmd = _TRUE;
#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
if (pUartLogCtl->TaskRdy)
//RtlUpSemaFromISR((_Sema *)&pUartLogCtl->Sema);
rtw_up_sema_from_isr((_sema *)&pUartLogCtl->Sema);
#endif
}
else
{
ArrayInitialize((u8 *)pUartLogCtl->pTmpLogBuf->UARTLogBuf, UART_LOG_CMD_BUFLEN, '\0');
}
}
}
}
exit:
DiagSetIsrEnReg(IrqEn);
}
//MON_RAM_TEXT_SECTION
VOID
RtlConsolInitRam(
IN u32 Boot,
IN u32 TBLSz,
IN VOID *pTBL
)
{
UartLogBuf.BufCount = 0;
ArrayInitialize(&UartLogBuf.UARTLogBuf[0],UART_LOG_CMD_BUFLEN,'\0');
pUartLogCtl = &UartLogCtl;
pUartLogCtl->NewIdx = 0;
pUartLogCtl->SeeIdx = 0;
pUartLogCtl->RevdNo = 0;
pUartLogCtl->EscSTS = 0;
pUartLogCtl->BootRdy = 0;
pUartLogCtl->pTmpLogBuf = &UartLogBuf;
#ifdef CONFIG_UART_LOG_HISTORY
pUartLogCtl->CRSTS = 0;
pUartLogCtl->pHistoryBuf = &UartLogHistoryBuf[0];
#endif
pUartLogCtl->pfINPUT = (VOID*)&DiagPrintf;
pUartLogCtl->pCmdTbl = (PCOMMAND_TABLE) pTBL;
pUartLogCtl->CmdTblSz = TBLSz;
#ifdef CONFIG_KERNEL
pUartLogCtl->TaskRdy = 0;
#endif
//executing boot sequence
if (Boot == ROM_STAGE)
{
pUartLogCtl->ExecuteCmd = _FALSE;
pUartLogCtl->ExecuteEsc = _FALSE;
}
else
{
pUartLogCtl->ExecuteCmd = _FALSE;
pUartLogCtl->ExecuteEsc= _TRUE;//don't check Esc anymore
#if defined(CONFIG_KERNEL)
/* Create a Semaphone */
//RtlInitSema((_Sema*)&(pUartLogCtl->Sema), 0);
rtw_init_sema((_sema*)&(pUartLogCtl->Sema), 0);
pUartLogCtl->TaskRdy = 0;
#ifdef PLATFORM_FREERTOS
#define LOGUART_STACK_SIZE 128 //USE_MIN_STACK_SIZE modify from 512 to 128
//if(rtw_create_task(&g_tcp_client_task, "tcp_client_handler", LOGUART_STACK_SIZE, TASK_PRORITY_MIDDLE, tcp_client_handler, 0) != _SUCCESS)
#if CONFIG_USE_TCM_HEAP
{
int ret = 0;
void *stack_addr = tcm_heap_malloc(LOGUART_STACK_SIZE*sizeof(int));
//void *stack_addr = rtw_malloc(stack_size*sizeof(int));
if(stack_addr == NULL){
DiagPrintf("Out of TCM heap in \"LOGUART_TASK\" ");
}
ret = xTaskGenericCreate(
RtlConsolTaskRam,
(const char *)"LOGUART_TASK",
LOGUART_STACK_SIZE,
NULL,
tskIDLE_PRIORITY + 5 + PRIORITIE_OFFSET,
NULL,
stack_addr,
NULL);
if (pdTRUE != ret)
{
DiagPrintf("Create Log UART Task Err!!\n");
}
}
#else
if (pdTRUE != xTaskCreate( RtlConsolTaskRam, (const signed char * const)"LOGUART_TASK", LOGUART_STACK_SIZE, NULL, tskIDLE_PRIORITY + 5 + PRIORITIE_OFFSET, NULL))
{
DiagPrintf("Create Log UART Task Err!!\n");
}
#endif
#endif
#endif
}
CONSOLE_8195A();
}
extern u8** GetArgv(const u8 *string);
#if SUPPORT_LOG_SERVICE
extern char log_buf[LOG_SERVICE_BUFLEN];
//extern osSemaphore(log_rx_interrupt_sema);
_sema log_rx_interrupt_sema;
#endif
//======================================================
void console_cmd_exec(PUART_LOG_CTL pUartLogCtlExe)
{
u8 CmdCnt = 0;
u8 argc = 0;
u8 **argv;
//u32 CmdNum;
PUART_LOG_BUF pUartLogBuf = pUartLogCtlExe->pTmpLogBuf;
#if SUPPORT_LOG_SERVICE
strncpy(log_buf, (const u8*)&(*pUartLogBuf).UARTLogBuf[0], LOG_SERVICE_BUFLEN-1);
#endif
argc = GetArgc((const u8*)&((*pUartLogBuf).UARTLogBuf[0]));
argv = GetArgv((const u8*)&((*pUartLogBuf).UARTLogBuf[0]));
if(argc > 0){
#if SUPPORT_LOG_SERVICE
// if(log_handler(argv[0]) == NULL)
// legency_interactive_handler(argc, argv);
//RtlUpSema((_Sema *)&log_rx_interrupt_sema);
rtw_up_sema((_sema *)&log_rx_interrupt_sema);
#endif
ArrayInitialize(argv[0], sizeof(argv[0]) ,0);
}else{
#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
pmu_acquire_wakelock(BIT(PMU_LOGUART_DEVICE));
#endif
CONSOLE_8195A(); // for null command
}
(*pUartLogBuf).BufCount = 0;
ArrayInitialize(&(*pUartLogBuf).UARTLogBuf[0], UART_LOG_CMD_BUFLEN, '\0');
}
//======================================================
// overload original RtlConsolTaskRam
//MON_RAM_TEXT_SECTION
VOID
RtlConsolTaskRam(
VOID *Data
)
{
#if SUPPORT_LOG_SERVICE
log_service_init();
#endif
//4 Set this for UartLog check cmd history
#ifdef CONFIG_KERNEL
pUartLogCtl->TaskRdy = 1;
#endif
#ifndef CONFIG_KERNEL
pUartLogCtl->BootRdy = 1;
#endif
do{
#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
//RtlDownSema((_Sema *)&pUartLogCtl->Sema);
rtw_down_sema((_sema *)&pUartLogCtl->Sema);
#endif
if (pUartLogCtl->ExecuteCmd) {
// Add command handler here
console_cmd_exec((PUART_LOG_CTL)pUartLogCtl);
//UartLogCmdExecute((PUART_LOG_CTL)pUartLogCtl);
pUartLogCtl->ExecuteCmd = _FALSE;
}
}while(1);
}
//======================================================
extern void console_init_hs_uart(void);
void console_init(void)
{
#if CONFIG_LOG_USE_HS_UART
sys_log_uart_off();
console_init_hs_uart();
#elif(CONFIG_LOG_USE_I2C)
sys_log_uart_off();
// TODO:
#else
IRQ_HANDLE UartIrqHandle;
//4 Register Log Uart Callback function
UartIrqHandle.Data = NULL;//(u32)&UartAdapter;
UartIrqHandle.IrqNum = UART_LOG_IRQ;
UartIrqHandle.IrqFun = (IRQ_FUN) UartLogIrqHandleRam;
UartIrqHandle.Priority = 6;
//4 Register Isr handle
InterruptUnRegister(&UartIrqHandle);
InterruptRegister(&UartIrqHandle);
#endif
#if !TASK_SCHEDULER_DISABLED
RtlConsolInitRam((u32)RAM_STAGE,(u32)0,(VOID*)NULL);
#else
RtlConsolInitRam((u32)ROM_STAGE,(u32)0,(VOID*)NULL);
#endif
}
#endif

139
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/misc/driver/rtl_consol.h
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@ -1,139 +0,0 @@
/*******************************************************************************
*Copyright (c) 2013-2016 Realtek Semiconductor Corp, All Rights Reserved
* SPDX-License-Identifier: LicenseRef-PBL
*
* Licensed under the Permissive Binary License, Version 1.0 (the "License");
* you may not use this file except in compliance with the License.
*
* You may obtain a copy of the License at https://www.mbed.com/licenses/PBL-1.0
*
* See the License for the specific language governing permissions and limitations under the License.
*******************************************************************************
*/
#ifndef _RTK_CONSOL_H_
#define _RTK_CONSOL_H_
/*
* Include user defined options first. Anything not defined in these files
* will be set to standard values. Override anything you dont like!
*/
#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B)
#include "platform_opts.h"
#endif
//#include "osdep_api.h"
#include "osdep_service.h"
#include "hal_diag.h"
#define CONSOLE_PREFIX "#"
//Log UART
//UART_LOG_CMD_BUFLEN: only 126 bytes could be used for keeping input
// cmd, the last byte is for string end ('\0').
#define UART_LOG_CMD_BUFLEN 127
#define MAX_ARGV 10
typedef u32 (*ECHOFUNC)(IN u8*,...); //UART LOG echo-function type.
typedef struct _UART_LOG_BUF_ {
u8 BufCount; //record the input cmd char number.
u8 UARTLogBuf[UART_LOG_CMD_BUFLEN]; //record the input command.
} UART_LOG_BUF, *PUART_LOG_BUF;
typedef struct _UART_LOG_CTL_ {
u8 NewIdx;
u8 SeeIdx;
u8 RevdNo;
u8 EscSTS;
u8 ExecuteCmd;
u8 ExecuteEsc;
u8 BootRdy;
u8 Resvd;
PUART_LOG_BUF pTmpLogBuf;
VOID *pfINPUT;
PCOMMAND_TABLE pCmdTbl;
u32 CmdTblSz;
#ifdef CONFIG_UART_LOG_HISTORY
u32 CRSTS;
#endif
#ifdef CONFIG_UART_LOG_HISTORY
u8 (*pHistoryBuf)[UART_LOG_CMD_BUFLEN];
#endif
#ifdef CONFIG_KERNEL
u32 TaskRdy;
//_Sema Sema;
_sema Sema;
#else
// Since ROM code will reference this typedef, so keep the typedef same size
u32 TaskRdy;
void *Sema;
#endif
} UART_LOG_CTL, *PUART_LOG_CTL;
#define KB_ASCII_NUL 0x00
#define KB_ASCII_BS 0x08
#define KB_ASCII_TAB 0x09
#define KB_ASCII_LF 0x0A
#define KB_ASCII_CR 0x0D
#define KB_ASCII_ESC 0x1B
#define KB_ASCII_SP 0x20
#define KB_ASCII_BS_7F 0x7F
#define KB_ASCII_LBRKT 0x5B //[
#define KB_SPACENO_TAB 1
#ifdef CONFIG_UART_LOG_HISTORY
#define UART_LOG_HISTORY_LEN 5
#endif
#ifdef CONFIG_DEBUG_LOG
#define _ConsolePrint DiagPrintf
#else
#define _ConsolePrint
#endif
#ifndef CONSOLE_PREFIX
#define CONSOLE_PREFIX "<RTL8195A>"
#endif
#define CONSOLE_8195A(...) do {\
_ConsolePrint("\r"CONSOLE_PREFIX __VA_ARGS__);\
}while(0)
_LONG_CALL_ VOID
RtlConsolInit(
IN u32 Boot,
IN u32 TBLSz,
IN VOID *pTBL
);
#if defined(CONFIG_KERNEL)
_LONG_CALL_ VOID
RtlConsolTaskRam(
VOID *Data
);
#endif
_LONG_CALL_ VOID
RtlConsolTaskRom(
VOID *Data
);
_LONG_CALL_ u32
Strtoul(
IN const u8 *nptr,
IN u8 **endptr,
IN u32 base
);
void console_init(void);
#endif //_RTK_CONSOL_H_

213
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/misc/os/cmsis_pmu_8195a.c Normal file
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#if DEVICE_SLEEP
//#include "FreeRTOS.h"
#include "cmsis_pmu_8195a.h"
#include <platform_opts.h>
#include "platform_autoconf.h"
#include "platform_stdlib.h"
//#include "sys_api.h"
#include "sleep_ex_api.h"
#ifndef portNVIC_SYSTICK_CURRENT_VALUE_REG
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
#endif
uint32_t missing_tick = 0;
static uint32_t wakelock = 0;
//static uint32_t wakelock = DEFAULT_WAKELOCK;
static uint32_t wakeup_event = DEFAULT_WAKEUP_EVENT;
typedef struct {
uint32_t nDeviceId;
PSM_HOOK_FUN sleep_hook_fun;
void* sleep_param_ptr;
PSM_HOOK_FUN wakeup_hook_fun;
void* wakeup_param_ptr;
} PSM_DD_HOOK_INFO;
#define MAX_PSM_DD_HOOK_INFO_SIZE 8
uint32_t psm_dd_hook_info_size = 0;
PSM_DD_HOOK_INFO psm_dd_hook_infos[MAX_PSM_DD_HOOK_INFO_SIZE];
static uint8_t last_wakelock_state[32] = {
DEFAULT_WAKELOCK & 0x01, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0
};
static uint32_t last_acquire_wakelock_time[32] = {0};
static uint32_t hold_wakelock_time[32] = {0};
static uint32_t base_sys_time = 0;
static uint32_t sys_sleep_time = 0;
unsigned char reserve_pll = 0;
unsigned char generate_wakelock_stats = 0;
/* -------- FreeRTOS macro implementation -------- */
int cmsis_ready_to_sleep() {
return wakelock == 0;
}
void pmu_acquire_wakelock(uint32_t lock_id) {
wakelock |= BIT(lock_id);
if (generate_wakelock_stats) {
uint32_t i;
//uint32_t current_timestamp = osKernelSysTick();
uint32_t current_timestamp = osKernelGetSysTimerCount();
for (i=0; i<32; i++) {
if ( (1<<i & BIT(lock_id)) && (last_wakelock_state[i] == 0) ) {
last_acquire_wakelock_time[i] = current_timestamp;
last_wakelock_state[i] = 1;
}
}
}
}
void pmu_release_wakelock(uint32_t lock_id) {
wakelock &= ~BIT(lock_id);
if (generate_wakelock_stats) {
uint32_t i;
//uint32_t current_timestamp = osKernelSysTick();
uint32_t current_timestamp = osKernelGetSysTimerCount();
for (i=0; i<32; i++) {
if ( (1<<i & BIT(lock_id)) && (last_wakelock_state[i] == 1) ) {
hold_wakelock_time[i] += current_timestamp - last_acquire_wakelock_time[i];
last_wakelock_state[i] = 0;
}
}
}
}
uint32_t pmu_get_wakelock_status() {
return wakelock;
}
void pmu_enable_wakelock_stats(unsigned char enable) {
generate_wakelock_stats = enable;
}
void pmu_get_wakelock_hold_stats( char *pcWriteBuffer ) {
uint32_t i;
//uint32_t current_timestamp = osKernelSysTick();
uint32_t current_timestamp = osKernelGetSysTimerCount();
*pcWriteBuffer = 0x00;
if (generate_wakelock_stats) {
// print header
sprintf(pcWriteBuffer, "wakelock_id\tholdtime\r\n");
pcWriteBuffer += strlen( pcWriteBuffer );
for (i=0; i<32; i++) {
if (last_wakelock_state[i] == 1) {
sprintf(pcWriteBuffer, "%x\t\t%d\r\n", i, hold_wakelock_time[i] + (current_timestamp - last_acquire_wakelock_time[i]));
} else {
if (hold_wakelock_time[i] > 0) {
sprintf(pcWriteBuffer, "%x\t\t%d\r\n", i, hold_wakelock_time[i]);
}
}
pcWriteBuffer += strlen( pcWriteBuffer );
}
sprintf(pcWriteBuffer, "time passed: %d ms, system sleep %d ms\r\n", current_timestamp - base_sys_time, sys_sleep_time);
}
}
void pmu_clean_wakelock_stat() {
uint32_t i;
//base_sys_time = osKernelSysTick();
base_sys_time = osKernelGetSysTimerCount();
for (i=0; i<32; i++) {
hold_wakelock_time[i] = 0;
if (last_wakelock_state[i] == 1) {
last_acquire_wakelock_time[i] = base_sys_time;
}
}
sys_sleep_time = 0;
}
void pmu_add_wakeup_event(uint32_t event) {
wakeup_event |= event;
}
void pmu_del_wakeup_event(uint32_t event) {
wakeup_event &= ~event;
// To fulfill tickless design, system timer is required to be wakeup event
wakeup_event |= SLEEP_WAKEUP_BY_STIMER;
}
void pmu_register_sleep_callback(uint32_t nDeviceId, PSM_HOOK_FUN sleep_hook_fun, void* sleep_param_ptr, PSM_HOOK_FUN wakeup_hook_fun, void* wakeup_param_ptr) {
uint32_t i;
for (i=0; i<psm_dd_hook_info_size; i++) {
if (psm_dd_hook_infos[i].nDeviceId == nDeviceId) {
psm_dd_hook_infos[i].sleep_hook_fun = sleep_hook_fun;
psm_dd_hook_infos[i].sleep_param_ptr = sleep_param_ptr;
psm_dd_hook_infos[i].wakeup_hook_fun = wakeup_hook_fun;
psm_dd_hook_infos[i].wakeup_param_ptr = wakeup_param_ptr;
break;
}
}
if (i == psm_dd_hook_info_size) {
psm_dd_hook_infos[psm_dd_hook_info_size].nDeviceId = nDeviceId;
psm_dd_hook_infos[psm_dd_hook_info_size].sleep_hook_fun = sleep_hook_fun;
psm_dd_hook_infos[psm_dd_hook_info_size].sleep_param_ptr = sleep_param_ptr;
psm_dd_hook_infos[psm_dd_hook_info_size].wakeup_hook_fun = wakeup_hook_fun;
psm_dd_hook_infos[psm_dd_hook_info_size].wakeup_param_ptr = wakeup_param_ptr;
psm_dd_hook_info_size++;
}
}
void pmu_unregister_sleep_callback(uint32_t nDeviceId) {
uint32_t i;
for (i=0; i<psm_dd_hook_info_size; i++) {
if (psm_dd_hook_infos[i].nDeviceId == nDeviceId) {
if (psm_dd_hook_info_size > 1) {
// if we have more than 2 items, just swap the last item into current slot
psm_dd_hook_infos[i].nDeviceId = psm_dd_hook_infos[psm_dd_hook_info_size-1].nDeviceId;
psm_dd_hook_infos[i].sleep_hook_fun = psm_dd_hook_infos[psm_dd_hook_info_size-1].sleep_hook_fun;
psm_dd_hook_infos[i].sleep_param_ptr = psm_dd_hook_infos[psm_dd_hook_info_size-1].sleep_param_ptr;
psm_dd_hook_infos[i].wakeup_hook_fun = psm_dd_hook_infos[psm_dd_hook_info_size-1].wakeup_hook_fun;
psm_dd_hook_infos[i].wakeup_param_ptr = psm_dd_hook_infos[psm_dd_hook_info_size-1].wakeup_param_ptr;
// Then erase the last item
psm_dd_hook_infos[psm_dd_hook_info_size-1].nDeviceId = 0;
psm_dd_hook_infos[psm_dd_hook_info_size-1].sleep_hook_fun = NULL;
psm_dd_hook_infos[psm_dd_hook_info_size-1].sleep_param_ptr = NULL;
psm_dd_hook_infos[psm_dd_hook_info_size-1].wakeup_hook_fun = NULL;
psm_dd_hook_infos[psm_dd_hook_info_size-1].wakeup_param_ptr = NULL;
} else {
// we only have one item, just erase it
psm_dd_hook_infos[i].nDeviceId = 0;
psm_dd_hook_infos[i].sleep_hook_fun = NULL;
psm_dd_hook_infos[i].sleep_param_ptr = NULL;
psm_dd_hook_infos[i].wakeup_hook_fun = NULL;
psm_dd_hook_infos[i].wakeup_param_ptr = NULL;
}
psm_dd_hook_info_size--;
break;
}
}
}
void pmu_set_pll_reserved(unsigned char reserve) {
reserve_pll = reserve;
}
#endif

110
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/misc/os/cmsis_pmu_8195a.h Normal file
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#ifndef __FREERTOS_PMU_H_
#define __FREERTOS_PMU_H_
#if DEVICE_SLEEP
#include "sleep_ex_api.h"
#ifndef BIT
#define BIT(n) (1<<n)
#endif
#ifdef CONFIG_PLATFORM_8195A
#define DEFAULT_WAKEUP_EVENT (SLEEP_WAKEUP_BY_STIMER | SLEEP_WAKEUP_BY_GTIMER | SLEEP_WAKEUP_BY_GPIO_INT | SLEEP_WAKEUP_BY_WLAN)
typedef enum PMU_DEVICE {
PMU_OS = 0,
PMU_WLAN_DEVICE = 1,
PMU_LOGUART_DEVICE = 2,
PMU_SDIO_DEVICE = 3,
PMU_DEV_USER_BASE= 16,
PMU_MAX = 31
} PMU_DEVICE;
// default locked by OS and not to sleep until OS release wakelock in somewhere
#define DEFAULT_WAKELOCK (BIT(PMU_OS))
typedef uint32_t (*PSM_HOOK_FUN)( unsigned int, void* param_ptr );
#endif
/** Acquire wakelock
*
* A wakelock is a 32-bit map. Each module own 1 bit in this bit map.
* FreeRTOS tickless reference the wakelock and decide that if it can or cannot enter sleep state.
* If any module acquire and hold a bit in wakelock, then the whole system won't enter sleep state.
*
* If wakelock is not equals to 0, then the system won't enter sleep.
*
* @param nDeviceId : The bit which is attempt to add into wakelock
*/
void pmu_acquire_wakelock(uint32_t nDeviceId);
/** Release wakelock
*
* If wakelock equals to 0, then the system may enter sleep state if it is in idle state.
*
* @param nDeviceId : The bit which is attempt to remove from wakelock
*/
void pmu_release_wakelock(uint32_t nDeviceId);
/** Get current wakelock bit map value
*
* @return : the current wakelock bit map value
*/
uint32_t pmu_get_wakelock_status(void);
#if (configGENERATE_RUN_TIME_STATS == 1)
/** enable to keep wakelock stats
*
*/
void pmu_enable_wakelock_stats( unsigned char enable );
/** Get text report that contain the statics of wakelock holding time
*
* Each time a module acquries or releases wakelock, a holding time is calculated and sum up to a table.
* It is for debug that which module is power saving killer.
*
* @param pcWriteBuffer : The char buffer that contain the report
*/
void pmu_get_wakelock_hold_stats( char *pcWriteBuffer );
/** Recalculate the wakelock statics
*
* By default the wakelock statics is calculated from system boot up.
* If we want to debug power saving killer from a specified timestamp, we can reset the statics.
*/
void pmu_clean_wakelock_stat(void);
#endif
/**
* @brief set system active time, system can not sleep beore timeout.
* @param timeout: system can not sleep beore timeout, unit is ms.
* @retval status value:
* - 0: _FAIL
* - 1: _SUCCESS
*/
uint32_t pmu_set_sysactive_time(uint32_t timeout_ms);
void pmu_add_wakeup_event(uint32_t event);
void pmu_del_wakeup_event(uint32_t event);
#if (defined CONFIG_PLATFORM_8195A) || (defined CONFIG_PLATFORM_8195BHP) || (defined CONFIG_PLATFORM_8710C) || (defined CONFIG_PLATFORM_8711B)
void pmu_register_sleep_callback(uint32_t nDeviceId, PSM_HOOK_FUN sleep_hook_fun, void* sleep_param_ptr, PSM_HOOK_FUN wakeup_hook_fun, void* wakeup_param_ptr);
void pmu_unregister_sleep_callback(uint32_t nDeviceId);
#endif
#ifdef CONFIG_PLATFORM_8195A
/** Set PLL reserved or not when sleep is called
*
* @param reserve: true for sleep with PLL reserve
*/
void pmu_set_pll_reserved(unsigned char reserve);
#endif
#endif
#endif

72
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/common/bsp/basic_types.h
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@ -1,19 +1,22 @@
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************/
#ifndef __BASIC_TYPES_H__
#define __BASIC_TYPES_H__
@ -34,7 +37,7 @@
#undef _FAIL
#define _FAIL 0
#ifndef FALSE
#ifndef FALSE
#define FALSE 0
#endif
@ -63,6 +66,7 @@ typedef signed long long __int64_t;
typedef unsigned long long __uint64_t;
#endif
#if defined(CONFIG_MBED_ENABLED)
typedef int8_t s8;
typedef uint8_t u8;
typedef int16_t s16;
@ -71,17 +75,17 @@ typedef int32_t s32;
typedef uint32_t u32;
typedef int64_t s64;
typedef uint64_t u64;
#ifdef CONFIG_MBED_ENABLED
#ifndef BOOL
typedef unsigned int BOOL;
#endif
#ifndef __cplusplus
#ifndef bool
typedef unsigned char bool;
#endif
#endif
#else
#define s8 int8_t
#define u8 uint8_t
#define s16 int16_t
#define u16 uint16_t
#define s32 int32_t
#define u32 uint32_t
#define s64 int64_t
#define u64 uint64_t
#endif
#ifndef BOOL
typedef unsigned char BOOL;
#endif
@ -90,14 +94,17 @@ typedef unsigned char BOOL;
typedef unsigned char bool;
#endif
#endif
#endif
#define UCHAR uint8_t
#define USHORT uint16_t
//#define UINT uint32_t
#define ULONG uint32_t
typedef struct { volatile int counter; } atomic_t;
#if defined(CONFIG_MBED_ENABLED)
typedef unsigned int UINT;
#else
#define UINT uint32_t
#endif
#define ULONG uint32_t
enum _RTK_STATUS_ {
_EXIT_SUCCESS = 0,
@ -198,13 +205,20 @@ typedef __kernel_ssize_t SSIZE_T;
#define _LONG_CALL_
#define _LONG_CALL_ROM_
#define _WEAK __weak
#if (__VER__ >= 8000000)
#define _USED __attribute__((used))
#else
#define _USED _Pragma("__root")
#endif
#elif defined(__CC_ARM)
// defined in rtl8195a_compiler.h
#define SECTION(_name) __attribute__ ((section(_name)))
#define _LONG_CALL_ __attribute__ ((long_call))
#define ALIGNMTO(_bound) __attribute__ ((aligned (_bound)))
#define _LONG_CALL_ROM_ _LONG_CALL_
#define _WEAK __attribute__ ((weak))
#define _USED __attribute__((used))
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#define SECTION(_name) __attribute__ ((__section__(_name)))
@ -222,6 +236,7 @@ typedef __kernel_ssize_t SSIZE_T;
#define _LONG_CALL_ROM_ _LONG_CALL_
#endif
#define _WEAK __attribute__ ((weak))
#define _USED __attribute__((used))
#else
#define SECTION(_name) __attribute__ ((__section__(_name)))
@ -239,6 +254,7 @@ typedef __kernel_ssize_t SSIZE_T;
#define _LONG_CALL_ROM_ _LONG_CALL_
#endif
#define _WEAK __attribute__ ((weak))
#define _USED __attribute__((used))
#endif
@ -526,11 +542,9 @@ typedef unsigned char BOOLEAN,*PBOOLEAN;
#define __restrict /* Ignore */
#endif
/* in rtl8195a_trap.h
typedef struct _RAM_START_FUNCTION_ {
VOID (*RamStartFun) (VOID);
}RAM_START_FUNCTION, *PRAM_START_FUNCTION;
*/
typedef struct _RAM_FUNCTION_START_TABLE_ {
VOID (*RamStartFun) (VOID);

42
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/common/bsp/section_config.h
View File

@ -1,21 +1,17 @@
/*******************************************************************************
*Copyright (c) 2013-2016 Realtek Semiconductor Corp, All Rights Reserved
* SPDX-License-Identifier: LicenseRef-PBL
*
* Licensed under the Permissive Binary License, Version 1.0 (the "License");
* you may not use this file except in compliance with the License.
*
* You may obtain a copy of the License at https://www.mbed.com/licenses/PBL-1.0
*
* See the License for the specific language governing permissions and limitations under the License.
*******************************************************************************
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _SECTION_CONFIG_H_
#define _SECTION_CONFIG_H_
#include "platform_autoconf.h"
#include "basic_types.h"
#include "platform_autoconf.h"
#define RAM_DEDECATED_VECTOR_TABLE_SECTION \
SECTION(".ram_dedecated_vector_table")
@ -131,16 +127,20 @@
#define E_CUT_ROM_DATA_SECTION \
SECTION(".cute.ram.data")
//#define FWUROM_DATA_SECTION SECTION(".fwurom.data")
//#define FWUROM_RODATA_SECTION SECTION(".fwurom.rodata")
/*
#define FWUROM_DATA_SECTION \
SECTION(".fwurom.data")
#define FWUROM_RODATA_SECTION \
SECTION(".fwurom.rodata")
*/
#define FWUROM_TEXT_SECTION \
SECTION(".fwurom.text")
#define XMPORT_ROM_TEXT_SECTION \
SECTION(".xmportrom.text")
#define XDMROM_TEXT_SECTION \
SECTION(".xmodemrom.text")
@ -149,7 +149,6 @@
#if defined (__CC_ARM)
#define IMAGE1_VALID_PATTEN_SECTION \
SECTION(".image1.validate.rodata") __attribute__((used))
#define IMAGE2_VALID_PATTEN_SECTION \
SECTION(".image2.validate.rodata") __attribute__((used))
#else
@ -230,7 +229,6 @@
#define SRAM_BF_DATA_SECTION \
SECTION(".bfsram.data")
#define START_RAM_FUN_SECTION \
SECTION(".start.ram.data")
@ -288,10 +286,10 @@
#if defined (__CC_ARM)
#define IMAGE2_START_RAM_FUN_SECTION \
SECTION(".image2.ram.data") __attribute__((used))
SECTION(".image2.ram.data") __attribute__((used))
#else
#define IMAGE2_START_RAM_FUN_SECTION \
SECTION(".image2.ram.data")
SECTION(".image2.ram.data")
#endif
#define SDRAM_DATA_SECTION \

155
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/common/rtl_std_lib/include/rtl_lib.h
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@ -1,155 +0,0 @@
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************/
#ifndef _RTL_LIB_H_
#define _RTL_LIB_H_
#include <basic_types.h>
#include <diag.h>
extern int __rtl_errno;
void init_rom_libgloss_ram_map(void);
//
// RTL library functions for Libc::stdio
//
extern int rtl_printf(IN const char* fmt, ...);
extern int rtl_vprintf(const char *fmt, void *param);
extern int rtl_sprintf(char* str, const char* fmt, ...);
extern int rtl_snprintf(char* str, size_t size, const char* fmt, ...);
extern int rtl_vsnprintf(char *str, size_t size, const char *fmt, void *param);
//
// RTL library functions for string
//
extern void * rtl_memchr(const void * src_void , int c , size_t length);
extern int rtl_memcmp(const void * m1 , const void * m2 , size_t n);
extern void * rtl_memcpy(void * dst0 , const void * src0 , size_t len0);
extern void * rtl_memmove( void * dst_void , const void * src_void , size_t length);
extern void * rtl_memset(void * m , int c , size_t n);
extern char * rtl_strcat(char * s1 , const char * s2);
extern char * rtl_strchr(const char *s1 , int i);
extern int rtl_strcmp(const char *s1 , const char *s2);
extern char* rtl_strcpy(char *dst0 , const char *src0);
extern size_t rtl_strlen(const char *str);
extern char * rtl_strncat(char * s1 , const char * s2 , size_t n);
extern int rtl_strncmp(const char *s1 , const char *s2 , size_t n);
extern char * rtl_strncpy(char * dst0 , const char * src0 , size_t count);
extern char * rtl_strstr(const char *searchee , const char *lookfor);
extern char * rtl_strsep(char **source_ptr , const char *delim);
extern char * rtl_strtok(char * s , const char * delim);
//
// RTL library functions for math
//
extern double rtl_fabs(double);
extern float rtl_fabsf(float a);
extern float rtl_cos_f32(float a);
extern float rtl_sin_f32(float a);
extern float rtl_fadd(float a, float b);
extern float rtl_fsub(float a, float b);
extern float rtl_fmul(float a, float b);
extern float rtl_fdiv(float a, float b);
extern int rtl_fcmplt(float a, float b);
extern int rtl_fcmpgt(float a, float b);
//
// RTL eabi functions
extern double rtl_ftod(float f);
extern double rtl_ddiv(double a, double b);
//
// Macro Library Functions
//
typedef union
{
float value;
u32 word;
} ieee_float_shape_type;
/* Get a 32 bit int from a float. */
#define GET_FLOAT_WORD(i,d) \
do { \
ieee_float_shape_type gf_u; \
gf_u.value = (d); \
(i) = gf_u.word; \
} while (0)
/* Set a float from a 32 bit int. */
#define SET_FLOAT_WORD(d,i) \
do { \
ieee_float_shape_type sf_u; \
sf_u.word = (i); \
(d) = sf_u.value; \
} while (0)
static inline
float rtl_nanf(void)
{
float x;
SET_FLOAT_WORD(x,0x7fc00000);
return x;
}
//
// Library Test functions
//
extern int rtl_lib_test(IN u16 argc, IN u8 *argv[]);
extern int rtl_math_test(IN u16 argc, IN u8 *argv[]);
extern int rtl_string_test(IN u16 argc, IN u8 *argv[]);
//
// Macro functions
//
#undef dbg_printf
#define dbg_printf(fmt, args...) \
rtl_printf("%s():%d : " fmt "\n", __FUNCTION__, __LINE__, ##args);
#undef err_printf
#define err_printf(fmt, args...) \
rtl_printf("%s():%d : " fmt "\n", __FUNCTION__, __LINE__, ##args);
#endif /* _RTL_LIB_H_ */

2
targets/TARGET_Realtek/mbed_rtx.h
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@ -41,4 +41,4 @@
#endif
#endif
#endif
#endif

49
tools/bootloaders/REALTEK_RTL8195AM/LICENSE Normal file
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@ -0,0 +1,49 @@
Permissive Binary License
Version 1.0, September 2015
Redistribution. Redistribution and use in binary form, without
modification, are permitted provided that the following conditions are
met:
1) Redistributions must reproduce the above copyright notice and the
following disclaimer in the documentation and/or other materials
provided with the distribution.
2) Unless to the extent explicitly permitted by law, no reverse
engineering, decompilation, or disassembly of this software is
permitted.
3) Redistribution as part of a software development kit must include the
accompanying file named "DEPENDENCIES" and any dependencies listed in
that file.
4) Neither the name of the copyright holder nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
Limited patent license. The copyright holders (and contributors) grant a
worldwide, non-exclusive, no-charge, royalty-free patent license to
make, have made, use, offer to sell, sell, import, and otherwise
transfer this software, where such license applies only to those patent
claims licensable by the copyright holders (and contributors) that are
necessarily infringed by this software. This patent license shall not
apply to any combinations that include this software. No hardware is
licensed hereunder.
If you institute patent litigation against any entity (including a
cross-claim or counterclaim in a lawsuit) alleging that the software
itself infringes your patent(s), then your rights granted under this
license shall terminate as of the date such litigation is filed.
DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT
NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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tools/bootloaders/REALTEK_RTL8195AM/ram_1.bin
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