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NUCLEO_L4R5ZI: enable bootloader

pull/7585/head
bcostm 2018-07-23 13:27:59 +02:00
parent 3a722358b1
commit a644ddd2e7
5 changed files with 41 additions and 13 deletions
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16
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_MICRO/stm32l4r5xx.sct
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@ -1,3 +1,4 @@
#! armcc -E
; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2018, STMicroelectronics
@ -27,10 +28,18 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; 2MB FLASH (0x200000) + 640KB SRAM (0xA0000)
LR_IROM1 0x08000000 0x200000 { ; load region size_region
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif
ER_IROM1 0x08000000 0x200000 { ; load address = execution address
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x200000
#endif
; 2MB FLASH (0x200000) + 640KB SRAM (0xA0000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
@ -41,4 +50,3 @@ LR_IROM1 0x08000000 0x200000 { ; load region size_region
.ANY (+RW +ZI)
}
}

16
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_STD/stm32l4r5xx.sct
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@ -1,3 +1,4 @@
#! armcc -E
; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2018, STMicroelectronics
@ -27,10 +28,18 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; 2MB FLASH (0x200000) + 640KB SRAM (0xA0000)
LR_IROM1 0x08000000 0x200000 { ; load region size_region
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif
ER_IROM1 0x08000000 0x200000 { ; load address = execution address
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x200000
#endif
; 2MB FLASH (0x200000) + 640KB SRAM (0xA0000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
@ -41,4 +50,3 @@ LR_IROM1 0x08000000 0x200000 { ; load region size_region
.ANY (+RW +ZI)
}
}

10
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld
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@ -1,7 +1,15 @@
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 2048K
#endif
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
SRAM1 (rwx) : ORIGIN = 0x200001BC, LENGTH = 640k - 0x1BC
}

9
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf
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@ -1,7 +1,10 @@
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
/* [ROM = 2MB = 0x200000] */
define symbol __intvec_start__ = 0x08000000;
define symbol __region_ROM_start__ = 0x08000000;
define symbol __region_ROM_end__ = 0x08000000 + 0x200000 - 1;
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
/* [RAM = 640KB = 0xA0000] */
/* Vector table dynamic copy: Total: 111 vectors = 444 bytes (0x1BC) to be reserved in RAM */

3
targets/targets.json
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@ -4343,7 +4343,8 @@
"detect_code": ["0776"],
"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
"release_versions": ["2", "5"],
"device_name": "STM32L4R5ZI"
"device_name": "STM32L4R5ZI",
"bootloader_supported": true
},
"VBLUNO52": {
"supported_form_factors": ["ARDUINO"],