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2702 Commits (feature-bluetooth-unit-test)

Author SHA1 Message Date
Martin Kojtal 8d26d77690
Merge pull request #12482 from AGlass0fMilk/add-nucleo-g474re 
NUCLEO_G474RE: Add new platform
 2020-06-08 12:38:40 +02:00
jeromecoutant 28f8307afa STM32WB baremetal support 
move BLE files to FEATURE_BLE
 2020-06-08 12:06:01 +02:00
jeromecoutant 0a447ac798 STM32L4 baremetal support 2020-06-08 12:05:54 +02:00
jeromecoutant ba7deb4660 STM32L1 baremetal support 2020-06-08 11:46:56 +02:00
jeromecoutant 1292053bf9 STM32 more information in README file 2020-06-08 10:02:33 +02:00
jeromecoutant c9e0c4f6f7 STM32WB ReadMe quick update 
See #12975
 2020-06-08 10:02:33 +02:00
jeromecoutant 10a5b97396 STM32H7: NUCLEO_H743ZI2 pins update 2020-06-05 16:26:33 +02:00
jeromecoutant 1484ac0859 STM32H7: DISCO_H747I pins update 2020-06-05 16:26:23 +02:00
jeromecoutant b289d5a08f STM32H7: enable dual analogic pad 2020-06-05 16:26:22 +02:00
jeromecoutant 538552adea STM32H7 ADC issue correction 2020-06-05 16:26:22 +02:00
Martin Kojtal 59df4efaac
Merge pull request #13022 from jeromecoutant/PR_BSP 
STM32: add weak TargetBSP_Init function
 2020-06-05 16:01:25 +02:00
Martin Kojtal 3ef2b1642e
Merge pull request #12996 from pilotak/master 
STM32F412 bypass PLL configuration when already done by bootloader
 2020-06-05 10:48:41 +02:00
Martin Kojtal 8911f96c1b
Merge pull request #13014 from jeromecoutant/PR_H7CM4 
DISCO_H747I_CM4 is supporting now hex format
 2020-06-04 15:23:26 +02:00
jeromecoutant 76135d0820 STM32: add weak TargetBSP_Init function 2020-05-27 16:49:54 +02:00
jeromecoutant 876125ad49 DISCO_H747I_CM4 is supporting now hex format 
- minimum STLink version: V3J7M2
 2020-05-25 11:34:40 +02:00
rogeryou de9b283abe modify the div value when calling octo controller. 
For ST OSPI controller driver(stm32l4xx_hal_ospi.c), the frequency it has be subtracted 1, so "div = div - 1;" should be removed.
 2020-05-25 12:07:24 +08:00
George Beckstein 658d89be8c Apply linker fix as in #12690 to new NUCLEO_G474RE target 2020-05-20 06:39:17 -04:00
George Beckstein 6e2fa616c7 Added spi_api.c implementation 2020-05-20 06:39:17 -04:00
George Beckstein eb8d128a24 Updated system clock settings to run at 170MHz (max for this target). Affects both HSI and HSE modes. 2020-05-20 06:39:17 -04:00
George Beckstein 44ca862af3 Changed us_ticker configuration to use TIM5 instead of TIM2 to be consistent with the allowed PWM peripheral pins. 2020-05-20 06:39:17 -04:00
George Beckstein 2297e1b91e Updated clock configuration settings for NUCLEO_G474RE 2020-05-20 06:39:17 -04:00
George Beckstein c687ae312f Added missing analogin_device.c file and configured for STM32G4xx series 2020-05-20 06:39:17 -04:00
George Beckstein 613af0f604 Added support for ANALOGOUT 2020-05-20 06:39:17 -04:00
George Beckstein 934d60e63d Added support for FLASH API 2020-05-20 06:39:17 -04:00
George Beckstein 7f19c8ac6e Added support for SPI API 2020-05-20 06:39:17 -04:00
George Beckstein 06d74aa37a Added support for PWMOUT 2020-05-20 06:39:17 -04:00
George Beckstein f59ec66710 Added support for INTERRUPTIN 2020-05-20 06:39:17 -04:00
George Beckstein 5e25e004df Added support for I2C 2020-05-20 06:39:17 -04:00
George Beckstein cc86ec99d0 Added ANALOGIN support 2020-05-20 06:39:17 -04:00
George Beckstein 80c5d96420 Added support for WDT (untested). Checked datasheet for maximum LSI frequency 2020-05-20 06:39:17 -04:00
George Beckstein 3432960aa1 Implemented support for basic serial communication 2020-05-20 06:39:17 -04:00
George Beckstein ec2544023d Added basic support for NUCLEO_G747RE. Basic GPIO support and system initialization. 2020-05-20 06:39:17 -04:00
jeromecoutant 13ba114d12 STM32G4 DISCO_G474RE introduction 
- Only script result
- Can't compile
 2020-05-20 06:39:17 -04:00
jeromecoutant 2631bf8070 STM32G4 NUCLEO_G474RE introduction 
- Only script result
- Can't compile
 2020-05-20 06:39:17 -04:00
jeromecoutant fd2bac73c9 STM32G4 NUCLEO_G431RB introduction 
- Only script result
- Can't compile
 2020-05-20 06:39:17 -04:00
jeromecoutant 85e8a59e84 STM32G4 NUCLEO_G431KB introduction 
- Only script result
- Can't compile
 2020-05-20 06:39:17 -04:00
jeromecoutant 35e3ce9034 STM32G4 automatic adaptation for MBED 2020-05-20 06:39:17 -04:00
jeromecoutant b387ed6bc1 STM32G4 introduction 
Import from STM32Cube_FW_G4_V1.1.0
 2020-05-20 06:39:17 -04:00
Pavel Slama 9d7e55b3f3 move system_clock.c to the root 2020-05-19 13:33:55 +02:00
Pavel Slama 1fc9561af7 STM32F412 bypass PLL configuration when already done by bootloader 2020-05-19 11:48:56 +02:00
jeromecoutant b57b12cc9f STM32L0 baremetal support 2020-05-18 17:27:42 +02:00
jeromecoutant 9b819c7f8b STM32H7 baremetal support 2020-05-18 17:27:32 +02:00
jeromecoutant 739b2048d4 STM32F3 baremetal support 2020-05-18 17:26:50 +02:00
jeromecoutant 96016aea17 STM32F1 baremetal support 2020-05-18 15:27:30 +02:00
jeromecoutant 794e0aa0cf STM32F0 baremetal support 2020-05-18 15:27:29 +02:00
Leon Lindenfelser b8554a3f26 Update power on and power off functionality 
Implement soft_power_on/off() and hard_power_on/off() to perform as described in mbed-os CellularDevice API.
 2020-05-18 08:11:40 -05:00
jeromecoutant c96eb2cd0e STM32 rename TOOLCHAIN_ARM_STD into TOOLCHAIN_ARM 2020-05-15 10:41:28 +02:00
jeromecoutant 303752ad84 STM32 remove all TOOLCHAIN_ARM_MICRO 2020-05-15 09:37:40 +02:00
Marcelo Salazar 149656447d Remove target dep. on S2LP driver 2020-05-14 17:17:27 +01:00
jeromecoutant cda2538bd2 STM32L0 code cleaning 2020-05-14 13:55:32 +02:00
jeromecoutant dd46dfccb2 STM32F4 code cleaning 2020-05-14 13:55:22 +02:00
jeromecoutant f116fe0daa STM32F3 code cleaning 2020-05-14 13:55:21 +02:00
jeromecoutant 126a9c9693 STM32F1 code cleaning 2020-05-14 13:55:21 +02:00
jeromecoutant a63fd00a9a STM32F0 code cleaning 2020-05-14 13:55:21 +02:00
Martin Kojtal cb4449a727
Merge pull request #12958 from VeijoPesonen/stm32wb_vtor_bootloader 
Fix vector table bug when using bootloader on STM32WB55
 2020-05-13 19:23:42 +02:00
Martin Kojtal 6950e78fcb
Merge pull request #12945 from malavikasajikumar/SDPK1-PinNames 
Cleaning up PinNames.h for SDP-K1 board.
 2020-05-12 14:26:41 +02:00
Martin Kojtal e88c596fbb
Merge pull request #12801 from AGlass0fMilk/add-stm32h745 
Add base support for STM32H745
 2020-05-12 14:05:16 +02:00
Martin Kojtal 053af2d31c
Merge pull request #12856 from hugueskamba/hk_remove_uarm_st_boards 
ST Boards: Remove uARM tooolchain support
 2020-05-12 13:27:30 +02:00
Veijo Pesonen a4c692bd41 Fix VTOR bug when using bootloader on STM32WB 
The address of the vector table is hardcoded to the start of flash in
many, if not all, ST targets. This causes a crash in applications that
are using a bootloader.  This patch updates the board STM32WB55 so it
properly handle updating the VTOR with a bootloader.

Solution has been copied from the PR #3798.
 2020-05-12 10:46:32 +03:00
Martin Kojtal a707fd133e
Merge pull request #12915 from rajkan01/hal_gettick_api_optim 
Optimise HAL_GetTick API
 2020-05-11 15:12:28 +02:00
Malavika Sajikumar 74bd04f381 Cleaning up PinNames.h for SDP-K1 board. 
Added pin description comments to Arduino header pins and LED4.
Added I2C alias names.
Removed Oscillator and DEBUG pin definitions.
Use USBTX and USBRX for serial communications back to PC. Do not use STDIO_UART_TX and STDIO_UART_RX
 2020-05-07 14:44:53 -07:00
Marcelo Salazar 4083469d09 Remove Ublox targets 2020-05-06 16:39:29 +01:00
jeromecoutant ab80e30bfe STM32F4 bypass PLL configuration when already done by bootloader 2020-05-05 18:06:10 +02:00
Rajkumar Kanagaraj 4ab794b47f Microlib slow division causes HAL_GetTick API performance issue, so optimized HAL_GetTick API to improve performance. 2020-05-05 16:24:53 +01:00
George Beckstein 5087b6da4e Moved GENERIC_H745I_CM* targets into parent target folder 2020-04-30 09:27:26 -04:00
George Beckstein 5dcc49d9f5 Change structure so custom targets may define their own linker scripts 2020-04-30 09:24:02 -04:00
jeromecoutant 1877b68869 STM32H745 : creation of GENERIC target 
Goal is to enable compilation in CI
 2020-04-30 09:24:02 -04:00
jeromecoutant 38801157ac STM32H745 restructuration 2020-04-30 09:24:02 -04:00
George Beckstein ecaa5fe793 Add BSP initialization hook to system initialization code 2020-04-30 09:24:02 -04:00
George Beckstein decc6d335f Added common system files from H747 targets 2020-04-30 09:24:02 -04:00
George Beckstein a1bb4b1d0a Add and configure support for IAR toolchain 2020-04-30 09:24:02 -04:00
George Beckstein fab7de62e7 Add and configure support for ARM_STD toolchain 2020-04-30 09:24:02 -04:00
George Beckstein 88a6d37a07 Add target files for STM32H745-based targets 2020-04-30 09:24:01 -04:00
Hugues Kamba ce1c51ea51 ST Boards: Remove uARM tooolchain support 
For NUCLEO_F401RE, NUCLEO_F411RE, NUCLEO_F303RE, and DISCO_L475VG_IOT01A:
* Ensure the scatter files for the ARM toolchain use 2 region memory model.
  The scatter files changes affects the following boards:
    * NUCLEO_F401RE, STEVAL_3DP001V1 (stm32f401xe.sct)
    * NUCLEO_F411RE, MTS_MDOT_F411RE, MTS_DRAGONFLY_F411RE, MTB_MTS_DRAGONFLY, SAKURAIO_EVB_01 (stm32f411re.sct)
    * NUCLEO_F303RE, NUCLEO_F303ZE (stm32f303xe.sct)
    * DISCO_L475VG_IOT01A, MTB_STM_L475 (stm32l475xx.sct)
* Remove the TOOLCHAIN_ARM_MICRO directories.
* Remove release_version as not necessary and as the targets can also run
  Mbed OS 6.
* Remove uARM support for all FAMILY_STM32 targets.
 2020-04-30 14:17:39 +01:00
Marcelo Salazar a3dc513d35 Remove MTS_MDOT_F405RG target 2020-04-30 09:56:36 +01:00
Marcelo Salazar a7b026bd14 Rename ADV_WISE_1510 target 2020-04-30 09:56:35 +01:00
Marcelo Salazar 92cbd9a734 Rename ADV_WISE_1570 target 2020-04-30 09:56:35 +01:00
jeromecoutant bc4bc05908 STM32 warning remove 2020-04-24 10:57:45 +02:00
jeromecoutant 227af65ef1 STM32F7: CubeDriver V1.15.0 to V1.16.0 
https://github.com/STMicroelectronics/STM32CubeF7
 2020-04-23 18:02:15 +02:00
jeromecoutant 8d542142da STM32F7: directory restructuration 2020-04-23 18:02:06 +02:00
Martin Kojtal df6f650ab1 Revert "Remove MTB_STM_S2LP target" 
This reverts commit 10ca248a7a.
 2020-04-22 13:46:53 +01:00
Martin Kojtal b622a25688
Merge pull request #12810 from MarceloSalazar/platform_cleanup 
Remove unsupported targets

Note, commit 21e364e is just a styling fix, no target removal.
 2020-04-22 10:58:50 +02:00
Martin Kojtal e33e93622c
Merge pull request #12663 from hugueskamba/hk-NUCLEO_F303K8-fix-microlib-support-optimize-ram 
Migrate NUCLEO_F303K8 to Mbed OS 5 baremetal
 2020-04-22 07:06:13 +02:00
Hugues Kamba 4e61240838 Migrate NUCLEO_F303K8 to Mbed OS 5 baremetal 
* Use two memory regions in ARM toolchain linker file to support Microlib
* Replace `target.default_lib` with `target.c_lib`
* Specify supported lib sizes per toolchain
* Add support for Mbed OS versions after Mbed 2
 2020-04-21 12:11:35 +01:00
Marcelo Salazar beee062d1f Remove MTB_MTS_DRAGONFLY target 2020-04-20 16:55:35 +01:00
Marcelo Salazar 10ca248a7a Remove MTB_STM_S2LP target 2020-04-20 16:55:35 +01:00
Marcelo Salazar ee8231ab9d Remove USI_WM_BN_BM_22 based targets 2020-04-20 16:55:35 +01:00
MarceloSalazar 93db82f591 Remove NZ32_SC151 target 2020-04-20 16:55:34 +01:00
MarceloSalazar d9cb51dbc6 Remove OLIMEX_STM32E407_F407ZG target 2020-04-20 16:55:34 +01:00
MarceloSalazar 33be96d751 Remove SAKURAIO_EVB target 2020-04-20 16:55:34 +01:00
MarceloSalazar 7839bbbe39 Remove IM880B target 2020-04-20 16:55:34 +01:00
MarceloSalazar 6874f41af9 Remove BLUEPILL_F103C8 target 2020-04-20 16:55:34 +01:00
MarceloSalazar bf590310db Remove MTB_RAK811 target 2020-04-20 16:55:34 +01:00
MarceloSalazar e78ba7065b Remove MTB_MTS_XDOT target 2020-04-20 16:55:33 +01:00
MarceloSalazar 4b1ad8ad4c Remove MTB_STM_L475 target 2020-04-20 16:55:33 +01:00
MarceloSalazar 91607fe9cd Remove MTB_MURATA_ABZ target 2020-04-20 16:55:33 +01:00
MarceloSalazar 32ab2ecb7a Remove MTB_STM32_F439 target 2020-04-20 16:55:33 +01:00
Martin Kojtal fcc20b1201
Merge pull request #12765 from MultiTechSystems/update-mdot-target 
Update MTS_MDOT_F411RE target and remove bootloader from tools
 2020-04-16 11:53:26 +02:00
MarceloSalazar e43ece13aa Rename EMW3166 target 2020-04-09 15:32:41 +01:00
MarceloSalazar 831c475a46 Remove Silica target 2020-04-09 15:32:41 +01:00
MarceloSalazar 1e4c707cc5 Remove ELMO target 2020-04-09 15:32:41 +01:00
MarceloSalazar 3ad6c4fa2b Remove Ublox ODIN targets 2020-04-09 15:32:39 +01:00
Rajkumar Kanagaraj 3d128e861b - Fix the CI build issue. 
- Incorporate the review comment.
 2020-04-08 10:35:07 +01:00
Rajkumar Kanagaraj 9739b565b2 Fix the CI build issue 2020-04-08 10:35:07 +01:00
Taylor Heck 5ca347f460 Use basic STM32F411RE linker scripts, removes bootloader section. 2020-04-07 09:00:09 -05:00
Taylor Heck 94dd3f98c3 Update system_clock.c for VECT_TAB_OFFSET changes in target definition 2020-04-07 09:00:07 -05:00
Martin Kojtal a6ef9db8dc
Merge pull request #12626 from jeromecoutant/PR_F4 
STM32F4 update drivers version to CUBE V1.25.0
 2020-04-01 10:50:32 +02:00
Martin Kojtal eb2457f59d
Merge pull request #12690 from jeromecoutant/PR_GCC_ETEXT 
STM32: solve GCC Unspecified RTOS error
 2020-03-31 09:27:05 +02:00
jeromecoutant 33fc5000a9 STM32F4 V1.19.0 -> V1.25.0 : adaptation 2020-03-30 16:04:02 +02:00
jeromecoutant aa22c4b4d5 STM32F4 V1.19.0 -> V1.25.0 : Driver part 2020-03-30 16:04:01 +02:00
jeromecoutant 480fd2ab92 STM32F4 V1.19.0 -> V1.25.0 : CMSIS part 2020-03-30 16:04:00 +02:00
jeromecoutant 3c3b17d601 STM32F4 restructuration for better maintenance 2020-03-30 16:03:59 +02:00
Martin Kojtal 92cdcfb302
Merge pull request #12662 from artokin/workaround_for_stm32f4_sleep 
Add workaround for STM32F4 hardfault in sleep mode
 2020-03-30 14:08:48 +02:00
Marcelo Salazar 5aa66b5c9a
Add workaround for F429 hardfault 2020-03-27 11:58:46 +00:00
jeromecoutant a1c159e0b5 STM32 GCC Unspecified RTOS error 2020-03-24 17:32:13 +01:00
jeromecoutant 249752e7bc STM32H7: enable QSPI 
- DISCO_H747I board has MT25QL512 embedded QSPI
 2020-03-23 18:46:26 +01:00
Teemu Takaluoma 40672c5e0f Disable sleep on STM32F4 as an workaround for stability issues. 
This workaround is related to Mbed OS issue
https://github.com/ARMmbed/mbed-os/issues/12294
 2020-03-20 12:16:06 +02:00
Anna Bridge d61187c23a
Merge pull request #12611 from jeromecoutant/PR_UART_PARITY 
STM32F4 UART issue when parity enabled
 2020-03-13 11:07:21 +00:00
jeromecoutant 6752a2d555 STM32F4 UART issue when parity enabled 
Bits 8:0 DR[8:0]: Data value
When receiving with the parity enabled, the value read in the MSB bit is the received parity
bit.
 2020-03-10 17:22:02 +01:00
Rajkumar Kanagaraj 2f4cf1a052 Fix the CI build issue 2020-03-10 07:50:32 -07:00
jeromecoutant 1fa78eb5a8 STM32F7: add ARM_LIB_HEAP definition in ARM linker scripts 2020-03-05 16:35:40 +01:00
jeromecoutant 0871db277b STM32F7: allow multiple SetSysClock call 2020-03-05 16:34:56 +01:00
Martin Kojtal a17866e623
Merge pull request #12559 from jeromecoutant/PR_DISCO_L4R9 
DISCO_L4R9I correct LED pins
 2020-03-04 07:48:32 +00:00
Martin Kojtal b3583f04cf
Merge pull request #12464 from jeromecoutant/PR_ETHERNET 
STM32 EMAC : add configuration choice and connection check
 2020-03-03 16:04:18 +00:00
jeromecoutant 3e30033822 DISCO_L4R9I correct LED pins 2020-03-03 13:36:57 +01:00
Martin Kojtal bad9c57085
Merge pull request #12460 from mprse/spi_init_nc_fix 
Allow MISO/MOSI set to NC during SPI initialisation (fix for issue #12435)
 2020-03-03 09:56:47 +00:00
jeromecoutant 1b40076376 STM32 EMAC : more configurable 
- PHY default configuration can be changed
  - AutoNegotiation
  - Speed
  - DuplexMode
- PHY register offset can be updated depending on chosen PHY

All unused parameters are cleaned.
 2020-03-02 16:19:26 +01:00
Martin Kojtal 2d93a4578d
Merge pull request #12451 from jeromecoutant/PR_QSPI_TRACE 
STM32 : enable MBED trace for QSPI
 2020-02-27 10:02:46 +00:00
jeromecoutant 9977ace2c9 STM32 : enable MBED trace for QSPI 2020-02-20 12:20:24 +01:00
jeromecoutant a1570f936f STM32WB : Add ReadMe file 
Help on FW update procedure
 2020-02-20 09:20:44 +01:00
jeromecoutant 9d016022b6 STM32WB clean SetSysClock 2020-02-20 09:20:44 +01:00
jeromecoutant ebae0e56d4 STM32WB align deepsleep functions with CubeFW 2020-02-20 09:20:43 +01:00
Martin Kojtal 9f5ced30dc
Merge pull request #12415 from jeromecoutant/PR_H7README 
STM32H7 : add readme file for dual core use
 2020-02-19 12:52:10 +00:00
Przemyslaw Stekiel 713be4fd77 STM pin_function(), pin_mode(): return immediately when given pin is NC 
Additionally, remove redundant pin checks against NC when above functions are used.
 2020-02-19 11:46:59 +01:00
Przemyslaw Stekiel c6a6984ab8 Allow NC for MISO or MOSI while initializing SPI 
Static pinmap extension required to use pin_function() and pin_mode() functions instead of pinmap_pinout(). Unfortunatelly pin_function() does not allow passing NC pin.
Call pin_function() and pin_mode() only if MISO/MOSI pin is not NC.
 2020-02-18 13:38:43 +01:00
jeromecoutant 065a79e48a STM32H7: add README file for dual core use 2020-02-17 16:21:20 +01:00
jeromecoutant d66b39de18 STM32L5 : Add DISCO-L562E support 2020-02-14 17:49:40 +01:00
jeromecoutant f0969022b8 STM32L5 : add QSPI support 2020-02-14 17:49:33 +01:00
Martin Kojtal 7658681a9e
Merge pull request #12409 from LMESTM/Fix_lpuart_deep_sleep 
FIX: LPUART clock source selection should be left to serial driver
 2020-02-13 09:45:41 +00:00
Laurent Meunier 3fd071404e FIX: LPUART clock source selection should be left to serial driver 
The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c

At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.

So let's remove these few lines of code which are causing trouble.
 2020-02-11 17:14:45 +01:00
Martin Kojtal c1eaf2c358
Merge pull request #12380 from mprse/DISCO_L475VG_IOT01A_add_gpio_pinmap 
DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing
 2020-02-11 11:58:53 +00:00
Martin Kojtal 7fd5119b89
Merge pull request #12341 from fkjagodzinski/fix-stm-hal_fpga 
STM32L4: Fix the UART RX & TX data reg bitmasks
 2020-02-10 13:21:31 +00:00
jeromecoutant 2368a07244 STM32: Fix the UART RX & TX data reg bitmasks 2020-02-07 16:23:50 +00:00
Przemyslaw Stekiel 3a71f86235 DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing 2020-02-07 11:41:32 +01:00
Filip Jagodzinski ae635d5cd4 STM32L4: Fix the UART RX & TX data reg bitmasks 
The existing logic was insufficient to properly handle odd and even
parity setting, e.g. serial_getc() returned 9-bit data for 8O1
transmission format.
 2020-02-06 14:07:51 +01:00
Martin Kojtal 32675cc6ac
Merge pull request #11874 from fkjagodzinski/armc6_build-enable_lto_for_release 
ARMC6: Add a build profile extension with the link-time optimizer enabled
 2020-02-05 14:42:16 +00:00
Martin Kojtal e3ad1cae55
Merge pull request #12334 from AriParkkila/cell-c030-r412m 
Update cellular drivers/tests for UBLOX_C030_R412M
 2020-02-05 12:50:11 +00:00
Martin Kojtal 841b846b46
Merge pull request #12362 from ABOSTM/L0_CUBE_HAL_REWORK_NO_MORE_OVERRUN 
TARGET_STM: L0 CUBE SPI async mode send next byte after previous one is read
 2020-02-05 10:17:13 +00:00
Martin Kojtal cee2a352a7
Merge pull request #12357 from ABOSTM/F103_ADC3_NOT_SUPPORTING_COMMON_SETTINGS 
TARGET_STM32F1: don't set ADC common register when ADC doesn't support it
 2020-02-04 15:24:51 +00:00
Alexandre Bourdiol 315220832f TARGET_STM: L0 CUBE SPI async mode send next byte after previous one read 
In STM32 Cube HAL, in interrupt mode (async),
2 bytes can be prepared in hardware registers without any read
(1 in regular register, the other in shift register),
but Only 1 RX byte can stored in hardware register, specially when there is no hardware FIFO.
If interrupt handling is fast enough, each read is made in parralele of the write.
But if interrupt handling is too long or is interrupted for too long,
it can happen that one read byte is lost (overrun).
For STM32F4, Tickless has been deactivated to avoid such issue.
For STM32L0, we don't want to deactivate tickless,
because those chips are specially design for lowpower.

So instead of removing SPI async mode,
we propose to change the HAL behavior specially for L0:
each byte is send only when previous read is performed.
Thus only 1 RX byte at a time which is saved in hardware register.
This prevent overrun, but it introduceS some latency between each byte send,
this is why it is not applied to all STM32 families.
 2020-02-04 13:26:49 +01:00
Maciej Bocianski 8db3b40a7b STM: change rtc irq handler name 
Fix for the error caused by lto on armc6 compiler:

L6137E: Symbol RTC_IRQHandler was not preserved by the LTO codegen but is needed by the image.

lto optimization cause that local symbol RTC_IRQHandler(from rtc_api.c)
somehow interferes with global symbol RTC_IRQHandler (from startup_stm32f070xb.S)

Changing local RTC_IRQHandler to _RTC_IRQHandler fixes problem
 2020-02-04 12:29:52 +01:00
Martin Kojtal 250e58134f
Merge pull request #12286 from pea-pod/target-nucleo_l452re-p 
Add new target: NUCLEO_L452RE-P
 2020-02-03 16:34:36 +00:00
Alexandre Bourdiol 03b03feb8d TARGET_STM32F1: don't set ADC common register when ADC doesn't support it 
STM32F103ZE: ADC3 doesn't support common settings.
__LL_ADC_COMMON_INSTANCE(ADC3) returns 0
 2020-02-03 15:56:49 +01:00
Martin Kojtal 0f4a9867be
Merge pull request #12332 from jamesbeyond/analogIn_fix 
FIX: Disable Analogin D13(PA_5) on some NUCLEO targets
 2020-02-03 12:44:07 +00:00
Qinghao Shi f7d9850fe7 Disable Analogin D13(PA_5) on some NUCLEO targets 
- pins are connected to the LED, can't be used as analogin
 2020-02-03 11:39:31 +00:00
Martin Kojtal 02c5e0806f
Merge pull request #12350 from maciejbocianski/fix_fpga_i2c_test 
implements i2c_free for STM
 2020-02-03 09:56:59 +00:00
Maciej Bocianski 0b634e54b4 implement i2c_free for STM family 2020-01-31 14:51:54 +01:00
Maciej Bocianski 95996fb924 disable PA_8 i2c pin on NUCLEO_F411RE 
pin PA_8 by default is connected to MCO
 2020-01-31 14:48:00 +01:00
Kevin Bracey ba5dd4d8c1
Merge pull request #12153 from mprse/spi_fpga_test_extend 
Hackathon: Increase coverage of the SPI master FPGA test
 2020-01-31 15:00:02 +02:00
Kevin Bracey 91464b2729
Merge pull request #12306 from jeromecoutant/PR_STM32L5_NUCLEO 
STM32L5: NUCLEO-L552ZE-Q new target
 2020-01-29 16:07:44 +02:00
Ari Parkkila d6f8fece69 Cellular: Enable IP over PPP on UBLOX_C030_R41XM 2020-01-29 03:03:35 -08:00
pea-pod f7c4693747 Add new target: NUCLEO_L452RE-P 2020-01-27 18:41:18 -06:00
Anna Bridge ceaf562a11
Merge pull request #12283 from jeromecoutant/PR_STM32WB 
STM32WB - Update CubeDriver from v1.0.0 to v1.4.0
 2020-01-25 11:54:29 +00:00
jeromecoutant e4d0629d18 STM32L5 : Introduce NUCLEO_L552ZE_Q board 2020-01-23 17:55:07 +01:00
jeromecoutant c1386cf52d STM32L5 : update generic STM files for L5 2020-01-23 17:54:55 +01:00
jeromecoutant bee5d44a1f STM32L5: add API L5 family files 2020-01-23 17:54:52 +01:00
jeromecoutant 5d59c99b99 STM32L5: TOOLCHAIN automatic updates 2020-01-23 17:54:41 +01:00
jeromecoutant 77e5bb45b9 STM32L5: STM32Cube_FW_L5_V1.0.0 files 2020-01-23 13:30:31 +01:00
jeromecoutant 25da13bc18 STM32WB remove extra file 2020-01-23 10:53:09 +01:00
jeromecoutant 9f42a58d5a STM32H7 correct PWMOUT 2020-01-21 16:03:17 +01:00
jeromecoutant 3657f902d3 STM32Cube_FW_WB_V1.4.0 - STM32WB55xx part 2020-01-20 17:24:46 +01:00
jeromecoutant 7a5da6109f STM32Cube_FW_WB_V1.4.0 - STM32WB50xx part 2020-01-20 17:24:46 +01:00
jeromecoutant c39a13d10c STM32Cube_FW_WB_V1.4.0 - template part 2020-01-20 17:24:45 +01:00
jeromecoutant b4f3b0799d STM32Cube_FW_WB_V1.4.0 - STM32_WPAN part 2020-01-20 17:24:45 +01:00
jeromecoutant 08184d7ac9 STM32Cube_FW_WB_V1.4.0 - HAL_DRIVER part 2020-01-20 17:24:44 +01:00
jeromecoutant d6e4b15c1a STM32Cube_FW_WB_V1.4.0 - CMSIS part 2020-01-20 17:24:43 +01:00
jeromecoutant 339846a1bb STM32WB cleanup 
- BLE feature is mandatory
- remove clock source selection
- license alignment
- startup file from Cube delivery
- linker script alignement
 2020-01-20 17:24:28 +01:00
jeromecoutant 8f6171f8b0 STM32WB - BLE restructure 2020-01-20 16:10:55 +01:00
jeromecoutant 8c76a43d3c STM32WB - New directory structure 2020-01-20 16:10:55 +01:00
Martin Kojtal d6e69ef57b
Merge pull request #12208 from hugueskamba/hk-replace-uartserial-st 
ST targets: Replace UARTSerial references with BufferedSerial
 2020-01-17 08:19:09 +00:00
Martin Kojtal 88f48d240e
Merge pull request #12237 from mprse/stm_serial_free_fix 
STM serial free: Set pin function only if pin is defined (not NC)
 2020-01-15 13:02:20 +01:00
Martin Kojtal 978a9665f0
Merge pull request #12201 from jeromecoutant/PR_G0REFACTOR 
TARGET_STM: FW driver files refactor proposition
 2020-01-15 12:59:49 +01:00
Przemyslaw Stekiel 8a938ea777 STM serial free: Set pin function only if pin is defined (not NC) 2020-01-10 14:59:28 +01:00
Martin Kojtal 759ce271c2
Merge pull request #12200 from MultiTechSystems/fix_PeripheralPins 
Minor fixes for peripheral pins on Dragonfly Nano
 2020-01-09 13:17:01 +01:00
Martin Kojtal dbb0695311
Merge pull request #12202 from LMESTM/Increase_MSI_Freq_out_of_deep_sleep 
Increase MSI clock frequency when exiting deep sleep
 2020-01-09 10:49:20 +01:00
Hugues Kamba 03cff0a02c ST targets: Replace UARTSerial references with BufferedSerial 
BufferedSerial is UARTSerial renamed to convey the original purpose of
the class. It is the recommended buffered I/O serial class.
 2020-01-08 08:34:20 +00:00
Laurent Meunier 022c0eb7dc Increase MSI clock frequency when exiting deep sleep 
This will optimize down the time it takes to restore the clock
settings when getting out of deep sleep.

If 48MHz is available let's use it, otherwise at least 4MHz should be
available for any MCU with MSI.
 2020-01-07 17:59:33 +01:00
jeromecoutant 9448ded044 STM32G0: Update G071xx toolchain files with default files 2020-01-07 17:00:30 +01:00
jeromecoutant cf2dfcbc60 STM32G0: introduction of G030/G031/G041/G070/G081 sub-families 2020-01-07 16:07:18 +01:00
jeromecoutant 57f144ec66 STM32G0: remove MBED patch 
Goal is to remove all mis-aligment with official ST CUBE delivery
 2020-01-07 16:05:34 +01:00
jeromecoutant 631ed0c0b3 STM32G0: move us_ticker_data.h file to family level 2020-01-07 16:02:08 +01:00
jeromecoutant 6d780d8773 STM32G0: move cmsis_nvic.h file to Sub-family level 2020-01-07 16:01:45 +01:00
jeromecoutant 7dd31d0319 STM32G0: move TOOLCHAIN files to Sub-family level 2020-01-07 16:00:40 +01:00
jeromecoutant fd52eb46d1 STM32G0: move files to TARGET_STM32G0/STM32Cube_FW 2020-01-07 16:00:16 +01:00
jeromecoutant 6875d0318e STM32G0: move files to TARGET_STM32G0/STM32Cube_FW/CMSIS 2020-01-07 15:57:04 +01:00
jeromecoutant f322d87d43 STM32G0: move files to TARGET_STM32G0/STM32Cube_FW/STM32G0xx_HAL_Driver 2020-01-07 15:56:19 +01:00
Leon Lindenfelser 94ead7adb2 Minor fixes for peripheral pins on Dragonfly Nano 
1. PG8 should be labeled I2C3 not I2C1.
2. PC0 is dedicated to measuring system voltage.
 2020-01-07 08:52:34 -06:00
Martin Kojtal 5d71e69f6a
Merge pull request #12186 from mprse/fix_for_issue_12172_stm_serial 
STM serial init: Set pin function only if pin is defined (not NC)
 2020-01-07 11:38:00 +01:00
Przemyslaw Stekiel 79d16ae8f7 STM serial init: Set pin function only if pin is defined (not NC) 2020-01-03 14:14:26 +01:00
Martin Kojtal fc2a71064d
Merge pull request #12068 from rajkan01/feature_bare_metal 
Enabling small C library option and deprecating uARM toolchain
 2020-01-03 11:35:48 +00:00
Antti Kauppila e29cb193ca Added missing define for Quectel UG96 2019-12-27 16:04:10 +01:00
Antti Kauppila ca7848d854 Refactored away onboard_modem_api because it is not needed at all 
All targets must implement soft_- and hard_power_on/off() functions which are practically same what onboard_modem_api offered.
These were seen as a duplicate features and therefore we removed this.
All targets involved have been updated to reflect the changes
 2019-12-27 16:04:10 +01:00
jeromecoutant 5cedd3320c STM32F0: clean main-thread-stack-size setting 2019-12-23 12:29:40 +01:00
jeromecoutant c27c03c784 STM32 remove unused INITIAL_SP macro 2019-12-23 12:29:40 +01:00
Przemyslaw Stekiel 7202b77834 STM SPI capabilities: rx/tx buffers can have different sizes 2019-12-20 12:56:11 +01:00
Martin Kojtal 7609eb4741
Merge pull request #12113 from mprse/can_init_fix 
Fix for issue #12104 (STM32 can_init_freq() ignores frequency)
 2019-12-20 11:24:05 +01:00
Rajkumar Kanagaraj 957dca2082 Enabling small C library option and deprecating uARM toolchain 
- By default, Mbed OS build tools use standard C library for all supported toolchains.
   It is possible to use smaller C libraries by overriding the "target.default_lib" option
   with "small". This option is only currently supported for the GCC_ARM toolchain.
   This override config option is now extended in the build tool for ARM toolchain.
 - Add configuration option to specify libraries supported for each toolchain per targets.
 - Move __aeabi_assert function from rtos to retarget code so it’s available for bare metal.
 - Use 2 memory region model for ARM toolchain scatter file for the following targets:
   NUCLEO_F207ZG, STM32F411xE, STM32F429xI, NUCLEO_L073RZ, STM32F303xE
 - Add a warning message in the build tools to deprecate uARM toolchain.
 - NewLib-Nano C library is not supporting floating-point and printf with %hhd,%hhu,%hhX,%lld,%llu,%llX
   format specifier so skipping those green tea test cases.
 2019-12-19 10:05:11 -08:00
Anna Bridge bef36f5f3e
Merge pull request #12093 from ABOSTM/SUPPORT_NUCLEO_G071RB 
TARGET_STM: add support of board NUCLEO_G071RB
 2019-12-19 15:26:08 +00:00
Przemyslaw Stekiel fffc30ffda STM CAN: remove CAN_INIT_DIRECT macro 2019-12-18 10:43:55 +01:00
Anna Bridge b1b0673622
Merge pull request #12086 from ABOSTM/FLASH_API_64B_ALIGNMENT 
TARGET_STM: fix flash api 64bit address alignment on L4 and WB
 2019-12-17 16:46:21 +00:00
Anna Bridge 8b0a5c2e4b
Merge pull request #12099 from J91Olivier/stm32f4_baud_rate_calculation_fix 
Implemented recommended fix from https://github.com/STMicroelectronic…
 2019-12-17 16:27:19 +00:00
Anna Bridge 378f8c2b26
Merge pull request #12067 from jeromecoutant/PR_IRQ_CRITICAL 
STM32 GPIO IRQ : add a critical section in gpio_irq_init
 2019-12-17 16:23:44 +00:00
Przemyslaw Stekiel e0e280aeaf optimize can_init(): call can_init_freq() with default freq 2019-12-16 14:09:54 +01:00
Przemyslaw Stekiel 6a3e343ec6 Fix for issue #12104 (STM32 can_init_freq() ignores frequency) 2019-12-16 13:16:51 +01:00
jaco.olivier ef5da02a68 Implemented recommended fix from https://github.com/STMicroelectronics/STM32CubeF4/issues/5 2019-12-13 10:48:38 +02:00
Alexandre Bourdiol 7c52aa59ec TARGET_STM: add support of board NUCLEO_G071RB 2019-12-12 14:00:04 +01:00
Alexandre Bourdiol 9e3ad13d5e TARGET_STM: fix flash api 64bit address alignment on L4 and WB 2019-12-11 18:32:42 +01:00
Martin Kojtal 06da49984f
Merge pull request #12069 from jeromecoutant/PR_ASTYLE 
STM32: astyle update
 2019-12-11 08:01:19 +01:00
jeromecoutant 9317bea756 STM32 GPIO INIT in critical section 
critical section added in gpio_irq init and free functions
to protect shared code structures

Note that other functions are protected in API level in InterruptIn
 2019-12-10 15:59:56 +01:00
Martin Kojtal 22ab94a1c9 TARGET_STM32F74: fix IAR SIZE check in linker scripts 2019-12-10 14:09:38 +00:00
Martin Kojtal e27f456a29 STM32F756xG: fix IAR RAM size check 2019-12-10 14:09:37 +00:00
jeromecoutant bea83d02c2 STM32 TARGET_STM astyle corrections 2019-12-10 14:39:47 +01:00
Martin Kojtal e9cb9cb014
Merge pull request #12018 from jeromecoutant/PR_OLIMEX_EMAC 
STM32_EMAC cleanup
 2019-12-05 14:03:46 +01:00
Martin Kojtal a4dbf63dc3
Merge pull request #12029 from jeromecoutant/PR_F091 
STM32F0: create STM32F091xC target
 2019-12-05 08:22:32 +01:00
jeromecoutant 1a3673ee52 STM32F0: create STM32F091xC target 2019-12-04 15:03:46 +01:00
Martin Kojtal bbf68d7272
Merge pull request #11983 from u-blox/ublox_odin_driver_os_5_v3.7.1_rc3 
Ublox Odin Driver OS 5 v3.7.1 rc3: Network-WiFi Test Crash Fixes
 2019-12-04 10:12:11 +01:00
jeromecoutant bdbec57447 STM32F407 configuration cleanup 2019-12-03 14:48:48 +01:00
hamza-ubx 506e2ef8c7 Fixed Alignment 2019-12-02 19:44:16 +05:00
Kevin Bracey fe22bc023e Update HAL CRC API 
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
 2019-12-02 14:45:37 +02:00
Martin Kojtal 48f544f9e4
Merge pull request #11980 from jeromecoutant/PR_L4R9I 
DISCO_L4R9I: update clock configuration for all clock sources
 2019-12-02 11:23:51 +01:00
Hamza Rizwan c15320d48e Fixes for Network WiFi Test Crashes 2019-11-29 14:52:25 +05:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS 
DISCO_H747I: add support of MBED_TICKLESS
 2019-11-29 09:48:09 +01:00
Martin Kojtal a656f51d07
Merge pull request #11963 from jeromecoutant/PR_USB_L4 
STM32 USB : Add __HAL_RCC_PWR_CLK_ENABLE
 2019-11-29 09:45:44 +01:00
jeromecoutant 354913a45e DISCO_L4R9I: correct clock tree for all clock sources 2019-11-28 16:29:11 +01:00
Przemyslaw Stekiel 2e793842d8 STM QSPI driver: return init status, fix pin function setting 2019-11-28 12:41:40 +01:00
Przemyslaw Stekiel b2dad08387 Change explicit pinmap to static pinmap 2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel e3a34a57e1 Move GPIO_AF_NONE from PeripheralPins.h to PinNamesTypes.h 2019-11-28 08:32:10 +01:00
Przemyslaw Stekiel b35579ba39 NUCLEO_F429ZI add CAN pinmaps 2019-11-28 08:32:07 +01:00
Przemyslaw Stekiel 6489bb7c99 STM: Add support for internal ADC pins 2019-11-28 08:32:06 +01:00
Przemyslaw Stekiel 42b2eeede9 NUCLEO_F303RE: Add explicit pinmap support 2019-11-28 08:32:06 +01:00
Przemyslaw Stekiel a2320f2e5c NUCLEO_L073RZ: Add explicit pinmap support 2019-11-28 08:32:05 +01:00
Przemyslaw Stekiel 2855e801cb NUCLEO_F411RE: Add explicit pinmap support 2019-11-28 08:32:05 +01:00
Przemyslaw Stekiel dc26390d08 DISCO_L475VG_IOT01A: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Przemyslaw Stekiel 31f99416ae STM QSPI driver: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Przemyslaw Stekiel c8a80bbcd3 STM CAN driver: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Przemyslaw Stekiel ba12228556 Explicit pinmap: Fix build failures reported by CI 2019-11-28 08:32:03 +01:00
Przemyslaw Stekiel d75cc97d80 Explicit pinmap - fix style 2019-11-28 08:32:02 +01:00
Przemyslaw Stekiel 17c1b9a860 Fix spelling error 2019-11-28 08:32:02 +01:00
Przemyslaw Stekiel 7b0ceb0140 NUCLEO_F429ZI: Add constexpr pinmap tables 2019-11-28 08:32:01 +01:00
Przemyslaw Stekiel 3d719f7e35 K64F, NUCLEO_F429ZI: Use explicit pinmap for console 2019-11-28 08:32:00 +01:00
Przemyslaw Stekiel 3d2bebde0c STM32 serial driver: Add explicit pinmap support 2019-11-28 08:32:00 +01:00
Przemyslaw Stekiel 2185e80e08 STM32F4 I2C driver: Add explicit pinmap support 2019-11-28 08:31:59 +01:00
Przemyslaw Stekiel eab08d7047 STM32F4 Analogout driver: Add explicit pinmap support 2019-11-28 08:31:58 +01:00
Przemyslaw Stekiel b22cc4a032 STM32F4 Analogin driver: Add explicit pinmap support 2019-11-28 08:31:57 +01:00
Przemyslaw Stekiel ce4a943350 STM PWM driver: Add explicit pinmap support 2019-11-28 08:31:56 +01:00
Przemyslaw Stekiel ca80cd22f7 STM SPI driver: Add explicit pinmap support 2019-11-28 08:31:55 +01:00
Martin Kojtal a1cddbae5f
Merge pull request #11938 from LMESTM/stm32_serial_clear_rxne 
STM32: Update and align serial_clear implementations
 2019-11-27 16:30:11 +01:00
jeromecoutant c5ffd40aa6 STM3 USB : Add __HAL_RCC_PWR_CLK_ENABLE 2019-11-27 16:25:10 +01:00
Alexandre Bourdiol f36982cc97 TARGET_STM: STM32H7 HAL_RCC_OscConfig update in PLL configuration 
port fix #5896 on STM32H7 Cube HAL
ST internal ticket 42806 not yet released for STM32H7
 2019-11-27 14:26:02 +01:00
Alexandre Bourdiol df7431df81 TARGET_STM: Improve H747 dual core Deepsleep robustness 2019-11-27 14:25:53 +01:00
Alexandre Bourdiol affe7113ef TARGET_STM: Remove timeout on HSEM. 
With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)
 2019-11-27 14:25:43 +01:00
Alexandre Bourdiol 41b038a028 TARGET_STM: rework hal_sleep management to be compatible with all STM32 families 2019-11-27 14:25:30 +01:00
Alexandre Bourdiol e83a8abdcb targets: DISCO_H747I add support of MBED_TICKLESS 2019-11-27 14:16:15 +01:00
Martin Kojtal 5f7ecea00b
Revert "MbedCRC and CRC HAL revisions" 2019-11-26 13:45:37 +00:00
Laurent Meunier f20529f9e6 STM32: Update and align serial_clear implementations 
Clear RXNE flag by reading the RX register and align this implementation
on all families.
 2019-11-25 14:55:32 +01:00
Martin Kojtal 1a2ecebc62
Merge pull request #11881 from hugueskamba/hk-UBLOX_EVK_ODIN_W2-enable-baremetal 
UBLOX_EVK_ODIN_W2: Fix baremetal build and greentea tests
 2019-11-25 08:40:33 +01:00
Martin Kojtal cc120f3cd0
Merge pull request #11870 from jeromecoutant/PR_F7_LINKER 
STM32F7: linker scripts updates
 2019-11-22 13:50:16 +01:00
Hugues Kamba 157d126769 UBLOX_EVK_ODIN_W2: Fix baremetal build and greentea tests 
Remove lwIP reliant networking and BLE tests for baremetal

Mbed OS 5 ported lwIP in its OS mode and uses threads. Networking
that rely on lwIP needs to be removed so it can be compiled with the
baremetal profile.

The BLE cordio Greentea tests are also disabled given that the feature
is not supported without an RTOS.
 2019-11-22 10:55:39 +00:00
jeromecoutant 82a962864c STM32F7: linker scripts updates 
- license header
- DTCM RAM use
- alignment within the STM32F7 family
 2019-11-19 17:46:44 +01:00
Martin Kojtal fd22997b60
Merge pull request #11559 from kjbracey-arm/crc 
MbedCRC and CRC HAL revisions
 2019-11-13 18:24:04 +01:00
Kevin Bracey 1f94428a56 Update HAL CRC API 
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
 2019-11-13 14:31:49 +02:00
Adam Mitchell 6064979303
Correct PB_6/PB_7 Serial AF mapping 2019-11-12 14:16:21 +00:00
Martin Kojtal 4f6ca1512a
Merge pull request #11827 from ABOSTM/DISCO_H747I_ETHERNET_READY 
DISCO STM32H747I ETHERNET support, but disabled.
 2019-11-11 16:56:36 +01:00
jeromecoutant 7fcedd20e1 DISCO STM32H747I ETHERNET support, but disabled. 
Ethernet is disabled by default,
because some hardware modifications are required on the board DISCO_H747I.
see https://os.mbed.com/teams/ST/wiki/DISCO_H747I-modifications-for-Ethernet
 2019-11-08 16:05:00 +01:00
Martin Kojtal 33e392e9d9
Merge pull request #11682 from mprse/fpga_tests_CI_targets 
Make FPGA tests to pass on CI targets (SPI, analogIn, PWM)
 2019-11-07 11:46:40 +01:00
Martin Kojtal 383cf1984d
Merge pull request #11711 from jeromecoutant/PULL_REQUEST_CUBE_UPDATE_F7_V1.15.0 
STM32F7 update drivers version to CUBE V1.15.0
 2019-11-07 11:33:38 +01:00
Martino Facchin 8daa2d72ba [USB][STM32] Don't wrap direct function calls in MBED_ASSERT 
dab09f3138 added checks on some functions in the form of MBED_ASSERT on the result.
Compiling with -NDEBUG elides the call, thus breaking the functionality

This patch restores it, while leaving the return check if compiled with standard profile.
 2019-11-06 15:01:48 +01:00
jeromecoutant 7847ad79fb STM32F7 HAL CRYPT patch to add missing UNLOCK 2019-11-05 11:46:13 +01:00
jeromecoutant c6fdd4efb6 STM32H7 FLASH API issue with M4 core 2019-11-05 10:25:43 +01:00
Martin Kojtal a927ab8f7c
Merge pull request #11789 from jeromecoutant/PR_STM32H7 
STM32H7: code and feature alignment for both NUCLEO and DISCO targets
 2019-11-04 09:48:09 +01:00
jeromecoutant 356de44aed STM32F7 ARM SCT file update to define correct RAM_SIZE 2019-10-31 17:46:11 +01:00
jeromecoutant 4f788adeb9 STM32F7 refactor common files 2019-10-31 17:46:10 +01:00
jeromecoutant 52bfd0c99a STM32F7 updates for new driver version 2019-10-31 17:45:58 +01:00
jeromecoutant 8ac918975f F7 ST CUBE V1.10.0 => V1.15.0 
https://www.st.com/en/embedded-software/stm32cubef7.html
 2019-10-31 17:43:18 +01:00
jeromecoutant c7ca6f731c STM32H7 linker script files alignment 2019-10-31 14:59:18 +01:00
jeromecoutant 21ff11c3d3 STM32H7 alignment within family 
- license header update
- STMOD+ connector pin addition
- update pin comment for Ethernet connector issue (DISCO_H747I)
- align files for each target
 2019-10-31 14:38:37 +01:00
Martin Kojtal eea83007be
Merge pull request #11203 from Tharazi97/Watchdog_lower_limit_timeout_test 
Add watchdog lower limit timeout test
 2019-10-31 14:25:52 +01:00
jeromecoutant 0c740e7095 STM32H7: update PeripheralPin generation script and pin files accordingly 2019-10-31 14:11:00 +01:00
jeromecoutant d7d0d0b8cb STM32H7 FLASH and DEVICE_KEY 
- Enable FLASHIAP for all H7 boards
- Use "TDB_INTERNAL" for all H7 boards
- Define specific internal_base_address only for DISCO_H747I_CM7
  (default address is the end of FLASH which is correct for other H7 boards)
- Correct GetSectorBase function with Dual Bank information
 2019-10-31 13:04:49 +01:00
Martin Kojtal 73b4f717be
Merge pull request #11759 from LMESTM/stm_qspi_address 
STM32 QSPI: Use defines for setting address size
 2019-10-31 10:38:58 +01:00
Przemyslaw Stekiel ee519e6a5c NUCLEO_F411RE, NUCLEO_L073RZ, NUCLEO_F303RE: Disable Analogin D13(PA_5) pin. 
Analogin test fails on D13(PA_5) pin. When logic one (3.3V) is provided on this pin ADC reads 0.86 value. On other pins we got 0.98.
This is caused because this pin is connected to led2.
 2019-10-30 14:34:57 +01:00
Janne Kiiskila a48500183e Fix for the H747 flash driver / cache cleaning 
This copies the approach of the STM32F7 flash driver submitted via
PR https://github.com/ARMmbed/mbed-os/pull/10248

With this change the board finally passes all of the device key
tests 10/10 times correctly.
 2019-10-30 15:25:20 +02:00
Martin Kojtal a07286676b
Merge pull request #11756 from JammuKekkonen/add_ccmram_section_for_f303re 
Add option to use CCMRAM on F303xE.
 2019-10-30 09:10:42 +01:00
Jammu Kekkonen 4dc4bfff9a Add option to use CCMRAM on F303xE. 2019-10-29 12:54:27 +02:00
Laurent Meunier 28c908fdef STM32 QSPI: Use defines for setting address size 2019-10-28 15:38:53 +01:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1 
STM32 USB update step 1
 2019-10-28 14:06:15 +01:00
Martin Kojtal 8637069b36
Merge pull request #11698 from kjbracey-arm/armstack 
Clean up ARM toolchain heap+stack setup in targets
 2019-10-24 11:37:11 +02:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets 
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
 2019-10-23 14:53:49 +03:00
Martin Kojtal 9db54bc1ee
Merge pull request #11672 from ABOSTM/I2C_FASTMODEPLUS 
STM32F767ZI - I2C FastModePlus not properly enabled
 2019-10-22 09:46:16 +02:00
jeromecoutant dab09f3138 STM32 USB redesign step 1 
No more need to explicitly configure each targets.
Pins are now defined in the PeripheralPin.c file which is build by a script.
 2019-10-21 17:12:03 +02:00
jeromecoutant 01e798fd6a STM32 clock configuration depending on USB 2019-10-21 17:11:59 +02:00
jeromecoutant 0e1a04b64a STM32WB USB pins addition 2019-10-21 17:11:57 +02:00
jeromecoutant 03dd8d3e22 STM32L4 USB pins addition 2019-10-21 17:11:55 +02:00
jeromecoutant 2c03f3a61e STM32L1 USB pins addition 2019-10-21 17:11:53 +02:00
jeromecoutant a54fdf7585 STM32L0 USB pins addition 2019-10-21 17:11:52 +02:00
jeromecoutant 40739d3b8f STM32H7 USB pins addition 2019-10-21 17:11:50 +02:00
jeromecoutant 905f81851a STM32F7 USB pins addition 2019-10-21 17:11:49 +02:00
jeromecoutant 6f0932033b STM32F4 USB pins addition 2019-10-21 17:11:27 +02:00
jeromecoutant 6986daac61 STM32F3 USB pins addition 2019-10-21 14:49:19 +02:00
jeromecoutant 9b3cdd0972 STM32F2 USB pins addition 2019-10-21 14:49:19 +02:00
jeromecoutant 6e3dc7b173 STM32F1 USB pins addition 2019-10-21 14:49:18 +02:00
jeromecoutant 66dea7b5da STM32F0 USB pins addition 2019-10-21 14:49:18 +02:00
jeromecoutant 5afd9ebb60 STM32 PeripheralPins.h update with USB 2019-10-21 14:49:18 +02:00
Martin Kojtal cd415cfb41
Merge pull request #11708 from ABOSTM/FIX_SPI_COMPILATION_WARNING 
TARGET_STM: remove warning and fix typo on SPI
 2019-10-21 09:40:23 +02:00
Martin Kojtal 42cb19b6d8
Merge pull request #11679 from jeromecoutant/PR_L4_TRNG 
STM32L4 TRNG clock configuration
 2019-10-21 09:39:24 +02:00
Martin Kojtal 4af05bb370
Merge pull request #11648 from rohfle/target-olimex-stm32e407 
OLIMEX_STM32E407_F407ZG: Added new target platform
 2019-10-18 16:05:05 +02:00
Martin Kojtal d851a63e46
Merge pull request #11602 from kyle-cypress/pr/qspi-arbitrary-alt-size 
Allow for arbitrary QSPI alt sizes
 2019-10-18 15:48:16 +02:00
Martin Kojtal 8ff5cf9216
Merge pull request #11700 from toyowata/arch_max_bootloader 
Add bootloader support for Seeed Arch-MAX
 2019-10-18 10:32:00 +02:00
Alexandre Bourdiol bca9d9500e TARGET_STM: remove warning and fix typo on SPI 2019-10-18 09:48:30 +02:00
Rohan Fletcher 4b971fbb8f OLIMEX_STM32E407_F407ZG: Added definitions for missing LEDs 2019-10-18 06:37:09 +13:00
Martin Kojtal dba8e77b8c
Merge pull request #11688 from LMESTM/Clearing_UART_TC_Flag_prevents_deepsleep 
Clearing UART TC Flag prevents deep sleep, so do not clear it
 2019-10-17 14:17:15 +02:00
jeromecoutant 7db11e0b20 STM32 TRNG clock configuration 2019-10-17 13:51:33 +02:00
toyowata 5389536953 Add bootloader support for Seeed Arch-MAX 2019-10-17 10:05:03 +09:00
Kyle Kearney 8e9877c212 Update STM driver changes for clarity 
- Use a switch statement rather than shifting and masking to compute
  the AlternateBytes value.
- Rename rounded_size to alt_bytes to clarify its purpose.
 2019-10-16 09:37:27 -07:00
Martin Kojtal 16568da47f
Merge pull request #11605 from ABOSTM/DISCO_H747I_DUALCORE_SUPPORT 
DISCO_H747I dualcore support
 2019-10-16 17:35:25 +08:00
Laurent Meunier e862438fad Clearing UART TC Flag prevents deep sleep, so do not clear it 
The TC flag is used in function serial_is_tx_ongoing to check if there is
an ongoing serial transmission. So this Flag must not be cleared at the
end of the transmission, otherwise, serial_is_tx_ongoing will notify that
TX is ongoing.

The impact is that it may prevent deep sleep to be entered.

Also there is no need to clear this flag at the end of the transaction
because it will be cleared automatically by HW when a new transmission
starts.
 2019-10-15 15:59:51 +02:00
Alexandre Bourdiol 728a1c4383 STM32F767ZI - I2C FastModePlus not properly enabled 2/2 
Warning: sometimes I2C_FASTMODEPLUS_I2Cx is defined,
even if not supported by some chip within the family
 2019-10-15 13:46:29 +02:00
Janne Kiiskila 02c139f27a stm32f4xx_hal_pcd.c@346,22: unused variable 'ep' 
Compiler warning fix, trivial. One function has an unused
variable, delete that line.
 2019-10-15 09:49:09 +03:00
Alexandre Bourdiol 6397a1d555 Mbed patch of STM32cube for bootloader: use NVIC_FLASH_VECTOR_ADDRESS 2019-10-14 18:03:47 +02:00
Alexandre Bourdiol 02cdac5fe3 Update HAL/LL EXTI to have default API applied on current core and nott CPU1 2019-10-14 18:03:28 +02:00
Alexandre Bourdiol 48aba33204 SystemCoreClock should correspond to current core clock and not D1 clock. 2019-10-14 18:03:06 +02:00
Alexandre Bourdiol adcf0e2fa5 DISCO_H747I Dualcore support 
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I      -> for CM7 core
* DISCO_H747I_CM4  -> for CM4 core

Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)

Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.

Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
         In order to flash CM4, one can use STM32 CubeProgrammer tool.
 2019-10-14 18:02:57 +02:00
Martin Kojtal 8ff444ff80
Merge pull request #11621 from jeromecoutant/PR_L1_VREFINT_CAL_ADDR 
STM32L151: update calibration memory address
 2019-10-14 09:23:16 +02:00
Martin Kojtal 379787a127
Merge pull request #11626 from jeromecoutant/PR_DISCO_L4R_STMOD 
DISCO_L4R9I: update default STMOD+ pin
 2019-10-14 09:22:35 +02:00
Anna Bridge 489c30f569
Merge pull request #11297 from kyle-cypress/pr/qspi-dummy-cycles 
Differentiate alt and dummy cycles in QSPIF
 2019-10-11 14:34:17 +01:00
Alexandre Bourdiol 66765332e0 STM32F767ZI - I2C FastModePlus not properly enabled 
Fixes #11659
 2019-10-10 10:26:59 +02:00
Rohan Fletcher 02df759c37 OLIMEX_STM32E407_F407ZG: Added new target platform 
Added Olimex STM32-E407 (STM32F407ZG) evaluation board.
USB, UART, External HS XTAL and Ethernet are all working correctly.
 2019-10-10 09:20:28 +13:00
Anna Bridge f1295b9aa7
Merge pull request #11573 from felser/add_413_dragonfly 
Add 413 dragonfly
 2019-10-07 16:48:07 +01:00
jeromecoutant fc5b91a36f DISCO_L4R9I: update default STMOD+ pin 2019-10-07 16:01:16 +02:00
jeromecoutant 1673e8aa1b STM32L151: update calibration memory address 2019-10-03 14:17:04 +02:00
Kyle Kearney 9b32c0f316 Fix possible negative QSPI alt count on STM 
Remove an extraneous decrement operation in cases where the alt
bits size is a multiple of 8.
 2019-09-30 16:00:24 -07:00
Matthew Macovsky baf375f8cb Allow for arbitrary QSPI alt sizes 
The QSPI spec allows alt to be any size that is a multiple of the
number of data lines. For example, Micron's N25Q128A uses only a
single alt cycle for all read modes (1, 2, or 4 bits depending on
how many data lines are in use).
 2019-09-30 14:45:08 -07:00
Ben Cooke dd778c4126 Add MTS_DRAGONFLY_F413RH platform to mbed-os 2019-09-30 13:50:40 -05:00
int_szyk f892ae7f1e Add watchdog clock accuracy to STM targets. 2019-09-30 08:10:24 +02:00
jeromecoutant fff88617b7 STM32H7 ST CUBE V1.5.0 update 2019-09-27 11:39:06 +02:00
Martin Kojtal fff888b118
Merge pull request #11562 from VVESTM/vve_h7_memmap 
STM32H7: memory relocation
 2019-09-26 14:01:23 +02:00
jeromecoutant 8c1f94f7cb STM32WB : LSI clock selection when LSE is not available 2019-09-19 13:07:54 +02:00
jeromecoutant 5cfee65881 STM32H7: LSI clock selection when LSE is not available 2019-09-19 13:07:54 +02:00
Martin Kojtal 83fca603f0
Merge pull request #11454 from Tharazi97/LSI_VALUE_STM 
ST: Change the LSI_VALUE according to documentation
 2019-09-18 13:49:38 +02:00
Vincent Veron 82e89add61 STM32H7 : use RAM instead of DTCMRAM (GCC_ARM toolchain) 2019-09-18 10:57:21 +02:00