mirror of https://github.com/ARMmbed/mbed-os.git
STM32 : enable MBED trace for QSPI
parent
829a3cded3
commit
9977ace2c9
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@ -1,29 +1,19 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2017, ARM Limited
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* All rights reserved.
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/*
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* Copyright (c) 2017, Arm Limited and affiliates.
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* Copyright (c) 2017, STMicroelectronics.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#if DEVICE_QSPI
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@ -35,7 +25,15 @@
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#include "pinmap.h"
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#include "PeripheralPins.h"
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// activate / de-activate debug
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#include "mbed-trace/mbed_trace.h"
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#if defined(OCTOSPI1)
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#define TRACE_GROUP "STOS"
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#else
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#define TRACE_GROUP "STQS"
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#endif /* OCTOSPI1 */
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// activate / de-activate extra debug
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#define qspi_api_c_debug 0
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/* Max amount of flash size is 4Gbytes */
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@ -389,7 +387,7 @@ qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_
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static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
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#endif
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{
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debug_if(qspi_api_c_debug, "qspi_init mode %u\n", mode);
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tr_info("qspi_init mode %u", mode);
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// Reset handle internal state
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obj->handle.State = HAL_OSPI_STATE_RESET;
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@ -488,7 +486,7 @@ static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap,
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}
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if (HAL_OSPIM_Config(&obj->handle, &OSPIM_Cfg_Struct, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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debug_if(qspi_api_c_debug, "HAL_OSPIM_Config error\n");
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tr_error("HAL_OSPIM_Config error");
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return QSPI_STATUS_ERROR;
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}
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#endif
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@ -535,7 +533,7 @@ qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_
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static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
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#endif
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{
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debug_if(qspi_api_c_debug, "qspi_init mode %u\n", mode);
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tr_info("qspi_init mode %u", mode);
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// Enable interface clock for QSPI
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__HAL_RCC_QSPI_CLK_ENABLE();
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@ -632,7 +630,7 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
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#if defined(OCTOSPI1)
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qspi_status_t qspi_free(qspi_t *obj)
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{
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debug_if(qspi_api_c_debug, "qspi_free\n");
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tr_info("qspi_free");
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if (HAL_OSPI_DeInit(&obj->handle) != HAL_OK) {
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return QSPI_STATUS_ERROR;
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}
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@ -664,6 +662,8 @@ qspi_status_t qspi_free(qspi_t *obj)
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#else /* OCTOSPI */
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qspi_status_t qspi_free(qspi_t *obj)
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{
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tr_info("qspi_free");
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if (HAL_QSPI_DeInit(&obj->handle) != HAL_OK) {
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return QSPI_STATUS_ERROR;
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}
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@ -699,7 +699,7 @@ qspi_status_t qspi_free(qspi_t *obj)
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#if defined(OCTOSPI1)
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qspi_status_t qspi_frequency(qspi_t *obj, int hz)
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{
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debug_if(qspi_api_c_debug, "qspi_frequency hz %d\n", hz);
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tr_info("qspi_frequency hz %d", hz);
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qspi_status_t status = QSPI_STATUS_OK;
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/* HCLK drives QSPI. QSPI clock depends on prescaler value:
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@ -721,7 +721,7 @@ qspi_status_t qspi_frequency(qspi_t *obj, int hz)
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obj->handle.Init.ClockPrescaler = div;
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if (HAL_OSPI_Init(&obj->handle) != HAL_OK) {
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debug_if(qspi_api_c_debug, "HAL_OSPI_Init error\n");
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tr_error("HAL_OSPI_Init error");
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status = QSPI_STATUS_ERROR;
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}
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@ -730,7 +730,7 @@ qspi_status_t qspi_frequency(qspi_t *obj, int hz)
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#else /* OCTOSPI */
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qspi_status_t qspi_frequency(qspi_t *obj, int hz)
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{
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debug_if(qspi_api_c_debug, "qspi_frequency hz %d\n", hz);
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tr_info("qspi_frequency hz %d", hz);
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qspi_status_t status = QSPI_STATUS_OK;
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/* HCLK drives QSPI. QSPI clock depends on prescaler value:
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@ -774,11 +774,11 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void
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st_command.NbData = *length;
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if (HAL_OSPI_Command(&obj->handle, &st_command, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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debug_if(qspi_api_c_debug, "HAL_OSPI_Command error\n");
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tr_error("HAL_OSPI_Command error");
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status = QSPI_STATUS_ERROR;
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} else {
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if (HAL_OSPI_Transmit(&obj->handle, (uint8_t *)data, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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debug_if(qspi_api_c_debug, "HAL_OSPI_Transmit error\n");
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tr_error("HAL_OSPI_Transmit error");
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status = QSPI_STATUS_ERROR;
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}
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}
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@ -788,6 +788,8 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void
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#else /* OCTOSPI */
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qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void *data, size_t *length)
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{
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debug_if(qspi_api_c_debug, "qspi_write size %u\n", *length);
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QSPI_CommandTypeDef st_command;
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qspi_status_t status = qspi_prepare_command(command, &st_command);
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if (status != QSPI_STATUS_OK) {
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@ -804,8 +806,6 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void
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}
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}
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debug_if(qspi_api_c_debug, "qspi_write size %u\n", *length);
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return status;
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}
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#endif /* OCTOSPI */
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@ -823,11 +823,11 @@ qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data,
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st_command.NbData = *length;
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if (HAL_OSPI_Command(&obj->handle, &st_command, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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debug_if(qspi_api_c_debug, "HAL_OSPI_Command error\n");
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tr_error("HAL_OSPI_Command error");
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status = QSPI_STATUS_ERROR;
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} else {
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if (HAL_OSPI_Receive(&obj->handle, data, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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debug_if(qspi_api_c_debug, "HAL_OSPI_Receive error\n");
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tr_error("HAL_OSPI_Receive error %d", obj->handle.ErrorCode);
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status = QSPI_STATUS_ERROR;
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}
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}
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@ -865,7 +865,8 @@ qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data,
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#if defined(OCTOSPI1)
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qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command, const void *tx_data, size_t tx_size, void *rx_data, size_t rx_size)
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{
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debug_if(qspi_api_c_debug, "qspi_command_transfer tx %u rx %u command %x\n", tx_size, rx_size, command->instruction.value);
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tr_info("qspi_command_transfer tx %u rx %u command %#04x", tx_size, rx_size, command->instruction.value);
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qspi_status_t status = QSPI_STATUS_OK;
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if ((tx_data == NULL || tx_size == 0) && (rx_data == NULL || rx_size == 0)) {
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@ -880,7 +881,7 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command,
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st_command.DataMode = HAL_OSPI_DATA_NONE; /* Instruction only */
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if (HAL_OSPI_Command(&obj->handle, &st_command, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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status = QSPI_STATUS_ERROR;
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debug_if(qspi_api_c_debug, "HAL_OSPI_Command error\n");
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tr_error("HAL_OSPI_Command error");
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return status;
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}
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} else {
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@ -889,7 +890,7 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command,
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size_t tx_length = tx_size;
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status = qspi_write(obj, command, tx_data, &tx_length);
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if (status != QSPI_STATUS_OK) {
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debug_if(qspi_api_c_debug, "qspi_write error\n");
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tr_error("qspi_write error");
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return status;
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}
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}
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@ -897,7 +898,6 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command,
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if (rx_data != NULL && rx_size) {
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size_t rx_length = rx_size;
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status = qspi_read(obj, command, rx_data, &rx_length);
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// debug_if(qspi_api_c_debug, "qspi_read %d\n", status);
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}
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}
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return status;
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@ -905,7 +905,7 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command,
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#else /* OCTOSPI */
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qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command, const void *tx_data, size_t tx_size, void *rx_data, size_t rx_size)
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{
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debug_if(qspi_api_c_debug, "qspi_command_transfer tx %u rx %u command %x\n", tx_size, rx_size, command->instruction.value);
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tr_info("qspi_command_transfer tx %u rx %u command %#04x", tx_size, rx_size, command->instruction.value);
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qspi_status_t status = QSPI_STATUS_OK;
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if ((tx_data == NULL || tx_size == 0) && (rx_data == NULL || rx_size == 0)) {
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