mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #12409 from LMESTM/Fix_lpuart_deep_sleep
FIX: LPUART clock source selection should be left to serial driverpull/12431/head
commit
7658681a9e
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@ -177,13 +177,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* Select HSI as clock source for LPUART1 */
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RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
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RCC_PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
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if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
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return 0; // FAIL
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}
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// Output clock on MCO1 pin(PA8) for debugging purpose
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#if DEBUG_MCO == 2
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if (bypass == 0) {
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@ -259,13 +252,6 @@ uint8_t SetSysClock_PLL_HSI(void)
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* Select HSI as clock source for LPUART1 */
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RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
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RCC_PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
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if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
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return 0; // FAIL
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}
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// Output clock on MCO1 pin(PA8) for debugging purpose
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#if DEBUG_MCO == 3
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HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
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@ -331,13 +317,6 @@ uint8_t SetSysClock_PLL_MSI(void)
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return 0; // FAIL
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}
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/* Select LSE as clock source for LPUART1 */
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
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PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_LSE;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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return 0; // FAIL
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}
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// Output clock on MCO1 pin(PA8) for debugging purpose
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#if DEBUG_MCO == 4
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HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_MSI, RCC_MCODIV_2); // 2 MHz
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