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TARGET_STM: rework hal_sleep management to be compatible with all STM32 families

pull/11950/head
Alexandre Bourdiol 2019-11-27 14:25:30 +01:00
parent e83a8abdcb
commit 41b038a028
12 changed files with 27 additions and 3 deletions
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8
targets/TARGET_STM/TARGET_STM32F0/common_objects.h
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@ -36,6 +36,7 @@
#include "PinNames.h"
#include "stm32f0xx_ll_usart.h"
#include "stm32f0xx_ll_tim.h"
#include "stm32f0xx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {
@ -119,6 +120,13 @@ struct analogin_s {
uint8_t channel;
};
#ifdef CRC_PROG_POLYNOMIAL_SUPPORT
#define HAL_CRC_IS_SUPPORTED(polynomial, width) ((width) == 7 || (width) == 8 || (width) == 16 || (width) == 32)
#else
#define HAL_CRC_IS_SUPPORTED(polynomial, width) ((width) == 32 && (polynomial) == 0x04C11DB7)
#endif
#include "gpio_object.h"
#if DEVICE_ANALOGOUT

1
targets/TARGET_STM/TARGET_STM32F1/common_objects.h
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@ -36,6 +36,7 @@
#include "PinNames.h"
#include "stm32f1xx_ll_usart.h"
#include "stm32f1xx_ll_tim.h"
#include "stm32f1xx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {

1
targets/TARGET_STM/TARGET_STM32F2/objects.h
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@ -36,6 +36,7 @@
#include "PinNames.h"
#include "stm32f2xx_ll_usart.h"
#include "stm32f2xx_ll_tim.h"
#include "stm32f2xx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {

1
targets/TARGET_STM/TARGET_STM32F3/common_objects.h
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@ -36,6 +36,7 @@
#include "PinNames.h"
#include "stm32f3xx_ll_usart.h"
#include "stm32f3xx_ll_tim.h"
#include "stm32f3xx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {

1
targets/TARGET_STM/TARGET_STM32F4/common_objects.h
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@ -36,6 +36,7 @@
#include "PinNames.h"
#include "stm32f4xx_ll_usart.h"
#include "stm32f4xx_ll_tim.h"
#include "stm32f4xx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {

1
targets/TARGET_STM/TARGET_STM32F7/common_objects.h
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@ -38,6 +38,7 @@
#include "stm32f7xx_ll_tim.h"
#include "stm32f7xx_ll_adc.h"
#include "stm32f7xx_ll_rtc.h"
#include "stm32f7xx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {

2
targets/TARGET_STM/TARGET_STM32H7/objects.h
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@ -40,9 +40,9 @@
#if defined(DUAL_CORE)
#include "stm32h7xx_ll_hsem.h"
#include "stm32h7xx_ll_rcc.h"
#include "stm32h7xx_ll_pwr.h"
#include "stm32h7xx_ll_cortex.h"
#endif /* CONFIG_STM32H7_DUAL_CORE */
#include "stm32h7xx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {

1
targets/TARGET_STM/TARGET_STM32L0/common_objects.h
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@ -36,6 +36,7 @@
#include "PinNames.h"
#include "stm32l0xx_ll_usart.h"
#include "stm32l0xx_ll_tim.h"
#include "stm32l0xx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {

1
targets/TARGET_STM/TARGET_STM32L1/common_objects.h
View File

@ -36,6 +36,7 @@
#include "PinNames.h"
#include "stm32l1xx_ll_usart.h"
#include "stm32l1xx_ll_tim.h"
#include "stm32l1xx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {

1
targets/TARGET_STM/TARGET_STM32L4/common_objects.h
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@ -38,6 +38,7 @@
#include "stm32l4xx_ll_lpuart.h"
#include "stm32l4xx_ll_tim.h"
#include "stm32l4xx_ll_rtc.h"
#include "stm32l4xx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {

1
targets/TARGET_STM/TARGET_STM32WB/common_objects.h
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@ -38,6 +38,7 @@
#include "PinNames.h"
#include "stm32wbxx_ll_usart.h"
#include "stm32wbxx_ll_tim.h"
#include "stm32wbxx_ll_pwr.h"
#ifdef __cplusplus
extern "C" {

11
targets/TARGET_STM/sleep.c
View File

@ -135,7 +135,7 @@ void hal_sleep(void)
core_util_critical_section_enter();
// Request to enter SLEEP mode
#ifdef PWR_CR1_LPR
#if defined(PWR_CR1_LPR)
// State Transitions (see 5.3 Low-power modes, Fig. 13):
// * (opt): Low Power Run (LPR) Mode -> Run Mode
// * Run Mode -> Sleep
@ -145,7 +145,14 @@ void hal_sleep(void)
// [5.4.1 Power control register 1 (PWR_CR1)]
// LPR: When this bit is set, the regulator is switched from main mode (MR) to low-power mode (LPR).
int lowPowerMode = PWR->CR1 & PWR_CR1_LPR;
uint32_t lowPowerMode = LL_PWR_IsEnabledLowPowerRunMode();
if (lowPowerMode) {
HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFI);
} else {
HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);
}
#elif defined(PWR_CR_LPDS) || defined(PWR_CR1_LPDS)
uint32_t lowPowerMode = LL_PWR_GetRegulModeDS();
if (lowPowerMode) {
HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFI);
} else {