mirror of https://github.com/ARMmbed/mbed-os.git
STM32F1 baremetal support
jeromecoutant
parent
794e0aa0cf
commit
96016aea17
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@ -1,56 +1,53 @@
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#! armcc -E
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; Scatter-Loading Description File
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright (c) 2016, STMicroelectronics
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions are met:
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;
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; 1. Redistributions of source code must retain the above copyright notice,
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; this list of conditions and the following disclaimer.
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; 2. Redistributions in binary form must reproduce the above copyright notice,
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; this list of conditions and the following disclaimer in the documentation
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; and/or other materials provided with the distribution.
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; 3. Neither the name of STMicroelectronics nor the names of its contributors
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; may be used to endorse or promote products derived from this software
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; without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; SPDX-License-Identifier: BSD-3-Clause
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;******************************************************************************
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;* @attention
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;*
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;* Copyright (c) 2016-2020 STMicroelectronics.
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;* All rights reserved.
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;*
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;* This software component is licensed by ST under BSD 3-Clause license,
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;* the "License"; You may not use this file except in compliance with the
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;* License. You may obtain a copy of the License at:
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;* opensource.org/licenses/BSD-3-Clause
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;*
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;******************************************************************************
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#include "../cmsis_nvic.h"
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#if !defined(MBED_APP_START)
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#define MBED_APP_START MBED_ROM_START
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#endif
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#define Stack_Size MBED_BOOT_STACK_SIZE
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE MBED_ROM_SIZE
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#endif
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LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K)
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#if !defined(MBED_BOOT_STACK_SIZE)
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/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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ER_IROM1 0x08000000 0x20000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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/* Round up VECTORS_SIZE to 8 bytes */
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#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE {
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ER_IROM1 MBED_APP_START MBED_APP_SIZE {
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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; 59 vectors (16 core + 43 peripheral) * 4 bytes = 236 bytes to reserve (0xEC) 8-byte aligned = 0xF0
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RW_IRAM1 (0x20000000+0xF0) (0x5000-0xF0-Stack_Size) { ; RW data
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.ANY (+RW +ZI)
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RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000+0x5000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)-0xF0) {
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
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}
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ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack
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ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
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}
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}
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@ -1,23 +1,51 @@
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/* Linker script to configure memory regions. */
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/* 0xEC reserved for vectors; 8-byte aligned = 0xF0 */
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/*
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016-2020 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#include "../cmsis_nvic.h"
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#if !defined(MBED_APP_START)
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#define MBED_APP_START MBED_ROM_START
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#endif
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STACK_SIZE = MBED_BOOT_STACK_SIZE;
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE MBED_ROM_SIZE
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#endif
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#if !defined(MBED_BOOT_STACK_SIZE)
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/* This value is normally defined by the tools
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to 0x1000 for bare metal and 0x400 for RTOS */
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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/* Round up VECTORS_SIZE to 8 bytes */
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#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K
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RAM (rwx) : ORIGIN = 0x200000F0, LENGTH = 20K - (0xEC+0x4)
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{
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FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
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RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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@ -48,6 +76,7 @@ SECTIONS
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{
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KEEP(*(.isr_vector))
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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@ -70,7 +99,7 @@ SECTIONS
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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@ -84,7 +113,7 @@ SECTIONS
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__etext = .;
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_sidata = .;
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.data : AT (__etext)
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{
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__data_start__ = .;
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@ -105,7 +134,6 @@ SECTIONS
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(8);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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@ -121,6 +149,19 @@ SECTIONS
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} > RAM
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/* Uninitialized data section
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* This region is not initialized by the C/C++ library and can be used to
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* store state across soft reboots. */
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.uninitialized (NOLOAD):
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{
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. = ALIGN(32);
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__uninitialized_start = .;
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*(.uninitialized)
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KEEP(*(.keep.uninitialized))
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. = ALIGN(32);
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__uninitialized_end = .;
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} > RAM
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.bss :
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{
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. = ALIGN(8);
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@ -132,13 +173,13 @@ SECTIONS
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__bss_end__ = .;
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_ebss = .;
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} > RAM
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.heap (COPY):
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{
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__end__ = .;
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end = __end__;
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PROVIDE(end = .);
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*(.heap*)
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. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
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. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
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__HeapLimit = .;
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} > RAM
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@ -154,10 +195,9 @@ SECTIONS
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* size of stack_dummy section */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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_estack = __StackTop;
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__StackLimit = __StackTop - STACK_SIZE;
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__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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}
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@ -1,35 +1,59 @@
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
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define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000;
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define symbol __ICFEDIT_region_NVIC_end__ = 0x200000F0 - 0x1;
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define symbol __ICFEDIT_region_RAM_start__ = 0x200000F0; /* 8-byte aligned (0xEC) = 0xF0 */
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define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
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/*-Sizes-*/
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/* Linker script to configure memory regions.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016-2020 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Device specific values */
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/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
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define symbol VECTORS = 59; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
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define symbol HEAP_SIZE = 0x1000;
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/* Common - Do not change */
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if (!isdefinedsymbol(MBED_APP_START)) {
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define symbol MBED_APP_START = MBED_ROM_START;
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}
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if (!isdefinedsymbol(MBED_APP_SIZE)) {
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define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
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}
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if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
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/* This value is normally defined by the tools
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to 0x1000 for bare metal and 0x400 for RTOS */
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define symbol MBED_BOOT_STACK_SIZE = 0x400;
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}
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define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
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define symbol __ICFEDIT_size_heap__ = 0x1400;
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/**** End of ICF editor section. ###ICF###*/
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/* Round up VECTORS_SIZE to 8 bytes */
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define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
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define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
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define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
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define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
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define block HEAP with alignment = 8, size = HEAP_SIZE { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place at address mem: MBED_APP_START { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite,
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block HEAP, block CSTACK };
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block CSTACK, block HEAP };
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@ -1,40 +1,39 @@
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/* mbed Microcontroller Library
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*******************************************************************************
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* Copyright (c) 2016, STMicroelectronics
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* All rights reserved.
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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* @attention
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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* This software component is licensed by ST under BSD 3-Clause license,
|
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* the "License"; You may not use this file except in compliance with the
|
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* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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******************************************************************************
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*/
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#ifndef MBED_CMSIS_NVIC_H
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#define MBED_CMSIS_NVIC_H
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// CORE: 16 vectors (= 64 bytes from 0x00 to 0x3F)
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// MCU Peripherals: 43 vectors (= 172 bytes from 0x40 to 0xEB)
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// Total: 236 bytes to be reserved in RAM (see scatter file)
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#define NVIC_NUM_VECTORS (16 + 43)
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#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
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#if !defined(MBED_ROM_START)
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#define MBED_ROM_START 0x8000000
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#endif
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#if !defined(MBED_ROM_SIZE)
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#define MBED_ROM_SIZE 0x20000 // 128 KB
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#endif
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x20000000
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x5000 // 20 KB
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#endif
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#define NVIC_NUM_VECTORS 59
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#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
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#endif
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@ -1358,6 +1358,9 @@
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"macro_name": "CLOCK_SOURCE"
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}
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},
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"overrides": {
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"tickless-from-us-ticker": true
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},
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"detect_code": [
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"0700"
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],
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