mirror of https://github.com/ARMmbed/mbed-os.git
STM QSPI driver: Add explicit pinmap support
Przemyslaw Stekiel
parent
c8a80bbcd3
commit
31f99416ae
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@ -381,7 +381,13 @@ qspi_status_t qspi_prepare_command(const qspi_command_t *command, QSPI_CommandTy
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#if defined(OCTOSPI1)
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qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, uint32_t hz, uint8_t mode)
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#if EXPLICIT_PINMAP_READY
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#define QSPI_INIT_DIRECT qspi_init_direct
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qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
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#else
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#define QSPI_INIT_DIRECT _qspi_init_direct
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static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
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#endif
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{
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OSPIM_CfgTypeDef OSPIM_Cfg_Struct = {0};
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debug_if(qspi_api_c_debug, "qspi_init mode %u\n", mode);
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@ -403,25 +409,8 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
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obj->handle.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_ENABLE;
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obj->handle.Init.ChipSelectBoundary = 0;
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QSPIName qspiio0name = (QSPIName)pinmap_peripheral(io0, PinMap_QSPI_DATA0);
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QSPIName qspiio1name = (QSPIName)pinmap_peripheral(io1, PinMap_QSPI_DATA1);
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QSPIName qspiio2name = (QSPIName)pinmap_peripheral(io2, PinMap_QSPI_DATA2);
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QSPIName qspiio3name = (QSPIName)pinmap_peripheral(io3, PinMap_QSPI_DATA3);
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QSPIName qspiclkname = (QSPIName)pinmap_peripheral(sclk, PinMap_QSPI_SCLK);
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QSPIName qspisselname = (QSPIName)pinmap_peripheral(ssel, PinMap_QSPI_SSEL);
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QSPIName qspi_data_first = (QSPIName)pinmap_merge(qspiio0name, qspiio1name);
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QSPIName qspi_data_second = (QSPIName)pinmap_merge(qspiio2name, qspiio3name);
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QSPIName qspi_data_third = (QSPIName)pinmap_merge(qspiclkname, qspisselname);
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if (qspi_data_first != qspi_data_second || qspi_data_second != qspi_data_third ||
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qspi_data_first != qspi_data_third) {
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debug_if(qspi_api_c_debug, "QSPI_STATUS_INVALID_PARAMETER error\n");
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return QSPI_STATUS_INVALID_PARAMETER;
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}
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// tested all combinations, take first
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obj->qspi = qspi_data_third;
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obj->qspi = pinmap->peripheral;
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#if defined(OCTOSPI1)
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if (obj->qspi == QSPI_1) {
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@ -452,19 +441,25 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
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#endif
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// pinmap for pins (enable clock)
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obj->io0 = io0;
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pinmap_pinout(io0, PinMap_QSPI_DATA0);
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obj->io1 = io1;
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pinmap_pinout(io1, PinMap_QSPI_DATA1);
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obj->io2 = io2;
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pinmap_pinout(io2, PinMap_QSPI_DATA2);
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obj->io3 = io3;
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pinmap_pinout(io3, PinMap_QSPI_DATA3);
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obj->io0 = pinmap->data0_pin;
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pin_function(pinmap->data0_pin, pinmap->data0_function);
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pin_mode(pinmap->data0_pin, PullNone);
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obj->io1 = pinmap->data1_pin;
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pin_function(pinmap->data1_pin, pinmap->data1_function);
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pin_mode(pinmap->data1_pin, PullNone);
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obj->io2 = pinmap->data2_pin;
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pin_function(pinmap->data2_pin, pinmap->data2_function);
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pin_mode(pinmap->data2_pin, PullNone);
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obj->io3 = pinmap->data3_pin;
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pin_function(pinmap->data3_pin, pinmap->data3_function);
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pin_mode(pinmap->data3_pin, PullNone);
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obj->sclk = sclk;
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pinmap_pinout(sclk, PinMap_QSPI_SCLK);
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obj->ssel = ssel;
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pinmap_pinout(ssel, PinMap_QSPI_SSEL);
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obj->sclk = pinmap->sclk_pin;
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pin_function(pinmap->sclk_pin, pinmap->sclk_pin);
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pin_mode(pinmap->sclk_pin, PullNone);
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obj->ssel = pinmap->ssel_pin;
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pin_function(pinmap->ssel_pin, pinmap->ssel_pin);
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pin_mode(pinmap->ssel_pin, PullNone);
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/* The OctoSPI IO Manager OCTOSPIM configuration is supported in a simplified mode in mbed-os
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* QSPI1 signals are mapped to port 1 and QSPI2 signals are mapped to port 2.
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@ -490,8 +485,46 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
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return qspi_frequency(obj, hz);
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}
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#else /* OCTOSPI */
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qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, uint32_t hz, uint8_t mode)
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{
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QSPIName qspiio0name = (QSPIName)pinmap_peripheral(io0, PinMap_QSPI_DATA0);
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QSPIName qspiio1name = (QSPIName)pinmap_peripheral(io1, PinMap_QSPI_DATA1);
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QSPIName qspiio2name = (QSPIName)pinmap_peripheral(io2, PinMap_QSPI_DATA2);
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QSPIName qspiio3name = (QSPIName)pinmap_peripheral(io3, PinMap_QSPI_DATA3);
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QSPIName qspiclkname = (QSPIName)pinmap_peripheral(sclk, PinMap_QSPI_SCLK);
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QSPIName qspisselname = (QSPIName)pinmap_peripheral(ssel, PinMap_QSPI_SSEL);
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QSPIName qspi_data_first = (QSPIName)pinmap_merge(qspiio0name, qspiio1name);
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QSPIName qspi_data_second = (QSPIName)pinmap_merge(qspiio2name, qspiio3name);
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QSPIName qspi_data_third = (QSPIName)pinmap_merge(qspiclkname, qspisselname);
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if (qspi_data_first != qspi_data_second || qspi_data_second != qspi_data_third ||
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qspi_data_first != qspi_data_third) {
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return QSPI_STATUS_INVALID_PARAMETER;
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}
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int peripheral = (int)qspi_data_first;
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int function_io0 = (int)pinmap_find_function(io0, PinMap_QSPI_DATA0);
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int function_io1 = (int)pinmap_find_function(io1, PinMap_QSPI_DATA1);
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int function_io2 = (int)pinmap_find_function(io2, PinMap_QSPI_DATA2);
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int function_io3 = (int)pinmap_find_function(io3, PinMap_QSPI_DATA3);
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int function_sclk = (int)pinmap_find_function(sclk, PinMap_QSPI_SCLK);
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int function_ssel = (int)pinmap_find_function(ssel, PinMap_QSPI_SSEL);
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const qspi_pinmap_t explicit_pinmap = {peripheral, io0, function_io0, io1, function_io1, io2, function_io2, io3, function_io3, sclk, function_sclk, ssel, function_ssel};
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QSPI_INIT_DIRECT(obj, &explicit_pinmap, hz, mode);
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}
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#else /* OCTOSPI */
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#if EXPLICIT_PINMAP_READY
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#define QSPI_INIT_DIRECT qspi_init_direct
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qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
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#else
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#define QSPI_INIT_DIRECT _qspi_init_direct
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static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
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#endif
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{
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debug_if(qspi_api_c_debug, "qspi_init mode %u\n", mode);
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// Enable interface clock for QSPI
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@ -527,6 +560,35 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
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obj->handle.Init.ClockMode = mode == 0 ? QSPI_CLOCK_MODE_0 : QSPI_CLOCK_MODE_3;
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// tested all combinations, take first
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obj->handle.Instance = (QUADSPI_TypeDef *)pinmap->peripheral;
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// pinmap for pins (enable clock)
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obj->io0 = pinmap->data0_pin;
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pin_function(pinmap->data0_pin, pinmap->data0_function);
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pin_mode(pinmap->data0_pin, PullNone);
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obj->io1 = pinmap->data1_pin;
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pin_function(pinmap->data1_pin, pinmap->data1_function);
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pin_mode(pinmap->data1_pin, PullNone);
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obj->io2 = pinmap->data2_pin;
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pin_function(pinmap->data2_pin, pinmap->data2_function);
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pin_mode(pinmap->data2_pin, PullNone);
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obj->io3 = pinmap->data3_pin;
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pin_function(pinmap->data3_pin, pinmap->data3_function);
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pin_mode(pinmap->data3_pin, PullNone);
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obj->sclk = pinmap->sclk_pin;
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pin_function(pinmap->sclk_pin, pinmap->sclk_pin);
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pin_mode(pinmap->sclk_pin, PullNone);
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obj->ssel = pinmap->ssel_pin;
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pin_function(pinmap->ssel_pin, pinmap->ssel_pin);
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pin_mode(pinmap->ssel_pin, PullNone);
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return qspi_frequency(obj, hz);
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}
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qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, uint32_t hz, uint8_t mode)
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{
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QSPIName qspiio0name = (QSPIName)pinmap_peripheral(io0, PinMap_QSPI_DATA0);
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QSPIName qspiio1name = (QSPIName)pinmap_peripheral(io1, PinMap_QSPI_DATA1);
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QSPIName qspiio2name = (QSPIName)pinmap_peripheral(io2, PinMap_QSPI_DATA2);
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@ -543,26 +605,19 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
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return QSPI_STATUS_INVALID_PARAMETER;
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}
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// tested all combinations, take first
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obj->handle.Instance = (QUADSPI_TypeDef *)qspi_data_first;
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int peripheral = (int)qspi_data_first;
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int function_io0 = (int)pinmap_find_function(io0, PinMap_QSPI_DATA0);
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int function_io1 = (int)pinmap_find_function(io1, PinMap_QSPI_DATA1);
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int function_io2 = (int)pinmap_find_function(io2, PinMap_QSPI_DATA2);
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int function_io3 = (int)pinmap_find_function(io3, PinMap_QSPI_DATA3);
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int function_sclk = (int)pinmap_find_function(sclk, PinMap_QSPI_SCLK);
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int function_ssel = (int)pinmap_find_function(ssel, PinMap_QSPI_SSEL);
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// pinmap for pins (enable clock)
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obj->io0 = io0;
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pinmap_pinout(io0, PinMap_QSPI_DATA0);
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obj->io1 = io1;
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pinmap_pinout(io1, PinMap_QSPI_DATA1);
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obj->io2 = io2;
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pinmap_pinout(io2, PinMap_QSPI_DATA2);
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obj->io3 = io3;
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pinmap_pinout(io3, PinMap_QSPI_DATA3);
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const qspi_pinmap_t explicit_pinmap = {peripheral, io0, function_io0, io1, function_io1, io2, function_io2, io3, function_io3, sclk, function_sclk, ssel, function_ssel};
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obj->sclk = sclk;
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pinmap_pinout(sclk, PinMap_QSPI_SCLK);
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obj->ssel = ssel;
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pinmap_pinout(ssel, PinMap_QSPI_SSEL);
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return qspi_frequency(obj, hz);
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QSPI_INIT_DIRECT(obj, &explicit_pinmap, hz, mode);
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}
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#endif /* OCTOSPI */
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