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Update HAL/LL EXTI to have default API applied on current core and nott CPU1

pull/11605/head
Alexandre Bourdiol 2019-09-30 18:39:50 +02:00
parent 48aba33204
commit 02cdac5fe3
2 changed files with 44 additions and 0 deletions
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8
targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_gpio.h
View File

@ -173,7 +173,11 @@ typedef enum
* This parameter can be GPIO_PIN_x where x can be(0..15)
* @retval The new state of __EXTI_LINE__ (SET or RESET).
*/
#if defined(DUAL_CORE) && defined(CORE_CM4)
#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI_D2->PR1 & (__EXTI_LINE__))
#else
#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI_D1->PR1 & (__EXTI_LINE__))
#endif
/**
* @brief Clears the EXTI's line pending flags.
@ -181,7 +185,11 @@ typedef enum
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
* @retval None
*/
#if defined(DUAL_CORE) && defined(CORE_CM4)
#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI_D2->PR1 = (__EXTI_LINE__))
#else
#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI_D1->PR1 = (__EXTI_LINE__))
#endif
/**
* @brief Checks whether the specified EXTI line is asserted or not.

36
targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_ll_exti.h
View File

@ -330,7 +330,11 @@ typedef struct
*/
__STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
{
#if defined(DUAL_CORE) && defined(CORE_CM4)
SET_BIT(EXTI->C2IMR1, ExtiLine);
#else
SET_BIT(EXTI->IMR1, ExtiLine);
#endif
}
/**
@ -373,7 +377,11 @@ __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
*/
__STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
{
#if defined(DUAL_CORE) && defined(CORE_CM4)
SET_BIT(EXTI->C2IMR2, ExtiLine);
#else
SET_BIT(EXTI->IMR2, ExtiLine);
#endif
}
@ -408,7 +416,11 @@ __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
*/
__STATIC_INLINE void LL_EXTI_EnableIT_64_95(uint32_t ExtiLine)
{
#if defined(DUAL_CORE) && defined(CORE_CM4)
SET_BIT(EXTI->C2IMR3, ExtiLine);
#else
SET_BIT(EXTI->IMR3, ExtiLine);
#endif
}
@ -453,7 +465,11 @@ __STATIC_INLINE void LL_EXTI_EnableIT_64_95(uint32_t ExtiLine)
*/
__STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
{
#if defined(DUAL_CORE) && defined(CORE_CM4)
CLEAR_BIT(EXTI->C2IMR1, ExtiLine);
#else
CLEAR_BIT(EXTI->IMR1, ExtiLine);
#endif
}
@ -497,7 +513,11 @@ __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
*/
__STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
{
#if defined(DUAL_CORE) && defined(CORE_CM4)
CLEAR_BIT(EXTI->C2IMR2, ExtiLine);
#else
CLEAR_BIT(EXTI->IMR2, ExtiLine);
#endif
}
/**
@ -531,7 +551,11 @@ __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
*/
__STATIC_INLINE void LL_EXTI_DisableIT_64_95(uint32_t ExtiLine)
{
#if defined(DUAL_CORE) && defined(CORE_CM4)
CLEAR_BIT(EXTI->C2IMR3, ExtiLine);
#else
CLEAR_BIT(EXTI->IMR3, ExtiLine);
#endif
}
@ -576,7 +600,11 @@ __STATIC_INLINE void LL_EXTI_DisableIT_64_95(uint32_t ExtiLine)
*/
__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
{
#if defined(DUAL_CORE) && defined(CORE_CM4)
return ((READ_BIT(EXTI->C2IMR1, ExtiLine) == (ExtiLine)) ? 1U : 0U);
#else
return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1U : 0U);
#endif
}
@ -620,7 +648,11 @@ __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
*/
__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
{
#if defined(DUAL_CORE) && defined(CORE_CM4)
return ((READ_BIT(EXTI->C2IMR2, ExtiLine) == (ExtiLine)) ? 1U : 0U);
#else
return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1U : 0U);
#endif
}
@ -655,7 +687,11 @@ __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
*/
__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_64_95(uint32_t ExtiLine)
{
#if defined(DUAL_CORE) && defined(CORE_CM4)
return ((READ_BIT(EXTI->C2IMR3, ExtiLine) == (ExtiLine)) ? 1U : 0U);
#else
return ((READ_BIT(EXTI->IMR3, ExtiLine) == (ExtiLine)) ? 1U : 0U);
#endif
}
#if defined(DUAL_CORE)