ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Added basic support for NUCLEO_G747RE. Basic GPIO support and system initialization.

pull/12482/head
George Beckstein 2020-02-20 09:32:46 -05:00
parent 13ba114d12
commit ec2544023d
8 changed files with 703 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

98
targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/PeripheralNames.h Normal file
View File

@ -0,0 +1,98 @@
/* mbed Microcontroller Library
* Copyright (c) 2016 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
ADC_1 = (int)ADC1_BASE,
ADC_2 = (int)ADC2_BASE,
ADC_3 = (int)ADC3_BASE,
ADC_4 = (int)ADC4_BASE,
ADC_5 = (int)ADC5_BASE
} ADCName;
typedef enum {
DAC_1 = (int)DAC1_BASE,
DAC_2 = (int)DAC2_BASE,
DAC_3 = (int)DAC3_BASE,
DAC_4 = (int)DAC4_BASE,
} DACName;
typedef enum {
UART_1 = (int)USART1_BASE,
UART_2 = (int)USART2_BASE,
UART_3 = (int)USART3_BASE,
UART_4 = (int)UART4_BASE,
UART_5 = (int)UART5_BASE,
LPUART_1 = (int)LPUART1_BASE
} UARTName;
#define DEVICE_SPI_COUNT 5
typedef enum {
SPI_1 = (int)SPI1_BASE,
SPI_2 = (int)SPI2_BASE,
SPI_3 = (int)SPI3_BASE,
SPI_4 = (int)SPI4_BASE,
} SPIName;
typedef enum {
I2C_1 = (int)I2C1_BASE,
I2C_2 = (int)I2C2_BASE,
I2C_3 = (int)I2C3_BASE,
I2C_4 = (int)I2C4_BASE
} I2CName;
typedef enum {
PWM_1 = (int)TIM1_BASE,
PWM_2 = (int)TIM2_BASE,
PWM_3 = (int)TIM3_BASE,
PWM_4 = (int)TIM4_BASE,
PWM_5 = (int)TIM5_BASE,
PWM_6 = (int)TIM6_BASE,
PWM_7 = (int)TIM7_BASE,
PWM_8 = (int)TIM8_BASE,
PWM_15 = (int)TIM15_BASE,
PWM_16 = (int)TIM16_BASE,
PWM_17 = (int)TIM17_BASE,
PWM_20 = (int)TIM20_BASE
} PWMName;
typedef enum {
CAN_1 = (int)FDCAN1_BASE,
CAN_2 = (int)FDCAN2_BASE,
CAN_3 = (int)FDCAN3_BASE
} CANName;
typedef enum {
QSPI_1 = (int)QSPI_R_BASE,
} QSPIName;
typedef enum {
USB_FS = (int)USB_BASE
} USBName;
#ifdef __cplusplus
}
#endif
#endif

178
targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/PinNames.h
View File

@ -49,6 +49,183 @@ typedef enum {
typedef enum {
// TODO - wasn't sure what to do about "alternates"
PA_0 = 0x00,
PA_0_ALT0 = PA_0 | ALT0,
PA_1 = 0x01,
PA_1_ALT0 = PA_1 | ALT0,
PA_2 = 0x02,
PA_2_ALT0 = PA_2 | ALT0,
PA_3 = 0x03,
PA_3_ALT0 = PA_3 | ALT0,
PA_4 = 0x04,
PA_4_ALT0 = PA_4 | ALT0,
PA_5 = 0x05,
PA_6 = 0x06,
PA_6_ALT0 = PA_6 | ALT0,
PA_7 = 0x07,
PA_7_ALT0 = PA_7 | ALT0,
PA_7_ALT1 = PA_7 | ALT1,
PA_7_ALT2 = PA_7 | ALT2,
PA_8 = 0x08,
PA_9 = 0x09,
PA_9_ALT0 = PA_9 | ALT0,
PA_10 = 0x0A,
PA_10_ALT0 = PA_10 | ALT0,
PA_11 = 0x0B,
PA_11_ALT0 = PA_11 | ALT0,
PA_11_ALT1 = PA_11 | ALT1,
PA_12 = 0x0C,
PA_12_ALT0 = PA_12 | ALT0,
PA_12_ALT1 = PA_12 | ALT1,
PA_13 = 0x0D,
PA_13_ALT0 = PA_13 | ALT0,
PA_14 = 0x0E,
PA_15 = 0x0F,
PA_15_ALT0 = PA_15 | ALT0,
PB_0 = 0x10,
PB_0_ALT0 = PB_0 | ALT0,
PB_0_ALT1 = PB_0 | ALT1,
PB_1 = 0x11,
PB_1_ALT0 = PB_1 | ALT0,
PB_1_ALT1 = PB_1 | ALT1,
PB_2 = 0x12,
PB_3 = 0x13,
PB_3_ALT0 = PB_0 | ALT0,
PB_4 = 0x14,
PB_4_ALT0 = PB_4 | ALT0,
PB_4_ALT1 = PB_4 | ALT1,
PB_5 = 0x15,
PB_5_ALT0 = PB_5 | ALT0,
PB_5_ALT1 = PB_5 | ALT1,
PB_6 = 0x16,
PB_6_ALT0 = PB_6 | ALT0,
PB_6_ALT1 = PB_6 | ALT1,
PB_7 = 0x17,
PB_7_ALT0 = PB_7 | ALT0,
PB_7_ALT1 = PB_7 | ALT1,
PB_8 = 0x18,
PB_8_ALT0 = PB_8 | ALT0,
PB_8_ALT1 = PB_8 | ALT1,
PB_9 = 0x19,
PB_9_ALT0 = PB_9 | ALT0,
PB_9_ALT1 = PB_9 | ALT1,
PB_9_ALT2 = PB_9 | ALT2,
PB_10 = 0x1A,
PB_11 = 0x1B,
PB_11_ALT0 = PB_11 | ALT0,
PB_12 = 0x1C,
PB_12_ALT0 = PB_12 | ALT0,
PB_13 = 0x1D,
PB_13_ALT0 = PB_13 | ALT0,
PB_14 = 0x1E,
PB_14_ALT0 = PB_14 | ALT0,
PB_15 = 0x1F,
PB_15_ALT0 = PB_15 | ALT0,
PB_15_ALT1 = PB_15 | ALT1,
PC_0 = 0x20,
PC_0_ALT0 = PC_0 | ALT0,
PC_1 = 0x21,
PC_1_ALT0 = PC_1 | ALT0,
PC_2 = 0x22,
PC_2_ALT0 = PC_2 | ALT0,
PC_3 = 0x23,
PC_3_ALT0 = PC_3 | ALT0,
PC_4 = 0x24,
PC_5 = 0x25,
PC_6 = 0x26,
PC_6_ALT0 = PC_6 | ALT0,
PC_7 = 0x27,
PC_7_ALT0 = PC_7 | ALT0,
PC_8 = 0x28,
PC_8_ALT0 = PC_8 | ALT0,
PC_8_ALT1 = PC_8 | ALT1,
PC_9 = 0x29,
PC_9_ALT0 = PC_9 | ALT0,
PC_10 = 0x2A,
PC_10_ALT0 = PC_10 | ALT0,
PC_11 = 0x2B,
PC_11_ALT0 = PC_11 | ALT0,
PC_12 = 0x2C,
PC_13 = 0x2D,
PC_13_ALT0 = PC_13 | ALT0,
PC_14 = 0x2E,
PC_15 = 0x2F,
PD_2 = 0x32,
PF_0 = 0x50,
PF_1 = 0x51,
// TODO PG10-NRST?
// ADC internal channels
// TODO - verify these
ADC_TEMP = 0xF0,
ADC_VREF = 0xF1,
ADC_VBAT = 0xF2,
// Arduino connector namings
A0 = PA_0,
A1 = PA_1,
A2 = PA_4,
A3 = PB_0,
A4 = PC_1,
A5 = PC_0,
D0 = PC_5,
D1 = PC_4,
D2 = PA_10,
D3 = PB_3,
D4 = PB_5,
D5 = PB_4,
D6 = PB_10,
D7 = PA_8,
D8 = PA_9,
D9 = PC_7,
D10 = PB_6,
D11 = PA_7,
D12 = PA_6,
D13 = PA_5,
D14 = PB_9,
D15 = PB_8,
// STDIO for console print
#ifdef MBED_CONF_TARGET_STDIO_UART_TX
STDIO_UART_TX = MBED_CONF_TARGET_STDIO_UART_TX,
#else
STDIO_UART_TX = PC_4,
#endif
#ifdef MBED_CONF_TARGET_STDIO_UART_RX
STDIO_UART_RX = MBED_CONF_TARGET_STDIO_UART_RX,
#else
STDIO_UART_RX = PC_5,
#endif
// Generic signals namings
LED1 = PA_5,
LED2 = PA_5,
LED3 = PA_5,
LED4 = PA_5,
USER_BUTTON = PC_13,
// Standardized button names
BUTTON1 = USER_BUTTON,
SERIAL_TX = STDIO_UART_TX,
SERIAL_RX = STDIO_UART_RX,
USBTX = STDIO_UART_TX,
USBRX = STDIO_UART_RX,
I2C_SCL = PB_8,
I2C_SDA = PB_9,
SPI_MOSI = PA_7,
SPI_MISO = PA_6,
SPI_SCK = PA_5,
SPI_CS = PB_6,
PWM_OUT = PB_3,
/**** USB pins ****/
USB_DM = PA_11,
@ -67,7 +244,6 @@ typedef enum {
SYS_JTMS_SWDIO = PA_13,
SYS_JTRST = PB_4,
SYS_PVD_IN = PB_7,
SYS_WKUP1 = PA_0,
SYS_WKUP2 = PC_13,
SYS_WKUP4 = PA_2,
SYS_WKUP5 = PC_5,

172
targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/system_clock.c Normal file
View File

@ -0,0 +1,172 @@
/* mbed Microcontroller Library
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/**
* This file configures the system clock as follows:
*-----------------------------------------------------------------
* System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock)
* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
* | 3- USE_PLL_HSI (internal 16 MHz)
*-----------------------------------------------------------------
* SYSCLK(MHz) | 64
* AHBCLK (MHz) | 64
* APB1CLK (MHz) | 64
* USB capable | NO
*-----------------------------------------------------------------
*/
#include "stm32g4xx.h"
#include "mbed_error.h"
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00U /*!< Vector Table base offset field.
This value must be a multiple of 0x100. */
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
#define USE_PLL_HSI 0x2 // Use HSI internal clock
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
uint8_t SetSysClock_PLL_HSI(void);
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
/**
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
* AHB/APBx prescalers and Flash settings
* @note This function should be called only once the RCC clock configuration
* is reset to the default reset state (done in SystemInit() function).
* @param None
* @retval None
*/
void SetSysClock(void)
{
#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
/* 1- Try to start with HSE and external clock */
if (SetSysClock_PLL_HSE(1) == 0)
#endif
{
#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
/* 2- If fail try to start with HSE and external xtal */
if (SetSysClock_PLL_HSE(0) == 0)
#endif
{
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
/* 3- If fail start with HSI clock */
if (SetSysClock_PLL_HSI() == 0)
#endif
{
{
error("SetSysClock failed\n");
}
}
}
}
/* Output clock on MCO1 pin(PA8) for debugging purpose */
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1);
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI48, RCC_MCODIV_1);
}
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
RCC_OscInitStruct.PLL.PLLN = 16;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return 0; // FAIL
}
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
return 0; // FAIL
}
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
/******************************************************************************/
/* PLL (clocked by HSI) used as System clock source */
/******************************************************************************/
uint8_t SetSysClock_PLL_HSI(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
RCC_OscInitStruct.PLL.PLLN = 8;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return 0; // FAIL
}
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
return 0; // FAIL
}
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */

24
targets/TARGET_STM/TARGET_STM32G4/cmsis.h Normal file
View File

@ -0,0 +1,24 @@
/* mbed Microcontroller Library
* Copyright (c) 2019 ARM Limited
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_CMSIS_H
#define MBED_CMSIS_H
#include "stm32g4xx.h"
#include "cmsis_nvic.h"
#endif

58
targets/TARGET_STM/TARGET_STM32G4/objects.h Normal file
View File

@ -0,0 +1,58 @@
/* mbed Microcontroller Library
* Copyright (c) 2017 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_OBJECTS_H
#define MBED_OBJECTS_H
#include "cmsis.h"
#include "PortNames.h"
#include "PeripheralNames.h"
#include "PinNames.h"
#include "stm32g4xx_ll_usart.h"
#include "stm32g4xx_ll_tim.h"
#include "stm32g4xx_ll_pwr.h"
#include "stm32g4xx_ll_rtc.h"
#ifdef __cplusplus
extern "C" {
#endif
struct gpio_irq_s {
IRQn_Type irq_n;
uint32_t irq_index;
uint32_t event;
PinName pin;
};
struct port_s {
PortName port;
uint32_t mask;
PinDirection direction;
__IO uint32_t *reg_in;
__IO uint32_t *reg_out;
};
struct trng_s {
RNG_HandleTypeDef handle;
};
//#include "common_objects.h"
#include "gpio_object.h"
#ifdef __cplusplus
}
#endif
#endif

55
targets/TARGET_STM/TARGET_STM32G4/pin_device.h Normal file
View File

@ -0,0 +1,55 @@
/* mbed Microcontroller Library
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
*
* Copyright (c) 2015 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#ifndef MBED_PIN_DEVICE_H
#define MBED_PIN_DEVICE_H
#include "cmsis.h"
#include "stm32g4xx_ll_gpio.h"
extern const uint32_t ll_pin_defines[16];
/* Family specific implementations */
static inline void stm_pin_DisconnectDebug(PinName pin)
{
/* empty for now */
}
static inline void stm_pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint32_t pull_config)
{
switch (pull_config) {
case GPIO_PULLUP:
LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_UP);
break;
case GPIO_PULLDOWN:
LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN);
break;
default:
LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_NO);
break;
}
}
static inline void stm_pin_SetAFPin(GPIO_TypeDef *gpio, PinName pin, uint32_t afnum)
{
uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
if (STM_PIN(pin) > 7) {
LL_GPIO_SetAFPin_8_15(gpio, ll_pin, afnum);
} else {
LL_GPIO_SetAFPin_0_7(gpio, ll_pin, afnum);
}
}
#endif

44
targets/TARGET_STM/TARGET_STM32G4/us_ticker_data.h Normal file
View File

@ -0,0 +1,44 @@
/* mbed Microcontroller Library
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#ifndef __US_TICKER_DATA_H
#define __US_TICKER_DATA_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32g4xx.h"
#include "stm32g4xx_ll_tim.h"
#include "cmsis_nvic.h"
#define TIM_MST TIM2
#define TIM_MST_IRQ TIM2_IRQn
#define TIM_MST_RCC __TIM2_CLK_ENABLE()
#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM2()
#define TIM_MST_RESET_ON __TIM2_FORCE_RESET()
#define TIM_MST_RESET_OFF __TIM2_RELEASE_RESET()
#define TIM_MST_BIT_WIDTH 32 // 16 or 32
#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
#ifdef __cplusplus
}
#endif
#endif // __US_TICKER_DATA_H

75
targets/targets.json
View File

@ -7516,6 +7516,81 @@
"3701"
]
},
"NUCLEO_G474RE": {
"inherits": [
"FAMILY_STM32"
],
"supported_form_factors": [
"ARDUINO",
"MORPHO"
],
"core": "Cortex-M4F",
"config": {
"clock_source": {
"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
"value": "USE_PLL_HSI",
"macro_name": "CLOCK_SOURCE"
},
"lpticker_lptim": {
"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
"value": 1
},
"hse_value": {
"help": "HSE default value is 25MHz in HAL",
"value": "8000000",
"macro_name": "HSE_VALUE"
}
},
"extra_labels_add": [
"STM32G4",
"STM32G474xx",
"STM32G474RE"
],
"components_add": [
"FLASHIAP"
],
"macros_add": [
"STM32G474xx",
"STM32G474RE",
"EXTRA_IDLE_STACK_REQUIRED",
"MBED_TICKLESS"
],
"overrides": {
"lpticker_delay_ticks": 0
},
"device_has_add": [
"MPU"
],
"device_has_remove": [
"USTICKER",
"RTC",
"ANALOGIN",
"I2C",
"I2CSLAVE",
"I2C_ASYNCH",
"INTERRUPTIN",
"PORTIN",
"PORTINOUT",
"PORTOUT",
"PWMOUT",
"SERIAL",
"SERIAL_FC",
"SLEEP",
"SPI",
"SPISLAVE",
"SPI_ASYNCH",
"STDIO_MESSAGES",
"WATCHDOG",
"RESET_REASON"
],
"detect_code": [
"0221"
],
"release_versions": [
"5"
],
"device_name": "STM32G474RETx"
},
"__build_tools_metadata__": {
"version": "1",
"public": false