Martin Kojtal
3801f6e389
Merge pull request #13406 from Allmoz/master
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STM32F1 USBDevice
2020-09-17 08:56:03 +01:00
m-ecry
73493b909a
STM-can-api: Fixed variable name for H7
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- can_frequency uses f instead of hz for can frequency
- Also added comment to system_clock
2020-09-16 17:35:32 +02:00
Andrea Gilardoni
1d77cfa08b
trying to fix startup file
2020-09-16 08:41:41 +02:00
rogeryou
48524f25ae
add opsi driver
2020-09-16 11:27:23 +08:00
Andrea Gilardoni
303b3c28b6
making some cleaning
2020-09-15 11:25:47 +02:00
Andrea Gilardoni
d5adca141b
Edit on Toolchain linker files
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Previous one were not working, using nucleol073RZ files
2020-09-15 11:13:03 +02:00
m-ecry
2a13fa199d
STMG4-sys-clk: If can PLLQ=160MHz, else 170MHz
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- with 170MHz as can-core-frequency, the accuracy for many baudrates is
too low. 160MHz is better for a broad range of frequencies
2020-09-14 18:15:41 +02:00
m-ecry
d0c8ad75e1
STM-can-api: Support reading of remote_msg
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- Previously a received msg was fixed of data_type
2020-09-14 18:10:48 +02:00
m-ecry
13b663397f
STM-can-api: Added usage of prescaler
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- This enables more frequencies, but without regard to the accuracy.
May still require manual clock setup, to remain in tolerance window
2020-09-14 16:29:12 +02:00
Martin Eckardt
35c9e7a5ad
Use HAL function for FDCAN_CLK-calculation
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- Thanks to @jeromecoutant for showing the HAL funtion
- Added #ifdef guard to FDCAN2/3 handler functions
2020-09-14 15:24:14 +02:00
Martin Kojtal
47e943af2d
Merge pull request #13558 from jeromecoutant/PR_L4PLUS_SRAM3
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STM32L4+ : SRAM3 is powered off in deepsleep
2020-09-10 14:03:32 +01:00
Martin Kojtal
468372e759
Merge pull request #13492 from talorion/fix-PwmOut-resets-after-suspend
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Fix pwm out resets after suspend
2020-09-10 12:40:18 +01:00
Martin Kojtal
a17a481c54
Merge pull request #13583 from jeromecoutant/PR_ARDUINO_PIN
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STM32: correct few Arduino pins value
2020-09-10 12:38:02 +01:00
Jaeden Amero
612b148fd4
stack: armc: Workaround config passing bug
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Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.
2020-09-10 10:08:38 +01:00
Jaeden Amero
39e69d328d
Use boot stack size from config system
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To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.
Fixes #10319
2020-09-10 10:08:38 +01:00
jeromecoutant
668412ccde
NUCLEO_L433RC_P: wrong D0 and D1 pins
2020-09-10 10:05:41 +02:00
jeromecoutant
5bcb02a013
DISCO_L072CZ_LRWAN1: wrong A1/A3/A4/A5 pin values
2020-09-10 10:05:41 +02:00
jeromecoutant
e695db9944
NUCLEO_F207ZG: change default SPI_MOSI pin to match Arduino standard
2020-09-10 10:05:40 +02:00
jeromecoutant
3e653223d2
NUCLEO_F303ZE: wrong D1 pins
2020-09-10 10:05:40 +02:00
jeromecoutant
88fcd669d4
NUCLEO_L552ZE_Q: wrong D0 and D1 pins
2020-09-10 10:05:40 +02:00
Martin Kojtal
3b5ab54618
Merge pull request #13542 from jeromecoutant/PR_DISCO_L4S
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B_L4S5I_IOT01A: new ST target
2020-09-09 15:54:27 +01:00
Martin Kojtal
1f6fe470e1
Merge pull request #13564 from More-Wrong/LSI-for-STM32Gx
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STM32Gx: LSI clock selection when LSE is not available
2020-09-09 15:16:44 +01:00
jeromecoutant
d804167816
STM32L4S5xI: B_L4S5I_IOT01A new target
2020-09-09 15:19:21 +02:00
jeromecoutant
c65ad59ccd
STM32L4S5xI introduction
2020-09-09 15:19:11 +02:00
jeromecoutant
b65afe028e
STM32H7 ADC: clock selection lost after deepsleep
2020-09-08 11:40:02 +02:00
talorion
e117ef5c3c
use descriptive variable names
2020-09-08 10:54:09 +02:00
Robert
14ac4064b7
STM32Gx: LSI clock selection when LSE is not available
2020-09-07 14:47:11 +01:00
jeromecoutant
e650470206
STM32L4+ : SRAM3 is powered off in Stop 2 mode
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By default, SRAM3 content is then lost.
2020-09-07 09:48:02 +02:00
Martin Eckardt
08ce2f2de8
Calculate FDCAN_clk instead of assuming fix 10MHz
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- The FDCAN_clk is calculated on runtime from the according
RCC-registers
2020-09-07 02:08:59 +02:00
Martin Eckardt
f32efe4c28
Changed PLL to 160MHz, PLLQ to 80MHz
2020-09-07 02:04:13 +02:00
Martin Eckardt
9886532029
Added support for FDCAN3
2020-09-07 02:04:13 +02:00
Martin Eckardt
9bc2deb9aa
make G4 target compileable with CAN support
2020-09-07 02:04:13 +02:00
Martin Kojtal
895488f945
Merge pull request #13523 from jeromecoutant/PR_H7_ADC2
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STM32H7 ADC: No MultiMode configuration needed for ADC2
2020-09-03 13:24:55 +01:00
Martin Kojtal
2eb2fe4184
Merge pull request #13522 from jeromecoutant/PR_USB_PULLUP
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STM32 USB connect procedure update
2020-09-03 13:24:10 +01:00
talorion
6a50ecad5f
pwmout - STM - add read methods for period and pulsewidth
2020-09-02 13:39:15 +02:00
Martin Kojtal
29f54fe9aa
Merge pull request #13509 from alcheagle/new_target_STM32L071CXCTX
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Adding STM32L071xx target
2020-09-02 09:41:12 +01:00
Nicolás Elliott
ee4a4e9ad8
Rebase of Initial support for USB Device on STM32F1
2020-09-01 15:05:48 -04:00
jeromecoutant
02c79e8603
STM32H7 ADC: No MultiMode configuration needed for ADC2
2020-09-01 17:52:13 +02:00
jeromecoutant
ac9c4b7b66
STM32 USB connect procedure update
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Pull up on USB DP to manage (external for STM32F1)
2020-09-01 17:32:20 +02:00
Andrea Gilardoni
3c39eeb8dd
fixing SPDX identifiers in all files
2020-09-01 10:08:41 +02:00
Martin Kojtal
4ef38f95d8
Merge pull request #13513 from jeromecoutant/PR_README
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STM32 readme update
2020-09-01 08:48:54 +01:00
jeromecoutant
53008d9447
STM32 USB: use SNG_BUF
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To avoid RAM location issue
2020-08-31 17:30:52 +02:00
Andrea Gilardoni
15ca58b9c8
fixing small issues
2020-08-31 14:03:49 +02:00
jeromecoutant
1996552a9c
STM32 readme update
2020-08-31 13:23:25 +02:00
Andrea Gilardoni
23a3ea06cb
fixing the remaining parts after the rename
2020-08-28 19:37:53 +02:00
Andrea Gilardoni
c62fc559c9
renaming the mcu to stm32l071xx
2020-08-28 19:24:43 +02:00
Andrea Gilardoni
0c0692a3d1
fixing the issues
2020-08-28 19:12:37 +02:00
Andrea Gilardoni
a03f5ff4e6
Adding a new target
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Adding STM32L071CXCTX as a generic target to be extended.
This addition required to fix some issues on stml0 library
2020-08-28 19:10:41 +02:00
Martin Kojtal
afcf91f331
Merge pull request #13006 from AGlass0fMilk/add-nucleo-g031k8
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NUCLEO_G031K8: Add new target
2020-08-26 07:24:28 +01:00
Martin Kojtal
4bd8d8ca56
Merge pull request #13470 from MultiTechSystems/update-dragonfly-linkers
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Update dragonfly linkers
2020-08-24 15:54:11 +01:00
jeromecoutant
44b7c1165e
STM32G0 UART: compilation warning
2020-08-24 13:55:10 +02:00
jeromecoutant
2f2a1ea3f2
STM32G0 stm32g0xx_ll_rtc.h compilation warning
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Waiting for
https://github.com/STMicroelectronics/STM32CubeG0/issues/11
2020-08-24 13:55:03 +02:00
Leon Lindenfelser
622b7cfc60
Add MBED_APP_START & MBED_APP_SIZE check/set to MTS_MDOT_F411RE arm linker
2020-08-20 10:21:12 -05:00
Leon Lindenfelser
aa2c80fa52
Update MTS_DRAGONFLY_F411RE linker files for removed post_binary_hook
2020-08-19 16:09:44 -05:00
George Beckstein
470ef492b3
Revert "Removed const from register declaration"
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This reverts commit c569dcce79
.
2020-08-14 12:03:25 -04:00
George Beckstein
c569dcce79
Removed const from register declaration
2020-08-13 16:50:03 -04:00
jeromecoutant
8165bca233
STM32G0 review and test
2020-08-13 15:49:50 -04:00
Pavel Slama
ab6fd6e1eb
add D13 pin
2020-08-13 15:49:50 -04:00
Pavel Slama
25ea7be2ff
add NUCLEO_G031K8 target
2020-08-13 15:49:50 -04:00
Pavel Slama
e3d26ed888
delete LED2-4 and buttons
2020-08-13 15:49:50 -04:00
George Beckstein
16ac412807
Add NUCLEO_G031K8 target configuration
2020-08-13 15:49:50 -04:00
Maarten de Klerk
e6150ac722
Added error checking to can_filter() for Classic CAN
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Previously the function always returned 1 even when the configuration was illegal. I added a small check to HAL_CAN_ConfigFilter(...).
2020-08-08 23:25:42 +02:00
Rajkumar Kanagaraj
2add7064ec
Update astyleignore and source code comment
2020-07-27 10:04:01 -07:00
jeromecoutant
0b5a91c9a2
STM32WB FLASH activity shared with M0+ core
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source:
- https://github.com/STMicroelectronics/STM32CubeWB/blob/master/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_RfWithFlash/Core/Src/flash_driver.c
- Figure 10 from AN5289
2020-07-17 12:06:40 +02:00
jeromecoutant
ec1e659d3a
STM32WB readme update
2020-07-17 12:06:40 +02:00
jeromecoutant
285d533075
STM32WB: ST CUBE drivers update V1.4.0 => V1.7.0 / BLE
2020-07-17 12:06:39 +02:00
jeromecoutant
643c7a44f3
STM32WB: ST CUBE drivers update V1.4.0 => V1.7.0 / HAL
2020-07-17 12:06:39 +02:00
Martin Kojtal
3400ef66e7
Merge pull request #13222 from jeromecoutant/PR_PWM
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STM32 PWM : avoid glitch after duty cycle change
2020-07-03 10:51:19 +02:00
Martin Kojtal
379bda2214
Merge pull request #13221 from jeromecoutant/PR_DAC_TICKLESS
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STM32 ANALOGOUT and DEEPSLEEP
2020-07-03 10:50:59 +02:00
jeromecoutant
e10a233c80
STM32 PWM : avoid glitch after duty cycle change
2020-07-02 14:54:09 +02:00
jeromecoutant
a0b718fc04
STM32 ANALOGOUT and DEEPSLEEP
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keep DAC on during wait period
2020-07-02 14:18:44 +02:00
jeromecoutant
c8737c593d
STM32WB RNG: enable use from both M4 and M0+ core
2020-07-02 10:17:08 +02:00
jeromecoutant
0d277eefe4
STM32L4: I2C init parameters for L4+ MCU
2020-06-23 10:05:24 +02:00
Martin Kojtal
e9b1df671e
Merge pull request #13143 from jeromecoutant/PR_H7_BARE
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STM32H7: correct Ethernet issue in baremetal
2020-06-18 10:25:51 +02:00
Martin Kojtal
66343b0d25
Merge pull request #12937 from macronix/macronix_qspi
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Modify the operation of setting qspi frequency when calling Octo controller
2020-06-18 09:43:45 +02:00
Martin Kojtal
aafae5d644
Merge pull request #12751 from jeromecoutant/PR_WB_USB
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STM32WB: enable USB Device
2020-06-18 09:42:42 +02:00
jeromecoutant
b4d31ae863
STM32H7: correct Ethernet issue in baremetal
2020-06-17 18:39:34 +02:00
Martin Kojtal
7b5a8d37b5
Merge pull request #12966 from MultiTechSystems/update-df413-onoff
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DRAGONFLY_F413RH: Update power on and power off functionality
2020-06-16 13:54:01 +02:00
Martin Kojtal
0614e92c5b
Merge pull request #13083 from jeromecoutant/PR_H7_CUBE170
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STM32H7 update drivers version to CUBE V1.7.0
2020-06-16 13:45:42 +02:00
jeromecoutant
dcf2490b5a
STM32F1 STM32Cube FW V1.8.0: update for MBED
2020-06-15 13:49:47 +02:00
jeromecoutant
c99c8b5036
STM32F1 STM32Cube FW V1.6.1 => V1.8.0: target part
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- SetSysClock update
2020-06-15 13:49:47 +02:00
jeromecoutant
ce3fc30cf0
STM32F1 STM32Cube FW V1.6.1 => V1.8.0
2020-06-15 13:49:46 +02:00
jeromecoutant
f13b06a7bc
STM32F1 STM32Cube FW V1.6.1 => V1.8.0: Driver part
2020-06-15 13:49:46 +02:00
jeromecoutant
97bf6fa386
STM32F1 STM32Cube FW V1.6.1 => V1.8.0: CMSIS part
2020-06-15 13:49:46 +02:00
jeromecoutant
1152c651d9
STM32F1: targets inherit from non public default MCU configuration
2020-06-15 13:49:39 +02:00
jeromecoutant
533fe21750
STM32F1: directory restructuration
2020-06-15 13:48:04 +02:00
Anna Bridge
a870fcface
Merge pull request #13001 from jeromecoutant/PR_BAREMETAL_SUPPORT_STEP2
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STM32 baremetal support step2 (L1/L4/WB)
2020-06-12 14:44:14 +01:00
Anna Bridge
58975d1df4
Merge pull request #13091 from jeromecoutant/PR_BAREMETAL_SUPPORT
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STM32 baremetal support step3/3 (F2/F4)
2020-06-12 14:42:35 +01:00
Anna Bridge
727cf54873
Merge pull request #13073 from jeromecoutant/PR_H7_FPGA
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STM32H7: FPGA tests support
2020-06-11 14:39:31 +01:00
Martin Kojtal
878875c884
Merge pull request #13090 from jeromecoutant/PR_DEVICE_H
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STM: move us_ticker_defines.h include
2020-06-10 11:53:57 +02:00
Martin Kojtal
0f2a28d52f
Merge pull request #13053 from jeromecoutant/PR_README
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STM32 more information in README file
2020-06-10 11:43:24 +02:00
jeromecoutant
47407759a4
STM: move us_ticker_defines.h include
2020-06-09 11:04:23 +02:00
jeromecoutant
713618abe0
STM32F4 baremetal support
2020-06-09 10:25:41 +02:00
jeromecoutant
adbd936cbc
STM32F2 baremetal support
2020-06-09 10:24:36 +02:00
jeromecoutant
048f454a5a
STM32H7: remove GENERIC_H745I
2020-06-08 15:33:42 +02:00
jeromecoutant
561f8d48bf
STM32H7 STM32Cube FW V1.5.0 => V1.7.0
2020-06-08 14:33:10 +02:00
jeromecoutant
9936a53bd1
STM32H7 STM32Cube FW V1.5.0 => V1.7.0: HAL Driver part
2020-06-08 14:33:09 +02:00
jeromecoutant
21f262b5c3
STM32H7 STM32Cube FW V1.5.0 => V1.7.0: CMSIS part
2020-06-08 14:33:09 +02:00
jeromecoutant
7d181c1bf7
STM32H7: directory restructuration
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- only files move
- sometimes files rename
+ targets.json update
2020-06-08 14:33:08 +02:00
jeromecoutant
551f8b4231
NUCLEO_WB55RG: enable USBDEVICE
2020-06-08 13:17:23 +02:00
Martin Kojtal
8d26d77690
Merge pull request #12482 from AGlass0fMilk/add-nucleo-g474re
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NUCLEO_G474RE: Add new platform
2020-06-08 12:38:40 +02:00
jeromecoutant
28f8307afa
STM32WB baremetal support
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move BLE files to FEATURE_BLE
2020-06-08 12:06:01 +02:00
jeromecoutant
0a447ac798
STM32L4 baremetal support
2020-06-08 12:05:54 +02:00
jeromecoutant
ba7deb4660
STM32L1 baremetal support
2020-06-08 11:46:56 +02:00
jeromecoutant
1292053bf9
STM32 more information in README file
2020-06-08 10:02:33 +02:00
jeromecoutant
c9e0c4f6f7
STM32WB ReadMe quick update
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See #12975
2020-06-08 10:02:33 +02:00
jeromecoutant
10a5b97396
STM32H7: NUCLEO_H743ZI2 pins update
2020-06-05 16:26:33 +02:00
jeromecoutant
1484ac0859
STM32H7: DISCO_H747I pins update
2020-06-05 16:26:23 +02:00
jeromecoutant
b289d5a08f
STM32H7: enable dual analogic pad
2020-06-05 16:26:22 +02:00
jeromecoutant
538552adea
STM32H7 ADC issue correction
2020-06-05 16:26:22 +02:00
Martin Kojtal
59df4efaac
Merge pull request #13022 from jeromecoutant/PR_BSP
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STM32: add weak TargetBSP_Init function
2020-06-05 16:01:25 +02:00
Martin Kojtal
3ef2b1642e
Merge pull request #12996 from pilotak/master
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STM32F412 bypass PLL configuration when already done by bootloader
2020-06-05 10:48:41 +02:00
Martin Kojtal
8911f96c1b
Merge pull request #13014 from jeromecoutant/PR_H7CM4
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DISCO_H747I_CM4 is supporting now hex format
2020-06-04 15:23:26 +02:00
jeromecoutant
76135d0820
STM32: add weak TargetBSP_Init function
2020-05-27 16:49:54 +02:00
jeromecoutant
876125ad49
DISCO_H747I_CM4 is supporting now hex format
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- minimum STLink version: V3J7M2
2020-05-25 11:34:40 +02:00
rogeryou
de9b283abe
modify the div value when calling octo controller.
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For ST OSPI controller driver(stm32l4xx_hal_ospi.c), the frequency it has be subtracted 1, so "div = div - 1;" should be removed.
2020-05-25 12:07:24 +08:00
George Beckstein
658d89be8c
Apply linker fix as in #12690 to new NUCLEO_G474RE target
2020-05-20 06:39:17 -04:00
George Beckstein
6e2fa616c7
Added spi_api.c implementation
2020-05-20 06:39:17 -04:00
George Beckstein
eb8d128a24
Updated system clock settings to run at 170MHz (max for this target). Affects both HSI and HSE modes.
2020-05-20 06:39:17 -04:00
George Beckstein
44ca862af3
Changed us_ticker configuration to use TIM5 instead of TIM2 to be consistent with the allowed PWM peripheral pins.
2020-05-20 06:39:17 -04:00
George Beckstein
2297e1b91e
Updated clock configuration settings for NUCLEO_G474RE
2020-05-20 06:39:17 -04:00
George Beckstein
c687ae312f
Added missing analogin_device.c file and configured for STM32G4xx series
2020-05-20 06:39:17 -04:00
George Beckstein
613af0f604
Added support for ANALOGOUT
2020-05-20 06:39:17 -04:00
George Beckstein
934d60e63d
Added support for FLASH API
2020-05-20 06:39:17 -04:00
George Beckstein
7f19c8ac6e
Added support for SPI API
2020-05-20 06:39:17 -04:00
George Beckstein
06d74aa37a
Added support for PWMOUT
2020-05-20 06:39:17 -04:00
George Beckstein
f59ec66710
Added support for INTERRUPTIN
2020-05-20 06:39:17 -04:00
George Beckstein
5e25e004df
Added support for I2C
2020-05-20 06:39:17 -04:00
George Beckstein
cc86ec99d0
Added ANALOGIN support
2020-05-20 06:39:17 -04:00
George Beckstein
80c5d96420
Added support for WDT (untested). Checked datasheet for maximum LSI frequency
2020-05-20 06:39:17 -04:00
George Beckstein
3432960aa1
Implemented support for basic serial communication
2020-05-20 06:39:17 -04:00
George Beckstein
ec2544023d
Added basic support for NUCLEO_G747RE. Basic GPIO support and system initialization.
2020-05-20 06:39:17 -04:00
jeromecoutant
13ba114d12
STM32G4 DISCO_G474RE introduction
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- Only script result
- Can't compile
2020-05-20 06:39:17 -04:00
jeromecoutant
2631bf8070
STM32G4 NUCLEO_G474RE introduction
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- Only script result
- Can't compile
2020-05-20 06:39:17 -04:00
jeromecoutant
fd2bac73c9
STM32G4 NUCLEO_G431RB introduction
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- Only script result
- Can't compile
2020-05-20 06:39:17 -04:00
jeromecoutant
85e8a59e84
STM32G4 NUCLEO_G431KB introduction
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- Only script result
- Can't compile
2020-05-20 06:39:17 -04:00
jeromecoutant
35e3ce9034
STM32G4 automatic adaptation for MBED
2020-05-20 06:39:17 -04:00
jeromecoutant
b387ed6bc1
STM32G4 introduction
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Import from STM32Cube_FW_G4_V1.1.0
2020-05-20 06:39:17 -04:00
Pavel Slama
9d7e55b3f3
move system_clock.c to the root
2020-05-19 13:33:55 +02:00
Pavel Slama
1fc9561af7
STM32F412 bypass PLL configuration when already done by bootloader
2020-05-19 11:48:56 +02:00
jeromecoutant
b57b12cc9f
STM32L0 baremetal support
2020-05-18 17:27:42 +02:00
jeromecoutant
9b819c7f8b
STM32H7 baremetal support
2020-05-18 17:27:32 +02:00
jeromecoutant
739b2048d4
STM32F3 baremetal support
2020-05-18 17:26:50 +02:00
jeromecoutant
96016aea17
STM32F1 baremetal support
2020-05-18 15:27:30 +02:00
jeromecoutant
794e0aa0cf
STM32F0 baremetal support
2020-05-18 15:27:29 +02:00
Leon Lindenfelser
b8554a3f26
Update power on and power off functionality
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Implement soft_power_on/off() and hard_power_on/off() to perform as described in mbed-os CellularDevice API.
2020-05-18 08:11:40 -05:00
jeromecoutant
c96eb2cd0e
STM32 rename TOOLCHAIN_ARM_STD into TOOLCHAIN_ARM
2020-05-15 10:41:28 +02:00
jeromecoutant
303752ad84
STM32 remove all TOOLCHAIN_ARM_MICRO
2020-05-15 09:37:40 +02:00
Marcelo Salazar
149656447d
Remove target dep. on S2LP driver
2020-05-14 17:17:27 +01:00
jeromecoutant
cda2538bd2
STM32L0 code cleaning
2020-05-14 13:55:32 +02:00
jeromecoutant
dd46dfccb2
STM32F4 code cleaning
2020-05-14 13:55:22 +02:00
jeromecoutant
f116fe0daa
STM32F3 code cleaning
2020-05-14 13:55:21 +02:00
jeromecoutant
126a9c9693
STM32F1 code cleaning
2020-05-14 13:55:21 +02:00
jeromecoutant
a63fd00a9a
STM32F0 code cleaning
2020-05-14 13:55:21 +02:00
Martin Kojtal
cb4449a727
Merge pull request #12958 from VeijoPesonen/stm32wb_vtor_bootloader
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Fix vector table bug when using bootloader on STM32WB55
2020-05-13 19:23:42 +02:00
Martin Kojtal
6950e78fcb
Merge pull request #12945 from malavikasajikumar/SDPK1-PinNames
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Cleaning up PinNames.h for SDP-K1 board.
2020-05-12 14:26:41 +02:00
Martin Kojtal
e88c596fbb
Merge pull request #12801 from AGlass0fMilk/add-stm32h745
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Add base support for STM32H745
2020-05-12 14:05:16 +02:00
Martin Kojtal
053af2d31c
Merge pull request #12856 from hugueskamba/hk_remove_uarm_st_boards
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ST Boards: Remove uARM tooolchain support
2020-05-12 13:27:30 +02:00
Veijo Pesonen
a4c692bd41
Fix VTOR bug when using bootloader on STM32WB
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The address of the vector table is hardcoded to the start of flash in
many, if not all, ST targets. This causes a crash in applications that
are using a bootloader. This patch updates the board STM32WB55 so it
properly handle updating the VTOR with a bootloader.
Solution has been copied from the PR #3798 .
2020-05-12 10:46:32 +03:00
Martin Kojtal
a707fd133e
Merge pull request #12915 from rajkan01/hal_gettick_api_optim
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Optimise HAL_GetTick API
2020-05-11 15:12:28 +02:00
Malavika Sajikumar
74bd04f381
Cleaning up PinNames.h for SDP-K1 board.
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Added pin description comments to Arduino header pins and LED4.
Added I2C alias names.
Removed Oscillator and DEBUG pin definitions.
Use USBTX and USBRX for serial communications back to PC. Do not use STDIO_UART_TX and STDIO_UART_RX
2020-05-07 14:44:53 -07:00
Marcelo Salazar
4083469d09
Remove Ublox targets
2020-05-06 16:39:29 +01:00
jeromecoutant
ab80e30bfe
STM32F4 bypass PLL configuration when already done by bootloader
2020-05-05 18:06:10 +02:00
Rajkumar Kanagaraj
4ab794b47f
Microlib slow division causes HAL_GetTick API performance issue, so optimized HAL_GetTick API to improve performance.
2020-05-05 16:24:53 +01:00
George Beckstein
5087b6da4e
Moved GENERIC_H745I_CM* targets into parent target folder
2020-04-30 09:27:26 -04:00
George Beckstein
5dcc49d9f5
Change structure so custom targets may define their own linker scripts
2020-04-30 09:24:02 -04:00
jeromecoutant
1877b68869
STM32H745 : creation of GENERIC target
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Goal is to enable compilation in CI
2020-04-30 09:24:02 -04:00
jeromecoutant
38801157ac
STM32H745 restructuration
2020-04-30 09:24:02 -04:00
George Beckstein
ecaa5fe793
Add BSP initialization hook to system initialization code
2020-04-30 09:24:02 -04:00
George Beckstein
decc6d335f
Added common system files from H747 targets
2020-04-30 09:24:02 -04:00
George Beckstein
a1bb4b1d0a
Add and configure support for IAR toolchain
2020-04-30 09:24:02 -04:00
George Beckstein
fab7de62e7
Add and configure support for ARM_STD toolchain
2020-04-30 09:24:02 -04:00
George Beckstein
88a6d37a07
Add target files for STM32H745-based targets
2020-04-30 09:24:01 -04:00
Hugues Kamba
ce1c51ea51
ST Boards: Remove uARM tooolchain support
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For NUCLEO_F401RE, NUCLEO_F411RE, NUCLEO_F303RE, and DISCO_L475VG_IOT01A:
* Ensure the scatter files for the ARM toolchain use 2 region memory model.
The scatter files changes affects the following boards:
* NUCLEO_F401RE, STEVAL_3DP001V1 (stm32f401xe.sct)
* NUCLEO_F411RE, MTS_MDOT_F411RE, MTS_DRAGONFLY_F411RE, MTB_MTS_DRAGONFLY, SAKURAIO_EVB_01 (stm32f411re.sct)
* NUCLEO_F303RE, NUCLEO_F303ZE (stm32f303xe.sct)
* DISCO_L475VG_IOT01A, MTB_STM_L475 (stm32l475xx.sct)
* Remove the TOOLCHAIN_ARM_MICRO directories.
* Remove release_version as not necessary and as the targets can also run
Mbed OS 6.
* Remove uARM support for all FAMILY_STM32 targets.
2020-04-30 14:17:39 +01:00
Marcelo Salazar
a3dc513d35
Remove MTS_MDOT_F405RG target
2020-04-30 09:56:36 +01:00
Marcelo Salazar
a7b026bd14
Rename ADV_WISE_1510 target
2020-04-30 09:56:35 +01:00
Marcelo Salazar
92cbd9a734
Rename ADV_WISE_1570 target
2020-04-30 09:56:35 +01:00
jeromecoutant
bc4bc05908
STM32 warning remove
2020-04-24 10:57:45 +02:00
jeromecoutant
227af65ef1
STM32F7: CubeDriver V1.15.0 to V1.16.0
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https://github.com/STMicroelectronics/STM32CubeF7
2020-04-23 18:02:15 +02:00
jeromecoutant
8d542142da
STM32F7: directory restructuration
2020-04-23 18:02:06 +02:00
Martin Kojtal
df6f650ab1
Revert "Remove MTB_STM_S2LP target"
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This reverts commit 10ca248a7a
.
2020-04-22 13:46:53 +01:00
Martin Kojtal
b622a25688
Merge pull request #12810 from MarceloSalazar/platform_cleanup
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Remove unsupported targets
Note, commit 21e364e
is just a styling fix, no target removal.
2020-04-22 10:58:50 +02:00
Martin Kojtal
e33e93622c
Merge pull request #12663 from hugueskamba/hk-NUCLEO_F303K8-fix-microlib-support-optimize-ram
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Migrate NUCLEO_F303K8 to Mbed OS 5 baremetal
2020-04-22 07:06:13 +02:00
Hugues Kamba
4e61240838
Migrate NUCLEO_F303K8 to Mbed OS 5 baremetal
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* Use two memory regions in ARM toolchain linker file to support Microlib
* Replace `target.default_lib` with `target.c_lib`
* Specify supported lib sizes per toolchain
* Add support for Mbed OS versions after Mbed 2
2020-04-21 12:11:35 +01:00
Marcelo Salazar
beee062d1f
Remove MTB_MTS_DRAGONFLY target
2020-04-20 16:55:35 +01:00
Marcelo Salazar
10ca248a7a
Remove MTB_STM_S2LP target
2020-04-20 16:55:35 +01:00
Marcelo Salazar
ee8231ab9d
Remove USI_WM_BN_BM_22 based targets
2020-04-20 16:55:35 +01:00
MarceloSalazar
93db82f591
Remove NZ32_SC151 target
2020-04-20 16:55:34 +01:00
MarceloSalazar
d9cb51dbc6
Remove OLIMEX_STM32E407_F407ZG target
2020-04-20 16:55:34 +01:00
MarceloSalazar
33be96d751
Remove SAKURAIO_EVB target
2020-04-20 16:55:34 +01:00
MarceloSalazar
7839bbbe39
Remove IM880B target
2020-04-20 16:55:34 +01:00
MarceloSalazar
6874f41af9
Remove BLUEPILL_F103C8 target
2020-04-20 16:55:34 +01:00
MarceloSalazar
bf590310db
Remove MTB_RAK811 target
2020-04-20 16:55:34 +01:00
MarceloSalazar
e78ba7065b
Remove MTB_MTS_XDOT target
2020-04-20 16:55:33 +01:00
MarceloSalazar
4b1ad8ad4c
Remove MTB_STM_L475 target
2020-04-20 16:55:33 +01:00
MarceloSalazar
91607fe9cd
Remove MTB_MURATA_ABZ target
2020-04-20 16:55:33 +01:00
MarceloSalazar
32ab2ecb7a
Remove MTB_STM32_F439 target
2020-04-20 16:55:33 +01:00
Martin Kojtal
fcc20b1201
Merge pull request #12765 from MultiTechSystems/update-mdot-target
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Update MTS_MDOT_F411RE target and remove bootloader from tools
2020-04-16 11:53:26 +02:00
MarceloSalazar
e43ece13aa
Rename EMW3166 target
2020-04-09 15:32:41 +01:00
MarceloSalazar
831c475a46
Remove Silica target
2020-04-09 15:32:41 +01:00
MarceloSalazar
1e4c707cc5
Remove ELMO target
2020-04-09 15:32:41 +01:00
MarceloSalazar
3ad6c4fa2b
Remove Ublox ODIN targets
2020-04-09 15:32:39 +01:00
Rajkumar Kanagaraj
3d128e861b
- Fix the CI build issue.
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- Incorporate the review comment.
2020-04-08 10:35:07 +01:00
Rajkumar Kanagaraj
9739b565b2
Fix the CI build issue
2020-04-08 10:35:07 +01:00
Taylor Heck
5ca347f460
Use basic STM32F411RE linker scripts, removes bootloader section.
2020-04-07 09:00:09 -05:00
Taylor Heck
94dd3f98c3
Update system_clock.c for VECT_TAB_OFFSET changes in target definition
2020-04-07 09:00:07 -05:00
Martin Kojtal
a6ef9db8dc
Merge pull request #12626 from jeromecoutant/PR_F4
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STM32F4 update drivers version to CUBE V1.25.0
2020-04-01 10:50:32 +02:00
Martin Kojtal
eb2457f59d
Merge pull request #12690 from jeromecoutant/PR_GCC_ETEXT
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STM32: solve GCC Unspecified RTOS error
2020-03-31 09:27:05 +02:00
jeromecoutant
33fc5000a9
STM32F4 V1.19.0 -> V1.25.0 : adaptation
2020-03-30 16:04:02 +02:00
jeromecoutant
aa22c4b4d5
STM32F4 V1.19.0 -> V1.25.0 : Driver part
2020-03-30 16:04:01 +02:00
jeromecoutant
480fd2ab92
STM32F4 V1.19.0 -> V1.25.0 : CMSIS part
2020-03-30 16:04:00 +02:00
jeromecoutant
3c3b17d601
STM32F4 restructuration for better maintenance
2020-03-30 16:03:59 +02:00
Martin Kojtal
92cdcfb302
Merge pull request #12662 from artokin/workaround_for_stm32f4_sleep
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Add workaround for STM32F4 hardfault in sleep mode
2020-03-30 14:08:48 +02:00
Marcelo Salazar
5aa66b5c9a
Add workaround for F429 hardfault
2020-03-27 11:58:46 +00:00
jeromecoutant
a1c159e0b5
STM32 GCC Unspecified RTOS error
2020-03-24 17:32:13 +01:00
jeromecoutant
249752e7bc
STM32H7: enable QSPI
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- DISCO_H747I board has MT25QL512 embedded QSPI
2020-03-23 18:46:26 +01:00
Teemu Takaluoma
40672c5e0f
Disable sleep on STM32F4 as an workaround for stability issues.
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This workaround is related to Mbed OS issue
https://github.com/ARMmbed/mbed-os/issues/12294
2020-03-20 12:16:06 +02:00
Anna Bridge
d61187c23a
Merge pull request #12611 from jeromecoutant/PR_UART_PARITY
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STM32F4 UART issue when parity enabled
2020-03-13 11:07:21 +00:00
jeromecoutant
6752a2d555
STM32F4 UART issue when parity enabled
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Bits 8:0 DR[8:0]: Data value
When receiving with the parity enabled, the value read in the MSB bit is the received parity
bit.
2020-03-10 17:22:02 +01:00
Rajkumar Kanagaraj
2f4cf1a052
Fix the CI build issue
2020-03-10 07:50:32 -07:00
jeromecoutant
1fa78eb5a8
STM32F7: add ARM_LIB_HEAP definition in ARM linker scripts
2020-03-05 16:35:40 +01:00
jeromecoutant
0871db277b
STM32F7: allow multiple SetSysClock call
2020-03-05 16:34:56 +01:00
Martin Kojtal
a17866e623
Merge pull request #12559 from jeromecoutant/PR_DISCO_L4R9
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DISCO_L4R9I correct LED pins
2020-03-04 07:48:32 +00:00
Martin Kojtal
b3583f04cf
Merge pull request #12464 from jeromecoutant/PR_ETHERNET
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STM32 EMAC : add configuration choice and connection check
2020-03-03 16:04:18 +00:00
jeromecoutant
3e30033822
DISCO_L4R9I correct LED pins
2020-03-03 13:36:57 +01:00
Martin Kojtal
bad9c57085
Merge pull request #12460 from mprse/spi_init_nc_fix
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Allow MISO/MOSI set to NC during SPI initialisation (fix for issue #12435 )
2020-03-03 09:56:47 +00:00
jeromecoutant
1b40076376
STM32 EMAC : more configurable
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- PHY default configuration can be changed
- AutoNegotiation
- Speed
- DuplexMode
- PHY register offset can be updated depending on chosen PHY
All unused parameters are cleaned.
2020-03-02 16:19:26 +01:00
Martin Kojtal
2d93a4578d
Merge pull request #12451 from jeromecoutant/PR_QSPI_TRACE
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STM32 : enable MBED trace for QSPI
2020-02-27 10:02:46 +00:00
jeromecoutant
9977ace2c9
STM32 : enable MBED trace for QSPI
2020-02-20 12:20:24 +01:00
jeromecoutant
a1570f936f
STM32WB : Add ReadMe file
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Help on FW update procedure
2020-02-20 09:20:44 +01:00
jeromecoutant
9d016022b6
STM32WB clean SetSysClock
2020-02-20 09:20:44 +01:00
jeromecoutant
ebae0e56d4
STM32WB align deepsleep functions with CubeFW
2020-02-20 09:20:43 +01:00
Martin Kojtal
9f5ced30dc
Merge pull request #12415 from jeromecoutant/PR_H7README
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STM32H7 : add readme file for dual core use
2020-02-19 12:52:10 +00:00
Przemyslaw Stekiel
713be4fd77
STM pin_function(), pin_mode(): return immediately when given pin is NC
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Additionally, remove redundant pin checks against NC when above functions are used.
2020-02-19 11:46:59 +01:00
Przemyslaw Stekiel
c6a6984ab8
Allow NC for MISO or MOSI while initializing SPI
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Static pinmap extension required to use pin_function() and pin_mode() functions instead of pinmap_pinout(). Unfortunatelly pin_function() does not allow passing NC pin.
Call pin_function() and pin_mode() only if MISO/MOSI pin is not NC.
2020-02-18 13:38:43 +01:00
jeromecoutant
065a79e48a
STM32H7: add README file for dual core use
2020-02-17 16:21:20 +01:00
jeromecoutant
d66b39de18
STM32L5 : Add DISCO-L562E support
2020-02-14 17:49:40 +01:00
jeromecoutant
f0969022b8
STM32L5 : add QSPI support
2020-02-14 17:49:33 +01:00
Martin Kojtal
7658681a9e
Merge pull request #12409 from LMESTM/Fix_lpuart_deep_sleep
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FIX: LPUART clock source selection should be left to serial driver
2020-02-13 09:45:41 +00:00
Laurent Meunier
3fd071404e
FIX: LPUART clock source selection should be left to serial driver
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The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c
At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.
So let's remove these few lines of code which are causing trouble.
2020-02-11 17:14:45 +01:00
Martin Kojtal
c1eaf2c358
Merge pull request #12380 from mprse/DISCO_L475VG_IOT01A_add_gpio_pinmap
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DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing
2020-02-11 11:58:53 +00:00
Martin Kojtal
7fd5119b89
Merge pull request #12341 from fkjagodzinski/fix-stm-hal_fpga
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STM32L4: Fix the UART RX & TX data reg bitmasks
2020-02-10 13:21:31 +00:00
jeromecoutant
2368a07244
STM32: Fix the UART RX & TX data reg bitmasks
2020-02-07 16:23:50 +00:00
Przemyslaw Stekiel
3a71f86235
DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing
2020-02-07 11:41:32 +01:00
Filip Jagodzinski
ae635d5cd4
STM32L4: Fix the UART RX & TX data reg bitmasks
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The existing logic was insufficient to properly handle odd and even
parity setting, e.g. serial_getc() returned 9-bit data for 8O1
transmission format.
2020-02-06 14:07:51 +01:00
Martin Kojtal
32675cc6ac
Merge pull request #11874 from fkjagodzinski/armc6_build-enable_lto_for_release
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ARMC6: Add a build profile extension with the link-time optimizer enabled
2020-02-05 14:42:16 +00:00
Martin Kojtal
e3ad1cae55
Merge pull request #12334 from AriParkkila/cell-c030-r412m
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Update cellular drivers/tests for UBLOX_C030_R412M
2020-02-05 12:50:11 +00:00
Martin Kojtal
841b846b46
Merge pull request #12362 from ABOSTM/L0_CUBE_HAL_REWORK_NO_MORE_OVERRUN
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TARGET_STM: L0 CUBE SPI async mode send next byte after previous one is read
2020-02-05 10:17:13 +00:00
Martin Kojtal
cee2a352a7
Merge pull request #12357 from ABOSTM/F103_ADC3_NOT_SUPPORTING_COMMON_SETTINGS
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TARGET_STM32F1: don't set ADC common register when ADC doesn't support it
2020-02-04 15:24:51 +00:00
Alexandre Bourdiol
315220832f
TARGET_STM: L0 CUBE SPI async mode send next byte after previous one read
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In STM32 Cube HAL, in interrupt mode (async),
2 bytes can be prepared in hardware registers without any read
(1 in regular register, the other in shift register),
but Only 1 RX byte can stored in hardware register, specially when there is no hardware FIFO.
If interrupt handling is fast enough, each read is made in parralele of the write.
But if interrupt handling is too long or is interrupted for too long,
it can happen that one read byte is lost (overrun).
For STM32F4, Tickless has been deactivated to avoid such issue.
For STM32L0, we don't want to deactivate tickless,
because those chips are specially design for lowpower.
So instead of removing SPI async mode,
we propose to change the HAL behavior specially for L0:
each byte is send only when previous read is performed.
Thus only 1 RX byte at a time which is saved in hardware register.
This prevent overrun, but it introduceS some latency between each byte send,
this is why it is not applied to all STM32 families.
2020-02-04 13:26:49 +01:00