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STM32L5 : update generic STM files for L5

pull/12306/head
jeromecoutant 2020-01-08 15:45:08 +01:00
parent bee5d44a1f
commit c1386cf52d
10 changed files with 232 additions and 23 deletions
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28
targets/TARGET_STM/README.md
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@ -10,16 +10,18 @@ https://www.st.com/en/embedded-software/stm32cube-mcu-packages.html
This table summarizes the STM32Cube versions currently used :
| STM32 Serie | Cube version |
|-------------|--------------|
| F0 | 1.9.0 |
| F1 | 1.6.1 |
| F2 | 1.6.0 |
| F3 | 1.9.0 |
| F4 | 1.19.0 |
| F7 | 1.10.0 |
| H7 | 1.4.0 |
| L0 | 1.10.0 |
| L1 | 1.8.1 |
| L4 | 1.11.0 |
| WB | 1.0.0 |
| STM32 Serie | Cube version | GitHub source |
|-------------|--------------|---------------------------------------------------|
| F0 | 1.9.0 | https://github.com/STMicroelectronics/STM32CubeF0 |
| F1 | 1.6.1 | https://github.com/STMicroelectronics/STM32CubeF1 |
| F2 | 1.6.0 | https://github.com/STMicroelectronics/STM32CubeF2 |
| F3 | 1.9.0 | https://github.com/STMicroelectronics/STM32CubeF3 |
| F4 | 1.19.0 | https://github.com/STMicroelectronics/STM32CubeF4 |
| F7 | 1.10.0 | https://github.com/STMicroelectronics/STM32CubeF7 |
| G0 | 1.3.0 | https://github.com/STMicroelectronics/STM32CubeG0 |
| H7 | 1.4.0 | https://github.com/STMicroelectronics/STM32CubeH7 |
| L0 | 1.10.0 | https://github.com/STMicroelectronics/STM32CubeL0 |
| L1 | 1.8.1 | https://github.com/STMicroelectronics/STM32CubeL1 |
| L4 | 1.11.0 | https://github.com/STMicroelectronics/STM32CubeL4 |
| L5 | 1.1.0 | https://github.com/STMicroelectronics/STM32CubeL5 |
| WB | 1.0.0 | https://github.com/STMicroelectronics/STM32CubeWB |

2
targets/TARGET_STM/gpio_api.c
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@ -74,7 +74,7 @@ GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx)
#endif
#if defined GPIOG_BASE
case PortG:
#if defined TARGET_STM32L4
#if defined PWR_CR2_IOSV /* TARGET_STM32L4 / TARGET_STM32L5 */
__HAL_RCC_PWR_CLK_ENABLE();
HAL_PWREx_EnableVddIO2();
#endif

174
targets/TARGET_STM/gpio_irq_api.c
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@ -74,7 +74,34 @@ static gpio_channel_t channels[CHANNEL_NUM] = {
{.pin_mask = 0},
#endif
#ifdef EXTI_IRQ6_NUM_LINES
{.pin_mask = 0}
{.pin_mask = 0},
#endif
#ifdef EXTI_IRQ7_NUM_LINES
{.pin_mask = 0},
#endif
#ifdef EXTI_IRQ8_NUM_LINES
{.pin_mask = 0},
#endif
#ifdef EXTI_IRQ9_NUM_LINES
{.pin_mask = 0},
#endif
#ifdef EXTI_IRQ10_NUM_LINES
{.pin_mask = 0},
#endif
#ifdef EXTI_IRQ11_NUM_LINES
{.pin_mask = 0},
#endif
#ifdef EXTI_IRQ12_NUM_LINES
{.pin_mask = 0},
#endif
#ifdef EXTI_IRQ13_NUM_LINES
{.pin_mask = 0},
#endif
#ifdef EXTI_IRQ14_NUM_LINES
{.pin_mask = 0},
#endif
#ifdef EXTI_IRQ15_NUM_LINES
{.pin_mask = 0},
#endif
};
@ -91,6 +118,36 @@ static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]);
uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx]));
#if defined(TARGET_STM32L5)
// Clear interrupt flag
if (LL_EXTI_IsActiveRisingFlag_0_31(pin) != RESET) {
LL_EXTI_ClearRisingFlag_0_31(pin);
if (gpio_channel->channel_ids[gpio_idx] == 0) {
continue;
}
gpio_irq_event event = IRQ_RISE;
irq_handler(gpio_channel->channel_ids[gpio_idx], event);
return;
}
if (LL_EXTI_IsActiveFallingFlag_0_31(pin) != RESET) {
LL_EXTI_ClearFallingFlag_0_31(pin);
if (gpio_channel->channel_ids[gpio_idx] == 0) {
continue;
}
gpio_irq_event event = IRQ_FALL;
irq_handler(gpio_channel->channel_ids[gpio_idx], event);
return;
}
#else /* TARGET_STM32L5 */
// Clear interrupt flag
if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) {
__HAL_GPIO_EXTI_CLEAR_FLAG(pin);
@ -125,6 +182,7 @@ static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
return;
}
#endif /* TARGET_STM32L5 */
}
}
error("Unexpected Spurious interrupt index %" PRIu32 "\n", irq_index);
@ -167,19 +225,82 @@ static void gpio_irq4(void)
}
#endif
#ifdef EXTI_IRQ5_NUM_LINES
// EXTI lines 5 to 9
// EXTI lines 5 to 9, except for STM32L5 line 5 only
static void gpio_irq5(void)
{
handle_interrupt_in(5, EXTI_IRQ5_NUM_LINES);
}
#endif
#ifdef EXTI_IRQ6_NUM_LINES
// EXTI lines 10 to 15
// EXTI lines 10 to 15, except for STM32L5 line 6 only
static void gpio_irq6(void)
{
handle_interrupt_in(6, EXTI_IRQ6_NUM_LINES);
}
#endif
#ifdef EXTI_IRQ7_NUM_LINES
// EXTI line 7 for STM32L5
static void gpio_irq7(void)
{
handle_interrupt_in(7, EXTI_IRQ7_NUM_LINES);
}
#endif
#ifdef EXTI_IRQ8_NUM_LINES
// EXTI line 8 for STM32L5
static void gpio_irq8(void)
{
handle_interrupt_in(8, EXTI_IRQ8_NUM_LINES);
}
#endif
#ifdef EXTI_IRQ9_NUM_LINES
// EXTI line 9 for STM32L5
static void gpio_irq9(void)
{
handle_interrupt_in(9, EXTI_IRQ9_NUM_LINES);
}
#endif
#ifdef EXTI_IRQ10_NUM_LINES
// EXTI line 10 for STM32L5
static void gpio_irq10(void)
{
handle_interrupt_in(10, EXTI_IRQ10_NUM_LINES);
}
#endif
#ifdef EXTI_IRQ11_NUM_LINES
// EXTI line 11 for STM32L5
static void gpio_irq11(void)
{
handle_interrupt_in(11, EXTI_IRQ11_NUM_LINES);
}
#endif
#ifdef EXTI_IRQ12_NUM_LINES
// EXTI line 12 for STM32L5
static void gpio_irq12(void)
{
handle_interrupt_in(12, EXTI_IRQ12_NUM_LINES);
}
#endif
#ifdef EXTI_IRQ13_NUM_LINES
// EXTI line 13 for STM32L5
static void gpio_irq13(void)
{
handle_interrupt_in(13, EXTI_IRQ13_NUM_LINES);
}
#endif
#ifdef EXTI_IRQ14_NUM_LINES
// EXTI line 14 for STM32L5
static void gpio_irq14(void)
{
handle_interrupt_in(14, EXTI_IRQ14_NUM_LINES);
}
#endif
#ifdef EXTI_IRQ15_NUM_LINES
// EXTI line 15 for STM32L5
static void gpio_irq15(void)
{
handle_interrupt_in(15, EXTI_IRQ15_NUM_LINES);
}
#endif
extern GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx);
extern void pin_function_gpiomode(PinName pin, uint32_t gpiomode);
@ -241,6 +362,51 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
case 6:
vector = (uint32_t)&gpio_irq6;
break;
#endif
#ifdef EXTI_IRQ7_NUM_LINES
case 7:
vector = (uint32_t)&gpio_irq7;
break;
#endif
#ifdef EXTI_IRQ8_NUM_LINES
case 8:
vector = (uint32_t)&gpio_irq8;
break;
#endif
#ifdef EXTI_IRQ9_NUM_LINES
case 9:
vector = (uint32_t)&gpio_irq9;
break;
#endif
#ifdef EXTI_IRQ10_NUM_LINES
case 10:
vector = (uint32_t)&gpio_irq10;
break;
#endif
#ifdef EXTI_IRQ11_NUM_LINES
case 11:
vector = (uint32_t)&gpio_irq11;
break;
#endif
#ifdef EXTI_IRQ12_NUM_LINES
case 12:
vector = (uint32_t)&gpio_irq12;
break;
#endif
#ifdef EXTI_IRQ13_NUM_LINES
case 13:
vector = (uint32_t)&gpio_irq13;
break;
#endif
#ifdef EXTI_IRQ14_NUM_LINES
case 14:
vector = (uint32_t)&gpio_irq14;
break;
#endif
#ifdef EXTI_IRQ15_NUM_LINES
case 15:
vector = (uint32_t)&gpio_irq15;
break;
#endif
default:
error("InterruptIn error: pin not supported.\n");
@ -321,7 +487,7 @@ void gpio_irq_enable(gpio_irq_t *obj)
/* Select Source */
#if defined(STM32G0)
#if defined(STM32G0) || defined(STM32L5)
temp = EXTI->EXTICR[pin_index >> 2];
CLEAR_BIT(temp, (0x0FU) << (8U * (pin_index & 0x03U)));
SET_BIT(temp, port_index << (8U * (pin_index & 0x03U)));

3
targets/TARGET_STM/i2c_api.c
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@ -490,6 +490,9 @@ void i2c_frequency(i2c_t *obj, int hz)
handle->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
handle->Init.OwnAddress1 = 0;
handle->Init.OwnAddress2 = 0;
#ifdef I2C_IP_VERSION_V2
handle->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
#endif
HAL_I2C_Init(handle);
/* store frequency for timeout computation */

9
targets/TARGET_STM/lp_ticker.c
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@ -257,14 +257,21 @@ void lp_ticker_init(void)
LptimHandle.Init.Trigger.SampleTime = LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION;
#endif
LptimHandle.Init.UltraLowPowerClock.SampleTime = LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION; // L5 ?
LptimHandle.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
LptimHandle.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
LptimHandle.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
#if defined (LPTIM_INPUT1SOURCE_GPIO) /* STM32L4 */
#if defined (LPTIM_INPUT1SOURCE_GPIO) /* STM32L4 / STM32L5 */
LptimHandle.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
LptimHandle.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
#endif /* LPTIM_INPUT1SOURCE_GPIO */
#if defined(LPTIM_RCR_REP) /* STM32L4 / STM32L5 */
LptimHandle.Init.RepetitionCounter = 0;
#endif /* LPTIM_RCR_REP */
if (HAL_LPTIM_Init(&LptimHandle) != HAL_OK) {
error("HAL_LPTIM_Init ERROR\n");
return;

8
targets/TARGET_STM/rtc_api.c
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@ -105,7 +105,7 @@ void rtc_init(void)
// Enable RTC
__HAL_RCC_RTC_ENABLE();
#if defined __HAL_RCC_RTCAPB_CLK_ENABLE /* part of STM32L4 */
#if defined __HAL_RCC_RTCAPB_CLK_ENABLE /* part of STM32L4 / STM32L5 */
__HAL_RCC_RTCAPB_CLK_ENABLE();
#endif /* __HAL_RCC_RTCAPB_CLK_ENABLE */
@ -418,9 +418,15 @@ void rtc_set_wake_up_timer(timestamp_t timestamp)
RtcHandle.Instance = RTC;
HAL_RTCEx_DeactivateWakeUpTimer(&RtcHandle);
#if defined (RTC_WUTR_WUTOCLR) /* STM32L5 */
if (HAL_RTCEx_SetWakeUpTimer_IT(&RtcHandle, WakeUpCounter, RTC_WAKEUPCLOCK_RTCCLK_DIV4, 0) != HAL_OK) {
error("rtc_set_wake_up_timer init error\n");
}
#else /* RTC_WUTR_WUTOCLR */
if (HAL_RTCEx_SetWakeUpTimer_IT(&RtcHandle, WakeUpCounter, WakeUpClock) != HAL_OK) {
error("rtc_set_wake_up_timer init error\n");
}
#endif /* RTC_WUTR_WUTOCLR */
NVIC_SetVector(RTC_WKUP_IRQn, (uint32_t)RTC_IRQHandler);
irq_handler = (void (*)(void))lp_ticker_irq_handler;

12
targets/TARGET_STM/serial_api.c
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@ -620,6 +620,18 @@ HAL_StatusTypeDef init_uart(serial_t *obj)
huart->TxXferSize = 0;
huart->RxXferCount = 0;
huart->RxXferSize = 0;
#if defined(UART_ONE_BIT_SAMPLE_DISABLE) // F0/F3/F7/G0/H7/L0/L4/L5/WB
huart->Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
#endif
#if defined(UART_PRESCALER_DIV1) // G0/H7/L4/L5/WB
huart->Init.ClockPrescaler = UART_PRESCALER_DIV1;
#endif
#if defined(UART_ADVFEATURE_NO_INIT) // F0/F3/F7/G0/H7/L0/L4//5/WB
huart->AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
#endif
#if defined(UART_FIFOMODE_DISABLE) // G0/H7/L4/L5/WB
huart->FifoMode = UART_FIFOMODE_DISABLE;
#endif
if (obj_s->pin_rx == NC) {
huart->Init.Mode = UART_MODE_TX;

3
targets/TARGET_STM/stm_spi_api.c
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@ -208,6 +208,9 @@ static void _spi_init_direct(spi_t *obj, const spi_pinmap_t *pinmap)
handle->Init.CLKPolarity = SPI_POLARITY_LOW;
handle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
handle->Init.CRCPolynomial = 7;
#if defined(SPI_CRC_LENGTH_DATASIZE)
handle->Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
#endif
handle->Init.DataSize = SPI_DATASIZE_8BIT;
handle->Init.FirstBit = SPI_FIRSTBIT_MSB;
handle->Init.TIMode = SPI_TIMODE_DISABLE;

14
targets/TARGET_STM/trng_api.c
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@ -86,6 +86,9 @@ void trng_init(trng_t *obj)
}
}
#elif defined(TARGET_STM32L5)
/* No need to reconfigure RngClockSelection as alreday done in SetSysClock */
#else
#error("RNG clock not configured");
#endif
@ -98,15 +101,22 @@ void trng_init(trng_t *obj)
obj->handle.Instance = RNG;
obj->handle.State = HAL_RNG_STATE_RESET;
obj->handle.Lock = HAL_UNLOCKED;
#if defined(RNG_CR_CED)
obj->handle.Init.ClockErrorDetection = RNG_CED_ENABLE;
#endif
#if defined(CFG_HW_RNG_SEMID)
/* In case RNG is a shared ressource, get the HW semaphore first */
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID));
#endif
HAL_RNG_Init(&obj->handle);
if (HAL_RNG_Init(&obj->handle) != HAL_OK) {
error("trng_init: HAL_RNG_Init\n");
}
/* first random number generated after setting the RNGEN bit should not be used */
HAL_RNG_GenerateRandomNumber(&obj->handle, &dummy);
if (HAL_RNG_GenerateRandomNumber(&obj->handle, &dummy) != HAL_OK) {
error("trng_init: HAL_RNG_GenerateRandomNumber\n");
}
#if defined(CFG_HW_RNG_SEMID)
LL_HSEM_ReleaseLock(HSEM, CFG_HW_RNG_SEMID, 0);

2
targets/TARGET_STM/watchdog_api.c
View File

@ -138,7 +138,7 @@ watchdog_features_t hal_watchdog_get_platform_features(void)
features.clock_max_frequency = 50000;
#elif defined(STM32H7) || defined(STM32L4) || defined(STM32WB)
features.clock_max_frequency = 33600;
#elif defined(STM32G0)
#elif defined(STM32G0) || defined(STM32L5)
features.clock_max_frequency = 34000;
#else
#error "unsupported target"