- Move back the 16/32bit timer initialization in HAL_InitTick() and not in us_ticker_init()
- Use ticker_read_us() and us_ticker_read() in HAL_GetTick() to fix potential overflow issue with the 16bit timer
==> These corrections allow timer, rtc, sleep, tick tests to PASS
- RTC_SSR for the subseconds
- RTC_TR for the time
- RTC_DR for the date
These registers were accessed through shadow registers which are synchronized with PCLK1 (APB1 clock).
They are now accessed directly in order to avoid waiting for the synchronization duration.
This change is to reduce delay of wake-up from power-down to pass Greentea test.
Because HIRC's accuracy is worse than HXT's, we must switch back to HXT for e.g. USBD application.
This can be done through setting NU_CLOCK_PLL to NU_HXT_PLL.
* Elevate RTC2 interrupt priority to same level as UARTE to prevent
race condition on shared variables.
* Remove unused TXDRDY event code.
* Fix typo in macro.
In serial_tx_active and serial_rx_active functions,
we check the internal state value with
HAL_UART_STATE_BUSY_TX = 0x21U,
HAL_UART_STATE_BUSY_RX = 0x22U,
It seems that value can also be :
HAL_UART_STATE_BUSY_TX_RX = 0x23U,
It has been noticed that there is a problem with us ticker on NRF_52840 board after 32 bit counter has been used for us ticker on NRF52 family boards.
Currently NRF52 symbol is defined only for MCU_NRF52832 (not for MCU_NRF52840) and based on this symbol 16 or 32 bit counter is selected (16 bit for NRF51 family and 32 for NRF52 family).
Since MCU_NRF52840 defines NRF52840_XXAA and provides 32 bit counters, 32 bit counter should be selected also when NRF52840_XXAA symbol is defined.
These wiced targets are not supported at mbed-os 2 release, so removing
"2" from release_versions.
LWIP feature flag removed, since it isn't needed anymore.
EMAC removed from device_has_add, since it isn't needed with these targets.
"network-default-interface-type": "WIFI" has been added.
1. Introduce S/W interrupt enable/disable to reduce calls to TIMER_EnableInt/TIMER_DisableInt.
2. Allow dummy interrupt because clear interrupt flag is not synchronized.
3. Enable LPTICKER_DELAY_TICKS to make lp_ticker_set_interrupt non-blocking.
Decreased stack size from 24kB to 1kB (stack is used on boot-up/interrupt
handler). Increased heap size from 65kB to 89kB.
Change is related to issue https://github.com/ARMmbed/mbed-os/issues/7137
where UBLOX_EVK_ODIN_W2 runs out of heap on WLAN.
I modified RAM size of ARMCC compiler for GR-LYCHEE.
In case of GR-LYCHEE, RAM size is 3M Byte(including Non-Cache area), but there was a typo at MACRO definition.
The mainly changes is below:
- Update scatter file, linker file for bootloader support
- Update the file for RZ/A1 serial flash boot loader
- Add "device name" and "bootloader_supported" in targets.json
The mainly changes is below:
- Add flash_api.c
- Add the definition of SPI multi I/O Bus controller that is used for flash access
- Add "FLASH" as device feature
- Add the macro regarding information of the incorporated Flash
- Add the processing to expand code to RAM
1. Add the IVT header to the binary as this is required for boot up
This was earlier added by the DAPLink firmware. As it is no longer
handled in DAPLink, the header needs to be added inside mbed.
2. Update drivers
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
New changes to Mbed error reporting in 5.9 exposed bug in SPI
driver where an instance was uninitialized twice which triggered
an ASSERT.
This fix keeps track of which instance has been initialized and
only calls uninit when it is safe.
There are cases where a call hal_deepsleep would overflow the idle task
stack, especially in developper or debug profile.
In order to avoid this case, we split ForceClockOutofDeepSleep
into two separate functions the two structure RCC_ClkInitStruct and
RCC_OscInitStruct are not allocated at the same time.
Set the second highest user level, leaving the highest for UART (we are having constant overflows) and two levels below for everything else.
This should increase the timer accuracy.
1. Problems were seen on the LPC54628 as the ADC clock source was too
high
2. Moved the pin configuration to set Analog mode to the end of the
function
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
RTC counter is 24-bit. Upper layer handles counter size and wraps ticks count when interrupt is to be fired before passing it to common_rtc_set_interrupt(), but for consistency and safety reasons we can wrap it again in the NRF driver.
The nrf section features has different implementations for each compilers supported by mbed-os. The header guard was ruling out compiler other than GCC by checking if __GNUC__ is defined. This check is not applicable on mbed os as the ARM compiler compile sources with gnu compatibility.
This patch makes sure that the right implementation is selected for the right compiler . The previous patch has been reverted as it is not reliable.
mbed RTC specifications now dictate that the RTC needs to retain and keep on counting through reset. On Silicon Labs parts, this means the RTC API can not be backed by the Silicon Labs RTC peripheral, since that doesn't provide retention functionality.
Therefore:
* On EFM32GG, EFM32WG, EFM32LG: mbed RTC API is now backed by BURTC.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: mbed RTC API is now backed by RTCC.
* On EFM32ZG, EFM32HG: mbed RTC API is sadly no longer supported, since these chips don't have retained memory.
I implemented the RTC feature.
The mainly changing is here.
- rtc_init()
Previously, I have initialized the time information register in the function, so the time count was cleaned by every calling rtc_init().
Currently, rtc_init() doesn't stop RTC from counting, and rtc_init() is safe to call repeatedly.
Therefore in order to satisfy specifications,I removed the initialization process of the time information register in the function.
- rtc_free()
Previously, I have initialized the RTC related register same as rtc_init(), so the time count was cleaned by calling rtc_free().
Currently, rtc_free() doesn't stop RTC from counting.
Therefore in order to satisfy specifications,I removed the process and decided not to do anything in the function.
If powerdown the RTC, Supply of the clock to the RTC is stopped, cannot keeping the count.
Make rtc_isenabled() to return 1 if the RTC is initialized and the time has been set; 0 otherwise.
Disable clock gate on exit from this function if RTC was initialized.
Keep the RTC code if either DEVICE_RTC or DEVICE_LOWPOWERTIMER is
defined on the devices which use the RTC for both the rtc api and the
low power timer api. This allows DEVICE_LOWPOWERTIMER to be enabled while
DEVICE_RTC is turned off.
- Disable microsecond ticker interrupt on reinitialization
- Skip us_ticker_set_interrupt() if timestamp is already past
- Eliminate tmr2Config since tmrConfig is adequate for all timer config
1. Enable LPTICKER for K22, K24, K64, K66, K82, KL82F, KW24D
2. Change the implementation to only use the LPTMR which reduces
the amount of interrupts generated which is required for tickless
operation
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
I decided to move these files to the targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51 since us_ticker.h is for sure specific for NRF51_DK and common_rtc.c might be valid also for NRF52, but this needs to be checked while porting NRF52_DK board.
Provide the following modifications for lp ticker driver:
- According to NRF51_DK reference manual rtc interrupt cannot be controlled by rtc event. In the previous implementation interrupts were enabled permanently and specific interrupt was enabled/disabled by enabling/disabling the specific event. If event is enabled, then event signal is provided to Programmable Peripheral Interconnect (PPI). If interrupt is enabled, then interrupt signal is provided to Nested Vector Interrupt Controller (NVIC). Disable all events permanently. Enable lp ticker overflow interrupt permanently(needed for RTC), disable lp ticker capture/compare interrupt on init (lp_ticker_init) , enable lp ticker interrupt when lp ticker interrupt is set (lp_ticker_set_interrupt), disable lp ticker interrupt on disable request(lp_ticker_disable_interrupt).
- Provide lp ticker data for higher level (freq: 32kHz / len: 24 bits),
- Add the following features to init routine: disable lp ticker interrupt.
- Make ticker driver to operate on ticks instead of us.
- Simplify lp ticker read and set interrupt routines (upper layers handle conversion to us and interrupt scheduling).
According to new ticker standards the following requirements for us ticker are not met on RRF5 boards:
- has a frequency between 250KHz and 8MHz (currently is driven by 32kHz clock)
- ticker increments by 1 each tick (currently is scaled to 1 MHz by incrementing counter by ~31)
Since BLE softdevice uses TIMER0 the proposition is to use high speed TIMER1 for us ticker configured as follows:
- TIMER counter width: 16 bits (max)
- TIMER frequency: 1MHz
This solution also uses Timer's capture/compare register 0 to specify interrupt time and Timer's capture/compare register 1 to read current timer value.
I implemented USTICKER feature.
The mainly changing is here.
- I added a macro to mbed_drv_cfg.h for commonalizing code for GR-PEACH and GR-LYCHEE with different clock frequencies, and referenced it's macro at us_ticker.c.
- ticker_init()
Currently, ticker_init() keep counting, disables the ticker interrupt, and is safe to call repeatedly.
Therefore, in order to satisfy specifications, I removed GIC_EnableIRQ at end of function and added GIC_DisableIRQ at begin of function.
When an interrupt is required, it will be set with ticker_set_interrupt().
If executing the following, the counter has been initialized. So it will not call after executing the first time.
OSTM1TT = 0x01; /* Stop the counter and clears the OSTM1TE bit. */
OSTM1TS = 0x1; /* Start the counter and sets the OSTM0TE bit. */
- ticker_free()
this function stops the counting and powerdown the us_ticker.
To satisfy the mbed specificationm, I implemented free() function.
- ticker_read()
Currently, Mbed spec's frequeny is between 250KHz and 8MHz, but the frequency that is used at my ticker is 33MHz.
Therefore, in order to satisfy specifications, I changed the process to return the timer counter value divided by 32(33MHz / 32).
Since the calcurate function by using 64 bit is no longer necessay, I removed it.
- ticker_set_interrupt()
Same as the above read(),
In order to satisfy specifications, I changed the process to set the value multiplied by 32.
- ticker_fire_interrupt()
In order to satisfy specifications, I implemented fire_interrupt() function.
Also I added GIC_EnableIRQ for allowing the interrupt at end of function.
- ticker_get_info()
To satisfy the mbed specificationm, I implemented ticker_get_info() function. The value of freq includes rounding off.
The new HAL allows to share the timer bit width and frequency,
the actual handling of mapping 16 bits counter up to 32 bits or
64 bits is now managed by mbed common layer.
This makes this ticker layer very similar to 32bits one and much
easier than before.
Re-implemented both us_ticker and lp_ticker to match the new API and specifications.
Details:
* On EFM32GG, EFM32WG, EFM32LG, EFM32HG, EFM32ZG: Use the RTC peripheral to back lp_ticker, and a TIMER to back us_ticker.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: Use the RTCC peripheral to back lp_ticker (dual-purpose, also used to back RTC), and a TIMER to back us_ticker.
mbed RTC specifications now dictate that the RTC needs to retain and keep on counting through reset. On Silicon Labs parts, this means the RTC API can not be backed by the Silicon Labs RTC peripheral, since that doesn't provide retention functionality.
Therefore:
* On EFM32GG, EFM32WG, EFM32LG: mbed RTC API is now backed by BURTC.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: mbed RTC API is now backed by RTCC.
* On EFM32ZG, EFM32HG: mbed RTC API is sadly no longer supported, since these chips don't have retained memory.
# Conflicts:
# targets/TARGET_Silicon_Labs/TARGET_EFM32/lp_ticker.c
# targets/TARGET_Silicon_Labs/TARGET_EFM32/rtc_api.c
# targets/targets.json
Low power ticker time counter is created based on RTC which is driven by 32KHz clock. Additional low power timer is used to generate interrupts.
We need to adapt driver to operate on ticks instead of us.
Perform the following updates:
- provide lp ticker configuration: 32KHz/32 bit counter.
- lp_ticker_init() routine disables lp ticker interrupts .
- adapt the driver functions to operate on ticks instead us.
- adapt comments.
- add us_ticker_free() routine.
I implemented the SLEEP feature for Rnesas mbed boards.
The mainly changing is here.
- hal_sleep()
To satisfy the mbed specificationm, I implemented this function newly by using "sleep" that is one of low power mode that is incorporated in our hardware(RZ_A1).
In the "sleep", peripheral and memory state are maintained, and the peripherals continue to work and can generate interrupts.
- hal_deepsleep()
To satisfy the mbed specificationm, I implemented this function newly by combined using "sleep" and "module standby" that is the low power mode that is incorporated in our hardware(RZ_A1).
The "module standby" is peripheral module's powerdown.
Also in case of our "module standby", it need to read register as dummy when access to each register.
These boards will be re-enabled when sleep driver for them is ready.
Note:
This operation is done by removing "SLEEP" feature from target's "device_has" list (in targets.json config file).
For NRF52_DK removing of "SLEEP" feature causes some timing issues which have influence on tests. In order to successfully disable this board we need to disable also related features like "USTICKER", "LOWPOERTIMER" and slightly modify ticker tests, so they will not be executed if usticker support is not available (by default all targets support us ticker).
Sleep - within 10us
Deepsleep - within 10ms
Note about mbed boards with interface, moved to lpc176x, as they are target related,
should be documented in the target documentation.
The tests will come as separate PR, to conform to this updates to sleep API.
Patch to LPC546XX SDK code - write the low Ethernet MAC address
register last, as that synchronises the update.
Without this change, the ENET_SetMacAddr call only seems to work prior
to MAC initialisation, causing problems for the new mbed OS EMAC system,
which expects it to be changable later.
Updated emac greentea tests #6851.
Implementation of unified EMAC driver for Renesas mbed boards
Based on the driver so far, Renesas implemented the emac driver for GR-PEACH and VK-RZ/A1H.
The mainly changes is below.
- Add the connection part with LWIP according to the unified emac specification.
- Add three new multicast functions(add, remove, set_all).
The Greentea test netsocket and emac test passed.
Just checking "does the chip have an EMAC" doesn't work - there are
targets using those chips which do not have an Ethernet connector and
don't provide the necessary surrounding infrastructure (eg DISCO_F429ZI,
not providing the board emac config call, and HEXIWEAR not providing PHY
info).
Make the targets that actually do want EMAC define their own local
Freescale_EMAC and STM_EMAC labels, and move the drivers into
the corresponding TARGET_ directories, removing the #ifdefs.
* Since mbed does not overwrite itself, make the flashing routines run out of flash by default
* Report a writeable size of 4 bytes (previously erroneously reported a full eraseable page as the minimum write size)
cyliangtw
Mirela Chirica
Cruz Monrreal
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jeromecoutant
Martin Kojtal
Kimmo Vaisanen
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Mahesh Mahadevan
Mika Leppänen
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Przemyslaw Stekiel
Kari Haapalehto
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Bernhard Schuster
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Keyur Hariya
David Saada
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Vincent Coubard
Andrew Leech
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zzw
Bartek Szatkowski
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Asif Rizwan
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