mirror of https://github.com/ARMmbed/mbed-os.git
[M487/NUC472] Support new EMAC feature, built OK
cyliangtw
Kevin Bracey
parent
26f369919b
commit
89209b6cd5
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@ -0,0 +1,434 @@
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/*
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* Copyright (c) 2013 Nuvoton Technology Corp.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Description: NUC472 MAC driver source file
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*/
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#include "nuc472_eth.h"
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#include "mbed_toolchain.h"
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#define ETH_TRIGGER_RX() do{EMAC->RXST = 0;}while(0)
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#define ETH_TRIGGER_TX() do{EMAC->TXST = 0;}while(0)
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#define ETH_ENABLE_TX() do{EMAC->CTL |= EMAC_CTL_TXON;}while(0)
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#define ETH_ENABLE_RX() do{EMAC->CTL |= EMAC_CTL_RXON;}while(0)
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#define ETH_DISABLE_TX() do{EMAC->CTL &= ~EMAC_CTL_TXON;}while(0)
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#define ETH_DISABLE_RX() do{EMAC->CTL &= ~EMAC_CTL_RXON;}while(0)
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#define NU_DEBUGF printf
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/*
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#ifdef __ICCARM__
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#pragma data_alignment=4
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struct eth_descriptor rx_desc[RX_DESCRIPTOR_NUM];
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struct eth_descriptor tx_desc[TX_DESCRIPTOR_NUM];
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#else
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struct eth_descriptor rx_desc[RX_DESCRIPTOR_NUM] __attribute__ ((aligned(4)));
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struct eth_descriptor tx_desc[TX_DESCRIPTOR_NUM] __attribute__ ((aligned(4)));
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#endif
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*/
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struct eth_descriptor rx_desc[RX_DESCRIPTOR_NUM] MBED_ALIGN(4);
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struct eth_descriptor tx_desc[TX_DESCRIPTOR_NUM] MBED_ALIGN(4);
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struct eth_descriptor volatile *cur_tx_desc_ptr, *cur_rx_desc_ptr, *fin_tx_desc_ptr;
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uint8_t rx_buf[RX_DESCRIPTOR_NUM][PACKET_BUFFER_SIZE] MBED_ALIGN(4);
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uint8_t tx_buf[TX_DESCRIPTOR_NUM][PACKET_BUFFER_SIZE] MBED_ALIGN(4);
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typedef void (* eth_callback_t) (char, void*);
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eth_callback_t nu_eth_txrx_cb = NULL;
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void *nu_userData = NULL;
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//extern void ethernetif_input(uint16_t len, uint8_t *buf, uint32_t s, uint32_t ns);
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extern void ack_emac_rx_isr(void);
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// PTP source clock is 84MHz (Real chip using PLL). Each tick is 11.90ns
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// Assume we want to set each tick to 100ns.
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// Increase register = (100 * 2^31) / (10^9) = 214.71 =~ 215 = 0xD7
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// Addend register = 2^32 * tick_freq / (84MHz), where tick_freq = (2^31 / 215) MHz
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// From above equation, addend register = 2^63 / (84M * 215) ~= 510707200 = 0x1E70C600
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static void mdio_write(uint8_t addr, uint8_t reg, uint16_t val)
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{
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EMAC->MIIMDAT = val;
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EMAC->MIIMCTL = (addr << EMAC_MIIMCTL_PHYADDR_Pos) | reg | EMAC_MIIMCTL_BUSY_Msk | EMAC_MIIMCTL_WRITE_Msk | EMAC_MIIMCTL_MDCON_Msk;
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while (EMAC->MIIMCTL & EMAC_MIIMCTL_BUSY_Msk);
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}
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static uint16_t mdio_read(uint8_t addr, uint8_t reg)
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{
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EMAC->MIIMCTL = (addr << EMAC_MIIMCTL_PHYADDR_Pos) | reg | EMAC_MIIMCTL_BUSY_Msk | EMAC_MIIMCTL_MDCON_Msk;
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while (EMAC->MIIMCTL & EMAC_MIIMCTL_BUSY_Msk);
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return(EMAC->MIIMDAT);
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}
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static int reset_phy(void)
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{
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uint16_t reg;
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uint32_t delay;
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mdio_write(CONFIG_PHY_ADDR, MII_BMCR, BMCR_RESET);
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delay = 2000;
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while(delay-- > 0) {
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if((mdio_read(CONFIG_PHY_ADDR, MII_BMCR) & BMCR_RESET) == 0)
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break;
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}
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if(delay == 0) {
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NU_DEBUGF("Reset phy failed\n");
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return(-1);
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}
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mdio_write(CONFIG_PHY_ADDR, MII_ADVERTISE, ADVERTISE_CSMA |
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ADVERTISE_10HALF |
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ADVERTISE_10FULL |
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ADVERTISE_100HALF |
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ADVERTISE_100FULL);
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reg = mdio_read(CONFIG_PHY_ADDR, MII_BMCR);
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mdio_write(CONFIG_PHY_ADDR, MII_BMCR, reg | BMCR_ANRESTART);
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delay = 200000;
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while(delay-- > 0) {
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if((mdio_read(CONFIG_PHY_ADDR, MII_BMSR) & (BMSR_ANEGCOMPLETE | BMSR_LSTATUS))
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== (BMSR_ANEGCOMPLETE | BMSR_LSTATUS))
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break;
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}
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if(delay == 0) {
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NU_DEBUGF("AN failed. Set to 100 FULL\n");
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EMAC->CTL |= (EMAC_CTL_OPMODE_Msk | EMAC_CTL_FUDUP_Msk);
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return(-1);
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} else {
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reg = mdio_read(CONFIG_PHY_ADDR, MII_LPA);
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if(reg & ADVERTISE_100FULL) {
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NU_DEBUGF("100 full\n");
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EMAC->CTL |= (EMAC_CTL_OPMODE_Msk | EMAC_CTL_FUDUP_Msk);
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} else if(reg & ADVERTISE_100HALF) {
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NU_DEBUGF("100 half\n");
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EMAC->CTL = (EMAC->CTL & ~EMAC_CTL_FUDUP_Msk) | EMAC_CTL_OPMODE_Msk;
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} else if(reg & ADVERTISE_10FULL) {
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NU_DEBUGF("10 full\n");
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EMAC->CTL = (EMAC->CTL & ~EMAC_CTL_OPMODE_Msk) | EMAC_CTL_FUDUP_Msk;
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} else {
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NU_DEBUGF("10 half\n");
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EMAC->CTL &= ~(EMAC_CTL_OPMODE_Msk | EMAC_CTL_FUDUP_Msk);
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}
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}
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return(0);
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}
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static void init_tx_desc(void)
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{
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uint32_t i;
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cur_tx_desc_ptr = fin_tx_desc_ptr = &tx_desc[0];
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for(i = 0; i < TX_DESCRIPTOR_NUM; i++) {
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tx_desc[i].status1 = TXFD_PADEN | TXFD_CRCAPP | TXFD_INTEN;
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tx_desc[i].buf = &tx_buf[i][0];
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tx_desc[i].status2 = 0;
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tx_desc[i].next = &tx_desc[(i + 1) % TX_DESCRIPTOR_NUM];
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}
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EMAC->TXDSA = (unsigned int)&tx_desc[0];
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return;
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}
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static void init_rx_desc(void)
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{
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uint32_t i;
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cur_rx_desc_ptr = &rx_desc[0];
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for(i = 0; i < RX_DESCRIPTOR_NUM; i++) {
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rx_desc[i].status1 = OWNERSHIP_EMAC;
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rx_desc[i].buf = &rx_buf[i][0];
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rx_desc[i].status2 = 0;
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rx_desc[i].next = &rx_desc[(i + 1) % TX_DESCRIPTOR_NUM];
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}
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EMAC->RXDSA = (unsigned int)&rx_desc[0];
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return;
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}
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void numaker_set_mac_addr(uint8_t *addr)
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{
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EMAC->CAM0M = (addr[0] << 24) |
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(addr[1] << 16) |
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(addr[2] << 8) |
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addr[3];
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EMAC->CAM0L = (addr[4] << 24) |
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(addr[5] << 16);
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EMAC->CAMCTL = EMAC_CAMCTL_CMPEN_Msk | EMAC_CAMCTL_AMP_Msk | EMAC_CAMCTL_ABP_Msk;
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EMAC->CAMEN = 1; // Enable CAM entry 0
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}
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static void __eth_clk_pin_init()
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{
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/* Enable IP clock */
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CLK_EnableModuleClock(EMAC_MODULE);
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// Configure MDC clock rate to HCLK / (127 + 1) = 656 kHz if system is running at 84 MHz
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CLK_SetModuleClock(EMAC_MODULE, 0, CLK_CLKDIV3_EMAC(127));
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/*---------------------------------------------------------------------------------------------------------*/
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/* Init I/O Multi-function */
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/*---------------------------------------------------------------------------------------------------------*/
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// Configure RMII pins
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SYS->GPC_MFPL &= ~( SYS_GPC_MFPL_PC0MFP_Msk | SYS_GPC_MFPL_PC1MFP_Msk |
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SYS_GPC_MFPL_PC2MFP_Msk | SYS_GPC_MFPL_PC3MFP_Msk |
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SYS_GPC_MFPL_PC4MFP_Msk | SYS_GPC_MFPL_PC6MFP_Msk | SYS_GPC_MFPL_PC7MFP_Msk );
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC0MFP_EMAC_REFCLK |
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SYS_GPC_MFPL_PC1MFP_EMAC_MII_RXERR |
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SYS_GPC_MFPL_PC2MFP_EMAC_MII_RXDV |
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SYS_GPC_MFPL_PC3MFP_EMAC_MII_RXD1 |
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SYS_GPC_MFPL_PC4MFP_EMAC_MII_RXD0 |
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SYS_GPC_MFPL_PC6MFP_EMAC_MII_TXD0 |
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SYS_GPC_MFPL_PC7MFP_EMAC_MII_TXD1;
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SYS->GPC_MFPH &= ~SYS_GPC_MFPH_PC8MFP_Msk;
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SYS->GPC_MFPH |= SYS_GPC_MFPH_PC8MFP_EMAC_MII_TXEN;
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// Enable high slew rate on all RMII pins
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PC->SLEWCTL |= 0x1DF;
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// Configure MDC, MDIO at PB14 & PB15
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SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB14MFP_Msk | SYS_GPB_MFPH_PB15MFP_Msk);
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SYS->GPB_MFPH |= SYS_GPB_MFPH_PB14MFP_EMAC_MII_MDC | SYS_GPB_MFPH_PB15MFP_EMAC_MII_MDIO;
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}
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void numaker_eth_init(uint8_t *mac_addr)
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{
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// init CLK & pins
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__eth_clk_pin_init();
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// Reset MAC
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EMAC->CTL = EMAC_CTL_RST_Msk;
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init_tx_desc();
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init_rx_desc();
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numaker_set_mac_addr(mac_addr); // need to reconfigure hardware address 'cos we just RESET emc...
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reset_phy();
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EMAC->CTL |= EMAC_CTL_STRIPCRC_Msk | EMAC_CTL_RXON_Msk | EMAC_CTL_TXON_Msk | EMAC_CTL_RMIIEN_Msk | EMAC_CTL_RMIIRXCTL_Msk;
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EMAC->INTEN |= EMAC_INTEN_RXIEN_Msk |
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EMAC_INTEN_RXGDIEN_Msk |
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EMAC_INTEN_RDUIEN_Msk |
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EMAC_INTEN_RXBEIEN_Msk |
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EMAC_INTEN_TXIEN_Msk |
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EMAC_INTEN_TXABTIEN_Msk |
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EMAC_INTEN_TXCPIEN_Msk |
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EMAC_INTEN_TXBEIEN_Msk;
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EMAC->RXST = 0; // trigger Rx
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}
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void ETH_halt(void)
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{
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EMAC->CTL &= ~(EMAC_CTL_RXON_Msk | EMAC_CTL_TXON_Msk);
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}
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unsigned int m_status;
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void EMAC_RX_IRQHandler(void)
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{
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m_status = EMAC->INTSTS & 0xFFFF;
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EMAC->INTSTS = m_status;
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if (m_status & EMAC_INTSTS_RXBEIF_Msk) {
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// Shouldn't goes here, unless descriptor corrupted
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NU_DEBUGF("RX descriptor corrupted \r\n");
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//return;
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}
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if (nu_eth_txrx_cb != NULL) nu_eth_txrx_cb('R', nu_userData); //ack_emac_rx_isr();
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}
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void EMAC_RX_Action(void)
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{
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unsigned int cur_entry, status;
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do {
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cur_entry = EMAC->CRXDSA;
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if ((cur_entry == (uint32_t)cur_rx_desc_ptr) && (!(m_status & EMAC_INTSTS_RDUIF_Msk))) // cur_entry may equal to cur_rx_desc_ptr if RDU occures
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break;
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status = cur_rx_desc_ptr->status1;
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if(status & OWNERSHIP_EMAC)
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break;
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if (status & RXFD_RXGD) {
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// Lwip will invoke osMutexWait for resource protection, so ethernetif_input can't be called in EMAC_RX_IRQHandler.
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//ethernetif_input(status & 0xFFFF, cur_rx_desc_ptr->buf, cur_rx_desc_ptr->status2, (uint32_t)cur_rx_desc_ptr->next);
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}
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cur_rx_desc_ptr->status1 = OWNERSHIP_EMAC;
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cur_rx_desc_ptr = cur_rx_desc_ptr->next;
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} while (1);
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ETH_TRIGGER_RX();
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// eth_arch_tcpip_thread();
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}
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void numaker_eth_trigger_rx(void)
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{
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ETH_TRIGGER_RX();
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}
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int numaker_eth_get_rx_buf(uint16_t *len, uint8_t **buf)
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{
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unsigned int cur_entry, status;
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cur_entry = EMAC->CRXDSA;
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if ((cur_entry == (uint32_t)cur_rx_desc_ptr) && (!(m_status & EMAC_INTSTS_RDUIF_Msk))) // cur_entry may equal to cur_rx_desc_ptr if RDU occures
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return -1;
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status = cur_rx_desc_ptr->status1;
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if(status & OWNERSHIP_EMAC)
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return -1;
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if (status & RXFD_RXGD) {
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cur_rx_desc_ptr->status1 = OWNERSHIP_EMAC;
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cur_rx_desc_ptr = cur_rx_desc_ptr->next;
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}
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cur_rx_desc_ptr->status1 = OWNERSHIP_EMAC;
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cur_rx_desc_ptr = cur_rx_desc_ptr->next;
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return 0;
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}
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void EMAC_TX_IRQHandler(void)
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{
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unsigned int cur_entry, status;
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status = EMAC->INTSTS & 0xFFFF0000;
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EMAC->INTSTS = status;
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if(status & EMAC_INTSTS_TXBEIF_Msk) {
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// Shouldn't goes here, unless descriptor corrupted
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return;
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}
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cur_entry = EMAC->CTXDSA;
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while (cur_entry != (uint32_t)fin_tx_desc_ptr) {
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fin_tx_desc_ptr = fin_tx_desc_ptr->next;
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}
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if (nu_eth_txrx_cb != NULL) nu_eth_txrx_cb('T', nu_userData);
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}
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uint8_t *numaker_eth_get_tx_buf(void)
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{
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if(cur_tx_desc_ptr->status1 & OWNERSHIP_EMAC)
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return(NULL);
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else
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return(cur_tx_desc_ptr->buf);
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}
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void numaker_eth_trigger_tx(uint16_t length, void *p)
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{
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struct eth_descriptor volatile *desc;
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cur_tx_desc_ptr->status2 = (unsigned int)length;
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desc = cur_tx_desc_ptr->next; // in case TX is transmitting and overwrite next pointer before we can update cur_tx_desc_ptr
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cur_tx_desc_ptr->status1 |= OWNERSHIP_EMAC;
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cur_tx_desc_ptr = desc;
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ETH_TRIGGER_TX();
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}
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int numaker_eth_link_ok(void)
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{
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/* first, a dummy read to latch */
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mdio_read(CONFIG_PHY_ADDR, MII_BMSR);
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if(mdio_read(CONFIG_PHY_ADDR, MII_BMSR) & BMSR_LSTATUS)
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return 1;
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return 0;
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}
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void numaker_eth_set_cb(eth_callback_t eth_cb, void *userData)
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{
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nu_eth_txrx_cb = eth_cb;
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nu_userData = userData;
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}
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// Override mbed_mac_address of mbed_interface.c to provide ethernet devices with a semi-unique MAC address
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void mbed_mac_address(char *mac)
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{
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uint32_t uID1;
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// Fetch word 0
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uint32_t word0 = *(uint32_t *)0x7F804; // 2KB Data Flash at 0x7F800
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// Fetch word 1
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// we only want bottom 16 bits of word1 (MAC bits 32-47)
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// and bit 9 forced to 1, bit 8 forced to 0
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// Locally administered MAC, reduced conflicts
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// http://en.wikipedia.org/wiki/MAC_address
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uint32_t word1 = *(uint32_t *)0x7F800; // 2KB Data Flash at 0x7F800
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if( word0 == 0xFFFFFFFF ) // Not burn any mac address at 1st 2 words of Data Flash
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{
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// with a semi-unique MAC address from the UUID
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/* Enable FMC ISP function */
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SYS_UnlockReg();
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FMC_Open();
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// = FMC_ReadUID(0);
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uID1 = FMC_ReadUID(1);
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word1 = (uID1 & 0x003FFFFF) | ((uID1 & 0x030000) << 6) >> 8;
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word0 = ((FMC_ReadUID(0) >> 4) << 20) | ((uID1 & 0xFF)<<12) | (FMC_ReadUID(2) & 0xFFF);
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/* Disable FMC ISP function */
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FMC_Close();
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/* Lock protected registers */
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SYS_LockReg();
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}
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|
||||
word1 |= 0x00000200;
|
||||
word1 &= 0x0000FEFF;
|
||||
|
||||
mac[0] = (word1 & 0x0000ff00) >> 8;
|
||||
mac[1] = (word1 & 0x000000ff);
|
||||
mac[2] = (word0 & 0xff000000) >> 24;
|
||||
mac[3] = (word0 & 0x00ff0000) >> 16;
|
||||
mac[4] = (word0 & 0x0000ff00) >> 8;
|
||||
mac[5] = (word0 & 0x000000ff);
|
||||
|
||||
printf("mac address %02x-%02x-%02x-%02x-%02x-%02x \r\n", mac[0], mac[1],mac[2],mac[3],mac[4],mac[5]);
|
||||
}
|
||||
|
|
@ -0,0 +1,149 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Nuvoton Technology Corp.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
* Description: NUC472 EMAC driver header file
|
||||
*/
|
||||
#include "NUC472_442.h"
|
||||
#include "numaker_emac_config.h"
|
||||
#ifndef _NUC472_ETH_
|
||||
#define _NUC472_ETH_
|
||||
|
||||
/* Generic MII registers. */
|
||||
|
||||
#define MII_BMCR 0x00 /* Basic mode control register */
|
||||
#define MII_BMSR 0x01 /* Basic mode status register */
|
||||
#define MII_PHYSID1 0x02 /* PHYS ID 1 */
|
||||
#define MII_PHYSID2 0x03 /* PHYS ID 2 */
|
||||
#define MII_ADVERTISE 0x04 /* Advertisement control reg */
|
||||
#define MII_LPA 0x05 /* Link partner ability reg */
|
||||
#define MII_EXPANSION 0x06 /* Expansion register */
|
||||
#define MII_DCOUNTER 0x12 /* Disconnect counter */
|
||||
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
|
||||
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
|
||||
#define MII_RERRCOUNTER 0x15 /* Receive error counter */
|
||||
#define MII_SREVISION 0x16 /* Silicon revision */
|
||||
#define MII_RESV1 0x17 /* Reserved... */
|
||||
#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
|
||||
#define MII_PHYADDR 0x19 /* PHY address */
|
||||
#define MII_RESV2 0x1a /* Reserved... */
|
||||
#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
|
||||
#define MII_NCONFIG 0x1c /* Network interface config */
|
||||
|
||||
/* Basic mode control register. */
|
||||
#define BMCR_RESV 0x007f /* Unused... */
|
||||
#define BMCR_CTST 0x0080 /* Collision test */
|
||||
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
|
||||
#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
|
||||
#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
|
||||
#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
|
||||
#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
|
||||
#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
|
||||
#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
|
||||
#define BMCR_RESET 0x8000 /* Reset the DP83840 */
|
||||
|
||||
/* Basic mode status register. */
|
||||
#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
|
||||
#define BMSR_JCD 0x0002 /* Jabber detected */
|
||||
#define BMSR_LSTATUS 0x0004 /* Link status */
|
||||
#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
|
||||
#define BMSR_RFAULT 0x0010 /* Remote fault detected */
|
||||
#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
|
||||
#define BMSR_RESV 0x07c0 /* Unused... */
|
||||
#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
|
||||
#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
|
||||
#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
|
||||
#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
|
||||
#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
|
||||
|
||||
/* Advertisement control register. */
|
||||
#define ADVERTISE_SLCT 0x001f /* Selector bits */
|
||||
#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
|
||||
#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
|
||||
#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
|
||||
#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
|
||||
#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
|
||||
#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
|
||||
#define ADVERTISE_RESV 0x1c00 /* Unused... */
|
||||
#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
|
||||
#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
|
||||
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
|
||||
|
||||
#define RX_DESCRIPTOR_NUM NU_RX_RING_LEN//4 //2 // 4: Max Number of Rx Frame Descriptors
|
||||
#define TX_DESCRIPTOR_NUM NU_TX_RING_LEN//4 //2 // 4: Max number of Tx Frame Descriptors
|
||||
|
||||
#define PACKET_BUFFER_SIZE NU_ETH_MAX_FLEN//1520
|
||||
|
||||
#define CONFIG_PHY_ADDR 1
|
||||
|
||||
|
||||
// Frame Descriptor's Owner bit
|
||||
#define OWNERSHIP_EMAC 0x80000000 // 1 = EMAC
|
||||
//#define OWNERSHIP_CPU 0x7fffffff // 0 = CPU
|
||||
|
||||
|
||||
|
||||
// Rx Frame Descriptor Status
|
||||
#define RXFD_RXGD 0x00100000 // Receiving Good Packet Received
|
||||
#define RXFD_RTSAS 0x00800000 // RX Time Stamp Available
|
||||
|
||||
|
||||
// Tx Frame Descriptor's Control bits
|
||||
#define TXFD_TTSEN 0x08 // Tx Time Stamp Enable
|
||||
#define TXFD_INTEN 0x04 // Interrupt Enable
|
||||
#define TXFD_CRCAPP 0x02 // Append CRC
|
||||
#define TXFD_PADEN 0x01 // Padding Enable
|
||||
|
||||
// Tx Frame Descriptor Status
|
||||
#define TXFD_TXCP 0x00080000 // Transmission Completion
|
||||
#define TXFD_TTSAS 0x08000000 // TX Time Stamp Available
|
||||
|
||||
// Tx/Rx buffer descriptor structure
|
||||
struct eth_descriptor;
|
||||
struct eth_descriptor {
|
||||
uint32_t status1;
|
||||
uint8_t *buf;
|
||||
uint32_t status2;
|
||||
struct eth_descriptor *next;
|
||||
#ifdef TIME_STAMPING
|
||||
uint32_t backup1;
|
||||
uint32_t backup2;
|
||||
uint32_t reserved1;
|
||||
uint32_t reserved2;
|
||||
#endif
|
||||
};
|
||||
|
||||
#ifdef TIME_STAMPING
|
||||
|
||||
#define ETH_TS_ENABLE() do{EMAC->TSCTL = EMAC_TSCTL_TSEN_Msk;}while(0)
|
||||
#define ETH_TS_START() do{EMAC->TSCTL |= (EMAC_TSCTL_TSMODE_Msk | EMAC_TSCTL_TSIEN_Msk);}while(0)
|
||||
s32_t ETH_settime(u32_t sec, u32_t nsec);
|
||||
s32_t ETH_gettime(u32_t *sec, u32_t *nsec);
|
||||
s32_t ETH_updatetime(u32_t neg, u32_t sec, u32_t nsec);
|
||||
s32_t ETH_adjtimex(int ppm);
|
||||
void ETH_setinc(void);
|
||||
|
||||
#endif
|
||||
|
||||
extern void numaker_eth_init(uint8_t *mac_addr);
|
||||
extern uint8_t *numaker_eth_get_tx_buf(void);
|
||||
extern void numaker_eth_trigger_tx(uint16_t length, void *p);
|
||||
|
||||
#endif /* _NUC472_ETH_ */
|
||||
|
|
@ -0,0 +1,412 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Nuvoton Technology Corp.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
* Description: NuMaker EMAC
|
||||
*/
|
||||
|
||||
#include <ctype.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "cmsis_os.h"
|
||||
|
||||
#include "mbed_interface.h"
|
||||
#include "mbed_assert.h"
|
||||
#include "netsocket/nsapi_types.h"
|
||||
#include "mbed_shared_queues.h"
|
||||
|
||||
|
||||
#include "numaker_emac_config.h"
|
||||
#include "numaker_emac.h"
|
||||
|
||||
|
||||
/********************************************************************************
|
||||
*
|
||||
********************************************************************************/
|
||||
#define NU_BUFF_ALIGNMENT 4
|
||||
#define PHY_LINKED_STATE 1
|
||||
#define PHY_UNLINKED_STATE 0
|
||||
#define PACKET_BUFFER_SIZE NU_ETH_MAX_FLEN
|
||||
|
||||
typedef void (* eth_callback_t) (char, void*);
|
||||
extern "C" void numaker_init_eth_hardware(void);
|
||||
extern "C" void mbed_mac_address(char *mac);
|
||||
extern "C" void numaker_eth_init(uint8_t *mac_addr);
|
||||
extern "C" void numaker_eth_trigger_rx(void);
|
||||
extern "C" int numaker_eth_get_rx_buf(uint16_t *len, uint8_t **buf);
|
||||
extern "C" uint8_t *numaker_eth_get_tx_buf(void);
|
||||
extern "C" void numaker_eth_trigger_tx(uint16_t length, void *p);
|
||||
extern "C" int numaker_eth_link_ok(void);
|
||||
extern "C" void numaker_eth_set_cb(eth_callback_t eth_cb, void *userData);
|
||||
extern "C" void numaker_set_mac_addr(uint8_t *addr);
|
||||
|
||||
/* \brief Flags for worker thread */
|
||||
#define FLAG_TX 1
|
||||
#define FLAG_RX 2
|
||||
|
||||
/** \brief Driver thread priority */
|
||||
#define THREAD_PRIORITY (osPriorityNormal)
|
||||
|
||||
#define PHY_TASK_PERIOD_MS 200
|
||||
|
||||
NUMAKER_EMAC::NUMAKER_EMAC() : thread(0), hwaddr()
|
||||
{
|
||||
}
|
||||
|
||||
static osThreadId_t create_new_thread(const char *threadName, void (*thread)(void *arg), void *arg, int stacksize, osPriority_t priority, os_thread_t *thread_cb)
|
||||
{
|
||||
osThreadAttr_t attr = {0};
|
||||
attr.name = threadName;
|
||||
attr.stack_mem = malloc(stacksize);
|
||||
attr.cb_mem = thread_cb;
|
||||
attr.stack_size = stacksize;
|
||||
attr.cb_size = sizeof(os_thread_t);
|
||||
attr.priority = priority;
|
||||
return osThreadNew(thread, arg, &attr);
|
||||
}
|
||||
|
||||
|
||||
/** \brief Ethernet receive interrupt handler
|
||||
*
|
||||
* This function handles the receive interrupt.
|
||||
*/
|
||||
void NUMAKER_EMAC::rx_isr()
|
||||
{
|
||||
if (thread) {
|
||||
osThreadFlagsSet(thread, FLAG_RX);
|
||||
}
|
||||
}
|
||||
|
||||
void NUMAKER_EMAC::tx_isr()
|
||||
{
|
||||
/* No-op at this stage */
|
||||
}
|
||||
|
||||
void NUMAKER_EMAC::ethernet_callback(char event, void *param)
|
||||
{
|
||||
NUMAKER_EMAC *enet = static_cast<NUMAKER_EMAC *>(param);
|
||||
switch (event)
|
||||
{
|
||||
case 'R': //For RX event
|
||||
enet->rx_isr();
|
||||
break;
|
||||
case 'T': //For TX event
|
||||
enet->tx_isr();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* In this function, the hardware should be initialized.
|
||||
*/
|
||||
bool NUMAKER_EMAC::low_level_init_successful()
|
||||
{
|
||||
/* Init ETH */
|
||||
|
||||
mbed_mac_address((char *)hwaddr);
|
||||
|
||||
/* Enable clock & set EMAC configuration */
|
||||
/* Enable MAC and DMA transmission and reception */
|
||||
numaker_eth_init(hwaddr);
|
||||
|
||||
numaker_eth_set_cb(&NUMAKER_EMAC::ethernet_callback, this);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
int NUMAKER_EMAC::low_level_input(emac_mem_buf_t **buf)
|
||||
{
|
||||
uint16_t len = 0;
|
||||
uint8_t *buffer;
|
||||
uint32_t bufferoffset = 0;
|
||||
uint32_t byteslefttocopy = 0;
|
||||
emac_mem_buf_t *q;
|
||||
uint32_t payloadoffset = 0;
|
||||
|
||||
/* get received frame */
|
||||
if ( !numaker_eth_get_rx_buf(&len, &buffer)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
byteslefttocopy = len;
|
||||
|
||||
if (len > 0) {
|
||||
/* Allocate a memory buffer chain from buffer pool */
|
||||
*buf = memory_manager->alloc_pool(len, 0);
|
||||
}
|
||||
|
||||
if (*buf != NULL) {
|
||||
bufferoffset = 0;
|
||||
for (q = *buf; q != NULL; q = memory_manager->get_next(q)) {
|
||||
byteslefttocopy = memory_manager->get_len(q);
|
||||
payloadoffset = 0;
|
||||
|
||||
/* Copy data in pbuf */
|
||||
memcpy(static_cast<uint8_t *>(memory_manager->get_ptr(q)) + payloadoffset, static_cast<uint8_t *>(buffer) + bufferoffset, byteslefttocopy);
|
||||
bufferoffset = bufferoffset + byteslefttocopy;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/** \brief Worker thread.
|
||||
*
|
||||
* Woken by thread flags to receive packets or clean up transmit
|
||||
*
|
||||
* \param[in] pvParameters pointer to the interface data
|
||||
*/
|
||||
|
||||
void NUMAKER_EMAC::thread_function(void* pvParameters)
|
||||
{
|
||||
static struct NUMAKER_EMAC *nu_enet = static_cast<NUMAKER_EMAC *>(pvParameters);
|
||||
|
||||
for (;;) {
|
||||
uint32_t flags = osThreadFlagsWait(FLAG_RX, osFlagsWaitAny, osWaitForever);
|
||||
|
||||
if (flags & FLAG_RX) {
|
||||
nu_enet->packet_rx();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/** \brief Packet reception task
|
||||
*
|
||||
* This task is called when a packet is received. It will
|
||||
* pass the packet to the LWIP core.
|
||||
*/
|
||||
void NUMAKER_EMAC::packet_rx()
|
||||
{
|
||||
/* move received packet into a new buf */
|
||||
while (1) {
|
||||
emac_mem_buf_t *p = NULL;
|
||||
if (low_level_input(&p) < 0) {
|
||||
break;
|
||||
}
|
||||
if (p) {
|
||||
emac_link_input_cb(p);
|
||||
}
|
||||
}
|
||||
numaker_eth_trigger_rx();
|
||||
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* This function should do the actual transmission of the packet. The packet is
|
||||
* contained in the buf that is passed to the function. This buf
|
||||
* might be chained.
|
||||
*
|
||||
* @param buf the MAC packet to send (e.g. IP packet including MAC addresses and type)
|
||||
* @return true if the packet could be sent
|
||||
* false value if the packet couldn't be sent
|
||||
*
|
||||
* @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
|
||||
* strange results. You might consider waiting for space in the DMA queue
|
||||
* to become available since the stack doesn't retry to send a packet
|
||||
* dropped because of memory failure (except for the TCP timers).
|
||||
*/
|
||||
bool NUMAKER_EMAC::link_out(emac_mem_buf_t *buf)
|
||||
{
|
||||
bool result;
|
||||
emac_mem_buf_t *q;
|
||||
uint8_t *buffer = numaker_eth_get_tx_buf();
|
||||
uint32_t framelength = 0;
|
||||
uint32_t bufferoffset = 0;
|
||||
uint32_t byteslefttocopy = 0;
|
||||
uint32_t payloadoffset = 0;
|
||||
|
||||
/* Get exclusive access */
|
||||
TXLockMutex.lock();
|
||||
|
||||
/* copy frame from buf to driver buffers */
|
||||
for (q = buf; q != NULL; q = memory_manager->get_next(q)) {
|
||||
|
||||
/* Get bytes in current lwIP buffer */
|
||||
byteslefttocopy = memory_manager->get_len(q);
|
||||
payloadoffset = 0;
|
||||
|
||||
/* Check if the length of data to copy is bigger than Tx buffer size*/
|
||||
while ((byteslefttocopy + bufferoffset) > PACKET_BUFFER_SIZE) {
|
||||
/* Copy data to Tx buffer*/
|
||||
memcpy(static_cast<uint8_t *>(buffer) + bufferoffset, static_cast<uint8_t *>(memory_manager->get_ptr(q)) + payloadoffset, (PACKET_BUFFER_SIZE - bufferoffset));
|
||||
|
||||
/* Point to next descriptor */
|
||||
numaker_eth_trigger_tx(PACKET_BUFFER_SIZE, NULL);
|
||||
buffer = numaker_eth_get_tx_buf();
|
||||
if( buffer == NULL ) goto error;
|
||||
|
||||
byteslefttocopy = byteslefttocopy - (PACKET_BUFFER_SIZE - bufferoffset);
|
||||
payloadoffset = payloadoffset + (PACKET_BUFFER_SIZE - bufferoffset);
|
||||
framelength = framelength + (PACKET_BUFFER_SIZE - bufferoffset);
|
||||
bufferoffset = 0;
|
||||
}
|
||||
|
||||
/* Copy the remaining bytes */
|
||||
memcpy(static_cast<uint8_t *>(buffer) + bufferoffset, static_cast<uint8_t *>(memory_manager->get_ptr(q)) + payloadoffset, byteslefttocopy);
|
||||
bufferoffset = bufferoffset + byteslefttocopy;
|
||||
framelength = framelength + byteslefttocopy;
|
||||
}
|
||||
|
||||
/* Prepare transmit descriptors to give to DMA */
|
||||
numaker_eth_trigger_tx(byteslefttocopy, NULL);
|
||||
|
||||
result = true;
|
||||
|
||||
error:
|
||||
|
||||
memory_manager->free(buf);
|
||||
|
||||
/* Restore access */
|
||||
TXLockMutex.unlock();
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
void NUMAKER_EMAC::phy_task()
|
||||
{
|
||||
|
||||
// Get current status
|
||||
int state;
|
||||
state = numaker_eth_link_ok();
|
||||
|
||||
|
||||
if ((state & PHY_LINKED_STATE) && !(phy_state & PHY_LINKED_STATE)) {
|
||||
printf("Link Up\r\n");
|
||||
if (emac_link_state_cb) emac_link_state_cb(true);
|
||||
} else if (!(state & PHY_LINKED_STATE) && (phy_state & PHY_LINKED_STATE)) {
|
||||
printf("Link Down\r\n");
|
||||
if (emac_link_state_cb) emac_link_state_cb(false);
|
||||
}
|
||||
phy_state = state;
|
||||
|
||||
}
|
||||
|
||||
bool NUMAKER_EMAC::power_up()
|
||||
{
|
||||
/* Initialize the hardware */
|
||||
if (!low_level_init_successful())
|
||||
return false;
|
||||
|
||||
/* Worker thread */
|
||||
thread = create_new_thread("numaker_emac_thread", &NUMAKER_EMAC::thread_function, this, THREAD_STACKSIZE, THREAD_PRIORITY, &thread_cb);
|
||||
|
||||
/* PHY monitoring task */
|
||||
phy_state = PHY_UNLINKED_STATE;
|
||||
|
||||
phy_task_handle = mbed::mbed_event_queue()->call_every(PHY_TASK_PERIOD_MS, mbed::callback(this, &NUMAKER_EMAC::phy_task));
|
||||
|
||||
/* Allow the PHY task to detect the initial link state and set up the proper flags */
|
||||
osDelay(10);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
uint32_t NUMAKER_EMAC::get_mtu_size() const
|
||||
{
|
||||
return NU_ETH_MTU_SIZE;
|
||||
}
|
||||
|
||||
uint32_t NUMAKER_EMAC::get_align_preference() const
|
||||
{
|
||||
return NU_BUFF_ALIGNMENT;
|
||||
}
|
||||
|
||||
void NUMAKER_EMAC::get_ifname(char *name, uint8_t size) const
|
||||
{
|
||||
memcpy(name, NU_ETH_IF_NAME, (size < sizeof(NU_ETH_IF_NAME)) ? size : sizeof(NU_ETH_IF_NAME));
|
||||
}
|
||||
|
||||
uint8_t NUMAKER_EMAC::get_hwaddr_size() const
|
||||
{
|
||||
return NU_HWADDR_SIZE;
|
||||
}
|
||||
|
||||
bool NUMAKER_EMAC::get_hwaddr(uint8_t *addr) const
|
||||
{
|
||||
mbed_mac_address((char *)addr);
|
||||
return true;
|
||||
}
|
||||
|
||||
void NUMAKER_EMAC::set_hwaddr(const uint8_t *addr)
|
||||
{
|
||||
memcpy(hwaddr, addr, sizeof hwaddr);
|
||||
numaker_set_mac_addr(const_cast<uint8_t*>(addr));
|
||||
}
|
||||
|
||||
void NUMAKER_EMAC::set_link_input_cb(emac_link_input_cb_t input_cb)
|
||||
{
|
||||
emac_link_input_cb = input_cb;
|
||||
}
|
||||
|
||||
void NUMAKER_EMAC::set_link_state_cb(emac_link_state_change_cb_t state_cb)
|
||||
{
|
||||
emac_link_state_cb = state_cb;
|
||||
}
|
||||
|
||||
void NUMAKER_EMAC::add_multicast_group(const uint8_t *addr)
|
||||
{
|
||||
/* No-op at this stage */
|
||||
}
|
||||
|
||||
void NUMAKER_EMAC::remove_multicast_group(const uint8_t *addr)
|
||||
{
|
||||
/* No-op at this stage */
|
||||
}
|
||||
|
||||
void NUMAKER_EMAC::set_all_multicast(bool all)
|
||||
{
|
||||
/* No-op at this stage */
|
||||
}
|
||||
|
||||
|
||||
void NUMAKER_EMAC::power_down()
|
||||
{
|
||||
/* No-op at this stage */
|
||||
}
|
||||
|
||||
void NUMAKER_EMAC::set_memory_manager(EMACMemoryManager &mem_mngr)
|
||||
{
|
||||
memory_manager = &mem_mngr;
|
||||
}
|
||||
|
||||
|
||||
NUMAKER_EMAC &NUMAKER_EMAC::get_instance() {
|
||||
static NUMAKER_EMAC emac;
|
||||
return emac;
|
||||
}
|
||||
|
||||
// Weak so a module can override
|
||||
MBED_WEAK EMAC &EMAC::get_default_instance() {
|
||||
return NUMAKER_EMAC::get_instance();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,161 @@
|
|||
/*
|
||||
* Copyright (c) 2017 ARM Limited. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef NUMAKER_EMAC_H_
|
||||
#define NUMAKER_EMAC_H_
|
||||
|
||||
#include "EMAC.h"
|
||||
#include "rtos/Semaphore.h"
|
||||
#include "rtos/Mutex.h"
|
||||
|
||||
class NUMAKER_EMAC : public EMAC {
|
||||
public:
|
||||
NUMAKER_EMAC();
|
||||
|
||||
static NUMAKER_EMAC &get_instance();
|
||||
|
||||
/**
|
||||
* Return maximum transmission unit
|
||||
*
|
||||
* @return MTU in bytes
|
||||
*/
|
||||
virtual uint32_t get_mtu_size() const;
|
||||
|
||||
/**
|
||||
* Gets memory buffer alignment preference
|
||||
*
|
||||
* Gets preferred memory buffer alignment of the Emac device. IP stack may or may not
|
||||
* align link out memory buffer chains using the alignment.
|
||||
*
|
||||
* @return Memory alignment requirement in bytes
|
||||
*/
|
||||
virtual uint32_t get_align_preference() const;
|
||||
|
||||
/**
|
||||
* Return interface name
|
||||
*
|
||||
* @param name Pointer to where the name should be written
|
||||
* @param size Maximum number of character to copy
|
||||
*/
|
||||
virtual void get_ifname(char *name, uint8_t size) const;
|
||||
|
||||
/**
|
||||
* Returns size of the underlying interface HW address size.
|
||||
*
|
||||
* @return HW address size in bytes
|
||||
*/
|
||||
virtual uint8_t get_hwaddr_size() const;
|
||||
|
||||
/**
|
||||
* Return interface-supplied HW address
|
||||
*
|
||||
* Copies HW address to provided memory, @param addr has to be of correct size see @a get_hwaddr_size
|
||||
*
|
||||
* HW address need not be provided if this interface does not have its own HW
|
||||
* address configuration; stack will choose address from central system
|
||||
* configuration if the function returns false and does not write to addr.
|
||||
*
|
||||
* @param addr HW address for underlying interface
|
||||
* @return true if HW address is available
|
||||
*/
|
||||
virtual bool get_hwaddr(uint8_t *addr) const;
|
||||
|
||||
/**
|
||||
* Set HW address for interface
|
||||
*
|
||||
* Provided address has to be of correct size, see @a get_hwaddr_size
|
||||
*
|
||||
* Called to set the MAC address to actually use - if @a get_hwaddr is provided
|
||||
* the stack would normally use that, but it could be overridden, eg for test
|
||||
* purposes.
|
||||
*
|
||||
* @param addr Address to be set
|
||||
*/
|
||||
virtual void set_hwaddr(const uint8_t *addr);
|
||||
|
||||
/**
|
||||
* Sends the packet over the link
|
||||
*
|
||||
* That can not be called from an interrupt context.
|
||||
*
|
||||
* @param buf Packet to be send
|
||||
* @return True if the packet was send successfully, False otherwise
|
||||
*/
|
||||
virtual bool link_out(emac_mem_buf_t *buf);
|
||||
|
||||
/**
|
||||
* Initializes the HW
|
||||
*
|
||||
* @return True on success, False in case of an error.
|
||||
*/
|
||||
virtual bool power_up();
|
||||
|
||||
/**
|
||||
* Deinitializes the HW
|
||||
*
|
||||
*/
|
||||
virtual void power_down();
|
||||
|
||||
/**
|
||||
* Sets a callback that needs to be called for packets received for that interface
|
||||
*
|
||||
* @param input_cb Function to be register as a callback
|
||||
*/
|
||||
virtual void set_link_input_cb(emac_link_input_cb_t input_cb);
|
||||
|
||||
/**
|
||||
* Sets a callback that needs to be called on link status changes for given interface
|
||||
*
|
||||
* @param state_cb Function to be register as a callback
|
||||
*/
|
||||
virtual void set_link_state_cb(emac_link_state_change_cb_t state_cb);
|
||||
|
||||
/** Add device to a multicast group
|
||||
*
|
||||
* @param address A multicast group hardware address
|
||||
*/
|
||||
virtual void add_multicast_group(const uint8_t *address);
|
||||
|
||||
/** Remove device from a multicast group
|
||||
*
|
||||
* @param address A multicast group hardware address
|
||||
*/
|
||||
virtual void remove_multicast_group(const uint8_t *address);
|
||||
|
||||
/** Request reception of all multicast packets
|
||||
*
|
||||
* @param all True to receive all multicasts
|
||||
* False to receive only multicasts addressed to specified groups
|
||||
*/
|
||||
virtual void set_all_multicast(bool all);
|
||||
|
||||
/** Sets memory manager that is used to handle memory buffers
|
||||
*
|
||||
* @param mem_mngr Pointer to memory manager
|
||||
*/
|
||||
virtual void set_memory_manager(EMACMemoryManager &mem_mngr);
|
||||
|
||||
private:
|
||||
bool low_level_init_successful();
|
||||
void tx_isr();
|
||||
void rx_isr();
|
||||
void packet_rx();
|
||||
int low_level_input(emac_mem_buf_t **buf);
|
||||
static void thread_function(void* pvParameters);
|
||||
void phy_task();
|
||||
static void ethernet_callback(char event, void *param);
|
||||
|
||||
os_thread_t thread_cb;
|
||||
osThreadId_t thread; /**< Processing thread */
|
||||
rtos::Mutex TXLockMutex;/**< TX critical section mutex */
|
||||
rtos::Semaphore xTXDCountSem; /**< TX free buffer counting semaphore */
|
||||
emac_link_input_cb_t emac_link_input_cb; /**< Callback for incoming data */
|
||||
emac_link_state_change_cb_t emac_link_state_cb; /**< Link state change callback */
|
||||
EMACMemoryManager *memory_manager; /**< Memory manager */
|
||||
int phy_task_handle; /**< Handle for phy task event */
|
||||
int phy_state;
|
||||
uint8_t hwaddr[6];
|
||||
};
|
||||
|
||||
#endif /* NUMAKER_EMAC_H_ */
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Nuvoton Technology Corp.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
* Description: NuMaker EMAC Config header file
|
||||
*/
|
||||
|
||||
#ifndef NUMAKER_EMAC_CONFIG_H__
|
||||
#define NUMAKER_EMAC_CONFIG_H__
|
||||
|
||||
#define NU_RX_RING_LEN (8)
|
||||
#define NU_TX_RING_LEN (4)
|
||||
|
||||
#define NU_ETH_MAX_FLEN (1520)
|
||||
|
||||
#define NU_HWADDR_SIZE (6)
|
||||
|
||||
#define NU_ETH_MTU_SIZE 1500
|
||||
#define NU_ETH_IF_NAME "nu"
|
||||
|
||||
#define THREAD_STACKSIZE 512
|
||||
|
||||
#endif // #define NUMAKER_EMAC_CONFIG_H__
|
||||
|
||||
|
|
@ -3697,7 +3697,7 @@
|
|||
"NUMAKER_PFM_NUC472": {
|
||||
"core": "Cortex-M4F",
|
||||
"default_toolchain": "ARM",
|
||||
"extra_labels": ["NUVOTON", "NUC472", "NU_XRAM_SUPPORTED", "FLASH_CMSIS_ALGO"],
|
||||
"extra_labels": ["NUVOTON", "NUC472", "NU_XRAM_SUPPORTED", "FLASH_CMSIS_ALGO", "NUVOTON_EMAC"],
|
||||
"is_disk_virtual": true,
|
||||
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
|
||||
"config": {
|
||||
|
|
@ -3720,7 +3720,7 @@
|
|||
},
|
||||
"inherits": ["Target"],
|
||||
"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
|
||||
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN", "FLASH"],
|
||||
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN", "FLASH", "EMAC"],
|
||||
"features": ["LWIP"],
|
||||
"release_versions": ["5"],
|
||||
"device_name": "NUC472HI8AE",
|
||||
|
|
@ -3954,7 +3954,7 @@
|
|||
"NUMAKER_PFM_M487": {
|
||||
"core": "Cortex-M4F",
|
||||
"default_toolchain": "ARM",
|
||||
"extra_labels": ["NUVOTON", "M480", "FLASH_CMSIS_ALGO"],
|
||||
"extra_labels": ["NUVOTON", "M480", "FLASH_CMSIS_ALGO","NUVOTON_EMAC"],
|
||||
"is_disk_virtual": true,
|
||||
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
|
||||
"config": {
|
||||
|
|
@ -3985,7 +3985,7 @@
|
|||
},
|
||||
"inherits": ["Target"],
|
||||
"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
|
||||
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH", "CAN"],
|
||||
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH", "CAN", "EMAC"],
|
||||
"features": ["LWIP"],
|
||||
"release_versions": ["5"],
|
||||
"device_name": "M487JIDAE",
|
||||
|
|
|
|||
Loading…
Reference in New Issue