For both implementation, RTC and LPTIM, there is some delay in the
set_interrupt function due to HW constraints.
Value has been set to 4 for STM32L0,
because SystemClock is slower than other families.
1, edit "targets.json" to let "REALTEK_RTL8195AM" target inherit from "MCU_RTL8195A"
2, change file structures for folder "Target_Realtek"
3, add "PeripheralPins.h" and "PeripheralPins.c"
TB_SENSE_12 would have been left behind by the changes in #7778. This commit implements the changes in mbed to allow targets to provide a default network interface for Silicon Labs targets.
To enable the feature US_TICKER, file is newly implemented with Timer B, which has proper clock prescale and free running after match interrupt.
Old us_ticker driver file (Timer A) is producing up to 100us tolerance, which causes to fail US_TICKER feature.
Hence, changed the peripheral ticker A to B.
Add the target config option "boot-stack-size" which is passed to the
linker as the define "MBED_BOOT_STACK_SIZE" so the linker can
adjust the stack accordingly. On mbed 2 the boot stack becomes the
main stack after boot. On mbed 5 the boot stack becomes the
ISR stack after boot. Because of these different uses the stack size
for mbed 2 is set to 4K by default while on mbed 5 it is set to 1k.
Additionally, the NRF5X family requires a larger interrupt stack size
due to the softdevice so the size is increased to 2k on mbed 5 builds.
SKIP_SYSCLK_INIT prevents reinitializing the SYS_CLK PLL used by SDRAM.
This PLL is setup during bootup by the ROM code.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
* align MPS2_M0 FVP target with other MPS2 targets
* moved memory_zones.h
* chnage the flash_api.c where referencing the old memory_zones
* modify mbed_rtx.h to use the memory_zones definations as INITIAL_SP
* all linker scripts reference the definitions from memory_zones.h
* tool chains use predefined 1K as ISR Stack size
* ARM Complier 5 and GCC will auto calculated heap size
* IAR use predefined 2MiB as heap size
Although other venders implement this feature by using RTC, in my H/W(RZ_A1), I cannot use RTC because it does not satisfy the spec of LP Ticker (ms order and low frequency between 8 KHz and 64 KHz).
Therefore I implemented this feature by creating 1024 division by MTU2(Multi function Timer pulse Unit 2) in order to satisfy this spec.
As a result of investigating, the most unaffected channel among MTU2 placed on GR-PEACH and GR-LYCHEE was channel 3, so I use channel 3 for this feature.
- mbed_drv_cfg.h
I added a macro of MTU2 channel to this file for commonalizing code for GR-PEACH and GR-LYCHEE, and referenced it's macro at us_ticker.c.
- targets.json
I added a macro for enabling LP Ticker.
- mtu2.c mtu2.h
I defined fuction of MTU2's clock supply and stop.
Because MTU2 is utilized by pwm driver too, those function were referenced at lp_ticker driver and pwm driver.
- lp_ticker.c lp_ticker_init()
In order to satisfy the LP Ticker spec, I implemented by creating 1024 division by MTU2.
When an interrupt is required, it will be set with ticker_set_interrupt().
- lp_ticker.c lp_ticker_free()
This function stops the counting and powerdown the lp_ticker.
- lp_ticker.c lp_read()
This function returns the timer counter of MTU2.
- lp_ticker.c lp_ticker_set_interrupt()
In order to satisfy specifications, I implemented lp_ticker_set_interrupt() function.
- lp_ticker.c lp_ticker_fire_interrupt()
In order to satisfy spec, I implemented lp_ticker_fire_interrupt() function.
Also I added GIC_EnableIRQ for allowing the interrupt at end of function.
- lp_ticker.c lp_ticker_get_info()
To satisfy the spec, I implemented lp_ticker_get_info() function. The value of freq includes rounding off.
1. Power down RTC access from CPU domain in rtc_free. After rtc_free, RTC gets
inaccessible from CPU domain but keeps counting.
2. Fix RTC cannot cross reset cycle.
To initialize/uninitialize H/W module, we need to control secure SYS/CLK regions through secure functions.
For a new thread to call these secure functions, we need to allocate secure context for it.
To change TRNG security state, we need to:
1. Change CRPT/CRYPTO bit in NVIC/SCU in partition_M2351.h
2. Add/remove TRNG in device_has list in targets.json to match partition_M2351.h
1. NUMAKER_PFM_M2351 defaults to non-secure
2. Add NUMAKER_PFM_M2351_S/NUMAKER_PFM_M2351_NS which are for secure/non-secure build respectively.
3. Change output format to Intel HEX
4. Fix device name to M2351KIAAEES from M2351K1AAEES
5. Add detect_code
This change is to reduce delay of wake-up from power-down to pass Greentea test.
Because HIRC's accuracy is worse than HXT's, we must switch back to HXT for e.g. USBD application.
This can be done through setting NU_CLOCK_PLL to NU_HXT_PLL.
These wiced targets are not supported at mbed-os 2 release, so removing
"2" from release_versions.
LWIP feature flag removed, since it isn't needed anymore.
EMAC removed from device_has_add, since it isn't needed with these targets.
"network-default-interface-type": "WIFI" has been added.
1. Introduce S/W interrupt enable/disable to reduce calls to TIMER_EnableInt/TIMER_DisableInt.
2. Allow dummy interrupt because clear interrupt flag is not synchronized.
3. Enable LPTICKER_DELAY_TICKS to make lp_ticker_set_interrupt non-blocking.
The mainly changes is below:
- Update scatter file, linker file for bootloader support
- Update the file for RZ/A1 serial flash boot loader
- Add "device name" and "bootloader_supported" in targets.json
The mainly changes is below:
- Add flash_api.c
- Add the definition of SPI multi I/O Bus controller that is used for flash access
- Add "FLASH" as device feature
- Add the macro regarding information of the incorporated Flash
- Add the processing to expand code to RAM
1. Add the IVT header to the binary as this is required for boot up
This was earlier added by the DAPLink firmware. As it is no longer
handled in DAPLink, the header needs to be added inside mbed.
2. Update drivers
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
mbed RTC specifications now dictate that the RTC needs to retain and keep on counting through reset. On Silicon Labs parts, this means the RTC API can not be backed by the Silicon Labs RTC peripheral, since that doesn't provide retention functionality.
Therefore:
* On EFM32GG, EFM32WG, EFM32LG: mbed RTC API is now backed by BURTC.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: mbed RTC API is now backed by RTCC.
* On EFM32ZG, EFM32HG: mbed RTC API is sadly no longer supported, since these chips don't have retained memory.
I implemented the RTC feature.
The mainly changing is here.
- rtc_init()
Previously, I have initialized the time information register in the function, so the time count was cleaned by every calling rtc_init().
Currently, rtc_init() doesn't stop RTC from counting, and rtc_init() is safe to call repeatedly.
Therefore in order to satisfy specifications,I removed the initialization process of the time information register in the function.
- rtc_free()
Previously, I have initialized the RTC related register same as rtc_init(), so the time count was cleaned by calling rtc_free().
Currently, rtc_free() doesn't stop RTC from counting.
Therefore in order to satisfy specifications,I removed the process and decided not to do anything in the function.
If powerdown the RTC, Supply of the clock to the RTC is stopped, cannot keeping the count.
1. Enable LPTICKER for K22, K24, K64, K66, K82, KL82F, KW24D
2. Change the implementation to only use the LPTMR which reduces
the amount of interrupts generated which is required for tickless
operation
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Re-implemented both us_ticker and lp_ticker to match the new API and specifications.
Details:
* On EFM32GG, EFM32WG, EFM32LG, EFM32HG, EFM32ZG: Use the RTC peripheral to back lp_ticker, and a TIMER to back us_ticker.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: Use the RTCC peripheral to back lp_ticker (dual-purpose, also used to back RTC), and a TIMER to back us_ticker.
mbed RTC specifications now dictate that the RTC needs to retain and keep on counting through reset. On Silicon Labs parts, this means the RTC API can not be backed by the Silicon Labs RTC peripheral, since that doesn't provide retention functionality.
Therefore:
* On EFM32GG, EFM32WG, EFM32LG: mbed RTC API is now backed by BURTC.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: mbed RTC API is now backed by RTCC.
* On EFM32ZG, EFM32HG: mbed RTC API is sadly no longer supported, since these chips don't have retained memory.
# Conflicts:
# targets/TARGET_Silicon_Labs/TARGET_EFM32/lp_ticker.c
# targets/TARGET_Silicon_Labs/TARGET_EFM32/rtc_api.c
# targets/targets.json
I implemented the SLEEP feature for Rnesas mbed boards.
The mainly changing is here.
- hal_sleep()
To satisfy the mbed specificationm, I implemented this function newly by using "sleep" that is one of low power mode that is incorporated in our hardware(RZ_A1).
In the "sleep", peripheral and memory state are maintained, and the peripherals continue to work and can generate interrupts.
- hal_deepsleep()
To satisfy the mbed specificationm, I implemented this function newly by combined using "sleep" and "module standby" that is the low power mode that is incorporated in our hardware(RZ_A1).
The "module standby" is peripheral module's powerdown.
Also in case of our "module standby", it need to read register as dummy when access to each register.
These boards will be re-enabled when sleep driver for them is ready.
Note:
This operation is done by removing "SLEEP" feature from target's "device_has" list (in targets.json config file).
For NRF52_DK removing of "SLEEP" feature causes some timing issues which have influence on tests. In order to successfully disable this board we need to disable also related features like "USTICKER", "LOWPOERTIMER" and slightly modify ticker tests, so they will not be executed if usticker support is not available (by default all targets support us ticker).
Implementation of unified EMAC driver for Renesas mbed boards
Based on the driver so far, Renesas implemented the emac driver for GR-PEACH and VK-RZ/A1H.
The mainly changes is below.
- Add the connection part with LWIP according to the unified emac specification.
- Add three new multicast functions(add, remove, set_all).
The Greentea test netsocket and emac test passed.
Just checking "does the chip have an EMAC" doesn't work - there are
targets using those chips which do not have an Ethernet connector and
don't provide the necessary surrounding infrastructure (eg DISCO_F429ZI,
not providing the board emac config call, and HEXIWEAR not providing PHY
info).
Make the targets that actually do want EMAC define their own local
Freescale_EMAC and STM_EMAC labels, and move the drivers into
the corresponding TARGET_ directories, removing the #ifdefs.
* Since mbed does not overwrite itself, make the flashing routines run out of flash by default
* Report a writeable size of 4 bytes (previously erroneously reported a full eraseable page as the minimum write size)
Initial work by Bartek Szatkowski in https://github.com/ARMmbed/mbed-os/pull/4079,
reworked following review of https://github.com/ARMmbed/mbed-os/pull/5202 to
transform the entire system into C++, retaining the basic functionality.
Bartek's summary:
* Porting ethernet to EMAC
* Updating EMAC to enable multiple interfaces
* Untangling networking classes, making the abstractions a bit clearer to follow, etc
* General refactoring
* Removal of DEVICE_EMAC flag and introducing DEVICE_ETH and DEVICE_WIFI
Revisions since initial branch:
* Remove lwip depencies
* Correct doxygen warnings
* Remove emac_api.h, replace with C++ EMAC abstract class.
* Create OnboardNetworkInterface, and LWIP implementation.
* Mappings since #4079
lwip-interface/nsapi_stack_lwip.c -> LWIPStack.cpp
lwip-interface/ipstack_lwip.c -> LWIPInterface.cpp
netsocket/mbed_ipstack.h -> OnboardNetworkStack.h
hal/emac_api.h -> EMAC.h
* Reinstate use of EthInterface abstraction
* Correct and clarify HW address EMAC ops
* Restore MBED_MAC_ADDR implementation
* Integrate PPP support with LWIP::Interface.
* Convert K64F lwIP driver to K64F_EMAC.
To do:
* Convert emac_stack_mem.h to follow this pattern.
* Figure out DEVICE_ETH/EMAC
* Update all drivers to use EMAC
New directory structure:
* TARGET_SOFTDEVICE_COMMON
* TARGET_SOFTDEVICE_S112
* TARGET_SOFTDEVICE_S132_FULL (MBR + SoftDevice, default)
* TARGET_SOFTDEVICE_S132_OTA (SoftDevice only, for firmware updates)
* TARGET_SOFTDEVICE_S132_MBR (MBR only, for bootloader builds)
* TARGET_SOFTDEVICE_S140_FULL (MBR + SoftDevice, default)
* TARGET_SOFTDEVICE_S140_OTA (SoftDevice only, for firmware updates)
* TARGET_SOFTDEVICE_S140_MBR (MBR only, for bootloader builds)
* TARGET_SOFTDEVICE_NONE
The X_OTA and X_MBR binaries are obtained from the original x_FULL SoftDevice
by splitting it in an MBR part and a SoftDevice part. The MBR is needed for
the bootloader and the SoftDevice for firmware updates.
Build application without SoftDevice:
"target_overrides": {
"*": {
"target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_X_FULL"],
"target.extra_labels_add": ["SOFTDEVICE_NONE"]
}
}
Build application for firmware update using SoftDevice X:
"target_overrides": {
"*": {
"target.extra_labels_remove": ["SOFTDEVICE_X_FULL"],
"target.extra_labels_add": ["SOFTDEVICE_X_OTA"]
}
}
Build bootloader without SoftDevice X:
"target_overrides": {
"*": {
"target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_X_FULL"],
"target.extra_labels_add": ["SOFTDEVICE_X_MBR"]
}
}
Cruz Monrreal
Martin Kojtal
Mahesh Mahadevan
Brian Daniels
jeromecoutant
bcostm
zzw
Leon Lindenfelser
cedrick kukela
Ganesh Ramachandran
Steven
ccli8
Aleshandre Diaz
Russ Butler
Seppo Takalo
Cesar
Yossi Levy
Juho Eskeli
ben
Maciej Bocianski
adustm
Martin Kojtal
Qinghao Shi
Jiwon Yune
Simo Sillankorva
Mirela Chirica
Kari Haapalehto
TomoYamanaka
Keyur Hariya
Steven Cooreman
Deepika
cyliangtw
Kimmo Vaisanen
Karl Zhang
Marcus Chang
aqib nasim
Edmund Hsu
Yoshihiro TSUBOI
Mika Leppänen
Bartek Szatkowski
Jesse Marroquin
Przemyslaw Stekiel
Ashok Rao
Steven Cartmell
Kevin Bracey
Asif Rizwan
Michael Zhang
Ron Eldor
Andrew Leech