Merge pull request #6711 from marcuschangarm/cleanup-nrf5x

Cleanup TARGET_NRF5 and TARGET_NRF5x

TESTS/mbed_hal/critical_section/main.cpp

@@ -20,7 +20,7 @@
 #include "greentea-client/test_env.h"
 #include "mbed.h"
 #include "cmsis.h"
-#if defined(TARGET_NRF5) || defined(TARGET_NRF5x) // for all NRF5x targets
+#if defined(TARGET_NRF5x) // for all NRF5x targets
 #include "nrf_nvic.h" // for __NRF_NVIC_APP_IRQS_0 / __NRF_NVIC_APP_IRQS_1
 #endif
 
@@ -30,11 +30,11 @@ bool test_are_interrupts_enabled(void)
 {
     // NRF5x targets don't disable interrupts when in critical section, instead they mask application interrupts this is due to BLE stack
     // (BLE to be operational requires some interrupts to be always enabled)
-#ifdef TARGET_NRF52
-	// check if APP interrupts are masked for NRF52_DK board
+#if defined(TARGET_NRF52)
+	// check if APP interrupts are masked for NRF52 boards
 	return (((NVIC->ISER[0] & __NRF_NVIC_APP_IRQS_0) != 0) || ((NVIC->ISER[1] & __NRF_NVIC_APP_IRQS_1) != 0));
-#elif TARGET_NRF5
-	// check if APP interrupts are masked for other NRF5 boards
+#elif defined(TARGET_NRF51)
+	// check if APP interrupts are masked for other NRF51 boards
 	return ((NVIC->ISER[0] & __NRF_NVIC_APP_IRQS_0) != 0);
 #else
 #if defined(__CORTEX_A9)

targets/TARGET_NORDIC/TARGET_NRF5/LF_Clock_config.md

@@ -1,97 +0,0 @@
-
-# LF Clock configuration using mbed configuration system
-
-In order to provide the configuration for a low frequency (LF) clock, add a description of the LF clock inside a mbed configuration JSON file.
-For example at application level the description might be added in a mbed_app.json file and on target level the description might be added in the hal/target.json file.
-LF clock source configuration is used for MCU startup initialization and the BLE SoftDevice LF clock configuration (if BLE libraries is used). Advanced configurations are used only for the BLE SoftDevice LF clock configuration.
-
-
-## Usage:
-
-1. Clock source
-
-Default clock source is XTAL oscillator. It is defined at the target level configuration as the target.lf_clock_src key.
-There are three options that can be configured as the clock source:  
-    - NRF_LF_SRC_XTAL  
-    - NRF_LF_SRC_RC  
-    - NRF_LF_SRC_SYNTH  
-
-In order to override this configuration use targed_override section in configuration file (e.g mbed_app.json)
-
-```json
-{
-     "target_overrides": {
-        "*": {
-            "target.lf_clock_src": "NRF_LF_SRC_XTAL"
-        }
-     }
-}
-```
-
-2a. Advanced configuration of the LFCLK RC oscillator:
-
-```json
-{
-    "config": {
-        "lf_clock_rc_calib_timer_interval": {
-            "value": 16,
-            "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL"
-        },
-        "lf_clock_rc_calib_mode_config": {
-            "value": 1,
-            "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG"
-        }
-    }
-}
-    
-```
-
-"lf_clock_rc_calib_timer_interval" - Calibration timer interval in 250 ms. It is equivalent to nrf_clock_lf_cfg_t::rc_ctiv.
-This item generates macro MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL.
-By default, such configuration is set to 16.
-
-"lf_clock_rc_calib_mode_config" - This value configures how often the RC oscillator will be calibrated, in number of calibration intervals.
-It is equivalent to nrf_clock_lf_cfg_t::rc_temp_ctiv.
-For further information, see the documentation for the [API of a SoftDevice 13x version 2.0.0](http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.s132.api.v2.0.0/structnrf__clock__lf__cfg__t.html)
-This item generates macro MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG.
-By default, such configuration is set to 1.
-
-2b. Advanced configuration of the LFCLK XTAL oscillator:
-
-Accuracy of the clock source can be set. In order to do so macro MBED_CONF_NORDIC_LF_CLOCK_XTAL_ACCURACY should been provided (e.g. in mbed_app.json).
-By default such configuration is set to NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM.
-For further information, see the documentation for the [API of a SoftDevice 13x version 2.0.0](https://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.s132.api.v2.0.0%2Fgroup___n_r_f___s_d_m___d_e_f_i_n_e_s.html)
-
-```json
-{
-    "config": {
-        "lf_clock_xtal_accuracy": {
-            "value": "NRF_CLOCK_LF_XTAL_ACCURACY_250_PPM",
-            "macro_name": "MBED_CONF_NORDIC_LF_CLOCK_XTAL_ACCURACY"
-        }
-    }
-}
-    
-```
-
-
-
-2c. Advance configuration of the LFCLK Synthesized from HFCLK:
-
-Accuracy of the clock source can be set. In order to do so macro MBED_CONF_NORDIC_LF_CLOCK_SYNTH_ACCURACY should been provided (e.g. in mbed_app.json).
-By default, such configuration is set to NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM.
-For further information, see the documentation for the [API of a SoftDevice 13x version 2.0.0](https://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.s132.api.v2.0.0%2Fgroup___n_r_f___s_d_m___d_e_f_i_n_e_s.html)
-
-```json
-{
-    "config": {
-        "lf_clock_synth_accuracy": {
-            "value": "NRF_CLOCK_LF_SYNTH_ACCURACY_250_PPM",
-            "macro_name": "MBED_CONF_NORDIC_LF_CLOCK_XTAL_ACCURACY"
-        }
-    }
-}
-    
-```
-
-

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/PeripheralNames.h

@@ -1,87 +0,0 @@
-/* 
- * Copyright (c) 2013 Nordic Semiconductor ASA
- * All rights reserved.
- * 
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a 
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
- */
-
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifndef STDIO_UART_TX
-#define STDIO_UART_TX     TX_PIN_NUMBER
-#endif
-
-#ifndef STDIO_UART_RX
-#define STDIO_UART_RX     RX_PIN_NUMBER
-#endif
-
-#define STDIO_UART        UART_0
-
-typedef enum {
-    UART_0 = (int)NRF_UART0_BASE
-} UARTName;
-
-
-typedef enum {
-    SPI_0 = (int)NRF_SPI0_BASE,
-    SPI_1 = (int)NRF_SPI1_BASE,
-    SPIS = (int)NRF_SPIS1_BASE
-} SPIName;
-
-typedef enum {
-    PWM_1 = 0,
-    PWM_2
-} PWMName;
-
-typedef enum {
-    I2C_0 = (int)NRF_TWI0_BASE,
-    I2C_1 = (int)NRF_TWI1_BASE
-} I2CName;
-
-typedef enum {
-    ADC0_0 = (int)0
-} ADCName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/PortNames.h

@@ -1,53 +0,0 @@
-/* 
- * Copyright (c) 2013 Nordic Semiconductor ASA
- * All rights reserved.
- * 
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a 
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
- */
-
-#ifndef MBED_PORTNAMES_H
-#define MBED_PORTNAMES_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    Port0 = 0 //GPIO pins 0-31
-} PortName;
-
-#ifdef __cplusplus
-}
-#endif
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/PinNames.h

@@ -1,202 +0,0 @@
-/* 
- * Copyright (c) 2016 Nordic Semiconductor ASA
- * All rights reserved.
- * 
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a 
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
- */
-
-#ifndef MBED_PINNAMES_H
-#define MBED_PINNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    PIN_INPUT,
-    PIN_OUTPUT
-} PinDirection;
-
-#define PORT_SHIFT  3
-
-typedef enum {
-    p0  = 0,
-    p1  = 1,
-    p2  = 2,
-    p3  = 3,
-    p4  = 4,
-    p5  = 5,
-    p6  = 6,
-    p7  = 7,
-    p8  = 8,
-    p9  = 9,
-    p10 = 10,
-    p11 = 11,
-    p12 = 12,
-    p13 = 13,
-    p14 = 14,
-    p15 = 15,
-    p16 = 16,
-    p17 = 17,
-    p18 = 18,
-    p19 = 19,
-    p20 = 20,
-    p21 = 21,
-    p22 = 22,
-    p23 = 23,
-    p24 = 24,
-    p25 = 25,
-    p26 = 26,
-    p27 = 27,
-    p28 = 28,
-    p29 = 29,
-    p30 = 30,
-    p31 = 31,
-
-    P0_0  = p0,
-    P0_1  = p1,
-    P0_2  = p2,
-    P0_3  = p3,
-    P0_4  = p4,
-    P0_5  = p5,
-    P0_6  = p6,
-    P0_7  = p7,
-
-    P0_8  = p8,
-    P0_9  = p9,
-    P0_10 = p10,
-    P0_11 = p11,
-    P0_12 = p12,
-    P0_13 = p13,
-    P0_14 = p14,
-    P0_15 = p15,
-
-    P0_16 = p16,
-    P0_17 = p17,
-    P0_18 = p18,
-    P0_19 = p19,
-    P0_20 = p20,
-    P0_21 = p21,
-    P0_22 = p22,
-    P0_23 = p23,
-
-    P0_24 = p24,
-    P0_25 = p25,
-    P0_26 = p26,
-    P0_27 = p27,
-    P0_28 = p28,
-    P0_29 = p29,
-    P0_30 = p30,
-
-    LED1    = p17,
-    LED2    = p18,
-    LED3    = p19,
-    LED4    = p20,
-
-    BUTTON1 = p13,
-    BUTTON2 = p14,
-    BUTTON3 = p15,
-    BUTTON4 = p16,
-
-    RX_PIN_NUMBER  = p11,
-    TX_PIN_NUMBER  = p12,
-    CTS_PIN_NUMBER = p13,
-    RTS_PIN_NUMBER = p14,
-
-    // mBed interface Pins
-    USBTX = TX_PIN_NUMBER,
-    USBRX = RX_PIN_NUMBER,
-
-    SPI_PSELMOSI0 = p23,
-    SPI_PSELMISO0 = p24,
-    SPI_PSELSS0   = p22,
-    SPI_PSELSCK0  = p25,
-
-    SPI_PSELMOSI1 = p12,
-    SPI_PSELMISO1 = p13,
-    SPI_PSELSS1   = p11,
-    SPI_PSELSCK1  = p14,
-
-    SPIS_PSELMOSI = p12,
-    SPIS_PSELMISO = p13,
-    SPIS_PSELSS   = p11,
-    SPIS_PSELSCK  = p14,
-
-    I2C_SDA0 = p26,
-    I2C_SCL0 = p27,
-
-    D0 = p11,
-    D1 = p12,
-    D2 = p13,
-    D3 = p14,
-    D4 = p15,
-    D5 = p16,
-    D6 = p17,
-    D7 = p18,
-
-    D8 = p19,
-    D9 = p20,
-    D10 = p22,
-    D11 = p23,
-    D12 = p24,
-    D13 = p25,
-
-    D14 = p26,
-    D15 = p27,
-
-    A0 = p3,
-    A1 = p4,
-    A2 = p28,
-    A3 = p29,
-    A4 = p30,
-    A5 = p31,
-
-    // Not connected
-    NC = (int)0xFFFFFFFF
-} PinName;
-
-typedef enum {
-    PullNone = 0,
-    PullDown = 1,
-    PullUp = 3,
-    PullDefault = PullUp
-} PinMode;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/device.h

@@ -1,38 +0,0 @@
-// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
-// Check the 'features' section of the target description in 'targets.json' for more details.
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-#include "objects.h"
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/mbed_overrides.c

@@ -1,22 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2016 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-void mbed_sdk_init()
-{
-    char* debug_date = __DATE__;
-    char* debug_time = __TIME__;	
-
-}

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_MTB_LAIRD_BL652/PinNames.h

@@ -1,243 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2013 Nordic Semiconductor
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PINNAMES_H
-#define MBED_PINNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    PIN_INPUT,
-    PIN_OUTPUT
-} PinDirection;
-
-#define PORT_SHIFT  3
-
-typedef enum {
-    p0  = 0,
-    p1  = 1,
-    p2  = 2,
-    p3  = 3,
-    p4  = 4,
-    p5  = 5,
-    p6  = 6,
-    p7  = 7,
-    p8  = 8,
-    p9  = 9,
-    p10 = 10,
-    p11 = 11,
-    p12 = 12,
-    p13 = 13,
-    p14 = 14,
-    p15 = 15,
-    p16 = 16,
-    p17 = 17,
-    p18 = 18,
-    p19 = 19,
-    p20 = 20,
-    p21 = 21,
-    p22 = 22,
-    p23 = 23,
-    p24 = 24,
-    p25 = 25,
-    p26 = 26,
-    p27 = 27,
-    p28 = 28,
-    p29 = 29,
-    p30 = 30,
-    p31 = 31,
-
-
-    P0_0  = p0,
-    P0_1  = p1,
-    P0_2  = p2,
-    P0_3  = p3,
-    P0_4  = p4,
-    P0_5  = p5,
-    P0_6  = p6,
-    P0_7  = p7,
-    
-    P0_8  = p8,
-    P0_9  = p9,
-    P0_10 = p10,
-    P0_11 = p11,
-    P0_12 = p12,
-    P0_13 = p13,
-    P0_14 = p14,
-    P0_15 = p15,
-    
-    P0_16 = p16,
-    P0_17 = p17,
-    P0_18 = p18,
-    P0_19 = p19,
-    P0_20 = p20,
-    P0_21 = p21,
-    P0_22 = p22,
-    P0_23 = p23,
-    
-    P0_24 = p24,
-    P0_25 = p25,
-    P0_26 = p26,
-    P0_27 = p27,
-    P0_28 = p28,
-    P0_29 = p29,
-    P0_30 = p30,
-    P0_31 = p31,
-
-   // Module pins. Refer datasheet for pin numbers.
-    SIO_1 = P0_1,
-    SIO_2 = P0_2,
-    SIO_3 = P0_3,
-    SIO_4 = P0_4,
-    SIO_5 = P0_5,
-    SIO_6 = P0_6,
-    SIO_7 = P0_7,
-    SIO_8 = P0_8,
-    SIO_9 = P0_9,   //NFC1
-    SIO_10 = P0_10,  //NFC2
-    SIO_11 = P0_11,
-    SIO_12 = P0_12,
-    SIO_13 = P0_13,
-    SIO_14 = P0_14,
-    SIO_15 = P0_15,
-    SIO_16 = P0_16,
-    SIO_17 = P0_17,
-    SIO_18 = P0_18,
-    SIO_19 = P0_19,
-    SIO_20 = P0_20,
-
-    SIO_22 = P0_22,
-    SIO_23 = P0_23,
-    SIO_24 = P0_24,
-    SIO_25 = P0_25,
-    SIO_26 = P0_26,
-    SIO_27 = P0_27,
-    SIO_28 = P0_28,
-    SIO_29 = P0_29,
-    SIO_30 = P0_30,
-    SIO_31 = P0_31,
-    SIO_0 = P0_0,
-
-    // Not connected
-    NC = (int)0xFFFFFFFF,
-
-    //Mbed MTB pin defines.
-    P_1 = NC,
-    P_2 = SIO_24,  //MISO
-    P_3 = SIO_23,  //MOSI
-    P_4 = SIO_22,
-//    P_5 = SWDIO,
-//    P_6 = SWDCLK,
-//    P_7 = NRST,
-    P_8 = SIO_20,
-    P_9 = SIO_18,
-    P_10 = SIO_16,
-    P_11 = SIO_14,
-    P_12 = SIO_12,
-    P_13 = SIO_11,
-    P_14 = SIO_10,
-    P_15 = SIO_9,
-    P_16 = NC,
-    P_17 = SIO_8,
-    P_18 = SIO_7,
-    P_19 = SIO_6,
-    P_20 = SIO_5,
-    P_21 = SIO_4,
-    P_22 = SIO_3,
-    P_23 = SIO_2,
-    P_24 = SIO_1,
-    P_25 = SIO_0,
-    P_26 = NC,
-    P_27 = NC,
-    P_28 = SIO_13,
-    P_29 = SIO_15,
-    P_30 = SIO_17,
-    P_31 = SIO_19,
-    P_32 = SIO_31,
-    P_33 = SIO_30,
-    P_34 = SIO_29,
-    P_35 = SIO_28,
-    P_36 = SIO_27,
-    P_37 = SIO_26,
-    P_38 = SIO_25,
-    P_39 = NC,
-
-    //LEDs
-    LED1 = SIO_28,
-    LED2 = SIO_29,
-    LED3 = SIO_30,
-    LED_RED = LED1,
-    LED_GREEN = LED2,
-    LED_BLUE = LED3,
-    
-    GP0 = SIO_11,
-    //Standardized button name
-    BUTTON1 = GP0,
-
-    //Nordic SDK pin names 
-    RX_PIN_NUMBER = SIO_8,
-    TX_PIN_NUMBER = SIO_6,
-    CTS_PIN_NUMBER = SIO_7,
-    RTS_PIN_NUMBER = SIO_5,
-
-    // mBed interface Pins
-    USBTX = TX_PIN_NUMBER,
-    USBRX = RX_PIN_NUMBER,
-
-    SPI_MOSI = SIO_23,
-    SPI_MISO = SIO_24,
-    SPI_SS0 = SIO_17, //CS for LCD on MTB
-    SPI_SS1 = SIO_10, //CS for SD card on MTB
-    SPI_SCK1 = SIO_25,
-    SPI_SCK2 = SIO_31,
-
-    //Default SPI
-    SPI_SCK = SPI_SCK1,
-    SPI_CS = SPI_SS1,
-
-    I2C_SDA = SIO_26,
-    I2C_SCL = SIO_27,
-
-    //MTB aliases
-    GP1    = SIO_13,
-    AIN0  = SIO_2,
-    AIN1  = SIO_3,
-    AIN2  = SIO_4,
-    GP2    = SIO_10,
-    GP3    = SIO_9,
-    GP4     = SIO_22,
-    GP5     = SIO_19, //A0 for LCD on MTB
-    GP6     = SIO_18, //RESET for LCD on MTB
-    GP7     = SIO_17,
-    GP8     = SIO_15,
-
-} PinName;
-
-typedef enum {
-    PullNone = 0,
-    PullDown = 1,
-    PullUp = 3,
-    PullDefault = PullUp
-} PinMode;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_MTB_LAIRD_BL652/device.h

@@ -1,23 +0,0 @@
-// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
-// Check the 'features' section of the target description in 'targets.json' for more details.
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
-
-#include "objects.h"
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_MTB_UBLOX_NINA_B1/PinNames.h

@@ -1,155 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2016 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
- 
-#ifndef MBED_PINNAMES_H
-#define MBED_PINNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    PIN_INPUT,
-    PIN_OUTPUT
-} PinDirection;
-
-#define PORT_SHIFT 3
-
-typedef enum {
-    // nRF52 pin names
-    p0 = 0,
-    p1 = 1,
-    p2 = 2,
-    p3 = 3,
-    p4 = 4,
-    p5 = 5,
-    p6 = 6,
-    p7 = 7,
-    p8 = 8,
-    p9 = 9,
-    p10 = 10,
-    p11 = 11,
-    p12 = 12,
-    p13 = 13,
-    p14 = 14,
-    p15 = 15,
-    p16 = 16,
-    p17 = 17,
-    p18 = 18,
-    p19 = 19,
-    p20 = 20,
-    p21 = 21,
-    p22 = 22,
-    p23 = 23,
-    p24 = 24,
-    p25 = 25,
-    p26 = 26,
-    p27 = 27,
-    p28 = 28,
-    p29 = 29,
-    p30 = 30,
-    p31 = 31,
-    NC = (int)0xFFFFFFFF, // Not connected
-    
-    //NINA-B112 module pin names
-    P_1 = p8,
-    P_2 = p11,
-    P_3 = p12,
-    P_4 = p13,
-    P_5 = p14,
-    P_6 = NC,
-    P_7 = p16,
-    P_8 = p18,
-    P_9 = NC,
-    P_10 = NC,
-    P_11 = NC,
-    P_12 = NC,
-    P_13 = NC,
-    P_14 = NC,
-    P_15 = NC,
-    P_16 = p28,
-    P_17 = p29,
-    P_18 = p30,
-    P_19 = p21,
-    P_20 = p31,
-    P_21 = p7,
-    P_22 = p6,
-    P_23 = p5,
-    P_24 = p2,
-    P_25 = p3,
-    P_26 = NC,
-    P_27 = p4,
-    P_28 = p9,
-    P_29 = p10,
-    P_30 = NC,
-     
-    // MTB aliases
-    GPIO18 =  p30,
-
-    LED1 = p4, // Red LED
-    LED2 = p10, // Green LED
-    GPIO27 = LED1,
-//    GPIO29 = LED2,
-
-    GPIO7 = p16, //A0 for LCD
-    GPIO16 = p28, //RESET for LCD
-
-    SW1 = p29,
-    GPIO17 = SW1,
-    //Standardized button names
-    BUTTON1 = SW1,
-   
-    // Nordic SDK pin names
-    RX_PIN_NUMBER = p5,
-    TX_PIN_NUMBER = p6,
-    CTS_PIN_NUMBER = p7,
-    RTS_PIN_NUMBER = p31,
-
-    I2C_SDA = p2,
-    I2C_SCL = p3,
-
-    SPI0_MOSI  = p13,
-    SPI0_MISO  = p12,
-    SPI0_SCK   = p14,
-    SPI0_CS    = p11,
-    SPI1_CS    = p8,
- 
-    SPI_MOSI   = SPI0_MOSI,
-    SPI_MISO   = SPI0_MISO,
-    SPI_SCK    = SPI0_SCK,
-    SPI_CS     = SPI0_CS,
-
-    // DAPLink
-    USBRX      = RX_PIN_NUMBER,
-    USBTX      = TX_PIN_NUMBER,
-    NTRST      = p21,
-    SWO          = p18,
-
-} PinName;
-
-typedef enum {
-    PullNone = 0,
-    PullDown = 1,
-    PullUp = 3,
-    PullDefault = PullUp
-} PinMode;
-
-#ifdef __cplusplus
-}
-#endif
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_MTB_UBLOX_NINA_B1/device.h

@@ -1,21 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
-
-#include "objects.h"
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_NRF52_DK/PinNames.h

@@ -1,203 +0,0 @@
-/* 
- * Copyright (c) 2016 Nordic Semiconductor ASA
- * All rights reserved.
- * 
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a 
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
- */
-
-#ifndef MBED_PINNAMES_H
-#define MBED_PINNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    PIN_INPUT,
-    PIN_OUTPUT
-} PinDirection;
-
-#define PORT_SHIFT  3
-
-typedef enum {
-    p0  = 0,
-    p1  = 1,
-    p2  = 2,
-    p3  = 3,
-    p4  = 4,
-    p5  = 5,
-    p6  = 6,
-    p7  = 7,
-    p8  = 8,
-    p9  = 9,
-    p10 = 10,
-    p11 = 11,
-    p12 = 12,
-    p13 = 13,
-    p14 = 14,
-    p15 = 15,
-    p16 = 16,
-    p17 = 17,
-    p18 = 18,
-    p19 = 19,
-    p20 = 20,
-    p21 = 21,
-    p22 = 22,
-    p23 = 23,
-    p24 = 24,
-    p25 = 25,
-    p26 = 26,
-    p27 = 27,
-    p28 = 28,
-    p29 = 29,
-    p30 = 30,
-    p31 = 31,
-
-    P0_0  = p0,
-    P0_1  = p1,
-    P0_2  = p2,
-    P0_3  = p3,
-    P0_4  = p4,
-    P0_5  = p5,
-    P0_6  = p6,
-    P0_7  = p7,
-
-    P0_8  = p8,
-    P0_9  = p9,
-    P0_10 = p10,
-    P0_11 = p11,
-    P0_12 = p12,
-    P0_13 = p13,
-    P0_14 = p14,
-    P0_15 = p15,
-
-    P0_16 = p16,
-    P0_17 = p17,
-    P0_18 = p18,
-    P0_19 = p19,
-    P0_20 = p20,
-    P0_21 = p21,
-    P0_22 = p22,
-    P0_23 = p23,
-
-    P0_24 = p24,
-    P0_25 = p25,
-    P0_26 = p26,
-    P0_27 = p27,
-    P0_28 = p28,
-    P0_29 = p29,
-    P0_30 = p30,
-    P0_31 = p31,
-
-    LED1    = p17,
-    LED2    = p18,
-    LED3    = p19,
-    LED4    = p20,
-
-    BUTTON1 = p13,
-    BUTTON2 = p14,
-    BUTTON3 = p15,
-    BUTTON4 = p16,
-
-    RX_PIN_NUMBER  = p8,
-    TX_PIN_NUMBER  = p6,
-    CTS_PIN_NUMBER = p7,
-    RTS_PIN_NUMBER = p5,
-
-    // mBed interface Pins
-    USBTX = TX_PIN_NUMBER,
-    USBRX = RX_PIN_NUMBER,
-
-    SPI_PSELMOSI0 = p23,
-    SPI_PSELMISO0 = p24,
-    SPI_PSELSS0   = p22,
-    SPI_PSELSCK0  = p25,
-
-    SPI_PSELMOSI1 = p12,
-    SPI_PSELMISO1 = p13,
-    SPI_PSELSS1   = p11,
-    SPI_PSELSCK1  = p14,
-
-    SPIS_PSELMOSI = p12,
-    SPIS_PSELMISO = p13,
-    SPIS_PSELSS   = p11,
-    SPIS_PSELSCK  = p14,
-
-    I2C_SDA0 = p26,
-    I2C_SCL0 = p27,
-
-    D0 = p11,
-    D1 = p12,
-    D2 = p13,
-    D3 = p14,
-    D4 = p15,
-    D5 = p16,
-    D6 = p17,
-    D7 = p18,
-
-    D8 = p19,
-    D9 = p20,
-    D10 = p22,
-    D11 = p23,
-    D12 = p24,
-    D13 = p25,
-
-    D14 = p26,
-    D15 = p27,
-
-    A0 = p3,
-    A1 = p4,
-    A2 = p28,
-    A3 = p29,
-    A4 = p30,
-    A5 = p31,
-
-    // Not connected
-    NC = (int)0xFFFFFFFF
-} PinName;
-
-typedef enum {
-    PullNone = 0,
-    PullDown = 1,
-    PullUp = 3,
-    PullDefault = PullUp
-} PinMode;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_NRF52_DK/device.h

@@ -1,38 +0,0 @@
-// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
-// Check the 'features' section of the target description in 'targets.json' for more details.
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-#include "objects.h"
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_RBLAB_BLENANO2/PinNames.h

@@ -1,194 +0,0 @@
-/*
- * Copyright (c) 2016 Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- *   1. Redistributions of source code must retain the above copyright notice, this list
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
- *      integrated circuit in a product or a software update for such product, must reproduce
- *      the above copyright notice, this list of conditions and the following disclaimer in
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
- *      used to endorse or promote products derived from this software without specific prior
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse
- *      engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef MBED_PINNAMES_H
-#define MBED_PINNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    PIN_INPUT,
-    PIN_OUTPUT
-} PinDirection;
-
-#define PORT_SHIFT  3
-
-typedef enum {
-    p0  = 0,
-    p1  = 1,
-    p2  = 2,
-    p3  = 3,
-    p4  = 4,
-    p5  = 5,
-    p6  = 6,
-    p7  = 7,
-    p8  = 8,
-    p9  = 9,
-    p10 = 10,
-    p11 = 11,
-    p12 = 12,
-    p13 = 13,
-    p14 = 14,
-    p15 = 15,
-    p16 = 16,
-    p17 = 17,
-    p18 = 18,
-    p19 = 19,
-    p20 = 20,
-    p21 = 21,
-    p22 = 22,
-    p23 = 23,
-    p24 = 24,
-    p25 = 25,
-    p26 = 26,
-    p27 = 27,
-    p28 = 28,
-    p29 = 29,
-    p30 = 30,
-    p31 = 31,
-
-    P0_0  = p0,
-    P0_1  = p1,
-    P0_2  = p2,
-    P0_3  = p3,
-    P0_4  = p4,
-    P0_5  = p5,
-    P0_6  = p6,
-    P0_7  = p7,
-
-    P0_8  = p8,
-    P0_9  = p9,
-    P0_10 = p10,
-    P0_11 = p11,
-    P0_12 = p12,
-    P0_13 = p13,
-    P0_14 = p14,
-    P0_15 = p15,
-
-    P0_16 = p16,
-    P0_17 = p17,
-    P0_18 = p18,
-    P0_19 = p19,
-    P0_20 = p20,
-    P0_21 = p21,
-    P0_22 = p22,
-    P0_23 = p23,
-
-    P0_24 = p24,
-    P0_25 = p25,
-    P0_26 = p26,
-    P0_27 = p27,
-    P0_28 = p28,
-    P0_29 = p29,
-    P0_30 = p30,
-
-    LED1 = p11,
-    LED2 = p11,
-    LED3 = p11,
-    LED4 = p11,
-
-    RX_PIN_NUMBER  = p30,
-    TX_PIN_NUMBER  = p29,
-    CTS_PIN_NUMBER = p28,
-    RTS_PIN_NUMBER = p2,
-
-    // mBed interface Pins
-    USBTX = TX_PIN_NUMBER,
-    USBRX = RX_PIN_NUMBER,
-
-    SPI_PSELMOSI0 = p6,
-    SPI_PSELMISO0 = p7,
-    SPI_PSELSS0   = p3,
-    SPI_PSELSCK0  = p8,
-
-    SPI_PSELMOSI1 = p29,
-    SPI_PSELMISO1 = p30,
-    SPI_PSELSS1   = p28,
-    SPI_PSELSCK1  = p2,
-
-    SPIS_PSELMOSI = p29,
-    SPIS_PSELMISO = p30,
-    SPIS_PSELSS   = p28,
-    SPIS_PSELSCK  = p2,
-
-    I2C_SDA0 = p28,
-    I2C_SCL0 = p2,
-
-    D0 = p30,
-    D1 = p29,
-    D2 = p28,
-    D3 = p2,
-
-    D4 = p3,
-    D5 = p6,
-    D6 = p7,
-    D7 = p8,
-    D8 = p21,
-
-    D9 = p4,
-    D10 = p5,
-
-    D13 = p11,
-
-    A0 = p28,
-    A1 = p29,
-    A2 = p30,
-    A3 = p2,
-    A4 = p4,
-    A5 = p5,
-
-    // Not connected
-    NC = (int)0xFFFFFFFF
-} PinName;
-
-typedef enum {
-    PullNone = 0,
-    PullDown = 1,
-    PullUp = 3,
-    PullDefault = PullUp
-} PinMode;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_RBLAB_BLENANO2/device.h

@@ -1,23 +0,0 @@
-// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
-// Check the 'features' section of the target description in 'targets.json' for more details.
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
-
-#include "objects.h"
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_UBLOX_EVA_NINA/PinNames.h

@@ -1,106 +0,0 @@
-#ifndef MBED_PINNAMES_H
-#define MBED_PINNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    PIN_INPUT,
-    PIN_OUTPUT
-} PinDirection;
-
-#define PORT_SHIFT 3
-
-typedef enum {
-    // nRF52 pin names
-    p0  = 0,
-    p1  = 1,
-    p2  = 2,
-    p3  = 3,
-    p4  = 4,
-    p5  = 5,
-    p6  = 6,
-    p7  = 7,
-    p8  = 8,
-    p9  = 9,
-    p10 = 10,
-    p11 = 11,
-    p12 = 12,
-    p13 = 13,
-    p14 = 14,
-    p15 = 15,
-    p16 = 16,
-    p17 = 17,
-    p18 = 18,
-    p19 = 19,
-    p20 = 20,
-    p21 = 21,
-    p22 = 22,
-    p23 = 23,
-    p24 = 24,
-    p25 = 25,
-    p26 = 26,
-    p27 = 27,
-    p28 = 28,
-    p29 = 29,
-    p30 = 30,
-    p31 = 31,
-    NC = (int)0xFFFFFFFF, // Not connected
-
-    //NINA-B1 module pin names
-    NINA_B1_GPIO_1 = p8,
-    NINA_B1_GPIO_2 = p11,
-    NINA_B1_GPIO_3 = p12,
-    NINA_B1_GPIO_4 = p13,
-    NINA_B1_GPIO_5 = p14,
-    NINA_B1_GPIO_7 = p16,
-    NINA_B1_GPIO_8 = p18,
-
-    NINA_B1_GPIO_16 = p28,
-    NINA_B1_GPIO_17 = p29,
-    NINA_B1_GPIO_18 = p30,
-
-    NINA_B1_GPIO_20 = p31,
-    NINA_B1_GPIO_21 = p7,
-    NINA_B1_GPIO_22 = p6,
-    NINA_B1_GPIO_23 = p5,
-    NINA_B1_GPIO_24 = p2,
-    NINA_B1_GPIO_25 = p3,
-    NINA_B1_GPIO_27 = p4,
-    NINA_B1_GPIO_28 = p9,
-    NINA_B1_GPIO_29 = p10,
-    
-    // Board pins
-    LED1 = NINA_B1_GPIO_7, // ORANGE
-    LED2 = NC,
-    LED3 = NC,
-    LED4 = NC,
-    
-    // Nordic SDK pin names
-    RX_PIN_NUMBER = p5,
-    TX_PIN_NUMBER = p6,
-    CTS_PIN_NUMBER = p7,
-    RTS_PIN_NUMBER = p31,
-    I2C_SDA0 = p2,
-    I2C_SCL0 = p3,
-
-    // mBed interface pins
-    USBTX = TX_PIN_NUMBER,
-    USBRX = RX_PIN_NUMBER
-} PinName;
-
-typedef enum {
-    PullNone = 0,
-    PullDown = 1,
-    PullUp = 3,
-    PullDefault = PullUp
-} PinMode;
-
-#ifdef __cplusplus
-}
-
-#endif
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_UBLOX_EVA_NINA/device.h

@@ -1,23 +0,0 @@
-// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
-// Check the 'features' section of the target description in 'targets.json' for more details.
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
-
-#include "objects.h"
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_UBLOX_EVK_NINA_B1/PinNames.h

@@ -1,127 +0,0 @@
-#ifndef MBED_PINNAMES_H
-#define MBED_PINNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    PIN_INPUT,
-    PIN_OUTPUT
-} PinDirection;
-
-#define PORT_SHIFT 3
-
-typedef enum {
-    // nRF52 pin names
-    p0 = 0,
-    p1 = 1,
-    p2 = 2,
-    p3 = 3,
-    p4 = 4,
-    p5 = 5,
-    p6 = 6,
-    p7 = 7,
-    p8 = 8,
-    p9 = 9,
-    p10 = 10,
-    p11 = 11,
-    p12 = 12,
-    p13 = 13,
-    p14 = 14,
-    p15 = 15,
-    p16 = 16,
-    p17 = 17,
-    p18 = 18,
-    p19 = 19,
-    p20 = 20,
-    p21 = 21,
-    p22 = 22,
-    p23 = 23,
-    p24 = 24,
-    p25 = 25,
-    p26 = 26,
-    p27 = 27,
-    p28 = 28,
-    p29 = 29,
-    p30 = 30,
-    p31 = 31,
-    NC = (int)0xFFFFFFFF, // Not connected
-    
-    //NINA-B1 module pin names
-    NINA_B1_GPIO_1 = p8,
-    NINA_B1_GPIO_2 = p11,
-    NINA_B1_GPIO_3 = p12,
-    NINA_B1_GPIO_4 = p13,
-    NINA_B1_GPIO_5 = p14,
-    NINA_B1_GPIO_7 = p16,
-    NINA_B1_GPIO_8 = p18,
-
-    NINA_B1_GPIO_16 = p28,
-    NINA_B1_GPIO_17 = p29,
-    NINA_B1_GPIO_18 = p30,
-
-    NINA_B1_GPIO_20 = p31,
-    NINA_B1_GPIO_21 = p7,
-    NINA_B1_GPIO_22 = p6,
-    NINA_B1_GPIO_23 = p5,
-    NINA_B1_GPIO_24 = p2,
-    NINA_B1_GPIO_25 = p3,
-    NINA_B1_GPIO_27 = p4,
-    NINA_B1_GPIO_28 = p9,
-    NINA_B1_GPIO_29 = p10,
-     
-    // EVK-NINA-B1 board
-    LED1 = NINA_B1_GPIO_1, // Red
-    LED2 = NINA_B1_GPIO_7, // Green/SW1
-    LED3 = NINA_B1_GPIO_8, // Blue
-    LED4 = NINA_B1_GPIO_8,
-    SW1 = NINA_B1_GPIO_7,
-    SW2 = NINA_B1_GPIO_18,
-    D0 = NINA_B1_GPIO_23,
-    D1 = NINA_B1_GPIO_22,
-    D2 = NINA_B1_GPIO_21,
-    D3 = NINA_B1_GPIO_20,
-    D4 = NINA_B1_GPIO_8,
-    D5 = NC, // SWDIO
-    D6 = NINA_B1_GPIO_28,
-    D7 = NINA_B1_GPIO_29,
-    D8 = NC, // SWDCLK
-    D9 = NINA_B1_GPIO_1,
-    D10 = NINA_B1_GPIO_2,
-    D11 = NINA_B1_GPIO_4,
-    D12 = NINA_B1_GPIO_3,
-    D13 = NINA_B1_GPIO_5,
-    D14 = NINA_B1_GPIO_24,
-    D15 = NINA_B1_GPIO_25,
-    A0 = NINA_B1_GPIO_25,
-    A1 = NINA_B1_GPIO_24,
-    A2 = NINA_B1_GPIO_27,
-    A3 = NINA_B1_GPIO_18,
-    A4 = NINA_B1_GPIO_17,
-    A5 = NINA_B1_GPIO_16,
-    // Nordic SDK pin names
-    RX_PIN_NUMBER = p5,
-    TX_PIN_NUMBER = p6,
-    CTS_PIN_NUMBER = p7,
-    RTS_PIN_NUMBER = p31,
-    I2C_SDA0 = p2,
-    I2C_SCL0 = p3,
-    // mBed interface pins
-    USBTX = TX_PIN_NUMBER,
-    USBRX = RX_PIN_NUMBER
-} PinName;
-
-typedef enum {
-    PullNone = 0,
-    PullDown = 1,
-    PullUp = 3,
-    PullDefault = PullUp
-} PinMode;
-
-#ifdef __cplusplus
-}
-#endif
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_UBLOX_EVK_NINA_B1/device.h

@@ -1,6 +0,0 @@
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
-
-#include "objects.h"
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_VBLUNO52/PinNames.h

@@ -1,253 +0,0 @@
-/* 
- * Copyright (c) 2017 VNG IoT Lab, Vietnam
- * All rights reserved.
- * 
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a 
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
- */
-
-/*
- * PinNames for the VBLUno52 board
- */
-#ifndef MBED_PINNAMES_H
-#define MBED_PINNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
-    PIN_INPUT,
-    PIN_OUTPUT
-} PinDirection;
-
-#define PORT_SHIFT  3
-
-typedef enum {
-    p0  = 0,
-    p1  = 1,
-    p2  = 2,
-    p3  = 3,
-    p4  = 4,
-    p5  = 5,
-    p6  = 6,
-    p7  = 7,
-    p8  = 8,
-    p9  = 9,
-    p10 = 10,
-    p11 = 11,
-    p12 = 12,
-    p13 = 13,
-    p14 = 14,
-    p15 = 15,
-    p16 = 16,
-    p17 = 17,
-    p18 = 18,
-    p19 = 19,
-    p20 = 20,
-    p21 = 21,
-    p22 = 22,
-    p23 = 23,
-    p24 = 24,
-    p25 = 25,
-    p26 = 26,
-    p27 = 27,
-    p28 = 28,
-    p29 = 29,
-    p30 = 30,
-    p31 = 31,
-
-    P0_0  = p0,
-    P0_1  = p1,
-    P0_2  = p2,
-    P0_3  = p3,
-    P0_4  = p4,
-    P0_5  = p5,
-    P0_6  = p6,
-    P0_7  = p7,
-
-    P0_8  = p8,
-    P0_9  = p9,
-    P0_10 = p10,
-    P0_11 = p11,
-    P0_12 = p12,
-    P0_13 = p13,
-    P0_14 = p14,
-    P0_15 = p15,
-
-    P0_16 = p16,
-    P0_17 = p17,
-    P0_18 = p18,
-    P0_19 = p19,
-    P0_20 = p20,
-    P0_21 = p21,
-    P0_22 = p22,
-    P0_23 = p23,
-
-    P0_24 = p24,
-    P0_25 = p25,
-    P0_26 = p26,
-    P0_27 = p27,
-    P0_28 = p28,
-    P0_29 = p29,
-    P0_30 = p30,
-    P0_31 = p31,
-    
-    //only for mbed test suite
-    LED1    = p12,
-    LED2    = p18,
-    LED3    = p19,
-    LED4    = p20,
-
-    //only for mbed test suite
-    BUTTON1 = p17,
-    BUTTON2 = p3,
-    BUTTON3 = p4,
-    BUTTON4 = p28,
-
-    RX_PIN_NUMBER  = p8,
-    TX_PIN_NUMBER  = p6,
-    CTS_PIN_NUMBER = p7,          //not on Header
-    RTS_PIN_NUMBER = p5,          //not on Header
-
-    // mBed interface Pins
-    USBTX = TX_PIN_NUMBER,
-    USBRX = RX_PIN_NUMBER,
-
-    SPI_PSELMOSI0 = p13,
-    SPI_PSELMISO0 = p14,
-    SPI_PSELSS0   = p11,
-    SPI_PSELSCK0  = p15,
-
-    SPI_PSELMOSI1 = p13,
-    SPI_PSELMISO1 = p14,
-    SPI_PSELSS1   = p11,
-    SPI_PSELSCK1  = p15,
-
-    SPIS_PSELMOSI = p13,
-    SPIS_PSELMISO = p14,
-    SPIS_PSELSS   = p11,
-    SPIS_PSELSCK  = p15,
-
-    I2C_SDA = p26,
-    I2C_SCL = p27,
-    
-    I2C_SDA0 = p26,
-    I2C_SCL0 = p27,
-    
-    I2C_SDA1 = p30,
-    I2C_SCL1 = p31,
-    
-    RESET = p21,
-    
-    NFC1 = p9,
-    NFC2 = p10,
-    
-    //Adruino interface pins
-    D0 = p8,
-    D1 = p6,
-    D2 = p24,
-    D3 = p23,
-    D4 = p22,
-    D5 = p18,
-    D6 = p19,
-    D7 = p20,
-
-    D8 = p9,
-    D9 = p10,
-    D10 = p11,
-    D11 = p13,
-    D12 = p14,
-    D13 = p15,
-
-    D14 = p3,
-    D15 = p4,
-    D16 = p28,
-    D17 = p29,
-    D18 = p30,
-    D19 = p31,
-    
-    D20 = p26,
-    D21 = p27,
-    
-    D22 = p12,
-    D23 = p17,
-    
-    D24 = p5,
-    D25 = p7,
-    
-    A0 = D14,
-    A1 = D15,
-    A2 = D16,
-    A3 = D17,
-    A4 = D18,
-    A5 = D19,
-    
-    SS = D10,
-    MOSI = D11,
-    MISO = D12,
-    SCK  = D13,
-
-    SDA0 = D20,
-    SCL0 = D21,
-    SDA1 = D18,
-    SCL1 = D19,
-    SDA = SDA0,
-    SCL = SCL0,
-
-    RX = D0,
-    TX = D1,
-    RTS = D24,                    //not on Header
-    CTS = D25,                    //not on Header
-
-    LED = D22,                    //not on Header
-    BUT = D23,                    //not on Header
-        
-    // Not connected
-    NC = (int)0xFFFFFFFF
-} PinName;
-
-typedef enum {
-    PullNone = 0,
-    PullDown = 1,
-    PullUp = 3,
-    PullDefault = PullUp
-} PinMode;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_VBLUNO52/device.h

@@ -1,23 +0,0 @@
-// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
-// Check the 'features' section of the target description in 'targets.json' for more details.
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
-
-#include "objects.h"
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct

@@ -1,27 +0,0 @@
-;WITHOUT SOFTDEVICE:
-;LR_IROM1 0x00000000 0x00040000  {
-;  ER_IROM1 0x00000000 0x00040000  {
-;   *.o (RESET, +First)
-;   *(InRoot$$Sections)
-;   .ANY (+RO)
-;  }
-;  RW_IRAM1 0x20000000 0x00004000  {
-;   .ANY (+RW +ZI)
-;  }
-;}
-;
-;WITH SOFTDEVICE:
-
-LR_IROM1 0x1C000 0x0064000  {
-  ER_IROM1 0x1C000 0x0064000  {
-   *.o (RESET, +First)
-   *(InRoot$$Sections)
-   .ANY (+RO)
-  }
-  RW_IRAM0 0x20002EF8 UNINIT 0x000000D8  { ;no init section
-        *(*noinit)
-  }
-  RW_IRAM1 0x20002FD0 0x0000D030  {
-   .ANY (+RW +ZI)
-  }
-}

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/startup_nrf52832.S

@@ -1,245 +0,0 @@
-;/* Copyright (c) 2012 ARM LIMITED
-;
-;   All rights reserved.
-;   Redistribution and use in source and binary forms, with or without
-;   modification, are permitted provided that the following conditions are met:
-;   - Redistributions of source code must retain the above copyright
-;     notice, this list of conditions and the following disclaimer.
-;   - Redistributions in binary form must reproduce the above copyright
-;     notice, this list of conditions and the following disclaimer in the
-;     documentation and/or other materials provided with the distribution.
-;   - Neither the name of ARM nor the names of its contributors may be used
-;     to endorse or promote products derived from this software without
-;     specific prior written permission.
-;   *
-;   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-;   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-;   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-;   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-;   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-;   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-;   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-;   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-;   POSSIBILITY OF SUCH DAMAGE.
-;   ---------------------------------------------------------------------------*/
-
-__initial_sp	EQU     0x20010000
-
-                PRESERVE8
-                THUMB
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler
-                DCD     NMI_Handler
-                DCD     HardFault_Handler
-                DCD     MemoryManagement_Handler
-                DCD     BusFault_Handler
-                DCD     UsageFault_Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler
-                DCD     DebugMonitor_Handler
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler
-                DCD     SysTick_Handler
-
-                ; External Interrupts
-                DCD     POWER_CLOCK_IRQHandler
-                DCD     RADIO_IRQHandler
-                DCD     UARTE0_UART0_IRQHandler_v
-                DCD     SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler_v
-                DCD     SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler_v
-                DCD     NFCT_IRQHandler_v
-                DCD     GPIOTE_IRQHandler_v
-                DCD     SAADC_IRQHandler_v
-                DCD     TIMER0_IRQHandler_v
-                DCD     TIMER1_IRQHandler_v
-                DCD     TIMER2_IRQHandler_v
-                DCD     RTC0_IRQHandler
-                DCD     TEMP_IRQHandler_v
-                DCD     RNG_IRQHandler
-                DCD     ECB_IRQHandler
-                DCD     CCM_AAR_IRQHandler
-                DCD     WDT_IRQHandler_v
-                DCD     RTC1_IRQHandler_v
-                DCD     QDEC_IRQHandler_v
-                DCD     COMP_LPCOMP_IRQHandler_v
-                DCD     SWI0_EGU0_IRQHandler_v
-                DCD     SWI1_EGU1_IRQHandler_v
-                DCD     SWI2_EGU2_IRQHandler_v
-                DCD     SWI3_EGU3_IRQHandler_v
-                DCD     SWI4_EGU4_IRQHandler
-                DCD     SWI5_EGU5_IRQHandler
-                DCD     TIMER3_IRQHandler_v
-                DCD     TIMER4_IRQHandler_v
-                DCD     PWM0_IRQHandler_v
-                DCD     PDM_IRQHandler_v
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     MWU_IRQHandler
-                DCD     PWM1_IRQHandler_v
-                DCD     PWM2_IRQHandler_v
-                DCD     SPIM2_SPIS2_SPI2_IRQHandler_v
-                DCD     RTC2_IRQHandler_v
-                DCD     I2S_IRQHandler_v
-                DCD     FPU_IRQHandler_v
-
-__Vectors_End
-
-__Vectors_Size  EQU     __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset Handler
-
-
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  SystemInit
-                IMPORT  __main
-                IMPORT  nrf_reloc_vector_table
-                
-                
-                LDR     R0, =SystemInit
-                BLX     R0
-                LDR     R0, =nrf_reloc_vector_table
-                BLX     R0
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler               [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler         [WEAK]
-                B       .
-                ENDP
-MemoryManagement_Handler\
-                PROC
-                EXPORT  MemoryManagement_Handler  [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler          [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler        [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler               [WEAK]
-                B       .
-                ENDP
-DebugMonitor_Handler\
-                PROC
-                EXPORT  DebugMonitor_Handler      [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler            [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler           [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT   POWER_CLOCK_IRQHandler [WEAK]
-                EXPORT   RADIO_IRQHandler [WEAK]
-                EXPORT   UARTE0_UART0_IRQHandler_v [WEAK]
-                EXPORT   SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler_v [WEAK]
-                EXPORT   SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler_v [WEAK]
-                EXPORT   NFCT_IRQHandler_v [WEAK]
-                EXPORT   GPIOTE_IRQHandler_v [WEAK]
-                EXPORT   SAADC_IRQHandler_v [WEAK]
-                EXPORT   TIMER0_IRQHandler_v [WEAK]
-                EXPORT   TIMER1_IRQHandler_v [WEAK]
-                EXPORT   TIMER2_IRQHandler_v [WEAK]
-                EXPORT   RTC0_IRQHandler [WEAK]
-                EXPORT   TEMP_IRQHandler_v [WEAK]
-                EXPORT   RNG_IRQHandler [WEAK]
-                EXPORT   ECB_IRQHandler [WEAK]
-                EXPORT   CCM_AAR_IRQHandler [WEAK]
-                EXPORT   WDT_IRQHandler_v [WEAK]
-                EXPORT   RTC1_IRQHandler_v [WEAK]
-                EXPORT   QDEC_IRQHandler_v [WEAK]
-                EXPORT   COMP_LPCOMP_IRQHandler_v [WEAK]
-                EXPORT   SWI0_EGU0_IRQHandler_v [WEAK]
-                EXPORT   SWI1_EGU1_IRQHandler_v [WEAK]
-                EXPORT   SWI2_EGU2_IRQHandler_v [WEAK]
-                EXPORT   SWI3_EGU3_IRQHandler_v [WEAK]
-                EXPORT   SWI4_EGU4_IRQHandler [WEAK]
-                EXPORT   SWI5_EGU5_IRQHandler [WEAK]
-                EXPORT   TIMER3_IRQHandler_v [WEAK]
-                EXPORT   TIMER4_IRQHandler_v [WEAK]
-                EXPORT   PWM0_IRQHandler_v [WEAK]
-                EXPORT   PDM_IRQHandler_v [WEAK]
-                EXPORT   MWU_IRQHandler [WEAK]
-                EXPORT   PWM1_IRQHandler_v [WEAK]
-                EXPORT   PWM2_IRQHandler_v [WEAK]
-                EXPORT   SPIM2_SPIS2_SPI2_IRQHandler_v [WEAK]
-                EXPORT   RTC2_IRQHandler_v [WEAK]
-                EXPORT   I2S_IRQHandler_v [WEAK]
-                EXPORT   FPU_IRQHandler_v [WEAK]
-POWER_CLOCK_IRQHandler
-RADIO_IRQHandler
-UARTE0_UART0_IRQHandler_v
-SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler_v
-SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler_v
-NFCT_IRQHandler_v
-GPIOTE_IRQHandler_v
-SAADC_IRQHandler_v
-TIMER0_IRQHandler_v
-TIMER1_IRQHandler_v
-TIMER2_IRQHandler_v
-RTC0_IRQHandler
-TEMP_IRQHandler_v
-RNG_IRQHandler
-ECB_IRQHandler
-CCM_AAR_IRQHandler
-WDT_IRQHandler_v
-RTC1_IRQHandler_v
-QDEC_IRQHandler_v
-COMP_LPCOMP_IRQHandler_v
-SWI0_EGU0_IRQHandler_v
-SWI1_EGU1_IRQHandler_v
-SWI2_EGU2_IRQHandler_v
-SWI3_EGU3_IRQHandler_v
-SWI4_EGU4_IRQHandler
-SWI5_EGU5_IRQHandler
-TIMER3_IRQHandler_v
-TIMER4_IRQHandler_v
-PWM0_IRQHandler_v
-PDM_IRQHandler_v
-MWU_IRQHandler
-PWM1_IRQHandler_v
-PWM2_IRQHandler_v
-SPIM2_SPIS2_SPI2_IRQHandler_v
-RTC2_IRQHandler_v
-I2S_IRQHandler_v
-FPU_IRQHandler_v
-                B .
-                ENDP
-                ALIGN
-                END

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld

@@ -1,190 +0,0 @@
-/*
- * Copyright (c) 2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* Linker script to configure memory regions. */
-
-MEMORY
-{
-  FLASH (rx) : ORIGIN = 0x1C000, LENGTH = 0x64000
-  RAM (rwx) :  ORIGIN = 0x20002ef8, LENGTH = 0xd108
-}
-
-
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-
-/* Linker script to place sections and symbol values. Should be used together
- * with the other linker script that defines memory regions FLASH and RAM.
- * It references the following symbols that must be defined in code:
- *   Reset_Handler : Entry of reset handler
- *
- * It defines the following symbols that the code can use without definition:
- *   __exidx_start
- *   __exidx_end
- *   __etext
- *   __data_start__
- *   __preinit_array_start
- *   __preinit_array_end
- *   __init_array_start
- *   __init_array_end
- *   __fini_array_start
- *   __fini_array_end
- *   __data_end__
- *   __bss_start__
- *   __bss_end__
- *   __end__
- *   end
- *   __HeapLimit
- *   __StackLimit
- *   __StackTop
- *   __stack
- */
-ENTRY(Reset_Handler)
-
-
-SECTIONS
-{
-    .text :
-    {
-        KEEP(*(.Vectors))
-        *(.text*)
-
-        KEEP(*(.init))
-        KEEP(*(.fini))
-
-        /* .ctors */
-        *crtbegin.o(.ctors)
-        *crtbegin?.o(.ctors)
-        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
-        *(SORT(.ctors.*))
-        *(.ctors)
-
-        /* .dtors */
-        *crtbegin.o(.dtors)
-        *crtbegin?.o(.dtors)
-        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
-        *(SORT(.dtors.*))
-        *(.dtors)
-
-        *(.rodata*)
-
-        KEEP(*(.eh_frame*))
-    } > FLASH
-
-    .ARM.extab :
-    {
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-        . = ALIGN(4);
-    } > FLASH
-
-    __exidx_start = .;
-    .ARM.exidx :
-    {
-        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-        . = ALIGN(4);
-    } > FLASH
-    __exidx_end = .;
-
-    __etext = .;
-
-    .data : AT (__etext)
-    {
-        __data_start__ = .;
-        *(vtable)
-        *(.data*)
-
-        . = ALIGN(4);
-        /* preinit data */
-        PROVIDE_HIDDEN (__preinit_array_start = .);
-        KEEP(*(.preinit_array))
-        PROVIDE_HIDDEN (__preinit_array_end = .);
-
-        . = ALIGN(4);
-        /* init data */
-        PROVIDE_HIDDEN (__init_array_start = .);
-        KEEP(*(SORT(.init_array.*)))
-        KEEP(*(.init_array))
-        PROVIDE_HIDDEN (__init_array_end = .);
-
-
-        . = ALIGN(4);
-        /* finit data */
-        PROVIDE_HIDDEN (__fini_array_start = .);
-        KEEP(*(SORT(.fini_array.*)))
-        KEEP(*(.fini_array))
-        PROVIDE_HIDDEN (__fini_array_end = .);
-
-        . = ALIGN(4);
-        PROVIDE(__start_fs_data = .);
-        KEEP(*(.fs_data))
-        PROVIDE(__stop_fs_data = .);
-        
-        *(.jcr)
-        . = ALIGN(4);
-        /* All data end */
-        __data_end__ = .;
-
-    } > RAM
-
-    __edata = .;
-
-    .noinit :
-    {
-      PROVIDE(__start_noinit = .);
-      KEEP(*(.noinit))
-      PROVIDE(__stop_noinit = .);
-    } > RAM
-    
-    .bss :
-    {
-        . = ALIGN(4);
-        __bss_start__ = .;
-        *(.bss*)
-        *(COMMON)
-        . = ALIGN(4);
-        __bss_end__ = .;
-    } > RAM
-
-    .heap (NOLOAD):
-    {
-        __end__ = .;
-        end = __end__;
-        *(.heap*);
-
-        /* Expand the heap to reach the stack boundary. */
-        ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - 0x800), "heap region overflowed into stack");
-        . += (ORIGIN(RAM) + LENGTH(RAM) - 0x800) - .;
-    } > RAM
-    PROVIDE(__heap_start = ADDR(.heap));
-    PROVIDE(__heap_size = SIZEOF(.heap));
-    PROVIDE(__mbed_sbrk_start = ADDR(.heap));
-    PROVIDE(__mbed_krbs_start = ADDR(.heap) + SIZEOF(.heap));
-
-    /* .stack_dummy section does not contain any symbols. It is only
-     * used for the linker script to calculate the size of stack sections
-     * and assign values to stack symbols later. */
-    .stack (NOLOAD):
-    {
-        __StackLimit = .;
-        *(.stack*)
-        . += (ORIGIN(RAM) + LENGTH(RAM) - .);
-    } > RAM
-
-    /* Set the stack top to the end of RAM and move down the stack limit by
-     * the size of the stack_dummy section. */
-    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
-    __StackLimit = __StackTop - SIZEOF(.stack);
-    PROVIDE(__stack = __StackTop);
-}

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/startup_NRF52832.S

@@ -1,270 +0,0 @@
-/* 
- * Copyright (c) 2013 Nordic Semiconductor ASA
- * All rights reserved.
- * 
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a 
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
- */
-
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
-    .syntax unified
-    .arch armv7e-m
-
-    .section .Vectors
-    .align 2
-    .globl __Vectors
-__Vectors:
-    .long   __StackTop                  /* Top of Stack */
-    .long   Reset_Handler
-    .long   NMI_Handler
-    .long   HardFault_Handler
-    .long   MemoryManagement_Handler
-    .long   BusFault_Handler
-    .long   UsageFault_Handler
-    .long   0                           /*Reserved */
-    .long   0                           /*Reserved */
-    .long   0                           /*Reserved */
-    .long   0                           /*Reserved */
-    .long   SVC_Handler
-    .long   0                           /*Reserved */
-    .long   0                           /*Reserved */
-    .long   PendSV_Handler
-    .long   SysTick_Handler
-
-  /* External Interrupts */
-    .long   POWER_CLOCK_IRQHandler
-    .long   RADIO_IRQHandler
-    .long   UARTE0_UART0_IRQHandler_v
-    .long   SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler_v
-    .long   SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler_v
-    .long   NFCT_IRQHandler_v
-    .long   GPIOTE_IRQHandler_v
-    .long   SAADC_IRQHandler_v
-    .long   TIMER0_IRQHandler_v
-    .long   TIMER1_IRQHandler_v
-    .long   TIMER2_IRQHandler_v
-    .long   RTC0_IRQHandler
-    .long   TEMP_IRQHandler_v
-    .long   RNG_IRQHandler
-    .long   ECB_IRQHandler
-    .long   CCM_AAR_IRQHandler
-    .long   WDT_IRQHandler_v
-    .long   RTC1_IRQHandler_v
-    .long   QDEC_IRQHandler_v
-    .long   COMP_LPCOMP_IRQHandler_v
-    .long   SWI0_EGU0_IRQHandler_v
-    .long   SWI1_EGU1_IRQHandler_v
-    .long   SWI2_EGU2_IRQHandler_v
-    .long   SWI3_EGU3_IRQHandler_v
-    .long   SWI4_EGU4_IRQHandler
-    .long   SWI5_EGU5_IRQHandler
-    .long   TIMER3_IRQHandler_v
-    .long   TIMER4_IRQHandler_v
-    .long   PWM0_IRQHandler_v
-    .long   PDM_IRQHandler_v
-    .long   0                           /*Reserved */
-    .long   0                           /*Reserved */
-    .long   MWU_IRQHandler
-    .long   PWM1_IRQHandler_v
-    .long   PWM2_IRQHandler_v
-    .long   SPIM2_SPIS2_SPI2_IRQHandler_v
-    .long   RTC2_IRQHandler_v
-    .long   I2S_IRQHandler_v
-    .long   FPU_IRQHandler_v
-
-
-    .size    __Vectors, . - __Vectors
-
-/* Reset Handler */
-
-    .text
-    .thumb
-    .thumb_func
-    .align 1
-    .globl    Reset_Handler
-    .type    Reset_Handler, %function
-Reset_Handler:
-    .fnstart
-
-
-/*     Loop to copy data from read only memory to RAM. The ranges
- *      of copy from/to are specified by following symbols evaluated in
- *      linker script.
- *      __etext: End of code section, i.e., begin of data sections to copy from.
- *      __data_start__/__data_end__: RAM address range that data should be
- *      copied to. Both must be aligned to 4 bytes boundary.  */
-
-    ldr    r1, =__etext
-    ldr    r2, =__data_start__
-    ldr    r3, =__data_end__
-
-    subs    r3, r2
-    ble     .LC0
-
-.LC1:
-    subs    r3, 4
-    ldr    r0, [r1,r3]
-    str    r0, [r2,r3]
-    bgt    .LC1
-.LC0:
-
-    LDR     R0, =SystemInit
-    BLX     R0
-    LDR     R0, =nrf_reloc_vector_table
-    BLX     R0
-    LDR     R0, =_start
-    BX      R0
-
-    .pool
-    .cantunwind
-    .fnend
-    .size   Reset_Handler,.-Reset_Handler
-
-    .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
-    .weak   NMI_Handler
-    .type   NMI_Handler, %function
-NMI_Handler:
-    B       .
-    .size   NMI_Handler, . - NMI_Handler
-
-
-    .weak   HardFault_Handler
-    .type   HardFault_Handler, %function
-HardFault_Handler:
-    B       .
-    .size   HardFault_Handler, . - HardFault_Handler
-
-
-    .weak   MemoryManagement_Handler
-    .type   MemoryManagement_Handler, %function
-MemoryManagement_Handler:
-    B       .
-    .size   MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
-    .weak   BusFault_Handler
-    .type   BusFault_Handler, %function
-BusFault_Handler:
-    B       .
-    .size   BusFault_Handler, . - BusFault_Handler
-
-
-    .weak   UsageFault_Handler
-    .type   UsageFault_Handler, %function
-UsageFault_Handler:
-    B       .
-    .size   UsageFault_Handler, . - UsageFault_Handler
-
-
-    .weak   SVC_Handler
-    .type   SVC_Handler, %function
-SVC_Handler:
-    B       .
-    .size   SVC_Handler, . - SVC_Handler
-
-
-    .weak   PendSV_Handler
-    .type   PendSV_Handler, %function
-PendSV_Handler:
-    B       .
-    .size   PendSV_Handler, . - PendSV_Handler
-
-
-    .weak   SysTick_Handler
-    .type   SysTick_Handler, %function
-SysTick_Handler:
-    B       .
-    .size   SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
-    .globl  Default_Handler
-    .type   Default_Handler, %function
-Default_Handler:
-    B       .
-    .size   Default_Handler, . - Default_Handler
-
-    .macro  IRQ handler
-    .weak   \handler
-    .set    \handler, Default_Handler
-    .endm
-
-    IRQ  POWER_CLOCK_IRQHandler                          /* restricted */
-    IRQ  RADIO_IRQHandler                                /* blocked    */
-    IRQ  UARTE0_UART0_IRQHandler_v
-    IRQ  SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler_v
-    IRQ  SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler_v
-    IRQ  NFCT_IRQHandler_v
-    IRQ  GPIOTE_IRQHandler_v
-    IRQ  SAADC_IRQHandler_v
-    IRQ  TIMER0_IRQHandler_v
-    IRQ  TIMER1_IRQHandler_v
-    IRQ  TIMER2_IRQHandler_v
-    IRQ  RTC0_IRQHandler                                 /* blocked    */
-    IRQ  TEMP_IRQHandler_v
-    IRQ  RNG_IRQHandler                                  /* restricted */
-    IRQ  ECB_IRQHandler                                  /* restricted */
-    IRQ  CCM_AAR_IRQHandler                              /* blocked    */
-    IRQ  WDT_IRQHandler_v
-    IRQ  RTC1_IRQHandler_v
-    IRQ  QDEC_IRQHandler_v
-    IRQ  COMP_LPCOMP_IRQHandler_v
-    IRQ  SWI0_EGU0_IRQHandler_v
-    IRQ  SWI1_EGU1_IRQHandler_v                          /* restricted for Radio Notification */
-    IRQ  SWI2_EGU2_IRQHandler_v                          /* blocked for SoftDevice Event */
-    IRQ  SWI3_EGU3_IRQHandler_v
-    IRQ  SWI4_EGU4_IRQHandler                            /* blocked    */
-    IRQ  SWI5_EGU5_IRQHandler                            /* blocked    */
-    IRQ  TIMER3_IRQHandler_v
-    IRQ  TIMER4_IRQHandler_v
-    IRQ  PWM0_IRQHandler_v
-    IRQ  PDM_IRQHandler_v
-    IRQ  MWU_IRQHandler                                  /* restricted */
-    IRQ  PWM1_IRQHandler_v
-    IRQ  PWM2_IRQHandler_v
-    IRQ  SPIM2_SPIS2_SPI2_IRQHandler_v
-    IRQ  RTC2_IRQHandler_v
-    IRQ  I2S_IRQHandler_v
-    IRQ  FPU_IRQHandler_v
-    
-  .end

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf

@@ -1,46 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x1c000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x1c000;
-define symbol __ICFEDIT_region_ROM_end__     = 0x7ffff;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20002ef8;
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000ffff;
-export symbol __ICFEDIT_region_RAM_start__;
-export symbol __ICFEDIT_region_RAM_end__;
-/*-Sizes-*/
-/*Heap 1/4 of ram and stack 1/8*/
-define symbol __ICFEDIT_size_cstack__   = 0x800;
-define symbol __ICFEDIT_size_heap__     = 0x1800;
-/**** End of ICF editor section. ###ICF###*/
-
-define symbol __code_start_soft_device__ = 0x0;
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-keep { section .intvec };
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block HEAP,
-                        block CSTACK };
-
-/*This is used for mbed applications build inside the Embedded workbench
-Applications build with the python scritps use a hex merge so need to merge it
-inside the linker. The linker can only use binary files so the hex merge is not possible
-through the linker. That is why a binary is used instead of a hex image for the embedded project.
-*/
-if(isdefinedsymbol(SOFT_DEVICE_BIN))
-{
-  place at address mem:__code_start_soft_device__ { section .noinit_softdevice };
-}

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/startup_NRF52832_IAR.S

@@ -1,381 +0,0 @@
-;/* Copyright (c) 2012 ARM LIMITED
-;
-;   All rights reserved.
-;   Redistribution and use in source and binary forms, with or without
-;   modification, are permitted provided that the following conditions are met:
-;   - Redistributions of source code must retain the above copyright
-;     notice, this list of conditions and the following disclaimer.
-;   - Redistributions in binary form must reproduce the above copyright
-;     notice, this list of conditions and the following disclaimer in the
-;     documentation and/or other materials provided with the distribution.
-;   - Neither the name of ARM nor the names of its contributors may be used
-;     to endorse or promote products derived from this software without
-;     specific prior written permission.
-;   *
-;   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-;   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-;   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-;   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-;   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-;   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-;   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-;   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-;   POSSIBILITY OF SUCH DAMAGE.
-;   ---------------------------------------------------------------------------*/
-
-
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-
-
-
-        MODULE  ?cstartup
-
-        ;; Stack size default : Defined in *.icf (linker file). Can be modified inside EW.
-        ;; Heap size default : Defined in *.icf (linker file). Can be modified inside EW.
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit
-        EXTERN  nrf_reloc_vector_table
-        PUBLIC  __vector_table
-        PUBLIC  __Vectors
-        PUBLIC  __Vectors_End
-        PUBLIC  __Vectors_Size
-
-        DATA
-
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler
-        DCD     NMI_Handler
-        DCD     HardFault_Handler
-        DCD     MemoryManagement_Handler
-        DCD     BusFault_Handler
-        DCD     UsageFault_Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler
-        DCD     DebugMonitor_Handler
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler
-        DCD     SysTick_Handler
-
-        ; External Interrupts
-        DCD     POWER_CLOCK_IRQHandler
-        DCD     RADIO_IRQHandler
-        DCD     UARTE0_UART0_IRQHandler_v
-        DCD     SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler_v
-        DCD     SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler_v
-        DCD     NFCT_IRQHandler_v
-        DCD     GPIOTE_IRQHandler_v
-        DCD     SAADC_IRQHandler_v
-        DCD     TIMER0_IRQHandler_v
-        DCD     TIMER1_IRQHandler_v
-        DCD     TIMER2_IRQHandler_v
-        DCD     RTC0_IRQHandler
-        DCD     TEMP_IRQHandler_v
-        DCD     RNG_IRQHandler
-        DCD     ECB_IRQHandler
-        DCD     CCM_AAR_IRQHandler
-        DCD     WDT_IRQHandler_v
-        DCD     RTC1_IRQHandler_v
-        DCD     QDEC_IRQHandler_v
-        DCD     COMP_LPCOMP_IRQHandler_v
-        DCD     SWI0_EGU0_IRQHandler_v
-        DCD     SWI1_EGU1_IRQHandler_v
-        DCD     SWI2_EGU2_IRQHandler_v
-        DCD     SWI3_EGU3_IRQHandler_v
-        DCD     SWI4_EGU4_IRQHandler
-        DCD     SWI5_EGU5_IRQHandler
-        DCD     TIMER3_IRQHandler_v
-        DCD     TIMER4_IRQHandler_v
-        DCD     PWM0_IRQHandler_v
-        DCD     PDM_IRQHandler_v
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     MWU_IRQHandler
-        DCD     PWM1_IRQHandler_v
-        DCD     PWM2_IRQHandler_v
-        DCD     SPIM2_SPIS2_SPI2_IRQHandler_v
-        DCD     RTC2_IRQHandler_v
-        DCD     I2S_IRQHandler_v
-        DCD     FPU_IRQHandler_v
-
-
-__Vectors_End
-__Vectors                           EQU   __vector_table
-__Vectors_Size                      EQU   __Vectors_End - __Vectors
-
-
-; Default handlers.
-        THUMB
-
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT(2)
-Reset_Handler
-
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =nrf_reloc_vector_table
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-
-        ; Dummy exception handlers
-        
-
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT(1)
-NMI_Handler
-        B .
-
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT(1)
-HardFault_Handler
-        B .
-
-        PUBWEAK MemoryManagement_Handler
-        SECTION .text:CODE:NOROOT(1)
-MemoryManagement_Handler
-        B .
-
-        PUBWEAK BusFault_Handler
-        SECTION .text:CODE:NOROOT(1)
-BusFault_Handler
-        B .
-
-        PUBWEAK UsageFault_Handler
-        SECTION .text:CODE:NOROOT(1)
-UsageFault_Handler
-        B .
-
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT(1)
-SVC_Handler
-        B .
-
-        PUBWEAK DebugMonitor_Handler
-        SECTION .text:CODE:NOROOT(1)
-DebugMonitor_Handler
-        B .
-
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT(1)
-PendSV_Handler
-        B .
-
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT(1)
-SysTick_Handler
-        B .
-
-
-       ; Dummy interrupt handlers
-
-        PUBWEAK  POWER_CLOCK_IRQHandler
-        SECTION .text:CODE:NOROOT(1)
-POWER_CLOCK_IRQHandler
-        B .
-
-        PUBWEAK  RADIO_IRQHandler
-        SECTION .text:CODE:NOROOT(1)
-RADIO_IRQHandler
-        B .
-
-        PUBWEAK  UARTE0_UART0_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-UARTE0_UART0_IRQHandler_v
-        B .
-
-        PUBWEAK  SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler_v
-        B .
-
-        PUBWEAK  SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler_v
-        B .
-
-        PUBWEAK  NFCT_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-NFCT_IRQHandler_v
-        B .
-
-        PUBWEAK  GPIOTE_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-GPIOTE_IRQHandler_v
-        B .
-
-        PUBWEAK  SAADC_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-SAADC_IRQHandler_v
-        B .
-
-        PUBWEAK  TIMER0_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-TIMER0_IRQHandler_v
-        B .
-
-        PUBWEAK  TIMER1_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-TIMER1_IRQHandler_v
-        B .
-
-        PUBWEAK  TIMER2_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-TIMER2_IRQHandler_v
-        B .
-
-        PUBWEAK  RTC0_IRQHandler
-        SECTION .text:CODE:NOROOT(1)
-RTC0_IRQHandler
-        B .
-
-        PUBWEAK  TEMP_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-TEMP_IRQHandler_v
-        B .
-
-        PUBWEAK  RNG_IRQHandler
-        SECTION .text:CODE:NOROOT(1)
-RNG_IRQHandler
-        B .
-
-        PUBWEAK  ECB_IRQHandler
-        SECTION .text:CODE:NOROOT(1)
-ECB_IRQHandler
-        B .
-
-        PUBWEAK  CCM_AAR_IRQHandler
-        SECTION .text:CODE:NOROOT(1)
-CCM_AAR_IRQHandler
-        B .
-
-        PUBWEAK  WDT_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-WDT_IRQHandler_v
-        B .
-
-        PUBWEAK  RTC1_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-RTC1_IRQHandler_v
-        B .
-
-        PUBWEAK  QDEC_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-QDEC_IRQHandler_v
-        B .
-
-        PUBWEAK  COMP_LPCOMP_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-COMP_LPCOMP_IRQHandler_v
-        B .
-
-        PUBWEAK  SWI0_EGU0_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-SWI0_EGU0_IRQHandler_v
-        B .
-
-        PUBWEAK  SWI1_EGU1_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-SWI1_EGU1_IRQHandler_v
-        B .
-
-        PUBWEAK  SWI2_EGU2_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-SWI2_EGU2_IRQHandler_v
-        B .
-
-        PUBWEAK  SWI3_EGU3_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-SWI3_EGU3_IRQHandler_v
-        B .
-
-        PUBWEAK  SWI4_EGU4_IRQHandler
-        SECTION .text:CODE:NOROOT(1)
-SWI4_EGU4_IRQHandler
-        B .
-
-        PUBWEAK  SWI5_EGU5_IRQHandler
-        SECTION .text:CODE:NOROOT(1)
-SWI5_EGU5_IRQHandler
-        B .
-
-        PUBWEAK  TIMER3_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-TIMER3_IRQHandler_v
-        B .
-
-        PUBWEAK  TIMER4_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-TIMER4_IRQHandler_v
-        B .
-
-        PUBWEAK  PWM0_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-PWM0_IRQHandler_v
-        B .
-
-        PUBWEAK  PDM_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-PDM_IRQHandler_v
-        B .
-
-        PUBWEAK  MWU_IRQHandler
-        SECTION .text:CODE:NOROOT(1)
-MWU_IRQHandler
-        B .
-
-        PUBWEAK  PWM1_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-PWM1_IRQHandler_v
-        B .
-
-        PUBWEAK  PWM2_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-PWM2_IRQHandler_v
-        B .
-
-        PUBWEAK  SPIM2_SPIS2_SPI2_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-SPIM2_SPIS2_SPI2_IRQHandler_v
-        B .
-
-        PUBWEAK  RTC2_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-RTC2_IRQHandler_v
-        B .
-
-        PUBWEAK  I2S_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-I2S_IRQHandler_v
-        B .
-
-        PUBWEAK  FPU_IRQHandler_v
-        SECTION .text:CODE:NOROOT(1)
-FPU_IRQHandler_v
-        B .
-
-
-        END
-
-

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/cmsis.h

@@ -1,24 +0,0 @@
-/*
- * PackageLicenseDeclared: Apache-2.0
- * Copyright (c) 2016 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef MBED_CMSIS_H
-#define MBED_CMSIS_H
-
-#include "nrf.h"
-#include "cmsis_nvic.h"
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/cmsis_nvic.c

@@ -1,43 +0,0 @@
-/* mbed Microcontroller Library
- * CMSIS-style functionality to support dynamic vectors
- *******************************************************************************
- * Copyright (c) 2016 ARM Limited. All rights reserved.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- * 3. Neither the name of ARM Limited nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#include "cmsis_nvic.h"
-
-extern uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS];
-
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-    nrf_dispatch_vector[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-uint32_t NVIC_GetVector(IRQn_Type IRQn)
-{
-    return nrf_dispatch_vector[IRQn + NVIC_USER_IRQ_OFFSET];
-}

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/cmsis_nvic.h

@@ -1,52 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2016 ARM Limited. All rights reserved.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- * 3. Neither the name of ARM Limited nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-
-#ifndef MBED_CMSIS_NVIC_H
-#define MBED_CMSIS_NVIC_H
-
-#define NVIC_NUM_VECTORS      (16 + 38)   // CORE + MCU Peripherals
-#define NVIC_USER_IRQ_OFFSET  16
-
-#include "nrf52.h"
-#include "cmsis.h"
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
-uint32_t NVIC_GetVector(IRQn_Type IRQn);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/system_nrf52.c

@@ -1,321 +0,0 @@
-/* 
- * Copyright (c) 2015 Nordic Semiconductor ASA
- * All rights reserved.
- * 
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a 
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
- */
-
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "nrf.h"
-#include "system_nrf52.h"
-#include "nrf5x_lf_clk_helper.h"
-
-/*lint ++flb "Enter library region" */
-
-#define __SYSTEM_CLOCK_64M      (64000000UL)
-
-static bool errata_16(void);
-static bool errata_31(void);
-static bool errata_32(void);
-static bool errata_36(void);
-static bool errata_37(void);
-static bool errata_57(void);
-static bool errata_66(void);
-
-
-#if defined ( __CC_ARM )
-    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
-#elif defined ( __ICCARM__ )
-    __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
-#elif defined ( __GNUC__ )
-    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
-#endif
-
-void SystemCoreClockUpdate(void)
-{
-    SystemCoreClock = __SYSTEM_CLOCK_64M;
-}
-
-void SystemInit(void)
-{
-    /* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document
-       for your device located at https://infocenter.nordicsemi.com/ */
-    if (errata_16()){
-        *(volatile uint32_t *)0x4007C074 = 3131961357ul;
-    }
-
-    /* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
-       for your device located at https://infocenter.nordicsemi.com/ */
-    if (errata_31()){
-        *(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
-    }
-
-    /* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document
-       for your device located at https://infocenter.nordicsemi.com/ */
-    if (errata_32()){
-        CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk;
-    }
-
-    /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
-       for your device located at https://infocenter.nordicsemi.com/  */
-    if (errata_36()){
-        NRF_CLOCK->EVENTS_DONE = 0;
-        NRF_CLOCK->EVENTS_CTTO = 0;
-        NRF_CLOCK->CTIV = 0;
-    }
-
-    /* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document
-       for your device located at https://infocenter.nordicsemi.com/  */
-    if (errata_37()){
-        *(volatile uint32_t *)0x400005A0 = 0x3;
-    }
-
-    /* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document
-       for your device located at https://infocenter.nordicsemi.com/  */
-    if (errata_57()){
-        *(volatile uint32_t *)0x40005610 = 0x00000005;
-        *(volatile uint32_t *)0x40005688 = 0x00000001;
-        *(volatile uint32_t *)0x40005618 = 0x00000000;
-        *(volatile uint32_t *)0x40005614 = 0x0000003F;
-    }
-
-    /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
-       for your device located at https://infocenter.nordicsemi.com/  */
-    if (errata_66()){
-        NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
-        NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
-        NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
-        NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
-        NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
-        NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
-        NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
-        NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
-        NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
-        NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
-        NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
-        NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
-        NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
-        NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
-        NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
-        NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
-        NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
-    }
-
-    /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
-     * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
-     * operations are not used in your code. */
-    #if (__FPU_USED == 1)
-        SCB->CPACR |= (3UL << 20) | (3UL << 22);
-        __DSB();
-        __ISB();
-    #endif
-
-    /* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
-       two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
-       normal GPIOs. */
-    #if defined (CONFIG_NFCT_PINS_AS_GPIOS)
-        if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
-            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
-            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
-            NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
-            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
-            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
-            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
-            NVIC_SystemReset();
-        }
-    #endif
-
-    /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
-      defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
-      reserved for PinReset and not available as normal GPIO. */
-    #if defined (CONFIG_GPIO_AS_PINRESET)
-        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
-            ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
-            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
-            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
-            NRF_UICR->PSELRESET[0] = 21;
-            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
-            NRF_UICR->PSELRESET[1] = 21;
-            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
-            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
-            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
-            NVIC_SystemReset();
-        }
-    #endif
-
-    /* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
-       Specification to see which one). */
-    #if defined (ENABLE_SWO)
-        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
-        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
-        NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
-    #endif
-
-    /* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
-       Specification to see which ones). */
-    #if defined (ENABLE_TRACE)
-        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
-        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
-        NRF_P0->PIN_CNF[14] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
-        NRF_P0->PIN_CNF[15] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
-        NRF_P0->PIN_CNF[16] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
-        NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
-        NRF_P0->PIN_CNF[20] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
-    #endif
-
-    SystemCoreClockUpdate();
-
-    // Start the LF oscilator according to the mbed configuration (over the nrf5x_lf_clk_helper.h file)
-    NRF_CLOCK->LFCLKSRC             = (CLOCK_LFCLKSRC_SRC_TO_USE << CLOCK_LFCLKSRC_SRC_Pos);
-    NRF_CLOCK->EVENTS_LFCLKSTARTED  = 0;
-    NRF_CLOCK->TASKS_LFCLKSTART     = 1;
-
-    // Wait for the external oscillator to start up.
-    while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {
-        // Do nothing.
-    }
-}
-
-
-static bool errata_16(void)
-{
-    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
-    {
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
-        {
-            return true;
-        }
-    }
-
-    return false;
-}
-
-static bool errata_31(void)
-{
-    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
-    {
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
-        {
-            return true;
-        }
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40)
-        {
-            return true;
-        }
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50)
-        {
-            return true;
-        }
-    }
-
-    return false;
-}
-
-static bool errata_32(void)
-{
-    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
-    {
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
-        {
-            return true;
-        }
-    }
-
-    return false;
-}
-
-static bool errata_36(void)
-{
-    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
-    {
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
-        {
-            return true;
-        }
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40)
-        {
-            return true;
-        }
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50)
-        {
-            return true;
-        }
-    }
-
-    return false;
-}
-
-static bool errata_37(void)
-{
-    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
-    {
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
-        {
-            return true;
-        }
-    }
-
-    return false;
-}
-
-static bool errata_57(void)
-{
-    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
-    {
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
-        {
-            return true;
-        }
-    }
-
-    return false;
-}
-
-static bool errata_66(void)
-{
-    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
-    {
-        if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50)
-        {
-            return true;
-        }
-    }
-
-    return false;
-}
-
-
-/*lint --flb "Leave library region" */

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/system_nrf52.h

@@ -1,78 +0,0 @@
-/* 
- * Copyright (c) 2015 Nordic Semiconductor ASA
- * All rights reserved.
- * 
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a 
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
- */
-
-
-#ifndef SYSTEM_NRF52_H
-#define SYSTEM_NRF52_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-
-
-extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
-
-/**
- * Initialize the system
- *
- * @param  none
- * @return none
- *
- * @brief  Setup the microcontroller system.
- *         Initialize the System and update the SystemCoreClock variable.
- */
-extern void SystemInit (void);
-
-/**
- * Update SystemCoreClock variable
- *
- * @param  none
- * @return none
- *
- * @brief  Updates the SystemCoreClock with current core Clock
- *         retrieved from cpu registers.
- */
-extern void SystemCoreClockUpdate (void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* SYSTEM_NRF52_H */

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/driver_nrf/pwm/nrf_drv_pwm.c

@@ -1,350 +0,0 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-#include <string.h>
-#include "nrf_drv_pwm.h"
-#include "nrf_drv_common.h"
-#include "nrf_gpio.h"
-#include "app_util_platform.h"
-
-#if (PWM_COUNT == 0)
-    #error "No PWM instances enabled in the driver configuration file."
-#endif
-
-
-// Control block - driver instance local data.
-typedef struct
-{
-    nrf_drv_pwm_handler_t    handler;
-    nrf_drv_state_t volatile state;
-} pwm_control_block_t;
-static pwm_control_block_t m_cb[PWM_COUNT];
-
-static nrf_drv_pwm_config_t const m_default_config[PWM_COUNT] = {
-#if PWM0_ENABLED
-    NRF_DRV_PWM_DEFAULT_CONFIG(0),
-#endif
-#if PWM1_ENABLED
-    NRF_DRV_PWM_DEFAULT_CONFIG(1),
-#endif
-#if PWM2_ENABLED
-    NRF_DRV_PWM_DEFAULT_CONFIG(2),
-#endif
-};
-
-
-static void configure_pins(nrf_drv_pwm_t const * const p_instance,
-                           nrf_drv_pwm_config_t const * p_config)
-{
-    uint32_t out_pins[NRF_PWM_CHANNEL_COUNT];
-    uint8_t i;
-
-    for (i = 0; i < NRF_PWM_CHANNEL_COUNT; ++i)
-    {
-        uint8_t output_pin = p_config->output_pins[i];
-        if (output_pin != NRF_DRV_PWM_PIN_NOT_USED)
-        {
-            bool inverted = output_pin &  NRF_DRV_PWM_PIN_INVERTED;
-            out_pins[i]   = output_pin & ~NRF_DRV_PWM_PIN_INVERTED;
-
-            if (inverted)
-            {
-                nrf_gpio_pin_set(out_pins[i]);
-            }
-            else
-            {
-                nrf_gpio_pin_clear(out_pins[i]);
-            }
-
-            nrf_gpio_cfg_output(out_pins[i]);
-        }
-        else
-        {
-            out_pins[i] = NRF_PWM_PIN_NOT_CONNECTED;
-        }
-    }
-
-    nrf_pwm_pins_set(p_instance->p_registers, out_pins);
-}
-
-
-ret_code_t nrf_drv_pwm_init(nrf_drv_pwm_t const * const p_instance,
-                            nrf_drv_pwm_config_t const * p_config,
-                            nrf_drv_pwm_handler_t        handler)
-{
-    pwm_control_block_t * p_cb  = &m_cb[p_instance->drv_inst_idx];
-
-    if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED)
-    {
-        return NRF_ERROR_INVALID_STATE;
-    }
-
-    if (p_config == NULL)
-    {
-        p_config = &m_default_config[p_instance->drv_inst_idx];
-    }
-
-    p_cb->handler = handler;
-
-    configure_pins(p_instance, p_config);
-
-    nrf_pwm_enable(p_instance->p_registers);
-    nrf_pwm_configure(p_instance->p_registers,
-        p_config->base_clock, p_config->count_mode, p_config->top_value);
-    nrf_pwm_decoder_set(p_instance->p_registers,
-        p_config->load_mode, p_config->step_mode);
-
-    nrf_pwm_shorts_set(p_instance->p_registers, 0);
-    nrf_pwm_int_set(p_instance->p_registers, 0);
-    nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_LOOPSDONE);
-    nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_SEQEND0);
-    nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_SEQEND1);
-    nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_STOPPED);
-
-    if (p_cb->handler)
-    {
-        nrf_drv_common_irq_enable(nrf_drv_get_IRQn(p_instance->p_registers),
-            p_config->irq_priority);
-    }
-
-    p_cb->state = NRF_DRV_STATE_INITIALIZED;
-
-    return NRF_SUCCESS;
-}
-
-
-void nrf_drv_pwm_uninit(nrf_drv_pwm_t const * const p_instance)
-{
-    pwm_control_block_t * p_cb  = &m_cb[p_instance->drv_inst_idx];
-    ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED);
-
-    nrf_drv_common_irq_disable(nrf_drv_get_IRQn(p_instance->p_registers));
-
-    nrf_pwm_disable(p_instance->p_registers);
-
-    p_cb->state = NRF_DRV_STATE_UNINITIALIZED;
-}
-
-
-static void start_playback(nrf_drv_pwm_t const * const p_instance,
-                           pwm_control_block_t * p_cb,
-                           uint8_t               flags,
-                           nrf_pwm_task_t        starting_task)
-{
-    p_cb->state = NRF_DRV_STATE_POWERED_ON;
-
-    if (p_cb->handler)
-    {
-        // The notification about finished playback is by default enabled, but
-        // this can be suppressed. The notification that the peripheral has been
-        // stopped is always enable.
-        uint32_t int_mask = NRF_PWM_INT_LOOPSDONE_MASK |
-                            NRF_PWM_INT_STOPPED_MASK;
-
-        if (flags & NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ0)
-        {
-            int_mask |= NRF_PWM_INT_SEQEND0_MASK;
-        }
-        if (flags & NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ1)
-        {
-            int_mask |= NRF_PWM_INT_SEQEND1_MASK;
-        }
-        if (flags & NRF_DRV_PWM_FLAG_NO_EVT_FINISHED)
-        {
-            int_mask &= ~NRF_PWM_INT_LOOPSDONE_MASK;
-        }
-
-        nrf_pwm_int_set(p_instance->p_registers, int_mask);
-    }
-
-    nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_STOPPED);
-
-    nrf_pwm_task_trigger(p_instance->p_registers, starting_task);
-}
-
-
-void nrf_drv_pwm_simple_playback(nrf_drv_pwm_t const * const p_instance,
-                                 nrf_pwm_sequence_t const * p_sequence,
-                                 uint16_t                   playback_count,
-                                 uint32_t                   flags)
-{
-    pwm_control_block_t * p_cb  = &m_cb[p_instance->drv_inst_idx];
-    ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED);
-    ASSERT(playback_count > 0);
-    ASSERT(nrf_drv_is_in_RAM(p_sequence->values.p_raw));
-
-    // To take advantage of the looping mechanism, we need to use both sequences
-    // (single sequence can be played back only once).
-    nrf_pwm_sequence_set(p_instance->p_registers, 0, p_sequence);
-    nrf_pwm_sequence_set(p_instance->p_registers, 1, p_sequence);
-    bool odd = (playback_count & 1);
-    nrf_pwm_loop_set(p_instance->p_registers, playback_count/2 + (odd ? 1 : 0));
-
-    uint32_t shorts_mask;
-    if (flags & NRF_DRV_PWM_FLAG_STOP)
-    {
-        shorts_mask = NRF_PWM_SHORT_LOOPSDONE_STOP_MASK;
-    }
-    else if (flags & NRF_DRV_PWM_FLAG_LOOP)
-    {
-        shorts_mask = odd ? NRF_PWM_SHORT_LOOPSDONE_SEQSTART1_MASK
-                          : NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK;
-    }
-    else
-    {
-        shorts_mask = 0;
-    }
-    nrf_pwm_shorts_set(p_instance->p_registers, shorts_mask);
-
-    start_playback(p_instance, p_cb, flags, odd ? NRF_PWM_TASK_SEQSTART1
-                                                : NRF_PWM_TASK_SEQSTART0);
-}
-
-
-void nrf_drv_pwm_complex_playback(nrf_drv_pwm_t const * const p_instance,
-                                  nrf_pwm_sequence_t const * p_sequence_0,
-                                  nrf_pwm_sequence_t const * p_sequence_1,
-                                  uint16_t                   playback_count,
-                                  uint32_t                   flags)
-{
-    pwm_control_block_t * p_cb  = &m_cb[p_instance->drv_inst_idx];
-    ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED);
-    ASSERT(playback_count > 0);
-    ASSERT(nrf_drv_is_in_RAM(p_sequence_0->values.p_raw));
-    ASSERT(nrf_drv_is_in_RAM(p_sequence_1->values.p_raw));
-
-    nrf_pwm_sequence_set(p_instance->p_registers, 0, p_sequence_0);
-    nrf_pwm_sequence_set(p_instance->p_registers, 1, p_sequence_1);
-    nrf_pwm_loop_set(p_instance->p_registers, playback_count);
-
-    uint32_t shorts_mask;
-    if (flags & NRF_DRV_PWM_FLAG_STOP)
-    {
-        shorts_mask = NRF_PWM_SHORT_LOOPSDONE_STOP_MASK;
-    }
-    else if (flags & NRF_DRV_PWM_FLAG_LOOP)
-    {
-        shorts_mask = NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK;
-    }
-    else
-    {
-        shorts_mask = 0;
-    }
-    nrf_pwm_shorts_set(p_instance->p_registers, shorts_mask);
-
-    start_playback(p_instance, p_cb, flags, NRF_PWM_TASK_SEQSTART0);
-}
-
-
-bool nrf_drv_pwm_stop(nrf_drv_pwm_t const * const p_instance,
-                      bool wait_until_stopped)
-{
-    ASSERT(m_cb[p_instance->drv_inst_idx].state != NRF_DRV_STATE_UNINITIALIZED);
-
-    if (nrf_drv_pwm_is_stopped(p_instance))
-    {
-        return true;
-    }
-
-    nrf_pwm_task_trigger(p_instance->p_registers, NRF_PWM_TASK_STOP);
-
-    do {
-        if (nrf_drv_pwm_is_stopped(p_instance))
-        {
-            return true;
-        }
-    } while (wait_until_stopped);
-
-    return false;
-}
-
-
-bool nrf_drv_pwm_is_stopped(nrf_drv_pwm_t const * const p_instance)
-{
-    pwm_control_block_t * p_cb  = &m_cb[p_instance->drv_inst_idx];
-    ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED);
-
-    // If the event handler is used (interrupts are enabled), the state will
-    // be changed in interrupt handler when the STOPPED event occurs.
-    if (p_cb->state != NRF_DRV_STATE_POWERED_ON)
-    {
-        return true;
-    }
-    // If interrupts are disabled, we must check the STOPPED event here.
-    if (nrf_pwm_event_check(p_instance->p_registers, NRF_PWM_EVENT_STOPPED))
-    {
-        p_cb->state = NRF_DRV_STATE_INITIALIZED;
-        return true;
-    }
-
-    return false;
-}
-
-
-static void irq_handler(NRF_PWM_Type * p_pwm, pwm_control_block_t * p_cb)
-{
-    ASSERT(p_cb->handler);
-
-    // The SEQEND0 and SEQEND1 events are only handled when the user asked for
-    // it (by setting proper flags when starting the playback).
-    if (nrf_pwm_int_enable_check(p_pwm, NRF_PWM_INT_SEQEND0_MASK) &&
-        nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_SEQEND0))
-    {
-        nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_SEQEND0);
-        p_cb->handler(NRF_DRV_PWM_EVT_END_SEQ0);
-    }
-    if (nrf_pwm_int_enable_check(p_pwm, NRF_PWM_INT_SEQEND1_MASK) &&
-        nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_SEQEND1))
-    {
-        nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_SEQEND1);
-        p_cb->handler(NRF_DRV_PWM_EVT_END_SEQ1);
-    }
-
-    // The LOOPSDONE event is handled by default, but this can be disabled.
-    if (nrf_pwm_int_enable_check(p_pwm, NRF_PWM_INT_LOOPSDONE_MASK) &&
-        nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_LOOPSDONE))
-    {
-        nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_LOOPSDONE);
-        p_cb->handler(NRF_DRV_PWM_EVT_FINISHED);
-    }
-
-    if (nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_STOPPED))
-    {
-        nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_STOPPED);
-
-        p_cb->state = NRF_DRV_STATE_INITIALIZED;
-
-        p_cb->handler(NRF_DRV_PWM_EVT_STOPPED);
-    }
-}
-
-
-#if PWM0_ENABLED
-void PWM0_IRQHandler(void)
-{
-    irq_handler(NRF_PWM0, &m_cb[PWM0_INSTANCE_INDEX]);
-}
-#endif
-
-#if PWM1_ENABLED
-void PWM1_IRQHandler(void)
-{
-    irq_handler(NRF_PWM1, &m_cb[PWM1_INSTANCE_INDEX]);
-}
-#endif
-
-#if PWM2_ENABLED
-void PWM2_IRQHandler(void)
-{
-    irq_handler(NRF_PWM2, &m_cb[PWM2_INSTANCE_INDEX]);
-}
-#endif

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/driver_nrf/pwm/nrf_drv_pwm.h

@@ -1,426 +0,0 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-/**@file
- * @addtogroup nrf_pwm PWM HAL and driver
- * @ingroup    nrf_drivers
- * @brief      @tagAPI52 Pulse Width Modulation (PWM) module APIs.
- *
- * @defgroup   nrf_drv_pwm PWM driver
- * @{
- * @ingroup    nrf_pwm
- * @brief      @tagAPI52 Pulse Width Modulation (PWM) module driver.
- */
-
-
-#ifndef NRF_DRV_PWM_H__
-#define NRF_DRV_PWM_H__
-
-#include "nordic_common.h"
-#include "nrf_drv_config.h"
-#include "nrf_pwm.h"
-#include "sdk_errors.h"
-
-
-/**
- * @brief PWM driver instance data structure.
- */
-typedef struct
-{
-    NRF_PWM_Type * p_registers;  ///< Pointer to the structure with PWM peripheral instance registers.
-    uint8_t        drv_inst_idx; ///< Driver instance index.
-} nrf_drv_pwm_t;
-
-/**
- * @brief Macro for creating a PWM driver instance.
- */
-#define NRF_DRV_PWM_INSTANCE(id)                        \
-{                                                       \
-    .p_registers  = CONCAT_2(NRF_PWM, id),              \
-    .drv_inst_idx = CONCAT_3(PWM, id, _INSTANCE_INDEX), \
-}
-
-
-/**
- * @brief This value can be provided instead of a pin number for any channel
- *        to specify that its output is not used and therefore does not need
- *        to be connected to a pin.
- */
-#define NRF_DRV_PWM_PIN_NOT_USED    0xFF
-
-/**
- * @brief This value can be added to a pin number to inverse its polarity 
- *        (set idle state = 1).
- */
-#define NRF_DRV_PWM_PIN_INVERTED    0x80
-
-/**
- * @brief PWM driver configuration structure.
- */
-typedef struct
-{
-    uint8_t output_pins[NRF_PWM_CHANNEL_COUNT]; ///< Pin numbers for individual output channels (optional). 
-                                                /**< Use @ref NRF_DRV_PWM_PIN_NOT_USED
-                                                 *   if a given output channel is not needed. */
-    uint8_t            irq_priority; ///< Interrupt priority.
-    nrf_pwm_clk_t      base_clock;   ///< Base clock frequency.
-    nrf_pwm_mode_t     count_mode;   ///< Operating mode of the pulse generator counter.
-    uint16_t           top_value;    ///< Value up to which the pulse generator counter counts.
-    nrf_pwm_dec_load_t load_mode;    ///< Mode of loading sequence data from RAM.
-    nrf_pwm_dec_step_t step_mode;    ///< Mode of advancing the active sequence.
-} nrf_drv_pwm_config_t;
-
-/**
- * @brief PWM driver default configuration.
- */
-#define NRF_DRV_PWM_DEFAULT_CONFIG(id)                       \
-{                                                            \
-    .output_pins  = { CONCAT_3(PWM, id, _CONFIG_OUT0_PIN),   \
-                      CONCAT_3(PWM, id, _CONFIG_OUT1_PIN),   \
-                      CONCAT_3(PWM, id, _CONFIG_OUT2_PIN),   \
-                      CONCAT_3(PWM, id, _CONFIG_OUT3_PIN) }, \
-    .irq_priority = CONCAT_3(PWM, id, _CONFIG_IRQ_PRIORITY), \
-    .base_clock   = CONCAT_3(PWM, id, _CONFIG_BASE_CLOCK),   \
-    .count_mode   = CONCAT_3(PWM, id, _CONFIG_COUNT_MODE),   \
-    .top_value    = CONCAT_3(PWM, id, _CONFIG_TOP_VALUE),    \
-    .load_mode    = CONCAT_3(PWM, id, _CONFIG_LOAD_MODE),    \
-    .step_mode    = CONCAT_3(PWM, id, _CONFIG_STEP_MODE),    \
-}
-
-
-/**
- * @brief PWM flags providing additional playback options.
- */
-typedef enum
-{
-    NRF_DRV_PWM_FLAG_STOP = 0x01, /**< When the requested playback is finished,
-                                       the peripheral should be stopped.
-                                       @note The STOP task is triggered when
-                                       the last value of the final sequence is
-                                       loaded from RAM, and the peripheral stops
-                                       at the end of the current PWM period.
-                                       For sequences with configured repeating
-                                       of duty cycle values, this might result in
-                                       less than the requested number of repeats
-                                       of the last value. */
-    NRF_DRV_PWM_FLAG_LOOP = 0x02, /**< When the requested playback is finished,
-                                       it should be started from the beginning.
-                                       This flag is ignored if used together
-                                       with @ref NRF_DRV_PWM_FLAG_STOP. */
-    NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ0 = 0x04, /**< The event handler should be
-                                                  called when the last value
-                                                  from sequence 0 is loaded. */
-    NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ1 = 0x08, /**< The event handler should be
-                                                  called when the last value
-                                                  from sequence 1 is loaded. */
-    NRF_DRV_PWM_FLAG_NO_EVT_FINISHED = 0x10, /**< The playback finished event
-                                                  (enabled by default) should be
-                                                  suppressed. */
-} nrf_drv_pwm_flag_t;
-
-
-/**
- * @brief PWM driver event type.
- */
-typedef enum
-{
-    NRF_DRV_PWM_EVT_FINISHED, ///< Sequence playback finished.
-    NRF_DRV_PWM_EVT_END_SEQ0, /**< End of sequence 0 reached. Its data can be
-                                   safely modified now. */
-    NRF_DRV_PWM_EVT_END_SEQ1, /**< End of sequence 1 reached. Its data can be
-                                   safely modified now. */
-    NRF_DRV_PWM_EVT_STOPPED,  ///< The PWM peripheral has been stopped.
-} nrf_drv_pwm_evt_type_t;
-
-/**
- * @brief PWM driver event handler type.
- */
-typedef void (* nrf_drv_pwm_handler_t)(nrf_drv_pwm_evt_type_t event_type);
-
-
-/**
- * @brief Function for initializing the PWM driver.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config   Pointer to the structure with initial configuration.
- *                       If NULL, the default configuration is used.
- * @param[in] handler    Event handler provided by the user. If NULL is passed
- *                       instead, event notifications are not done and PWM
- *                       interrupts are disabled.
- *
- * @retval NRF_SUCCESS             If initialization was successful.
- * @retval NRF_ERROR_INVALID_STATE If the driver was already initialized.
- */
-ret_code_t nrf_drv_pwm_init(nrf_drv_pwm_t const * const p_instance,
-                            nrf_drv_pwm_config_t const * p_config,
-                            nrf_drv_pwm_handler_t        handler);
-
-/**
- * @brief Function for uninitializing the PWM driver.
- *
- * If any sequence playback is in progress, it is stopped immediately.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- */
-void nrf_drv_pwm_uninit(nrf_drv_pwm_t const * const p_instance);
-
-/**
- * @brief Function for starting a single sequence playback.
- *
- * To take advantage of the looping mechanism in the PWM peripheral, both
- * sequences must be used (single sequence can be played back only once by
- * the peripheral). Therefore, the provided sequence is internally set and
- * played back as both sequence 0 and sequence 1. Consequently, if end of
- * sequence notifications are required, events for both sequences should be
- * used (that means that both the @ref NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ0 flag
- * and the @ref NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ1 flag should be specified and
- * the @ref NRF_DRV_PWM_EVT_END_SEQ0 event and the @ref NRF_DRV_PWM_EVT_END_SEQ1
- * event should be handled in the same way).
- *
- * @note The array containing the duty cycle values for the specified sequence
- *       must be in RAM and cannot be allocated on stack.
- *       For detailed information, see @ref nrf_pwm_sequence_t.
- *
- * @param[in] p_instance     Pointer to the driver instance structure.
- * @param[in] p_sequence     Sequence to be played back.
- * @param[in] playback_count Number of playbacks to be performed (must not be 0).
- * @param[in] flags          Additional options. Pass any combination of
- *                           @ref nrf_drv_pwm_flag_t "playback flags", or 0
- *                           for default settings.
- */
-void nrf_drv_pwm_simple_playback(nrf_drv_pwm_t const * const p_instance,
-                                 nrf_pwm_sequence_t const * p_sequence,
-                                 uint16_t                   playback_count,
-                                 uint32_t                   flags);
-
-/**
- * @brief Function for starting a two-sequence playback.
- *
- * @note The array containing the duty cycle values for the specified sequence
- *       must be in RAM and cannot be allocated on stack.
- *       For detailed information, see @ref nrf_pwm_sequence_t.
- *
- * @param[in] p_instance     Pointer to the driver instance structure.
- * @param[in] p_sequence_0   First sequence to be played back.
- * @param[in] p_sequence_1   Second sequence to be played back.
- * @param[in] playback_count Number of playbacks to be performed (must not be 0).
- * @param[in] flags          Additional options. Pass any combination of
- *                           @ref nrf_drv_pwm_flag_t "playback flags", or 0
- *                           for default settings.
- */
-void nrf_drv_pwm_complex_playback(nrf_drv_pwm_t const * const p_instance,
-                                  nrf_pwm_sequence_t const * p_sequence_0,
-                                  nrf_pwm_sequence_t const * p_sequence_1,
-                                  uint16_t                   playback_count,
-                                  uint32_t                   flags);
-
-/**
- * @brief Function for advancing the active sequence.
- *
- * This function only applies to @ref NRF_PWM_STEP_TRIGGERED mode.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- */
-__STATIC_INLINE void nrf_drv_pwm_step(nrf_drv_pwm_t const * const p_instance);
-
-/**
- * @brief Function for stopping the sequence playback.
- *
- * The playback is stopped at the end of the current PWM period.
- * This means that if the active sequence is configured to repeat each duty
- * cycle value for a certain number of PWM periods, the last played value
- * might appear on the output less times than requested.
- *
- * @note This function can be instructed to wait until the playback is stopped
- *       (by setting @p wait_until_stopped to true). Note that, depending on
- *       the length of the PMW period, this might take a significant amount of
- *       time. Alternatively, the @ref nrf_drv_pwm_is_stopped function can be
- *       used to poll the status, or the @ref NRF_DRV_PWM_EVT_STOPPED event can
- *       be used to get the notification when the playback is stopped, provided
- *       the event handler is defined.
- *
- * @param[in] p_instance         Pointer to the driver instance structure.
- * @param[in] wait_until_stopped If true, the function will not return until
- *                               the playback is stopped.
- *
- * @retval true  If the PWM peripheral is stopped.
- * @retval false If the PWM peripheral is not stopped.
- */
-bool nrf_drv_pwm_stop(nrf_drv_pwm_t const * const p_instance,
-                      bool wait_until_stopped);
-
-/**
- * @brief Function for checking the status of the PWM peripheral.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- *
- * @retval true  If the PWM peripheral is stopped.
- * @retval false If the PWM peripheral is not stopped.
- */
-bool nrf_drv_pwm_is_stopped(nrf_drv_pwm_t const * const p_instance);
-
-/**
- * @brief Function for updating the sequence data during playback.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] seq_id     Identifier of the sequence (0 or 1).
- * @param[in] p_sequence Pointer to the new sequence definition.
- */
-__STATIC_INLINE void nrf_drv_pwm_sequence_update(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        uint8_t                    seq_id,
-                                        nrf_pwm_sequence_t const * p_sequence);
-
-/**
- * @brief Function for updating the pointer to the duty cycle values
- *        in the specified sequence during playback.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] seq_id     Identifier of the sequence (0 or 1).
- * @param[in] values     New pointer to the duty cycle values.
- */
-__STATIC_INLINE void nrf_drv_pwm_sequence_values_update(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        uint8_t          seq_id,
-                                        nrf_pwm_values_t values);
-
-/**
- * @brief Function for updating the number of duty cycle values
- *        in the specified sequence during playback.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] seq_id     Identifier of the sequence (0 or 1).
- * @param[in] length     New number of the duty cycle values.
- */
-__STATIC_INLINE void nrf_drv_pwm_sequence_length_update(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        uint8_t  seq_id,
-                                        uint16_t length);
-
-/**
- * @brief Function for updating the number of repeats for duty cycle values
- *        in specified sequence during playback.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] seq_id     Identifier of the sequence (0 or 1).
- * @param[in] repeats    New number of repeats.
- */
-__STATIC_INLINE void nrf_drv_pwm_sequence_repeats_update(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        uint8_t  seq_id,
-                                        uint32_t repeats);
-
-/**
- * @brief Function for updating the additional delay after the specified
- *        sequence during playback.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] seq_id     Identifier of the sequence (0 or 1).
- * @param[in] end_delay  New end delay value (in PWM periods).
- */
-__STATIC_INLINE void nrf_drv_pwm_sequence_end_delay_update(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        uint8_t  seq_id,
-                                        uint32_t end_delay);
-
-/**
- * @brief Function for returning the address of a specified PWM task that can
- *        be used in PPI module.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] task       Requested task.
- *
- * @return Task address.
- */
-__STATIC_INLINE uint32_t nrf_drv_pwm_task_address_get(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        nrf_pwm_task_t task);
-
-/**@brief Function for returning the address of a specified PWM event that can
- *        be used in PPI module.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] event      Requested event.
- *
- * @return Event address.
- */
-__STATIC_INLINE uint32_t nrf_drv_pwm_event_address_get(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        nrf_pwm_event_t event);
-
-
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-
-__STATIC_INLINE void nrf_drv_pwm_step(nrf_drv_pwm_t const * const p_instance)
-{
-    nrf_pwm_task_trigger(p_instance->p_registers, NRF_PWM_TASK_NEXTSTEP);
-}
-
-__STATIC_INLINE void nrf_drv_pwm_sequence_update(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        uint8_t                    seq_id,
-                                        nrf_pwm_sequence_t const * p_sequence)
-{
-    nrf_pwm_sequence_set(p_instance->p_registers, seq_id, p_sequence);
-}
-
-__STATIC_INLINE void nrf_drv_pwm_sequence_values_update(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        uint8_t          seq_id,
-                                        nrf_pwm_values_t values)
-{
-    nrf_pwm_seq_ptr_set(p_instance->p_registers, seq_id, values.p_raw);
-}
-
-__STATIC_INLINE void nrf_drv_pwm_sequence_length_update(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        uint8_t  seq_id,
-                                        uint16_t length)
-{
-    nrf_pwm_seq_cnt_set(p_instance->p_registers, seq_id, length);
-}
-
-__STATIC_INLINE void nrf_drv_pwm_sequence_repeats_update(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        uint8_t  seq_id,
-                                        uint32_t repeats)
-{
-    nrf_pwm_seq_refresh_set(p_instance->p_registers, seq_id, repeats);
-}
-
-__STATIC_INLINE void nrf_drv_pwm_sequence_end_delay_update(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        uint8_t  seq_id,
-                                        uint32_t end_delay)
-{
-    nrf_pwm_seq_end_delay_set(p_instance->p_registers, seq_id, end_delay);
-}
-
-__STATIC_INLINE uint32_t nrf_drv_pwm_task_address_get(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        nrf_pwm_task_t task)
-{
-    return nrf_pwm_task_address_get(p_instance->p_registers, task);
-}
-
-__STATIC_INLINE uint32_t nrf_drv_pwm_event_address_get(
-                                        nrf_drv_pwm_t const * const p_instance,
-                                        nrf_pwm_event_t event)
-{
-    return nrf_pwm_event_address_get(p_instance->p_registers, event);
-}
-
-#endif // SUPPRESS_INLINE_IMPLEMENTATION
-
-#endif // NRF_DRV_PWM_H__
-
-/** @} */

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/driver_nrf/saadc/nrf_drv_saadc.c

@@ -1,536 +0,0 @@
-/* 
- * Copyright (c) 2015 Nordic Semiconductor ASA
- * All rights reserved.
- * 
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a 
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
- */
-
-
-#include "nrf_drv_saadc.h"
-#include "nrf_assert.h"
-#include "nordic_common.h"
-#include "nrf_drv_common.h"
-#include "app_util_platform.h"
-
-
-typedef enum
-{
-    NRF_SAADC_STATE_IDLE = 0,
-    NRF_SAADC_STATE_BUSY = 1
-} nrf_saadc_state_t;
-
-
-typedef struct
-{
-    nrf_saadc_input_t pselp;
-    nrf_saadc_input_t pseln;
-} nrf_saadc_psel_buffer;
-
-static const nrf_drv_saadc_config_t m_default_config = NRF_DRV_SAADC_DEFAULT_CONFIG;
-
-/** @brief SAADC control block.*/
-typedef struct
-{
-    nrf_drv_saadc_event_handler_t event_handler;                 ///< Event handler function pointer.
-    volatile nrf_saadc_value_t *  p_buffer;                        ///< Sample buffer.
-    volatile uint16_t             buffer_size;                   ///< Size of the sample buffer.
-#ifdef NRF52_PAN_28
-    volatile uint16_t             buffer_pos;                    ///< Current sample buffer position.
-#endif
-    volatile nrf_saadc_value_t *  p_secondary_buffer;            ///< Secondary sample buffer.
-    uint32_t                      limits_enabled_flags;          ///< Enabled limits flags.
-    uint16_t                      secondary_buffer_size;         ///< Size of the secondary buffer.
-    nrf_saadc_psel_buffer         psel[NRF_SAADC_CHANNEL_COUNT]; ///< Pin configurations of SAADC channels.
-    nrf_drv_state_t               state;                         ///< Driver initialization state.
-    nrf_saadc_state_t             adc_state;                     ///< State of the SAADC.
-#ifdef NRF52_PAN_28
-    uint8_t                       scan_pos;                      ///< Current channel scanning position.
-#endif
-    uint8_t                       active_channels;               ///< Number of enabled SAADC channels.
-} nrf_drv_saadc_cb_t;
-
-static nrf_drv_saadc_cb_t m_cb;
-
-#define LOW_LIMIT_TO_FLAG(channel)  ((2*channel+1))
-#define HIGH_LIMIT_TO_FLAG(channel) ((2*channel))
-#define FLAG_IDX_TO_EVENT(idx) ((nrf_saadc_event_t)((uint32_t)NRF_SAADC_EVENT_CH0_LIMITH+4*idx))
-#define LIMIT_EVENT_TO_CHANNEL(event)(uint8_t)(((uint32_t)event-(uint32_t)NRF_SAADC_EVENT_CH0_LIMITH)/8)
-#define LIMIT_EVENT_TO_LIMIT_TYPE(event)((((uint32_t)event-(uint32_t)NRF_SAADC_EVENT_CH0_LIMITH) & 4) ? \
-                                                          NRF_SAADC_LIMIT_LOW : NRF_SAADC_LIMIT_HIGH)
-#define HW_TIMEOUT 10000
-
-
-void SAADC_IRQHandler(void)
-{
-    if (nrf_saadc_event_check(NRF_SAADC_EVENT_END))
-    {
-        nrf_saadc_event_clear(NRF_SAADC_EVENT_END);
-#ifdef NRF52_PAN_28
-        if (m_cb.active_channels == 1)
-        {
-#endif
-            nrf_drv_saadc_evt_t evt;
-            evt.type = NRF_DRV_SAADC_EVT_DONE;
-            evt.data.done.p_buffer = (nrf_saadc_value_t *)m_cb.p_buffer;
-            evt.data.done.size = nrf_saadc_amount_get();
-
-            if (m_cb.p_secondary_buffer == NULL)
-            {
-                m_cb.adc_state = NRF_SAADC_STATE_IDLE;
-            }
-            else
-            {
-                m_cb.p_buffer = m_cb.p_secondary_buffer;
-                m_cb.buffer_size = m_cb.secondary_buffer_size;
-                m_cb.p_secondary_buffer = NULL;
-                nrf_saadc_task_trigger(NRF_SAADC_TASK_START);
-            }
-
-            m_cb.event_handler(&evt);
-#ifdef NRF52_PAN_28
-        }
-        else
-        {
-            //PAN-28: scan mode is not working correctly, emulated by interrupts
-            ++(m_cb.buffer_pos);
-            uint16_t buffer_pos = m_cb.buffer_pos;
-            if (buffer_pos == m_cb.buffer_size)
-            {
-                nrf_drv_saadc_evt_t evt;
-                evt.type = NRF_DRV_SAADC_EVT_DONE;
-                evt.data.done.p_buffer = (nrf_saadc_value_t *)(m_cb.p_buffer);
-                evt.data.done.size = m_cb.buffer_size;
-
-                m_cb.adc_state = NRF_SAADC_STATE_IDLE;
-                if (m_cb.p_secondary_buffer == NULL)
-                {
-                    m_cb.adc_state = NRF_SAADC_STATE_IDLE;
-                }
-                else
-                {
-                    (void)nrf_drv_saadc_buffer_convert((nrf_saadc_value_t *)m_cb.p_secondary_buffer, (uint16_t)m_cb.secondary_buffer_size);
-                }
-                m_cb.event_handler(&evt);
-            }
-            else
-            {
-                uint8_t current_scan_pos = m_cb.scan_pos;
-
-                nrf_saadc_channel_input_set(current_scan_pos,
-                                            NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED);
-
-                nrf_saadc_buffer_init((nrf_saadc_value_t *)(m_cb.p_buffer + m_cb.buffer_pos), 1);
-                // Find the next enabled channel.
-                for (++m_cb.scan_pos; m_cb.scan_pos < NRF_SAADC_CHANNEL_COUNT; ++m_cb.scan_pos)
-                {
-                    if (m_cb.psel[m_cb.scan_pos].pselp)
-                    {
-                        nrf_saadc_channel_input_set(m_cb.scan_pos,
-                                    m_cb.psel[m_cb.scan_pos].pselp, m_cb.psel[m_cb.scan_pos].pseln);
-                        nrf_saadc_task_trigger(NRF_SAADC_TASK_START);
-                        nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE);
-                        return;
-                    }
-                }
-                //if scanning is done prepare for next round.
-                for (uint8_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; ++i)
-                {
-                    if (m_cb.psel[i].pselp)
-                    {
-                        m_cb.scan_pos = i;
-                        break;
-                    }
-                }
-                nrf_saadc_channel_input_set(m_cb.scan_pos,
-                                    m_cb.psel[m_cb.scan_pos].pselp, m_cb.psel[m_cb.scan_pos].pseln);
-                nrf_saadc_task_trigger(NRF_SAADC_TASK_START);
-            }
-        }
-#endif
-    }
-    if (nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED))
-    {
-        nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED);
-        m_cb.adc_state = NRF_SAADC_STATE_IDLE;
-    }
-    else
-    {
-        uint32_t limit_flags = m_cb.limits_enabled_flags;
-        uint32_t flag_idx;
-        nrf_saadc_event_t event;
-        while (limit_flags)
-        {
-            flag_idx = __CLZ(limit_flags);
-            limit_flags &= ~((1UL<<31) >> flag_idx);
-            event = FLAG_IDX_TO_EVENT(flag_idx);
-            if (nrf_saadc_event_check(event))
-            {
-                nrf_saadc_event_clear(event);
-                nrf_drv_saadc_evt_t evt;
-                evt.type = NRF_DRV_SAADC_EVT_LIMIT;
-                evt.data.limit.channel = LIMIT_EVENT_TO_CHANNEL(event);
-                evt.data.limit.limit_type = LIMIT_EVENT_TO_LIMIT_TYPE(event);
-                m_cb.event_handler(&evt);
-            }
-        }
-    }
-}
-
-
-ret_code_t nrf_drv_saadc_init(nrf_drv_saadc_config_t const * p_config,
-                              nrf_drv_saadc_event_handler_t event_handler)
-{
-    if (m_cb.state != NRF_DRV_STATE_UNINITIALIZED)
-    {
-        return NRF_ERROR_INVALID_STATE;
-    }
-    if (event_handler == NULL)
-    {
-        return NRF_ERROR_INVALID_PARAM;
-    }
-
-    if (p_config == NULL)
-    {
-        p_config = &m_default_config;
-    }
-
-    m_cb.event_handler = event_handler;
-    nrf_saadc_resolution_set(p_config->resolution);
-    nrf_saadc_oversample_set(p_config->oversample);
-    m_cb.state = NRF_DRV_STATE_INITIALIZED;
-    m_cb.adc_state = NRF_SAADC_STATE_IDLE;
-    m_cb.active_channels = 0;
-    m_cb.limits_enabled_flags = 0;
-#ifdef NRF52_PAN_28
-    m_cb.buffer_pos = 0;
-#endif
-
-    nrf_saadc_int_disable(NRF_SAADC_INT_ALL);
-    nrf_saadc_event_clear(NRF_SAADC_EVENT_END);
-    nrf_drv_common_irq_enable(SAADC_IRQn, p_config->interrupt_priority);
-    nrf_saadc_int_enable(NRF_SAADC_INT_END);
-
-    nrf_saadc_enable();
-
-    return NRF_SUCCESS;
-}
-
-
-void nrf_drv_saadc_uninit(void)
-{
-    ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED);
-    nrf_drv_common_irq_disable(SAADC_IRQn);
-    nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP);
-
-    // Wait for ADC being stopped.
-    uint32_t timeout = HW_TIMEOUT;
-    while (nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED) == 0 && timeout > 0)
-    {
-        --timeout;
-    }
-    ASSERT(timeout > 0);
-    
-    nrf_saadc_disable();
-    nrf_saadc_int_disable(NRF_SAADC_INT_ALL);
-
-    m_cb.adc_state = NRF_SAADC_STATE_IDLE;
-
-    for (uint8_t channel = 0; channel < NRF_SAADC_CHANNEL_COUNT; ++channel)
-    {
-        if (m_cb.psel[channel].pselp != NRF_SAADC_INPUT_DISABLED)
-        {
-            (void)nrf_drv_saadc_channel_uninit(channel);
-        }
-    }
-
-    m_cb.state = NRF_DRV_STATE_UNINITIALIZED;
-}
-
-
-ret_code_t nrf_drv_saadc_channel_init(uint8_t channel,
-                                      nrf_saadc_channel_config_t const * const p_config)
-{
-    ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED);
-    ASSERT(channel < NRF_SAADC_CHANNEL_COUNT);
-    //Oversampling can be used only with one channel.
-    ASSERT((nrf_saadc_oversample_get()==NRF_SAADC_OVERSAMPLE_DISABLED) || (m_cb.active_channels == 0));
-    ASSERT((p_config->pin_p <= NRF_SAADC_INPUT_VDD) && (p_config->pin_p > NRF_SAADC_INPUT_DISABLED));
-    ASSERT(p_config->pin_n <= NRF_SAADC_INPUT_VDD);
-
-    // A channel can only be initialized if the driver is in the idle state.
-    if (m_cb.adc_state == NRF_SAADC_STATE_BUSY)
-    {
-        return NRF_ERROR_BUSY;
-    }
-
-    if (!m_cb.psel[channel].pselp)
-    {
-        ++m_cb.active_channels;
-    }
-    m_cb.psel[channel].pselp = p_config->pin_p;
-    m_cb.psel[channel].pseln = p_config->pin_n;
-    nrf_saadc_channel_init(channel, p_config);
-
-#ifdef NRF52_PAN_28
-    nrf_saadc_channel_input_set(channel, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED);
-#else
-    nrf_saadc_channel_input_set(channel, p_config->pin_p, p_config->pin_n);
-#endif
-    return NRF_SUCCESS;
-}
-
-
-ret_code_t nrf_drv_saadc_channel_uninit(uint8_t channel)
-{
-    ASSERT(channel <= NRF_SAADC_CHANNEL_COUNT)
-    ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED);
-
-    // A channel can only be uninitialized if the driver is in the idle state.
-    if (m_cb.adc_state == NRF_SAADC_STATE_BUSY)
-    {
-        return NRF_ERROR_BUSY;
-    }
-
-    if (m_cb.psel[channel].pselp)
-    {
-        --m_cb.active_channels;
-    }
-    m_cb.psel[channel].pselp = NRF_SAADC_INPUT_DISABLED;
-    m_cb.psel[channel].pseln = NRF_SAADC_INPUT_DISABLED;
-    nrf_saadc_channel_input_set(channel, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED);
-    nrf_drv_saadc_limits_set(channel, NRF_DRV_SAADC_LIMITL_DISABLED, NRF_DRV_SAADC_LIMITH_DISABLED);
-
-    return NRF_SUCCESS;
-}
-
-ret_code_t nrf_drv_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_value)
-{
-    if (m_cb.adc_state != NRF_SAADC_STATE_IDLE)
-    {
-        return NRF_ERROR_BUSY;
-    }
-    m_cb.adc_state = NRF_SAADC_STATE_BUSY;
-    nrf_saadc_int_disable(NRF_SAADC_INT_END);
-    nrf_saadc_buffer_init(p_value, 1);
-#ifndef NRF52_PAN_28
-    if (m_cb.active_channels > 1)
-    {
-        for (uint8_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; ++i)
-        {
-            nrf_saadc_channel_input_set(i, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED);
-        }
-    }
-#endif
-    nrf_saadc_channel_input_set(channel,
-                            m_cb.psel[channel].pselp, m_cb.psel[channel].pseln);
-    nrf_saadc_task_trigger(NRF_SAADC_TASK_START);
-    nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE);
-
-    uint32_t timeout = HW_TIMEOUT;
-    while (0 == nrf_saadc_event_check(NRF_SAADC_EVENT_END) && timeout > 0)
-    {
-        timeout--;
-    }
-    nrf_saadc_event_clear(NRF_SAADC_EVENT_END);
-
-#ifdef NRF52_PAN_28
-    nrf_saadc_channel_input_set(channel, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED);
-#else
-    if (m_cb.active_channels > 1)
-    {
-        for (uint8_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; ++i)
-        {
-            nrf_saadc_channel_input_set(i, m_cb.psel[i].pselp, m_cb.psel[i].pseln);
-        }
-    }
-#endif
-
-    nrf_saadc_int_enable(NRF_SAADC_INT_END);
-    m_cb.adc_state = NRF_SAADC_STATE_IDLE;
-
-    return NRF_SUCCESS;
-}
-
-ret_code_t nrf_drv_saadc_buffer_convert(nrf_saadc_value_t * p_buffer, uint16_t size)
-{
-    ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED);
-
-    nrf_saadc_int_disable(NRF_SAADC_INT_END);
-    if (m_cb.adc_state == NRF_SAADC_STATE_BUSY)
-    {
-        if ( m_cb.p_secondary_buffer)
-        {
-            nrf_saadc_int_enable(NRF_SAADC_INT_END);
-            return NRF_ERROR_BUSY;
-        }
-        else
-        {
-            m_cb.p_secondary_buffer = p_buffer;
-            m_cb.secondary_buffer_size = size;
-#ifdef NRF52_PAN_28
-            if (m_cb.active_channels == 1)
-#endif
-            {
-                while (nrf_saadc_event_check(NRF_SAADC_EVENT_STARTED) == 0);
-                nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED);
-                nrf_saadc_buffer_init(p_buffer, size);
-            }
-            nrf_saadc_int_enable(NRF_SAADC_INT_END);
-            return NRF_SUCCESS;
-        }
-    }
-    nrf_saadc_int_enable(NRF_SAADC_INT_END);
-    m_cb.adc_state = NRF_SAADC_STATE_BUSY;
-
-#ifdef NRF52_PAN_28
-    m_cb.scan_pos = NRF_SAADC_CHANNEL_COUNT;
-    for (uint8_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; ++i)
-    {
-        if (m_cb.psel[i].pselp)
-        {
-            m_cb.scan_pos = i;
-            break;
-        }
-    }
-
-    // Find the first enabled channel.
-    if (m_cb.scan_pos >= NRF_SAADC_CHANNEL_COUNT)
-    {
-        return NRF_ERROR_INVALID_STATE;
-    }
-
-    m_cb.buffer_pos = 0;
-#endif
-    m_cb.p_buffer = p_buffer;
-    m_cb.buffer_size = size;
-    m_cb.p_secondary_buffer = NULL;
-
-#ifdef NRF52_PAN_28
-    nrf_saadc_channel_input_set(m_cb.scan_pos,
-                                m_cb.psel[m_cb.scan_pos].pselp, m_cb.psel[m_cb.scan_pos].pseln);
-
-    if (m_cb.active_channels == 1)
-    {
-        nrf_saadc_buffer_init(p_buffer, size);
-    }
-    else
-    {
-        nrf_saadc_buffer_init(p_buffer, 1);
-    }
-#else
-    nrf_saadc_buffer_init(p_buffer, size);
-#endif
-
-    nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED);
-    nrf_saadc_task_trigger(NRF_SAADC_TASK_START);
-
-    return NRF_SUCCESS;
-}
-
-ret_code_t nrf_drv_saadc_sample()
-{
-    ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED);
-
-    ret_code_t err_code = NRF_SUCCESS;
-    if (m_cb.adc_state == NRF_SAADC_STATE_IDLE)
-    {
-        err_code = NRF_ERROR_BUSY;
-    }
-    else
-    {
-        nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE);
-    }
-    
-    return err_code;
-}
-
-
-bool nrf_drv_saadc_is_busy(void)
-{
-    return (m_cb.adc_state == NRF_SAADC_STATE_BUSY);
-}
-
-void nrf_drv_saadc_abort(void)
-{
-    if (nrf_drv_saadc_is_busy())
-    {
-        nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED);
-        nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP);
-        
-        // Wait for ADC being stopped.
-        uint32_t timeout = HW_TIMEOUT;
-        while ((m_cb.adc_state != NRF_SAADC_STATE_IDLE) && (timeout > 0))
-        {
-            --timeout;
-        }
-        ASSERT(timeout > 0);
-        
-        m_cb.p_buffer = 0;
-        m_cb.p_secondary_buffer = 0;
-    }
-}
-
-void nrf_drv_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high)
-{
-    ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED);
-    ASSERT(m_cb.event_handler); // only non blocking mode supported
-    ASSERT(limit_low>=NRF_DRV_SAADC_LIMITL_DISABLED);
-    ASSERT(limit_high<=NRF_DRV_SAADC_LIMITH_DISABLED);
-    ASSERT(limit_low<limit_high);
-    nrf_saadc_channel_limits_set(channel, limit_low, limit_high);
-
-    uint32_t int_mask = nrf_saadc_limit_int_get(channel, NRF_SAADC_LIMIT_LOW);
-    if (limit_low == NRF_DRV_SAADC_LIMITL_DISABLED)
-    {
-        m_cb.limits_enabled_flags &= ~(0x80000000 >> LOW_LIMIT_TO_FLAG(channel));
-        nrf_saadc_int_disable(int_mask);
-    }
-    else
-    {
-        m_cb.limits_enabled_flags |= (0x80000000 >> LOW_LIMIT_TO_FLAG(channel));
-        nrf_saadc_int_enable(int_mask);
-    }
-
-    int_mask = nrf_saadc_limit_int_get(channel, NRF_SAADC_LIMIT_HIGH);
-    if (limit_high == NRF_DRV_SAADC_LIMITH_DISABLED)
-    {
-        m_cb.limits_enabled_flags &= ~(0x80000000 >> HIGH_LIMIT_TO_FLAG(channel));
-        nrf_saadc_int_disable(int_mask);
-    }
-    else
-    {
-        m_cb.limits_enabled_flags |= (0x80000000 >> HIGH_LIMIT_TO_FLAG(channel));
-        nrf_saadc_int_enable(int_mask);
-    }
-}

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/driver_nrf/saadc/nrf_drv_saadc.h

@@ -1,330 +0,0 @@
-/* 
- * Copyright (c) 2015 Nordic Semiconductor ASA
- * All rights reserved.
- * 
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 
- *   1. Redistributions of source code must retain the above copyright notice, this list 
- *      of conditions and the following disclaimer.
- *
- *   2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA 
- *      integrated circuit in a product or a software update for such product, must reproduce 
- *      the above copyright notice, this list of conditions and the following disclaimer in 
- *      the documentation and/or other materials provided with the distribution.
- *
- *   3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be 
- *      used to endorse or promote products derived from this software without specific prior 
- *      written permission.
- *
- *   4. This software, with or without modification, must only be used with a 
- *      Nordic Semiconductor ASA integrated circuit.
- *
- *   5. Any software provided in binary or object form under this license must not be reverse 
- *      engineered, decompiled, modified and/or disassembled. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
- */
-
-
-/**
- * @addtogroup nrf_saadc SAADC HAL and driver
- * @ingroup    nrf_drivers
- * @brief      @tagAPI52 Successive Approximation Analog-to-Digital Converter (SAADC) APIs.
- * @details The SAADC HAL provides basic APIs for accessing the registers of the SAADC peripheral. 
- * The SAADC driver provides APIs on a higher level.
- *
- * @defgroup nrf_drv_saadc SAADC driver
- * @{
- * @ingroup  nrf_saadc
- *
- * @brief    @tagAPI52 Successive Approximation Analog-to-Digital Converter (SAADC) driver.
- */
-
-#ifndef NRF_DRV_SAADC_H__
-#define NRF_DRV_SAADC_H__
-
-#include "nrf_drv_config.h"
-#include "nrf_saadc.h"
-#include "sdk_errors.h"
-
-/**
- * @brief Value that should be set as high limit to disable limit detection.
- */
-#define NRF_DRV_SAADC_LIMITH_DISABLED (2047)
-/**
- * @brief Value that should be set as low limit to disable limit detection.
- */
-#define NRF_DRV_SAADC_LIMITL_DISABLED (-2048)
-
-/**
- * @brief Macro for setting @ref nrf_drv_saadc_config_t to default settings.
- */
-#define NRF_DRV_SAADC_DEFAULT_CONFIG                \
-{                                                   \
-    .resolution         = SAADC_CONFIG_RESOLUTION,  \
-    .oversample         = SAADC_CONFIG_OVERSAMPLE,  \
-    .interrupt_priority = SAADC_CONFIG_IRQ_PRIORITY \
-}
-
-/**
- * @brief Macro for setting @ref nrf_saadc_channel_config_t to default settings
- *        in single ended mode.
- *
- * @param PIN_P Analog input.
- */
-#define NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(PIN_P) \
-{                                                      \
-    .resistor_p = NRF_SAADC_RESISTOR_DISABLED,         \
-    .resistor_n = NRF_SAADC_RESISTOR_DISABLED,         \
-    .gain       = NRF_SAADC_GAIN1_6,                   \
-    .reference  = NRF_SAADC_REFERENCE_INTERNAL,        \
-    .acq_time   = NRF_SAADC_ACQTIME_10US,              \
-    .mode       = NRF_SAADC_MODE_SINGLE_ENDED,         \
-    .pin_p      = (nrf_saadc_input_t)(PIN_P),          \
-    .pin_n      = NRF_SAADC_INPUT_DISABLED             \
-}
-
-/**
- * @brief Macro for setting @ref nrf_saadc_channel_config_t to default settings
- *        in differential mode.
- *
- * @param PIN_P Positive analog input.
- * @param PIN_N Negative analog input.
- */
-#define NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_DIFFERENTIAL(PIN_P, PIN_N) \
-{                                                                       \
-    .resistor_p = NRF_SAADC_RESISTOR_DISABLED,                          \
-    .resistor_n = NRF_SAADC_RESISTOR_DISABLED,                          \
-    .gain       = NRF_SAADC_GAIN1_6,                                    \
-    .reference  = NRF_SAADC_REFERENCE_INTERNAL,                         \
-    .acq_time   = NRF_SAADC_ACQTIME_10US,                               \
-    .mode       = NRF_SAADC_MODE_DIFFERENTIAL,                          \
-    .pin_p      = (nrf_saadc_input_t)(PIN_P),                           \
-    .pin_n      = (nrf_saadc_input_t)(PIN_N)                            \
-}
-
-/**
- * @brief Analog-to-digital converter driver configuration structure.
- */
-typedef struct
-{
-    nrf_saadc_resolution_t resolution;         ///< Resolution configuration.
-    nrf_saadc_oversample_t oversample;         ///< Oversampling configuration.
-    uint8_t                interrupt_priority; ///< Interrupt priority.
-} nrf_drv_saadc_config_t;
-
-/**
- * @brief Driver event types.
- */
-typedef enum
-{
-    NRF_DRV_SAADC_EVT_DONE,    ///< Event generated when the buffer is filled with samples.
-    NRF_DRV_SAADC_EVT_LIMIT,   ///< Event generated after one of the limits is reached.
-} nrf_drv_saadc_evt_type_t;
-
-/**
- * @brief Analog-to-digital converter driver done event data.
- */
-typedef struct
-{
-    nrf_saadc_value_t *      p_buffer; ///< Pointer to buffer with converted samples.
-    uint16_t                 size;     ///< Number of samples in the buffer.
-} nrf_drv_saadc_done_evt_t;
-
-/**
- * @brief Analog-to-digital converter driver limit event data.
- */
-typedef struct
-{
-    uint8_t                  channel;    ///< Channel on which the limit was detected.
-    nrf_saadc_limit_t        limit_type; ///< Type of limit detected.
-} nrf_drv_saadc_limit_evt_t;
-
-/**
- * @brief Analog-to-digital converter driver event structure.
- */
-typedef struct
-{
-    nrf_drv_saadc_evt_type_t type;      ///< Event type.
-    union
-    {
-        nrf_drv_saadc_done_evt_t  done; ///< Data for @ref NRF_DRV_SAADC_EVT_DONE event.
-        nrf_drv_saadc_limit_evt_t limit;///< Data for @ref NRF_DRV_SAADC_EVT_LIMIT event.
-    } data;
-} nrf_drv_saadc_evt_t;
-
-/**
- * @brief ADC event handler.
- *
- * @param[in] p_event     Pointer to an ADC event. The event structure is allocated on
- *                        the stack, so it is valid only within the context of
- *                        the event handler.
- */
-typedef void (*nrf_drv_saadc_event_handler_t)(nrf_drv_saadc_evt_t const * p_event);
-
-/**
- * @brief Function for initializing the SAADC.
- *
- * @param[in] p_config      Pointer to a configuration structure. If NULL, the default one is used.
- * @param[in] event_handler Event handler provided by the user.
- *
- * @retval    NRF_SUCCESS If initialization was successful.
- * @retval    NRF_ERROR_INVALID_STATE If the driver is already initialized.
- * @retval    NRF_ERROR_INVALID_PARAM If event_handler is NULL.
- */
-ret_code_t nrf_drv_saadc_init(nrf_drv_saadc_config_t const * p_config,
-                              nrf_drv_saadc_event_handler_t event_handler);
-
-/**
- * @brief Function for uninitializing the SAADC.
- *
- * This function stops all ongoing conversions and disables all channels.
- */
-void nrf_drv_saadc_uninit(void);
-
-/**
- * @brief Function for getting the address of a SAMPLE SAADC task.
- *
- * @return     Task address.
- */
-__STATIC_INLINE uint32_t nrf_drv_saadc_sample_task_get(void)
-{
-    return nrf_saadc_task_address_get(NRF_SAADC_TASK_SAMPLE);
-}
-
-
-/**
- * @brief Function for initializing an SAADC channel.
- *
- * This function configures and enables the channel.
- *
- * @retval NRF_SUCCESS             If initialization was successful.
- * @retval NRF_ERROR_INVALID_STATE If the ADC was not initialized.
- * @retval NRF_ERROR_NO_MEM        If the specified channel was already allocated.
- */
-ret_code_t nrf_drv_saadc_channel_init(uint8_t channel, 
-                                      nrf_saadc_channel_config_t const * const p_config);
-
-
-/**
- * @brief Function for uninitializing an SAADC channel.
- *
- * @retval NRF_SUCCESS    If uninitialization was successful.
- * @retval NRF_ERROR_BUSY If the ADC is busy.
- */
-ret_code_t nrf_drv_saadc_channel_uninit(uint8_t channel);
-
-/**
- * @brief Function for starting SAADC sampling.
- *
- * @retval NRF_SUCCESS    If ADC sampling was triggered.
- * @retval NRF_ERROR_BUSY If ADC is in idle state.
- */
-ret_code_t nrf_drv_saadc_sample(void);
-
-/**
- * @brief Blocking function for executing a single ADC conversion.
- *
- * This function selects the desired input, starts a single conversion,
- * waits for it to finish, and returns the result.
- *
- * The function will fail if ADC is busy.
- *
- * @param[in]  channel Channel.
- * @param[out] p_value Pointer to the location where the result should be placed.
- *
- * @retval NRF_SUCCESS    If conversion was successful.
- * @retval NRF_ERROR_BUSY If the ADC driver is busy.
- */
-ret_code_t nrf_drv_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_value);
-
-/**
- * @brief Function for issuing conversion of data to the buffer.
- *
- * This function is non-blocking. The application is notified about filling the buffer by the event handler.
- * Conversion will be done on all enabled channels. If the ADC is in idle state, the function will set up Easy
- * DMA for the conversion. The ADC will be ready for sampling and wait for the SAMPLE task. It can be
- * triggered manually by the @ref nrf_drv_saadc_sample function or by PPI using the @ref NRF_SAADC_TASK_SAMPLE
- * task. If one buffer is already set and the conversion is ongoing, calling this function will
- * result in queuing the given buffer. The driver will start filling the issued buffer when the first one is
- * completed. If the function is called again before the first buffer is filled, it will return with error.
- *
- * @param[in] buffer Result buffer.
- * @param[in] size   Buffer size in words.
- *
- * @retval NRF_SUCCESS    If conversion was successful.
- * @retval NRF_ERROR_BUSY If the driver already has two buffers set.
- */
-ret_code_t nrf_drv_saadc_buffer_convert(nrf_saadc_value_t * buffer, uint16_t size);
-
-/**
- * @brief Function for retrieving the SAADC state.
- *
- * @retval true  If the ADC is busy.
- * @retval false If the ADC is ready.
- */
-bool nrf_drv_saadc_is_busy(void);
-
-/**
- * @brief Function for aborting ongoing and buffered conversions.
- * @note @ref NRF_DRV_SAADC_EVT_DONE event will be generated if there is a conversion in progress.
- *       Event will contain number of words in the sample buffer.
- */
-void nrf_drv_saadc_abort(void);
-
-/**
- * @brief Function for setting the SAADC channel limits.
- *        When limits are enabled and the result exceeds the defined bounds, the limit handler function is called.
- *
- * @param[in] channel SAADC channel number.
- * @param[in] limit_low Lower limit (valid values from @ref NRF_DRV_SAADC_LIMITL_DISABLED to
- *            @ref NRF_DRV_SAADC_LIMITH_DISABLED). Conversion results below this value will trigger
- *            the handler function. Set to @ref NRF_DRV_SAADC_LIMITL_DISABLED to disable this limit.
- * @param[in] limit_high Upper limit (valid values from @ref NRF_DRV_SAADC_LIMITL_DISABLED to
- *            @ref NRF_DRV_SAADC_LIMITH_DISABLED). Conversion results above this value will trigger
- *            the handler function. Set to @ref NRF_DRV_SAADC_LIMITH_DISABLED to disable this limit.
- */
-void nrf_drv_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high);
-
-/**
- * @brief Function for converting a GPIO pin number to an analog input pin number used in the channel
- *        configuration.
- *
- * @param[in]  pin GPIO pin.
- *
- * @return     Value representing an analog input pin. The function returns @ref NRF_SAADC_INPUT_DISABLED
- *             if the specified pin is not an analog input.
- */
-__STATIC_INLINE nrf_saadc_input_t nrf_drv_saadc_gpio_to_ain(uint32_t pin)
-{
-    // AIN0 - AIN3
-    if (pin >= 2 && pin <= 5)
-    {
-        //0 means "not connected", hence this "+ 1"
-        return (nrf_saadc_input_t)(pin - 2 + 1);
-    }
-    // AIN4 - AIN7
-    else if (pin >= 28 && pin <= 31)
-    {
-        return (nrf_saadc_input_t)(pin - 24 + 1);
-    }
-    else
-    {
-        return NRF_SAADC_INPUT_DISABLED;
-    }
-}
-
-#endif // NRF_DRV_SAADC_H__
-
-/** @} */