- PHY default configuration can be changed
- AutoNegotiation
- Speed
- DuplexMode
- PHY register offset can be updated depending on chosen PHY
All unused parameters are cleaned.
When UART interrupt enabled and WDT reset from power-down mode, in the next
cycle, UART interrupt keeps breaking in and cannot block unless via NVIC. To
get around it, we deliberately make up a signal of WDT wake-up from power-down
mode in the start of boot proces when WDT reset is detected.
Use an RTCC retention register to keep track of user timebase for RTC API. RTC and LP Ticker implementations use the same counter, but they shouldn't share timebases.
By default D0 - D3 pins are used for the bit-banged SPI com channel between mbed target and the FPGA-test-shield.
For some reason, if pins were used as GPIOs and then reconfigured to I2C pins the I2C com does not work on NRF52840.
This commit modifies i2c_configure_twi_instance() function and adds proper initialization of the I2C pins.
Musca-B1 is a Cortex-M33 based target with security extension enabled.
- ARM_MUSCA_B1 is the non-secure target running mbed-os.
- ARM_MUSCA_B1_S is the secure target running TF-M.
- TF-M sources were imported and patched in previous commits.
- TF-M secure bootloader (McuBoot) for MUSCA_B1 is submitted by a
pre-built binary.
- A post-build hook concatenates The secure and non-secure binaries,
signs it and then concatenates the bootloader with the signed binary.
Change-Id: I4b36290941b5f0bb7aa7c12dda2f38b5c1e39ae2
Signed-off-by: Tamas Kaman <tamas.kaman@arm.com>
Signed-off-by: Gabor Abonyi <gabor.abonyi@arm.com>
Static pinmap extension required to use pin_function() and pin_mode() functions instead of pinmap_pinout(). Unfortunatelly pin_function() does not allow passing NC pin.
Call pin_function() and pin_mode() only if MISO/MOSI pin is not NC.
In no MISO case, skip SPI read so that no more write/read delay contribute to SPI inter-frame delay when data is written successively.
Update targets:
- NUMAKER_PFM_NANO130
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M453
- NUMAKER_PFM_M487/NUMAKER_IOT_M487
- NU_PFM_M2351_*
- NUMAKER_IOT_M263A
- NUMAKER_M252KG
Make a Mbed library with Cypress WHD files so it is automatically excluded
when building with the bare metal profile. Create another Mbed library to
group network files that use WHD so they can also be excluded fro the bare
metal profile.
This bug results from BSP update:
- CRPT: Base address of secure or non-secure crypto module, dependent on partition
- CRPT_S: Base address of secure crypto module
- CRPT_NS: Base address of non-secured crypto module
The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c
At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.
So let's remove these few lines of code which are causing trouble.
Remove an obsolete HAL implementation from LPC408X to fix the GCC_ARM
build with the "-flto" flag.
With the lto enabled, unreferenced buffers defined in ethernet_api.c
were not excluded at link time overflowing the 16kB peripheral SRAM1
(ld error: "section '.AHBSRAM1' will not fit in region 'ETH_RAM'").
The Ethernet HAL API is deprecated in favor of EMAC.
While testing it has been found that all tests are skipped in the FPGA uart test on the NRF52840 target.
This is caused by the following change:
https://github.com/ARMmbed/mbed-os/pull/12379 - Add STDIO UART as restricted for FPGA testing for all targets
NRF targets have MUXed pins and mainly do not provide pin-maps. There are only dummy pin-maps for testing.
These pin-maps hold only pins and do not specify the peripheral or function of the pin (always 0). Because of that if we restrict STDIO uart peripheral (0) all FPGA uart test cases will be skipped.
To fix this we will remove this restriction for NRF52840. Restriction for testing the USBTX, USBRX pins is sufficient in this case.
Align with mainline BSP and fix relevant bugs:
1. Align with SPI module naming
(1) Remove SPI5
(2) Degrade QSPI0 to SPI4 so that it can use for standard SPI
2. Fix some code lacking GPIO H
3. Implement __PC(...) by following BSP instead of with MBED_CALLER_ADDR()
4. Add SCU_IRQHandler(). Change printf(...) with interrupt-safe error(...)
5. Other minor alignment change
The existing logic was insufficient to properly handle odd and even
parity setting, e.g. serial_getc() returned 9-bit data for 8O1
transmission format.
1. Do not disable and enable osillators during deep sleep
entry and exit
2. Increase the deep sleep to pass tests
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
It is required by Mbed HAL API to generate TxIrq interrupt when TXD register is empty (also after enabling TxIrq interrupt):
f73a62afbf/hal/serial_api.h (L144-L147)
The driver uses DMA to perform uart transfer and TxIrq is generated after the transfer is finished.
While enabling TxIrq we will check if TXD reg is empty and manually trigger the interrupt.
1. Re-organize to make clear for all targets/toolchains support in single startup file
2. Inline assembly syntax is limited, esp. on IAR. Try paving the way for accessing external symbols still in inline assembly instead of re-write in assembly.
1. Enable GCC support on non-secure targets
2. Disable GCC support on secure targets becasue of GCC bug (as of 9-2019-q4-major): In non-secure entry function, callee-saved registers must be restored, but they are incorrectly cleared at optimization level "Os".
In STM32 Cube HAL, in interrupt mode (async),
2 bytes can be prepared in hardware registers without any read
(1 in regular register, the other in shift register),
but Only 1 RX byte can stored in hardware register, specially when there is no hardware FIFO.
If interrupt handling is fast enough, each read is made in parralele of the write.
But if interrupt handling is too long or is interrupted for too long,
it can happen that one read byte is lost (overrun).
For STM32F4, Tickless has been deactivated to avoid such issue.
For STM32L0, we don't want to deactivate tickless,
because those chips are specially design for lowpower.
So instead of removing SPI async mode,
we propose to change the HAL behavior specially for L0:
each byte is send only when previous read is performed.
Thus only 1 RX byte at a time which is saved in hardware register.
This prevent overrun, but it introduceS some latency between each byte send,
this is why it is not applied to all STM32 families.
Add a "used" attribute to __vector_handlers to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST. )
This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to __vector_handlers to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST.)
This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to __vector_handlers to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST.)
This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to __vector_handlers to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST.)
This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to __vector_handlers to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST.)
This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to __vector_handlers to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST. )
This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to __vector_handlers to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST. )
This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to interruptVectors to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST. )
This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to hyperflash_config/image_vector_table to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST. )
This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to IVT_NAME/blank_checksum
to fix ARMC6 build with the "-flto" flag. (Error: L6236E: No section matches
selector - no section to be FIRST/LAST. )
This attribute, attached to a function, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to IVT_NAME/blank_checksum
to fix ARMC6 build with the "-flto" flag. (Error: L6236E: No section matches
selector - no section to be FIRST/LAST. )
This attribute, attached to a function, means that code must be emitted
for the function even if it appears that the function is not referenced.
Add a "used" attribute to ulDebugHeader (placed in signature_section section)
to fix ARMC6 build with the "-flto" flag. (Error: L6236E: No section matches
selector - no section to be FIRST/LAST. )
This attribute, attached to a function, means that code must be emitted
for the function even if it appears that the function is not referenced.
Fix for the error caused by lto on armc6 compiler:
L6137E: Symbol RTC_IRQHandler was not preserved by the LTO codegen but is needed by the image.
lto optimization cause that local symbol RTC_IRQHandler(from rtc_api.c)
somehow interferes with global symbol RTC_IRQHandler (from startup_stm32f070xb.S)
Changing local RTC_IRQHandler to _RTC_IRQHandler fixes problem
Add a "used" attribute to Reset_Handler_Cascade to fix GCC build with
the "-flto" flag.
This attribute, attached to a function, means that code must be emitted
for the function even if it appears that the function is not referenced.
Acording to the description in `gpio_irq_hal_api.h` file `gpio_irq_init()` should return 0 on success.
Currently, it returns 1 causing the FPGA test to fail.
1. Enable IAR on non-secure targets
2. Disable IAR on secure targets because:
(1) IAR toolchain bug: As of IAR 8.32, cmse_nonsecure_caller() is not always inlined.
(2) TFM hasn't supported IAR yet.
1. On M2351, SYS/CLK registers are hard-wired to secure. Define MBED_TZ_DEFAULT_ACCESS to 1 so that all non-secure user threads have access to call secure functions to control these registers.
2. MBED_TZ_DEFAULT_ACCESS is only meaningful for non-secure target. Define it only for non-secure target in targets.json.
3. On TFM target, MBED_TZ_DEFAULT_ACCESS has defined in mbed_lib.json. Avoid duplicate definition which IAR assembler doesn't allow.
Major changes:
- Dependency to FileHandle removed from base classes
- AT_CellularDevice owns the default FileHandle and shares it with AT -classes
- Hang-up -detection moved as CellularContext::configure_hup(). Cannot be configured via CellularDevice any more.
Result on NRF52840_DK + BG96:
GCC:
Total Static RAM memory (data + bss): 29360(+296) bytes
Total Flash memory (text + data): 130660(-832) bytes
ARM:
Total Static RAM memory (data + bss): 261554(+8) bytes
Total Flash memory (text + data): 127573(-1193) bytes
IAR:
Total Static RAM memory (data + bss): 25479(+296) bytes
Total Flash memory (text + data): 102418(-527) bytes
RAM increase is because now ATHandler is no longer created with new -operator but is now member of AT_CellularDevice,
so image tool is able to count it. Actually total RAM consumption has decreased due to removed variables.
Adding a new target of HW development kit using [Samsung Exynos i S111](https://www.samsung.com/semiconductor/minisite/exynos/products/iot/exynos-i-s111/) module to Mbed-OS.
This will widen the HW choices of Mbed-OS enabled NB-IoT, GNSS and Security (eFuse, AES, SHA-2, PKA, Secure Storage, Security Sub-System, [PUF](https://en.wikipedia.org/wiki/Physical_unclonable_function)) modules.
Target Name: S5JS100
Co-authored-by: Ivan Galkin <ivan.galkin@samsung.com>
Co-authored-by: Seokwon Lee <swon.lee@samsung.com>
Co-authored-by: Zhizhe Zhu <zhizhe.zhu@samsung.com>
Co-authored-by: Xinyi Zhao <xinyi.zhao@samsung.com>
Make an exception for this target and enable lp-ticker when LSE is not available.
This exception is added because of with disabled lp-ticker (and BLE feature) we have the following linker error with ARM compiler:
[Error] @0,0: L6218E: Undefined symbol hciCmdAlloc (referred from BUILD/tests/MTB_UBLOX_ODIN_W2/ARM/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/TOOLCHAIN_ARM/libublox-odin-w2-driver.ar(hci_vendor_cmd.o)).
[Error] @0,0: L6218E: Undefined symbol hciCmdSend (referred from BUILD/tests/MTB_UBLOX_ODIN_W2/ARM/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/TOOLCHAIN_ARM/libublox-odin-w2-driver.ar(hci_vendor_cmd.o)).
It looks like the folloiwng library must be updated:
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/TOOLCHAIN_ARM/libublox-odin-w2-driver.ar
According to the documentation of STM32F437VG76 MCU:
The LSI RC acts as an low-power clock source that can be kept running in Stop and
Standby mode for the independent watchdog (IWDG) and Auto-wakeup unit (AWU). The
clock frequency is around 32 kHz. For more details, refer to the electrical characteristics
section of the datasheets.
It seems that typical LSI frequency is 32 kHz, but it may vary from 17 to 47 kHz!
This means that lp-timer test may fail on the same board because lp-ticker frequency is unstable.
This will optimize down the time it takes to restore the clock
settings when getting out of deep sleep.
If 48MHz is available let's use it, otherwise at least 4MHz should be
available for any MCU with MSI.
Support secure/non-secure combined build for PSA target:
1. In secure post-build, deliver built secure image to TARGET_NU_PREBUILD_SECURE
directory.
2. In non-secure post-build, merge non-secure image with secure image saved in
TARGET_NU_PREBUILD_SECURE directory.
3. In non-secure post-build, user can also drop secure image saved in
TARGET_NU_PREBUILD_SECURE directory and provide its own by adding the line below
in mbed_app.json:
"target.extra_labels_remove": ["NU_PREBUILD_SECURE"]
On M2351, some spaces like SYS/CLK are hard-wired to secure and cannot change.
To access these spaces from non-secure world, we must provide platform-specific NSC
functions. With TFM introduced, we must synchronize NSC calls into TFM to keep TFM
in sync instead of straight NSC calls. To achieve this goal, we go with the following
approach:
1. Like PSA APIs, enforce locked entry through tfm_ns_lock_dispatch().
2. Run platform-specific secure functions in default secure partition, in which SYS/CLK
spaces have been configured to be accessible.
DEBUG_NRF_USER gets defined for build profiles (develop, debug)
which do not define NDEBUG (see nrf_assert.h). Therefore the definition
of the function should also be visible if DEBUG_NRF_USER is defined.
All targets must implement soft_- and hard_power_on/off() functions which are practically same what onboard_modem_api offered.
These were seen as a duplicate features and therefore we removed this.
All targets involved have been updated to reflect the changes
On IAR, configure heap to 1KiB at a minimum and expandable, dependent on available SRAM. This requires IAR 8.x.
Support targets:
- NUMAKER_PFM_NUC472 w/ and w/o XRAM
- NUMAKER_PFM_M453
- NUMAKER_PFM_M487/NUMAKER_IOT_M487
- NUMAKER_IOT_M263A
- NUMAKER_M252KG
Replaced a hardcoded timeout in CyH4TransportDriver.cpp with a cypress
hal function. The cypress PUTC hal API only blocks until data has been
send into the HW buffer, not until all data has been out of the HW
buffer. Modified an API to block untill all tx transmit is complete.
This allows the removal of a hardcoded timeout in
CyH4TransportDriver.cpp that waits for data int the HW buffer to be
sent.
- By default, Mbed OS build tools use standard C library for all supported toolchains.
It is possible to use smaller C libraries by overriding the "target.default_lib" option
with "small". This option is only currently supported for the GCC_ARM toolchain.
This override config option is now extended in the build tool for ARM toolchain.
- Add configuration option to specify libraries supported for each toolchain per targets.
- Move __aeabi_assert function from rtos to retarget code so it’s available for bare metal.
- Use 2 memory region model for ARM toolchain scatter file for the following targets:
NUCLEO_F207ZG, STM32F411xE, STM32F429xI, NUCLEO_L073RZ, STM32F303xE
- Add a warning message in the build tools to deprecate uARM toolchain.
- NewLib-Nano C library is not supporting floating-point and printf with %hhd,%hhu,%hhX,%lld,%llu,%llX
format specifier so skipping those green tea test cases.
New members are added to the network interface
-getaddrinfo
-getaddrinfo_async
gethostbyname is unchanged but gethostbyname_async result param now contains results od DNS records found.
Test cases for sync/async added added to DNS test folder.
Chun-Chieh Li
Anna Bridge
Dustin Crossman
jeromecoutant
Rajkumar Kanagaraj
Martin Kojtal
Evelyne Donnaes
amq
Steven Cooreman
Przemyslaw Stekiel
midd
Tamas Kaman
Alan Mock
Filip Jagodzinski
Bartek Szatkowski
Eduardo Avelar
Hugues Kamba
Stephen Blackheath
Alvin Lee
Laurent Meunier
thegecko
Gabor Abonyi
Michal Paszta
Mahesh Mahadevan
Marcelo Salazar
Alexandre Bourdiol
Maciej Bocianski
Filip Jagodzinski
Pawel Zarembski
Qinghao Shi
Kevin Bracey
Ari Parkkila
pea-pod
Kimmo Vaisanen
PARKJIHOON
Andrew Chong
Devaraj Ranganna
Janne Kiiskila
Chris Trowbridge
Veijo Pesonen
d-kato
YARB(Cypress)
George Beckstein
cyliangtw
Leon Lindenfelser
Tymoteusz Bloch
Antti Kauppila
Shuopeng Deng
toyowata