mirror of https://github.com/ARMmbed/mbed-os.git
EFM32: update emlib changelog
amq
parent
c966c4242f
commit
9399887686
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@ -1,4 +1,199 @@
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================ Revision history ============================================
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Gecko Platform 2.7.1.0 (32-bit MCU SDK 5.9.1.0)
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- No changes.
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Gecko Platform 2.7.0.0 (32-bit MCU SDK 5.9.0.0)
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* Added
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- MSC_MassErase() function is added for Series-2 devices.
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- Add remote frame support in EMLIB CAN.
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* Fixed
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- CHIP_Init() sets HFRCOEM23 clock as TRACECLK.
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- EMLIB IADC: The definition of `iadcNegInputGnd` has been modified
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to set PINNEG to 1. This prevents a polarity error when performing
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IADC conversions between supply pins and ground.
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- Fixed conversion of raw data in IADC_ConvertRawDataToResult().
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- Fixed issue that could cause dcdcEm01LoadCurrent_mA, a parameter
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of EMU_DCDCOptimizeSlice(),to be used before value assignment.
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* Deprecated
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- Functions in em_msc are placed in flash for Series-0 and
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Series-1 devices, except for the EFM32G. MSC_WriteWordFast()
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function is deprecated. Calling the MSC_WriteWordFast()
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function will have the same effect as calling MSC_WriteWord().
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Gecko Platform 2.6.1.0 (32-bit MCU SDK 5.8.1.0)
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* Added
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- The SE_OTPInit_t-struct has been expanded to include the options
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to apply narrow and full-page locks. The documentation of the
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existing struct-members has been improved.
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* Fixed
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- em_letimer: Previously, when calling LETIMER_Init() with
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comp0Top=true, the code would always write to the COMP0 or TOP
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register even if topValue was zero. This has now been changed
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so that the COMP0 or TOP register is written only if the
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topValue is != 0. This is to preserve backwards compatibility
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with applications that call LETIMER_CompareSet() before
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LETIMER_Init().
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Gecko Platform 2.6.0.0 (32-bit MCU SDK 5.8.0.0)
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* Added
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- Added AES PCBC mode to em_crypto.
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- Added support for PLFRCO on EFR32xG13 Rev D devices using the
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em_cmu API. This oscillator is supported on some Rev D devices.
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Note that using PLFRCO on previous revisions will result in an
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assertion error, and code trying to enable this oscillator will
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block and not return.
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- Added support for LFRCO precision configuration for Series 2.
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- Added LETIMER_CounterGet() and LETIMER_CounterSet() functions to
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em_letimer.
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- Added TIMER_SyncWait() function to em_timer.
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* Changed
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- Added AES PCBC mode to em_crypto.
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- Added support for PLFRCO on EFR32xG13 Rev D devices using the
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em_cmu API. This oscillator is supported on some Rev D devices.
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Note that using PLFRCO on previous revisions will result in an
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assertion error, and code trying to enable this oscillator will
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block and not return.
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- Added support for LFRCO precision configuration for Series 2.
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- Added LETIMER_CounterGet() and LETIMER_CounterSet() functions to
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em_letimer.
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- Added TIMER_SyncWait() function to em_timer.
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* Fixed
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- Corrected GPIO port D pin count for EFR32xG13, EFR32xG14 and xGM13
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devices.
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- In the license example for SLSTK3402A_EFM32PG12, reorder calls to
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ACMP_Init and ACMP_VASetup in order to avoid ACMP_Init overwriting
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registers set by ACMP_VASetup.
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- Fixed GPIO availability info in CMSIS device header files for
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Series 2.
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- Added a workaround for EFM32ZG and EFM32HG devices that deals with a
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problem reported in errata EMU_E107. (EMU_E107: An HF-IRQ received
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during EM2 or EM3 entry would cause the EMU to ignore the
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SLEEPDEEP-flag.)
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5.7.0
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* Added
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- Added general support for EFM32GG12 and EFR32xG21.
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- emdbg: Added DBGDisableDebugAccess() for debug lock abstraction.
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- emcmu: Added CMUUSHFRCOFreqGet() function for getting current USHFRCO
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frequencyon Series 0 and 1.
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- empdm: New module supporting PDM (Pulse Density Modulation) peripheral.
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- emldma: Added PDM sinal and source selector, added new LDMA descriptor
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template for word(32bit) peripheral to memory tranfers.
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- emrtc: Added support for all 6 compare channels on Series 1.
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- emcmu: Added support for HFBUSPRESC in CMUClockPrescSet() and
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CMUClockPrescGet().
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- emcmu: Added missing RTCC prescaled clock freq calculation.
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- emcmu: Added missing support for LETIMER1.
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- emadc: Added support for prescaler and timebase calculation in SYNC mode
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for HFPERCCLKdriven ADC.
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- Updated multiple modules to use correct HFPER clock tree (A, B or C)
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when calling CMUClockFreqGet()function.
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- emse: New module, contains API for interfacing with the Secure
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Element (SE) peripheral onSeries 2. Module contains functions to get
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status information from the SE, interact with debuglocks, and write
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keys and user data. The module is also used by mbed TLS when performing
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accelerated crypto operations.
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* Changed
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- emcmu: CMUOscillatorEnable() will wait for the RDY flag to go low when
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enable is false andwait is true for Series 1.
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- emcmu: CMULFXOInit() will now check if configuration is necessary before
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disabling the LFXO. On a soft reset, the LFXO might already be ready for
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use with correct tuning values.
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- emcmu: CMUHFXOInit() now returns early if HFXO is already selected
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as SYSCLK.
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- emcmu: Updated max frequency for WS2/1.0V scaling according to latest
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datasheets.
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* Fixed
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- emwdog: Changing default oscillator for the watchdog from 1 kHz ULFRCO
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to the 32.768 kHzLFRCO. This change is inside WDOGINITDEFAULT. Make sure
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we wait for previous opera-tions to complete before applying any new
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configurations to work correctly with the asynchronousperipheral.
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- Adding a timeout so operations started when SYNCBUSY stays high will
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complete.
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- emmsc: Unlock the MSC before write/erase operations and return to the
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previous state beforethe function returns.
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- emadc: GPBIASACC is set to LOWACC when reading the internal temperature
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sensor for Series2.
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- emcmu: Fixed bug where HFRCODIV2 remains selected for certain
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configurations after theDPLL is initialized.
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* Removed
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- emcmu: Removed CMUHFCLKLEPRESCREG case from switch statement inside the
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functionCMUClockPrescSet(). This switch case is unnecessary since
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HFCLKLE prescaler is automaticallyset when the HF clock is changed.
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5.6.0
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* Added
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- EMLIB targets CMSIS version 5.3.0.
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- MSC write and erase functions return an error code when the MSC register
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interface is locked.
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- Added initialization of HYSTERESIS0 and HYSTERESIS1 in ACMPInit() for
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series-1 devices.
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- Added function to route PRS output to GPIO pins for Series 0 and 1
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- Added missing argument to CRYPTOInstructionSequenceExecute() inside
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the CRYPTOEXECUTE20macro.
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- Added support for setting and getting the LETIMER top value using the
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new LETIMERTopGet()and LETIMERTopSet() functions.
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- Added new member to the LETIMERInitTypeDef struct called topValue. This
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value can beused to initialize the top value when using the LETIMER.
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- Added const to CMUDPLLLock() argument and added new default initializer.
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- Added handling of CLKIN and HFRCODIV2 in CMU.
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- Added support for all 23 PRS channels for EFM32GG11.
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- Added full EBI support for EFM32GG11.
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* Changed
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- Disable WREN in the MSCMassErase() function before returning.
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- Added missing call to CMUOscillatorEnable() when HFXO AutoStart is used.
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- WDOGnInit() will only wait for synchronization if the peripheral is
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already enabled.
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- When an instruction fetch results in a bus fault (e.g. from an external
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device), the bus fault ispropagated to the core, but at the same time,
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the data may be cached. This means that nexttime this instruction
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is fetched, the core may get invalid data, but without any bus fault.
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ICacheis now flushed at the event of a bus fault to work around this
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issue.
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- Fixed PCNTnCNTSIZE for multiple families.
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5.5.0
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* Added
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- Added support additional HFPERCLK trees on EFM32 Giant Gecko 11.
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- Added autoCsEnable parameter to USARInitSyncTypeDef and
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USARTInitAsyncTypeDef forseries 0 parts.
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- Added EMURamPowerUp() function for series 1 devices to power up all
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SRAM blocks.
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- Adding restoring of HFRCO frequency when calling EMUEnterEM2(true)
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and voltage scaling isenable in EM2/EM3.
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- Added support for opamp OPA3.
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* Fixed
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- Fixed issue where TX data could be lost when calling
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LEUARTTxDmaInEM2Enable() whentransmitter is enabled and sending data.
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- Added support for unaligned data in CRYPTO AES functions.
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- In ADC asynchronous clock mode, assert on ADC clock frequency less or
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equal to 2/3 of theHFPER clock frequency.
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- In ADCInit(), set ADC clock mode for correct ADC instance.
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- Change behavior of GPIOEM4SetPinRetention() so it does not overwrite
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GPIO retention configwhen SWUNLATCH is already set.
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- Check RSTEN before waiting for register synchronization in BURTC module.
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- Fixed bug with wait-state handling when low-voltage mode is used in
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EM2/EM3. This was fixedby enabling automatic hardware handling of
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wait-states.
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- Changed minimum ’N’ requirement in CMUDPLLLock() from 32 to greater
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than 300.
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- Added support for USBLE clock in CMUClockFreqGet().
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* Removed
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- Removed support for PLFRCO in CMU.
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5.4.0
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* Added
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- Added support for LCD dynamic charge distribution (low power feature).
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- Added support for ECC memory initialization using the function
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MSCEccConfigSet().
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* Fixed
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- Fixed bug in assert statement in COREInitNvicVectorTable().
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- Fixed hardware bug when switching to EM4S when powering analog peripherals
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from DVDD. This bugfix is active for EFM32GG11 and EFM32TG11.
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- Ensure that RX/TX is disabled when configuring RX/TX DMA wakeup.
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- Fixed bug with wait state handling when MSC is locked.
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- Renamed ACMPCTRLPWRSELVREGVDD to ACMPCTRLPWRSELDVDD.
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5.3.3
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- em_cmu: 48 MHz HFRCO band selectable for devices that support it.
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- em_emu: Added macro guards for BU mode functionality for series 0 devices.
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