mirror of https://github.com/ARMmbed/mbed-os.git
Support NuMaker M453, NUC472, M2351 & M263 USBD; also support M0 usb-isr non-recloate vector limit
parent
a5aaabff5d
commit
abf3eeed64
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@ -36,8 +36,11 @@ static USBPhyHw *instance;
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#define MBED_CONF_TARGET_USB_DEVICE_HSUSBD 1 /* USB 2.0 Only */
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#endif
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extern "C" void USBD_IRQHandler(void);
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void chip_config(void)
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{
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#if defined(TARGET_M451)
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/* Enable USBD module clock */
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CLK_EnableModuleClock(USBD_MODULE);
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@ -180,12 +183,16 @@ void USBPhyHw::init(USBPhyEvents *events)
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chip_config();
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/* Initial USB engine */
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#if defined (TARGET_NANO100)
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USBD->CTL = 0x29f;
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USBD->PDMA |= USBD_PDMA_BYTEM_Msk;
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#else
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USBD->ATTR = 0x7D0;
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#endif
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/* Set SE0 (disconnect) */
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USBD_SET_SE0();
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NVIC_SetVector(USBD_IRQn, (uint32_t) &_usbisr);
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NVIC_SetVector(USBD_IRQn, (uint32_t) &USBD_IRQHandler);
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NVIC_EnableIRQ(USBD_IRQn);
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instance = this;
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@ -220,7 +227,12 @@ void USBPhyHw::connect()
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memset(read_sizes, 0, sizeof(read_sizes));
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memset((void *)s_ep_valid, 0, sizeof(s_ep_valid));
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#if defined (TARGET_NANO100)
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USBD->BUFSEG = 0;
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#else
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USBD->STBUFSEG = 0;
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#endif
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frame_cnt = 0;
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@ -254,17 +266,29 @@ void USBPhyHw::disconnect()
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{
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uint32_t volatile i = 0;
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#if defined (TARGET_NANO100)
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SYS->IPRST_CTL2 = SYS_IPRST_CTL2_USBD_RST_Msk;
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#else
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SYS->IPRST1 = SYS_IPRST1_USBDRST_Msk;
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#endif
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for(i=0;i<1000;i++)
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;
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#if defined (TARGET_NANO100)
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SYS->IPRST_CTL2 = 0;
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#else
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SYS->IPRST1 = 0;
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#endif
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s_ep_buf_ind = 0;
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/* Initial USB engine */
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#if defined (TARGET_NANO100)
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USBD->CTL = 0x29f;
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USBD->PDMA |= USBD_PDMA_BYTEM_Msk;
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#else
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USBD->ATTR = 0x7D0;
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#endif
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/* Set SE0 (disconnect) */
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USBD_SET_SE0();
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@ -273,7 +297,13 @@ void USBPhyHw::disconnect()
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memset(read_sizes, 0, sizeof(read_sizes));
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memset((void *)s_ep_valid, 0, sizeof(s_ep_valid));
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#if defined (TARGET_NANO100)
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USBD->BUFSEG = 0;
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#else
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USBD->STBUFSEG = 0;
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#endif
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frame_cnt = 0;
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@ -335,7 +365,11 @@ void USBPhyHw::set_address(uint8_t address)
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/* Wake upstream devices */
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void USBPhyHw::remote_wakeup()
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{
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#if defined (TARGET_NANO100)
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USBD->CTL |= USBD_CTL_RWAKEUP_Msk;
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#else
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USBD->ATTR |= USBD_ATTR_RWAKEUP_Msk;
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#endif
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}
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/*
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@ -444,11 +478,11 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size)
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void stallEndpoint(uint8_t endpoint)
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{
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uint32_t ep_hw_index = DESC_TO_LOG(endpoint);
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if (ep_hw_index >= NUMBER_OF_PHYSICAL_ENDPOINTS)
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uint32_t ep_logic_index = DESC_TO_LOG(endpoint);
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if (ep_logic_index >= NUMBER_OF_LOGICAL_ENDPOINTS)
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return;
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USBD_SetStall(NU_EPL2EPH(ep_hw_index));
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USBD_SetStall(ep_logic_index);
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}
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/* Protocol stall on endpoint 0.
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@ -608,11 +642,18 @@ void USBPhyHw::process()
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uint32_t u32IntSts = USBD_GET_INT_FLAG();
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uint32_t u32State = USBD_GET_BUS_STATE();
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#if defined (TARGET_NANO100)
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if(u32IntSts & USBD_INTSTS_FLD_STS_Msk)
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#else
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if(u32IntSts & USBD_INTSTS_VBDETIF_Msk)
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#endif
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{
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// Floating detect
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#if defined (TARGET_NANO100)
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USBD_CLR_INT_FLAG(USBD_INTSTS_FLD_STS_Msk);
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#else
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USBD_CLR_INT_FLAG(USBD_INTSTS_VBDETIF_Msk);
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#endif
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if(USBD_IS_ATTACHED())
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{
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/* USB Plug In */
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@ -625,36 +666,58 @@ void USBPhyHw::process()
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}
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}
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#if defined (TARGET_NANO100)
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if(u32IntSts & USBD_INTSTS_BUS_STS_Msk)
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#else
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if(u32IntSts & USBD_INTSTS_BUSIF_Msk)
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#endif
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{
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/* Clear event flag */
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#if defined (TARGET_NANO100)
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USBD_CLR_INT_FLAG(USBD_INTSTS_BUS_STS_Msk);
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if(u32State & USBD_BUSSTS_USBRST_Msk)
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#else
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USBD_CLR_INT_FLAG(USBD_INTSTS_BUSIF_Msk);
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if(u32State & USBD_ATTR_USBRST_Msk)
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#endif
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{
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/* Bus reset */
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USBD_ENABLE_USB();
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USBD_SwReset();
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USBD_SwReset();
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connect();
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events->reset();
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}
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#if defined (TARGET_NANO100)
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if(u32State & USBD_BUSSTS_SUSPEND_Msk)
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#else
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if(u32State & USBD_ATTR_SUSPEND_Msk)
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#endif
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{
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/* Enable USB but disable PHY */
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USBD_DISABLE_PHY();
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}
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#if defined (TARGET_NANO100)
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if(u32State & USBD_BUSSTS_RESUME_Msk)
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#else
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if(u32State & USBD_ATTR_RESUME_Msk)
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#endif
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{
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/* Enable USB and enable PHY */
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USBD_ENABLE_USB();
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}
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}
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#if defined (TARGET_NANO100)
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if(u32IntSts & USBD_INTSTS_USB_STS_Msk)
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#else
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if(u32IntSts & USBD_INTSTS_USBIF_Msk)
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#endif
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{
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/* USB event */
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if(u32IntSts & USBD_INTSTS_SETUP_Msk)
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if(u32IntSts & USBD_INTSTS_SETUP_Msk)
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{
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/* Setup packet */
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/* Clear event flag */
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@ -704,10 +767,10 @@ void USBPhyHw::process()
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#if defined(TARGET_M451)
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ep_status = (USBD->EPSTS >> (ep_hw_index * 3 + 8)) & 0x7;
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#elif defined(TARGET_NANO100)
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if(ep_hw_index < 5)
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ep_status = (USBD->EPSTS >> (ep_hw_index * 4) + 8) & 0x7;
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if(ep_hw_index < 6)
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ep_status = (USBD->EPSTS >> (ep_hw_index * 4 + 8)) & 0xF;
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else
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ep_status = (USBD->EPSTS2 >> ((ep_hw_index - 4) * 4)) & 0x7;
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ep_status = (USBD->EPSTS2 >> ((ep_hw_index - 6) * 4)) & 0x7;
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#elif defined(TARGET_M480) || defined(TARGET_M2351) || defined(TARGET_M261)
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if(ep_hw_index < 8)
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ep_status = (USBD->EPSTS0 >> (ep_hw_index * 4)) & 0x7;
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@ -740,7 +803,7 @@ void USBPhyHw::process()
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}
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}
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void USBPhyHw::_usbisr(void)
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extern "C" void USBD_IRQHandler(void)
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{
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instance->events->start_process();
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}
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@ -765,8 +828,11 @@ static volatile int epComplete = 0;
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#elif defined (TARGET_NUC472)
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#define USBD_GET_EP_MAX_PAYLOAD(ep) *((__IO uint32_t *) ((uint32_t)&USBD->EPAMPS + (uint32_t)(ep*0x28)))
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#define USBD_GET_EP_DATA_COUNT(ep) *((__IO uint32_t *) ((uint32_t)&USBD->EPADATCNT + (uint32_t)(ep*0x28)))
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#define USBD_SET_EP_SHORT_PACKET(ep) *((__IO uint32_t *) ((uint32_t)&USBD->EPARSPCTL+(uint32_t)(ep*0x28)))=((*((__IO uint32_t *)((uint32_t)&USBD->EPARSPCTL+(uint32_t)(ep*0x28))) & 0x10) | 0x40)
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#define USBD_GET_EP_INT_EN(ep) *((__IO uint32_t *) ((uint32_t)&USBD->EPAINTEN + (uint32_t)(ep*0x28)))
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#define USBD_SET_EP_SHORT_PACKET(ep) *((__IO uint32_t *) ((uint32_t)&USBD->EPARSPCTL + (uint32_t)(ep*0x28))) = ((*((__IO uint32_t *)((uint32_t)&USBD->EPARSPCTL+(uint32_t)(ep*0x28))) & 0x10) | 0x40)
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#define USBD_SET_EP_BUF_FLUSH(ep) *((__IO uint32_t *) ((uint32_t)&USBD->EPARSPCTL + (uint32_t)(ep*0x28))) = USBD_EPRSPCTL_FLUSH_Msk
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#define USBD_GET_EP_INT_EN(ep) *((__IO uint32_t *) ((uint32_t)&USBD->EPAINTEN + (uint32_t)(ep*0x28)))
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#define USBD_GET_EP_INT(ep) *((__IO uint32_t *) ((uint32_t)&USBD->EPAINTSTS + (uint32_t)(ep*0x28)))
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#define USBD_CLR_EP_INT(ep, intr) (*((__IO uint32_t *) ((uint32_t)&USBD->EPAINTSTS + (uint32_t)(ep*0x28))) = (intr)) /*!<Enable EPx Interrupt \hideinitializer */
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#endif
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static volatile uint32_t s_ep_compl = 0;
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@ -880,7 +946,7 @@ void USBPhyHw::init(USBPhyEvents *events)
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/* Set SE0 (disconnect) */
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USBD_SET_SE0();
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NVIC_SetVector(USBD_IRQn, (uint32_t) &_usbisr);
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NVIC_SetVector(USBD_IRQn, (uint32_t) &USBD_IRQHandler);
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NVIC_EnableIRQ(USBD_IRQn);
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#elif defined (TARGET_M480)
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@ -897,10 +963,10 @@ void USBPhyHw::init(USBPhyEvents *events)
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HSUSBD_SET_SE0();
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#if defined (TARGET_M480)
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NVIC_SetVector(USBD20_IRQn, (uint32_t) &_usbisr);
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NVIC_SetVector(USBD20_IRQn, (uint32_t) &USBD_IRQHandler);
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NVIC_EnableIRQ(USBD20_IRQn);
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#elif defined (TARGET_NUC472)
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NVIC_SetVector(USBD_IRQn, (uint32_t) &_usbisr);
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NVIC_SetVector(USBD_IRQn, (uint32_t) &USBD_IRQHandler);
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NVIC_EnableIRQ(USBD_IRQn);
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#endif
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#endif
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@ -964,7 +1030,7 @@ void USBPhyHw::connect()
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s_ep_buf_ind = s_ep0_max_packet_size;
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/* Enable USB/CEP interrupt */
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USBD_ENABLE_USB_INT(USBD_GINTEN_USBIEN_Msk | USBD_GINTEN_CEPIEN_Msk);
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USBD_ENABLE_USB_INT(USBD_GINTEN_USBIE_Msk | USBD_GINTEN_CEPIE_Msk);
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USBD_ENABLE_CEP_INT(USBD_CEPINTEN_SETUPPKIEN_Msk| USBD_CEPINTEN_STSDONEIEN_Msk);
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/* Enable BUS interrupt */
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@ -1276,25 +1342,25 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_
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switch (type)
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{
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case USB_EP_TYPE_INT:
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ep_type = USBD_EP_CFG_TYPE_INT;
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ep_type = USB_EP_CFG_TYPE_INT;
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break;
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case USB_EP_TYPE_ISO:
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ep_type = USBD_EP_CFG_TYPE_ISO;
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ep_type = USB_EP_CFG_TYPE_ISO;
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break;
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default:
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ep_type = USBD_EP_CFG_TYPE_BULK;
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ep_type = USB_EP_CFG_TYPE_BULK;
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}
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uint32_t ep_dir = ((endpoint & EP_DIR_Msk) == EP_DIR_IN) ? USBD_EP_CFG_DIR_IN : USBD_EP_CFG_DIR_OUT;
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uint32_t ep_dir = ((endpoint & EP_DIR_Msk) == EP_DIR_IN) ? USB_EP_CFG_DIR_IN : USB_EP_CFG_DIR_OUT;
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USBD_ConfigEp(ep_hw_index, DESC_TO_LOG(endpoint), ep_type, ep_dir);
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/* Enable USB/EPX interrupt */
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// NOTE: Require USBD_GINTEN_EPAIE_Pos, USBD_GINTEN_EPBIE_Pos, ... USBD_GINTEN_EPLIE_Pos to be consecutive.
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USBD_ENABLE_USB_INT(USBD->GINTEN | USBD_GINTEN_USBIEN_Msk |
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USBD_GINTEN_CEPIEN_Msk |
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1 << (ep_hw_index + USBD_GINTEN_EPAIEN_Pos));
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USBD_ENABLE_USB_INT(USBD->GINTEN | USBD_GINTEN_USBIE_Msk |
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USBD_GINTEN_CEPIE_Msk |
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1 << (ep_hw_index + USBD_GINTEN_EPAIE_Pos));
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if (ep_dir != 0)
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USBD_ENABLE_EP_INT(ep_hw_index, USBD_EPINTEN_TXPKIEN_Msk);
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@ -1332,7 +1398,7 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint)
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{
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uint32_t ep_hw_index = NU_EPL2EPH(DESC_TO_LOG(endpoint));
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#if defined (TARGET_NUC472)
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USBD->EP[ep_hw_index].EPCFG = USBD->EP[ep_hw_index].EPCFG & ~USBD_EP_CFG_VALID;
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*((__IO uint32_t *) ((uint32_t)&USBD->EPACFG + (uint32_t)(ep_hw_index*0x28))) = (*((__IO uint32_t *)((uint32_t)&USBD->EPACFG+(uint32_t)(ep_hw_index*0x28))) & ~USB_EP_CFG_VALID);
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#elif defined (TARGET_M480)
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HSUSBD->EP[ep_hw_index].EPCFG = HSUSBD->EP[ep_hw_index].EPCFG & ~HSUSBD_EP_CFG_VALID;
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#endif
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@ -1348,9 +1414,9 @@ void USBPhyHw::endpoint_stall(usb_ep_t endpoint)
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uint32_t ep_hw_index = NU_EPL2EPH(ep_logic_index);
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#if defined (TARGET_NUC472)
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if(ep_logic_index == 0)
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USBD_SetEpStall(CEP);
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USBD_SetStall(0);
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else
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USBD_SetEpStall(ep_hw_index);
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USBD_SetStall(ep_logic_index);
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#elif defined (TARGET_M480)
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if(ep_logic_index == 0)
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HSUSBD_SetEpStall(CEP);
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@ -1369,7 +1435,7 @@ void USBPhyHw::endpoint_unstall(usb_ep_t endpoint)
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uint32_t ep_hw_index = NU_EPL2EPH(ep_logic_index);
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#if defined (TARGET_NUC472)
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if(ep_logic_index != 0)
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USBD_ClearEpStall(ep_hw_index);
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USBD_ClearStall(ep_logic_index);
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#elif defined (TARGET_M480)
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if(ep_logic_index != 0)
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HSUSBD_ClearEpStall(ep_hw_index);
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@ -1384,8 +1450,8 @@ bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size)
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uint32_t ep_hw_index = NU_EPL2EPH(ep_logic_index);
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read_buffers[ep_logic_index] = data;
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read_sizes[ep_logic_index] = size;
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#if defined (TARGET_NUC472)
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USBD->EP[ep_hw_index].EPINTEN |= USBD_EPINTEN_RXPKIEN_Msk;
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#if defined (TARGET_NUC472)
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USBD_ENABLE_EP_INT(ep_hw_index, USBD_GET_EP_INT_EN(ep_hw_index) | USBD_EPINTEN_RXPKIEN_Msk);
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#elif defined (TARGET_M480)
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HSUSBD->EP[ep_hw_index].EPINTEN |= HSUSBD_EPINTEN_RXPKIEN_Msk;
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#endif
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@ -1428,14 +1494,6 @@ bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint3
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return true;
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}
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#ifdef USBD_CPU_MODE
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for(i=0;i<gEpReadCnt;i++)
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#if defined (TARGET_NUC472)
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data[i] = USBD->EP[ep_hw_index].EPDAT_BYTE;
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#elif defined (TARGET_M480)
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data[i] = HSUSBD->EP[ep_hw_index].EPDAT_BYTE;
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#endif
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#else
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buffer = (uint32_t)data;
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if(buffer % 4)
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@ -1522,7 +1580,6 @@ bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint3
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#endif
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}
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#endif
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*bytes_read = gEpReadCnt;
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return true;
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}
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@ -1552,7 +1609,7 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size)
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return false;
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#if defined (TARGET_NUC472)
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if(USBD->EP[ep_hw_index].EPDATCNT & 0xFFFF)
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if(USBD_GET_EP_DATA_COUNT(ep_hw_index) & 0xFFFF)
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{
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USBD_SET_EP_SHORT_PACKET(ep_hw_index);
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return false;
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@ -1567,14 +1624,7 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size)
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if(size < mps)
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g_usb_ShortPacket = 1;
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#ifdef USBD_CPU_MODE
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for(i=0;i<size;i++)
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#if defined (TARGET_NUC472)
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USBD->EP[ep_hw_index].EPDAT_BYTE = data[i];
|
||||
#elif defined (TARGET_M480)
|
||||
HSUSBD->EP[ep_hw_index].EPDAT_BYTE = data[i];
|
||||
#endif
|
||||
#else
|
||||
|
||||
while(1)
|
||||
{
|
||||
#if defined (TARGET_NUC472)
|
||||
|
@ -1658,12 +1708,11 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size)
|
|||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined (TARGET_NUC472)
|
||||
if(g_usb_ShortPacket)
|
||||
USBD_SET_EP_SHORT_PACKET(ep_hw_index);
|
||||
USBD->EP[ep_hw_index].EPINTEN |= USBD_EPINTEN_TXPKIEN_Msk;
|
||||
USBD_ENABLE_EP_INT(ep_hw_index, USBD_GET_EP_INT_EN(ep_hw_index) | USBD_EPINTEN_TXPKIEN_Msk);
|
||||
#elif defined (TARGET_M480)
|
||||
if(g_usb_ShortPacket)
|
||||
HSUSBD_SET_EP_SHORT_PACKET(ep_hw_index);
|
||||
|
@ -1679,9 +1728,9 @@ void USBPhyHw::endpoint_abort(usb_ep_t endpoint)
|
|||
uint32_t ep_logic_index = DESC_TO_LOG(endpoint);
|
||||
uint32_t ep_hw_index = NU_EPL2EPH(ep_logic_index);
|
||||
#if defined (TARGET_NUC472)
|
||||
USBD->EP[ep_hw_index].EPINTEN = 0;
|
||||
USBD->EP[ep_hw_index].EPINTSTS = USBD->EP[ep_hw_index].EPINTSTS;
|
||||
USBD->EP[ep_hw_index].EPRSPCTL = USBD_EPRSPCTL_FLUSH_Msk;
|
||||
USBD_CLR_EP_INT(ep_hw_index, USBD_GET_EP_INT(ep_hw_index));
|
||||
USBD_ENABLE_EP_INT(ep_hw_index, 0);
|
||||
USBD_SET_EP_BUF_FLUSH(ep_hw_index);
|
||||
#elif defined (TARGET_M480)
|
||||
HSUSBD->EP[ep_hw_index].EPINTEN = 0;
|
||||
HSUSBD->EP[ep_hw_index].EPINTSTS = HSUSBD->EP[ep_hw_index].EPINTSTS;
|
||||
|
@ -1935,15 +1984,14 @@ void USBPhyHw::process()
|
|||
/* Data Packet Transmitted */
|
||||
if (epxintsts & USBD_EPINTSTS_TXPKIF_Msk)
|
||||
{
|
||||
USBD->EP[ep_hw_index].EPINTEN &= ~USBD_EPINTEN_TXPKIEN_Msk;
|
||||
USBD_ENABLE_EP_INT(ep_hw_index, USBD_GET_EP_INT_EN(ep_hw_index) & ~USBD_EPINTEN_TXPKIEN_Msk);
|
||||
events->in(NU_EPH2EPL(ep_hw_index) | EP_DIR_Msk);
|
||||
|
||||
}
|
||||
|
||||
/* Data Packet Received */
|
||||
if (epxintsts & USBD_EPINTSTS_RXPKIF_Msk)
|
||||
{
|
||||
USBD->EP[ep_hw_index].EPINTEN &= ~USBD_EPINTEN_RXPKIEN_Msk;
|
||||
USBD_ENABLE_EP_INT(ep_hw_index, USBD_GET_EP_INT_EN(ep_hw_index) & ~USBD_EPINTEN_RXPKIEN_Msk);
|
||||
events->out(ep_logic_index);
|
||||
}
|
||||
|
||||
|
@ -2295,7 +2343,7 @@ void USBPhyHw::process()
|
|||
#endif
|
||||
}
|
||||
|
||||
void USBPhyHw::_usbisr(void)
|
||||
extern "C" void USBD_IRQHandler(void)
|
||||
{
|
||||
#if defined (TARGET_NUC472)
|
||||
NVIC_DisableIRQ(USBD_IRQn);
|
||||
|
|
|
@ -57,16 +57,14 @@ public:
|
|||
|
||||
virtual void process();
|
||||
|
||||
private:
|
||||
USBPhyEvents *events;
|
||||
private:
|
||||
uint8_t *read_buffers[16];
|
||||
uint16_t read_sizes[16];
|
||||
|
||||
bool endpoint_read_core(usb_ep_t endpoint, uint32_t max_packet);
|
||||
bool endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead);
|
||||
|
||||
|
||||
static void _usbisr(void);
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
@ -7886,7 +7886,8 @@
|
|||
"FLASH",
|
||||
"EMAC",
|
||||
"MPU",
|
||||
"WATCHDOG"
|
||||
"WATCHDOG",
|
||||
"USBDEVICE"
|
||||
],
|
||||
"release_versions": ["5"],
|
||||
"device_name": "NUC472HI8AE",
|
||||
|
@ -8018,7 +8019,8 @@
|
|||
"FLASH",
|
||||
"MPU",
|
||||
"WATCHDOG",
|
||||
"RESET_REASON"
|
||||
"RESET_REASON",
|
||||
"USBDEVICE"
|
||||
],
|
||||
"components_add": ["FLASHIAP"],
|
||||
"release_versions": ["2", "5"],
|
||||
|
@ -8088,7 +8090,8 @@
|
|||
"SPISLAVE",
|
||||
"SPI_ASYNCH",
|
||||
"WATCHDOG",
|
||||
"RESET_REASON"
|
||||
"RESET_REASON",
|
||||
"USBDEVICE"
|
||||
],
|
||||
"release_versions": ["5"],
|
||||
"device_name": "NANO130KE3BN",
|
||||
|
@ -8788,7 +8791,8 @@
|
|||
"SPI_ASYNCH",
|
||||
"TRNG",
|
||||
"FLASH",
|
||||
"MPU"
|
||||
"MPU",
|
||||
"USBDEVICE"
|
||||
],
|
||||
"detect_code": ["1305"],
|
||||
"release_versions": ["5"],
|
||||
|
@ -9766,7 +9770,8 @@
|
|||
"SPI_ASYNCH",
|
||||
"TRNG",
|
||||
"FLASH",
|
||||
"MPU"
|
||||
"MPU",
|
||||
"USBDEVICE"
|
||||
],
|
||||
"components_add": ["FLASHIAP"],
|
||||
"detect_code": ["1310"],
|
||||
|
|
Loading…
Reference in New Issue